Power semiconductor drive device

Abstract

An object of the present invention is to provide a technology that can appropriately drive a plurality of power semiconductor elements having different reference potentials. [Solution] The power semiconductor drive device comprises a conversion circuit that converts an external serial signal into multiple parallel signals, multiple drive circuits that each drive multiple power semiconductor elements with different reference potentials, multiple level shift circuits connected between the conversion circuit and the multiple drive circuits that level shift the multiple parallel signals to match the reference potentials of the multiple power semiconductor elements, and a voltage holding structure that electrically isolates each of the multiple drive circuits.

Description

[Technical Field]

[0001] The present disclosure relates to power semiconductor drivers. [Background technology]

[0002] Various technologies have been proposed for power semiconductor drive devices. For example, Patent Document 1 proposes a technology in which a plurality of switches are driven using a plurality of parallel signals converted from a serial signal. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-171438 Summary of the Invention [Problem to be solved by the invention]

[0004] On the other hand, in recent years, there has been a growing demand for driving multiple power semiconductor elements with different reference potentials. However, the configuration of Patent Document 1 has the problem that it is not possible to properly drive multiple power semiconductor elements with different reference potentials.

[0005] Therefore, the present disclosure has been made in consideration of the above-mentioned problems, and has an object to provide a technique capable of appropriately driving a plurality of power semiconductor elements having different reference potentials. [Means for solving the problem]

[0006] The power semiconductor driving device according to the present disclosure comprises a conversion circuit that converts an external serial signal into a plurality of parallel signals, a plurality of driving circuits that respectively drive a plurality of power semiconductor elements having different reference potentials, a plurality of level shift circuits that are connected between the conversion circuit and the plurality of driving circuits and that level shift the plurality of parallel signals to match the reference potentials of the plurality of power semiconductor elements, and a voltage holding structure that electrically isolates each of the plurality of driving circuits. [Effects of the Invention]

[0007] According to the present disclosure, a voltage holding structure electrically isolates a plurality of drive circuits that respectively drive a plurality of power semiconductor elements having different reference potentials, and a plurality of level shift circuits level-shift a plurality of parallel signals to match the reference potentials of the plurality of power semiconductor elements. With this configuration, it is possible to appropriately drive a plurality of power semiconductor elements having different reference potentials. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a circuit diagram showing a configuration of a power semiconductor driving device according to a first embodiment. [Figure 2] 1 is a circuit diagram showing a configuration of a power semiconductor driving device according to a first embodiment. [Figure 3] FIG. 2 is a circuit diagram showing a configuration of a related device. [Figure 4] FIG. 2 is a circuit diagram showing a configuration of a related device. [Figure 5] FIG. 10 is a circuit diagram showing a configuration of a power semiconductor driving device according to a second embodiment. [Figure 6] FIG. 10 is a circuit diagram showing a configuration of a power semiconductor driving device according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described with reference to the accompanying drawings. The features described in each of the following embodiments are merely examples, and not all features are necessarily required. In addition, in the following description, similar components in multiple embodiments are denoted by the same or similar reference numerals, and different components will be mainly described.

[0010] <First Embodiment> Fig. 1 is a circuit diagram showing the configuration of a power semiconductor driving device 21 according to the first embodiment, and Fig. 2 is a circuit diagram in which a diagram of the chip configuration of the power semiconductor driving device 21 is added to Fig. 1. The power semiconductor driving device 21 is connected between an MCU (Micro Controller Unit) 1 and a plurality of power semiconductor elements 31A to 31C. Before describing the power semiconductor driving device 21, the MCU 1 and the plurality of power semiconductor elements 31A to 31C will be described.

[0011] The MCU 1 transmits a serial signal 3 based on a reference potential 2 of the MCU 1 to the power semiconductor driving device 21 .

[0012] The power semiconductor element 31A includes an IGBT 32A and a freewheeling diode 33A. The collector of the IGBT 32A is connected to a high potential 36A and the cathode of the freewheeling diode 33A. The gate of the IGBT 32A is connected to the power semiconductor drive device 21. The emitter of the IGBT 32A is connected to a low potential 37A, which is a reference potential, and the anode of the freewheeling diode 33A. The freewheeling diode 33A may be an SBD (Schottky Barrier Diode) or a PND (PN junction diode).

[0013] Like the power semiconductor device 31A, the power semiconductor device 31B includes an IGBT 32B and a freewheeling diode 33B, and is connected between a high potential 36B and a low potential 37B. Like the power semiconductor device 31A, the power semiconductor device 31C includes an IGBT 32C and a freewheeling diode 33C, and is connected between a high potential 36C and a low potential 37C. The high potentials 36A to 36C are different, and the low potentials 37A to 37C are also different.

[0014] 1 and 2 show three power semiconductor elements, but the number is not limited to three and may be two, four or more. Also, the power semiconductor elements in FIGS. 1 and 2 include IGBTs, but the number is not limited to IGBTs and may include MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) or RC-IGBTs (Reverse Conducting - IGBTs).

[0015] Next, we will explain the power semiconductor driving device 21. The power semiconductor driving device 21 includes a conversion circuit 22, a plurality of level shifters 23A to 23C which are a plurality of level shift circuits, and a plurality of gate driving circuits 24A to 24C which are a plurality of driving circuits. As shown in Fig. 2, the power semiconductor driving device 21 also includes a plurality of voltage holding structures 26A to 26C, an electrode terminal 27, and a package 28.

[0016] When the conversion circuit 22 receives a serial signal 3 from the external MCU 1 via the electrode terminal 27, it converts the serial signal 3 into a plurality of parallel signals based on a reference potential 2. The number of parallel signals is the same as the number of power semiconductor elements, and in the examples of FIGS. 1 and 2, there are three parallel signals.

[0017] The plurality of level shifters 23A to 23C are connected between the conversion circuit 22 and the plurality of gate drive circuits 24A to 24C. The plurality of level shifters 23A to 23C shift the levels of the plurality of parallel signals generated by the conversion circuit 22 to match the reference potentials of the plurality of power semiconductor elements 31A to 31C, respectively. In the first embodiment, the reference potentials of the plurality of power semiconductor elements 31A to 31C are low potentials 37A to 37C, but may also be high potentials 36A to 36C.

[0018] The gate drive circuits 24A to 24C control the gate voltages of the power semiconductor elements 31A to 31C, respectively, based on the parallel signals level-shifted by the level shifters 23A to 23C, thereby driving the power semiconductor elements 31A to 31C, respectively.

[0019] 2 electrically isolate the gate drive circuits 24A to 24C from one another. In the first embodiment, the conversion circuit 22, the level shifters 23A to 23C, the gate drive circuits 24A to 24C, and the voltage hold structures 26A to 26C are provided on a single semiconductor substrate 25, which is made of ordinary silicon (Si). The semiconductor substrate 25 may also be made of a wide bandgap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), or diamond. When the semiconductor substrate 25 is made of a wide bandgap semiconductor, stable operation at high temperatures and high voltages and increased switching speed are possible.

[0020] The plurality of voltage holding structures 26A-26C may include a high-voltage RESURF structure using pn junctions, or may include an SOI (Silicon on Insulator) structure using dielectric isolation. Although the voltage holding structures are the plurality of voltage holding structures 26A-26C in the examples of Figures 1 and 2, the plurality of voltage holding structures 26A-26C may be integrated into one voltage holding structure.

[0021] The package is made of insulating resin and covers the semiconductor substrate 25. The electrode terminals 27 partially and electrically connect the inside and outside of the package .

[0022] FIG. 3 is a circuit diagram showing the configuration of a device related to the power semiconductor driving device 21 according to the first embodiment, and FIG. 4 is a circuit diagram in which a diagram of the chip configuration of the related device is added to FIG.

[0023] In the related device, the MCU 1 transmits a plurality of parallel signals 4 instead of a serial signal. This makes the signal processing and signal wiring in the MCU 1 complicated. In contrast, in the first embodiment, the power semiconductor driving device 21 includes a conversion circuit 22 that converts the serial signal into a plurality of parallel signals, which simplifies the signal processing and signal wiring in the MCU 1.

[0024] The related device also includes a plurality of level shifters 23A-23C that level-shift the plurality of parallel signals 4 transmitted from the MCU 1 to match the low potentials 37A-37C that are the reference potentials of the plurality of power semiconductor elements 31A-31C. This makes it possible for the related device to drive a plurality of power semiconductor elements 31A-31C with different reference potentials. However, since a plurality of semiconductor chips 29 (a plurality of packages 28) are provided to match the low potentials 37A-37C that are the reference potentials of the plurality of power semiconductor elements 31A-31C, there is a problem in that the size and cost of the device are large.

[0025] In contrast, in the power semiconductor driving device 21 according to the first embodiment, the multiple voltage holding structures 26A to 26C electrically isolate the multiple gate driving circuits 24A to 24C from each other. This allows, for example, the conversion circuit 22, the multiple level shifters 23A to 23C, the multiple gate driving circuits 24A to 24C, and the multiple voltage holding structures 26A to 26C to be provided on a single semiconductor substrate 25, thereby reducing the size and cost of the power semiconductor driving device 21.

[0026] If the plurality of voltage holding structures 26A-26C includes a high-voltage RESURF structure using a pn junction, the resistance value of the pn junction can be easily changed, and therefore the breakdown voltage can be easily controlled. Also, if the plurality of voltage holding structures 26A-26C includes a structure using dielectric isolation (e.g., an SOI structure), parasitic action can be suppressed, and a highly robust power semiconductor driving device can be realized.

[0027] <Embodiment 2> FIG. 5 is a circuit diagram showing the configuration of a power semiconductor driving device 21 according to the second embodiment, and FIG. 6 is a circuit diagram in which a diagram of the chip configuration of power semiconductor driving device 21 is added to FIG.

[0028] 6, in the second embodiment, the conversion circuit 22 is provided on a first semiconductor chip 29A, and the plurality of gate drive circuits 24A to 24C and the plurality of voltage holding structures 26A to 26C are provided on a second semiconductor chip 29B. The first semiconductor chip 29A and the second semiconductor chip 29B are insulated from each other by a space or an insulator.

[0029] In the second embodiment, each of the plurality of level shifters 23A to 23C includes a coupling circuit that transmits a signal from a first semiconductor chip 29A to a second semiconductor chip 29B while maintaining insulation between the first semiconductor chip and the second semiconductor chip. As shown in Fig. 5, the level shifter 23A includes a transmitter circuit 23A1 that modulates a signal on the first semiconductor chip 29A side, a pulse transformer 23A2 that is a coupling circuit that transmits the modulated signal using a magnetic coupling method, and a receiver circuit 23A3 that demodulates the transmitted signal on the second semiconductor chip 29B side. Similarly, the level shifter 23B includes a transmitter circuit 23B1, a pulse transformer 23B2 that is a coupling circuit, and a receiver circuit 23B3, and the level shifter 23C includes a transmitter circuit 23C1, a pulse transformer 23C2 that is a coupling circuit, and a receiver circuit 23C3.

[0030] According to the second embodiment as described above, a plurality of parallel signals can be transmitted at high speed from the first semiconductor chip 29A to the second semiconductor chip 29B. Furthermore, electrical safety can be ensured by insulating the first semiconductor chip 29A provided with the MCU 1 from the second semiconductor chip 29B provided with the power semiconductor elements 31A to 31C.

[0031] In the above description, the coupling circuit includes a pulse transformer that transmits signals by magnetic coupling, but this is not limited to this. For example, the coupling circuit may include a capacitor that transmits signals by capacitive coupling instead of the pulse transformer. This configuration is expected to easily increase the dielectric strength and suppress the effects of magnetism. Also, for example, the coupling circuit may include a photocoupler that transmits signals by optical coupling instead of the pulse transformer. This configuration is expected to reduce costs by using an inexpensive photocoupler and to simplify manufacturing by utilizing the insulating properties of the package 28.

[0032] In this disclosure in English, 'a' and 'an' mean one or more. Therefore, 'a', 'an', 'one or more' and 'at least one' can be used interchangeably.

[0033] It should be noted that the embodiments and modifications may be freely combined, and the embodiments and modifications may be modified or omitted as appropriate.

[0034] Various aspects of the present disclosure are summarized below as appendices.

[0035] (Appendix 1) a conversion circuit that converts an external serial signal into a plurality of parallel signals; a plurality of drive circuits for driving a plurality of power semiconductor devices each having a different reference potential; a plurality of level shift circuits connected between the conversion circuit and the plurality of drive circuits, which level shift the plurality of parallel signals to match the reference potentials of the plurality of power semiconductor devices; a voltage holding structure that electrically isolates each of the plurality of drive circuits; A power semiconductor driving device comprising:

[0036] (Appendix 2) 10. The power semiconductor driving device according to claim 1, The power semiconductor driving device, wherein the conversion circuit, the plurality of driving circuits, the plurality of level shift circuits, and the voltage holding structure are provided on a single semiconductor substrate.

[0037] (Appendix 3) The power semiconductor driving device according to claim 1 or 2, The power semiconductor drive device, wherein the voltage holding structure includes a high-voltage resurf structure using a pn junction.

[0038] (Appendix 4) The power semiconductor driving device according to claim 1 or 2, The power semiconductor drive device, wherein the voltage holding structure includes a structure using dielectric isolation.

[0039] (Appendix 5) A power semiconductor driving device according to any one of Supplementary Note 1 to Supplementary Note 4, the conversion circuit is provided on a first semiconductor chip; the plurality of drive circuits and the voltage holding structure are provided on a second semiconductor chip insulated from the first semiconductor chip; A power semiconductor driving device, wherein each of the plurality of level shift circuits includes a coupling circuit that transmits signals from the first semiconductor chip to the second semiconductor chip while maintaining isolation between the first semiconductor chip and the second semiconductor chip.

[0040] (Appendix 6) 6. The power semiconductor driving device according to claim 5, The coupling circuit includes a pulse transformer that transmits the signal by magnetic coupling.

[0041] (Appendix 7) 6. The power semiconductor driving device according to claim 5, The coupling circuit includes a capacitor that performs the signal transmission by capacitive coupling.

[0042] (Appendix 8) 6. The power semiconductor driving device according to claim 5, The power semiconductor driving device, wherein the coupling circuit includes a photocoupler that transmits the signal by optical coupling. [Explanation of symbols]

[0043] 1 MCU, 3 serial signal, 21 power semiconductor drive device, 22 conversion circuit, 23A to 23C level shifter, 23A2 to 23C2 pulse transformer, 24A to 24C gate drive circuit, 25 semiconductor substrate, 26A to 26C voltage holding structure, 29A first semiconductor chip, 29B second semiconductor chip, 31A to 31C power semiconductor element.

Claims

1. a conversion circuit that converts an external serial signal into a plurality of parallel signals; a plurality of drive circuits for driving a plurality of power semiconductor devices each having a different reference potential; a plurality of level shift circuits connected between the conversion circuit and the plurality of drive circuits, which level shift the plurality of parallel signals to match the reference potentials of the plurality of power semiconductor devices; a voltage holding structure that electrically isolates each of the plurality of drive circuits; A power semiconductor driving device comprising:

2. 2. The power semiconductor driving device according to claim 1, The power semiconductor driving device, wherein the conversion circuit, the plurality of driving circuits, the plurality of level shift circuits, and the voltage holding structure are provided on a single semiconductor substrate.

3. 3. The power semiconductor driving device according to claim 1, The power semiconductor drive device, wherein the voltage holding structure includes a high-voltage resurf structure using a pn junction.

4. 3. The power semiconductor driving device according to claim 1, The power semiconductor drive device, wherein the voltage holding structure includes a structure using dielectric isolation.

5. 2. The power semiconductor driving device according to claim 1, the conversion circuit is provided on a first semiconductor chip; the plurality of drive circuits and the voltage holding structure are provided on a second semiconductor chip insulated from the first semiconductor chip; A power semiconductor driving device, wherein each of the plurality of level shift circuits includes a coupling circuit that transmits signals from the first semiconductor chip to the second semiconductor chip while maintaining isolation between the first semiconductor chip and the second semiconductor chip.

6. 6. The power semiconductor driving device according to claim 5, The coupling circuit includes a pulse transformer that transmits the signal by magnetic coupling.

7. 6. The power semiconductor driving device according to claim 5, The coupling circuit is a power semiconductor drive device that includes a capacitor that transmits the signal by capacitive coupling.

8. 6. The power semiconductor driving device according to claim 5, The power semiconductor driving device, wherein the coupling circuit includes a photocoupler that transmits the signal by optical coupling.

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