Method for processing thin films and method for manufacturing memory elements containing the same

Abstract

This invention provides a thin film processing method that can improve the properties of a thin film by utilizing capping with a stressor layer, and a method for manufacturing a memory element including this method. [Solution] According to one embodiment of the present invention, the thin film processing method of the present invention includes the steps of: supplying a capping precursor into a chamber on which a substrate is placed and adsorbing the precursor onto a thin film formed on the substrate; purging the inside of the chamber; supplying a first reactant into the chamber to form a stressor layer; purging the inside of the chamber; annealing (heat treating) the substrate; supplying an etching initiator into the chamber; purging the inside of the chamber; supplying a second reactant into the chamber to activate the etching initiator; and purging the inside of the chamber.

Description

Technical Field

[0001] The present invention relates to a method for treating a thin film and a method for manufacturing a memory device including the same, and more particularly, to a method for treating a thin film that improves the characteristics of the thin film by capping using a stressor layer and a method for manufacturing a memory device including the same.

Background Art

[0002] With the progress of integrated circuit electronic devices, improving the performance and miniaturizing the devices have become important issues. In particular, in MOS (metal-oxide-semiconductor) devices, the performance of the gate insulator greatly affects the performance of the entire device. However, conventional silicon oxide (SiO₂) insulators have a problem that the leakage current increases as the thickness becomes thinner, reducing the reliability of the device.

[0003] To solve this problem, high dielectric constant (High-k) materials are used as insulators. High dielectric materials retain a high dielectric constant even at a thin thickness, have the effect of improving electrical performance and reducing leakage current. Therefore, high performance and high reliability can be maintained even in miniaturized electronic devices.

[0004] However, due to defects and impurities generated during the process of reducing the thickness of the high dielectric material, it becomes difficult to ensure desired characteristics. Thin high dielectric thin films become more sensitive to defects and impurities, which can greatly affect the overall electrical characteristics. Also, the thinner the thickness, the greater the effect on the overall physical properties due to the surface or interface. Therefore, it is a very important technical issue to ensure a high-quality and thin high dielectric thin film with desired characteristics.

[0005] For this reason, in order to maximize the performance and improve the reliability of high dielectric metal oxide-based semiconductor devices such as low power consumption logic devices, non-volatile memories, and capacitors, the development of high dielectric materials that can maintain high quality even at a thin thickness is actively underway.

Summary of the Invention

Problems to be Solved by the Invention

[0006] The object of the present invention is to provide a thin film processing method that can improve the characteristics of a thin film by utilizing capping with a stressor layer, and a method for manufacturing a memory element including this method.

[0007] Other objects of the present invention will become clearer from the following detailed description. [Means for solving the problem]

[0008] According to one embodiment of the present invention, the thin film processing method includes the steps of: supplying a capping precursor into a chamber on which a substrate is placed and adsorbing the precursor onto a thin film formed on the substrate; purging the inside of the chamber; supplying a first reactant into the chamber to form a stressor layer; purging the inside of the chamber; annealing (heat treating) the substrate; supplying an etching initiator into the chamber; purging the inside of the chamber; supplying a second reactant into the chamber to activate the etching initiator; and purging the inside of the chamber.

[0009] According to another embodiment of the present invention, the thin film processing method includes the steps of alternately forming first and second stressor layers on a thin film formed on a substrate, annealing (heat treating) the substrate, supplying an etching initiator into a chamber on which the substrate is placed, purging the inside of the chamber, supplying a third reactant into the chamber to activate the etching initiator, and purging the inside of the chamber, wherein the step of forming the first stressor layer includes supplying a first capping precursor into the chamber and forming the first stressor layer on the thin film. The process includes the steps of adsorbing a capping precursor, purging the inside of the chamber, supplying a first reactant to the inside of the chamber to form a first stressor layer, and purging the inside of the chamber, wherein the step of forming the second stressor layer includes supplying a second capping precursor to the inside of the chamber and adsorbing the second capping precursor onto the thin film, purging the inside of the chamber, supplying a second reactant to the inside of the chamber to form a second stressor layer, and purging the inside of the chamber.

[0010] The etching initiator can be represented by the following chemical formula 1. [ka] In the above-mentioned <Chemical Formula 1>, n is independently selected from integers between 0 and 5, X1 to X3 are independently selected from alkoxy groups having 1 to 5 carbon atoms and dialkylamino groups having 1 to 5 carbon atoms, and R is selected from hydrogen, linear, branched, or cyclic alkyl groups having 1 to 5 carbon atoms, alkoxy groups having 1 to 5 carbon atoms, and dialkylamino groups having 1 to 5 carbon atoms.

[0011] The etching initiator may be one of the following: trimethyl orthoformate (TMOF), triethyl orthoformate (TEOF), dimethylformamide dimethyl acetal (DFDA), or tris(dimethylamino)methane (TDMAM).

[0012] The etching initiator can be represented by the following <Chemical Formula 2> or <Chemical Formula 3>. [ka] [ka] In the above-mentioned <Chemical Formula 2> or <Chemical Formula 3>, X1 to X2 are independently hydrogen, chlorine, and a chloroalkyl group having 1 to 5 carbon atoms. R1 to R3 are independently selected from hydrogen, linear, branched, or cyclic alkyl groups with 1 to 5 carbon atoms, aryl groups with 6 to 12 carbon atoms, hydroxyl groups with 0 to 4 carbon atoms, and alkoxy groups with 0 to 4 carbon atoms.

[0013] The etching initiator may be one of the following: dichloromethyl methyl ether (DCMME), trimethyl chloro orthoacetate (TMCOA), or chloromethyl ethyl ether (CMEE).

[0014] The thin film can be a metal oxide thin film with one of Hf, Zr, Al, Ta, or Ti as the central element.

[0015] The stress layer can be a metal oxide thin film having any one of Nb, Ta, Cr, Zr, Ru, Mo, and Sn as a central element.

[0016] The band gap of the stress layer may be smaller than that of the thin film.

[0017] The crystallization temperature of the stress layer may be higher than that of the thin film.

[0018] The reactant can be any one of O3, O2, and H2O.

[0019] The thin film treatment method can proceed at 50 to 700°C.

[0020] The thin film and the stress layer can be any one of a metal film, a metal oxide, a metal nitride, a metal sulfide, a silicon nitride, and a silicon oxide.

[0021] The thin film can be a binary compound or a ternary compound doped with one or more elements.

[0022] According to an embodiment of the present invention, a method for manufacturing a memory device can include the thin film treatment method described above.

Advantages of the Invention

[0023] According to an embodiment of the present invention, when a dielectric film is formed using a high dielectric constant material, in order to solve the problem that it is difficult to form a desired crystal structure with a low thickness, by capping the dielectric film with a metal oxide of another element, it becomes possible to form a desired crystal structure. In this case, a part of the capping layer remains, and the thickness is limited to prevent characteristic degradation. Therefore, it is difficult to form a capping layer with a sufficient thickness to obtain a dielectric film having a desired crystal structure. However, according to an embodiment of the present invention, since the capping layer can be removed through the ALE process after capping, it is also possible to form a capping layer with a sufficient thickness to obtain a dielectric film having a desired crystal structure.

Brief Description of Drawings

[0024] [Figure 1] It is a diagram showing the annealing (heat treatment) results depending on the presence or absence of a stress layer. [Figure 2] It is a diagram showing the heat treatment and etching results according to the characteristics of a thin film. [Figure 3] It is a flowchart showing a thin film processing method according to an embodiment of the present invention. [Figure 4] It is a graph schematically showing a supply cycle according to an embodiment of the present invention. [Figure 5] It is a diagram showing a heat treatment and etching process according to an embodiment of the present invention. [Figure 6] It is a graph showing the crystal structure of HfO2 according to Comparative Example 1 / Embodiment 1 of the present invention. [Figure 7] It is a TEM photograph showing the heat treatment and etching results according to Embodiment 1 of the present invention. [Figure 8] It is a graph showing the crystal structure of HfO2 according to Comparative Example 2 / Embodiment 2 of the present invention. [[ID=3l]] [Figure 9] It is a flowchart showing a thin film processing method according to another embodiment of the present invention. [Figure 10] It is a graph schematically showing a supply cycle according to another embodiment of the present invention. [Figure 11] It is a diagram showing a heat treatment and etching process according to another embodiment of the present invention. [Figure 12] This figure shows a heat treatment and etching process according to yet another embodiment of the present invention. [Figure 13] This figure shows Comparative Examples 3-1 to 3-6 and Example 3 of the present invention. [Figure 14] This table shows the electrical characteristics of Comparative Examples 3-1 to 3-6 and Example 3 of the present invention. [Figure 15] This graph shows the electrical characteristics of Comparative Examples 3-1 to 3-6 and Example 3 of the present invention. [Figure 16] This graph shows the PE curve of a thin film according to Comparative Example 4 of the present invention. [Figure 17] This graph shows the PE curve of a thin film according to Example 4 of the present invention. [Figure 18] This table shows the electrical characteristics related to Comparative Example 4 / Example 4 of the present invention. [Modes for carrying out the invention]

[0025] Preferred embodiments of the present invention will be described in more detail below with reference to Figures 1 to 18. The embodiments of the present invention can be modified in various ways, and the scope of the invention should not be construed as being limited to the embodiments described below. These embodiments are provided to explain the present invention in more detail to those who have ordinary skill in the art to which the invention pertains. Therefore, the shapes of the elements shown in the drawings may be exaggerated to emphasize a clearer explanation.

[0026] Figure 1 shows the annealing (heat treatment) results with and without a stressor layer, and Figure 2 shows the heat treatment and etching results according to the characteristics of the thin film. By capping the metal oxide layer of another element on top of the metal oxide layer, stress is applied to the interface. In this case, the underlying thin film can form a stable crystalline structure in order to minimize the stress. This improves the crystallinity of the underlying thin film or lowers the crystallization temperature. Furthermore, the metal oxide of the stressor layer is a substance with a high crystallization temperature, and even if the underlying thin film crystallizes during heat treatment after capping, the stressor layer remains in an amorphous structure. Therefore, even after the underlying thin film crystallizes, the amorphous stressor layer smooths the interface and has the effect of improving the surface roughness of the underlying thin film.

[0027] However, this stressor layer can sometimes degrade the properties of the underlying thin film, so an etching process is necessary to remove the stressor layer again to prevent unwanted property degradation. Amorphous stressor layers have an irregular arrangement and high surface energy, resulting in high chemical reactivity and easy etching. On the other hand, the underlying thin film has a relatively regular crystalline structure, low chemical reactivity, and is difficult to etch, so it can act as an etching stop layer itself, which is advantageous for controlling the etching process. Furthermore, metal oxides used as stressor layers have a smaller band gap than the underlying thin film, and in this case, they have high chemical reactivity and are easy to etch.

[0028] According to the method described above, it is possible to provide a low-thickness dielectric layer with improved stability and a high dielectric constant. Such a thin-film structure can be used in various electronic elements such as transistors, capacitors, and integrated circuit elements, and can improve the properties of these electronic elements.

[0029] Figure 3 is a flowchart showing a thin film processing method according to an embodiment of the present invention, and Figure 4 is a graph schematically showing the supply cycle according to an embodiment of the present invention. The substrate is loaded into the process chamber, and the substrate has a thin film formed on its surface. The thin film can have Hf, Zr, Al, Ta, or Ti as its central element, and the thin film can be a metal film, metal oxide, metal nitride, metal sulfide, silicon nitride, or silicon oxide. The thin film can be a binary compound or ternary compound doped with one or more elements.

[0030] The following process conditions may be adjusted. These process conditions include the temperature of the substrate or process chamber, chamber pressure, and gas flow rate, with the temperature being between 50 and 700°C.

[0031] The substrate is exposed to a capping precursor supplied into the chamber, and the precursor is adsorbed onto a thin film formed on the substrate. The capping precursor can have one of the following elements as its central component: Nb, Ta, Cr, Zr, Ru, Mo, or Sn.

[0032] Subsequently, a purge gas (e.g., an inert gas such as Ar) is supplied into the chamber to remove or purify any unadsorbed precursors or by-products.

[0033] Next, the substrate is exposed to a reactant (or reactive gas) supplied into the chamber, and a stressor layer is formed by the reactant. The reactant can be O3, O2, or H2O. The stressor layer has one of the following elements as its central component: Nb, Ta, Cr, Zr, Ru, Mo, or Sn. The stressor layer has a smaller band gap and a higher crystallization temperature than the thin film.

[0034] Next, a purge gas (e.g., an inert gas such as Ar) is supplied into the chamber to remove or purify any unreacted substances or by-products.

[0035] Subsequently, the substrate is annealed (heat treated), which can be done at 50-700°C while supplying a reactant (e.g., an O2 atmosphere) (see Figure 5).

[0036] Furthermore, the substrate is then exposed to an etching initiator supplied into the chamber. The etching initiator can be represented by the following chemical formula 1. [ka] In the above-mentioned <Chemical Formula 1>, n is independently selected from integers between 0 and 5, X1 to X3 are independently selected from alkoxy groups having 1 to 5 carbon atoms and dialkylamino groups having 1 to 5 carbon atoms, and R is selected from hydrogen, linear, branched, or cyclic alkyl groups having 1 to 5 carbon atoms, alkoxy groups having 1 to 5 carbon atoms, and dialkylamino groups having 1 to 5 carbon atoms.

[0037] Specifically, the etching initiator can be one of the following: trimethyl orthoformate (TMOF), triethyl orthoformate (TEOF), dimethylformamide dimethyl acetal (DFDA), or tris(dimethylamino)methane (TDMAM).

[0038] Furthermore, the etching initiator can be represented by the following <Chemical Formula 2> or <Chemical Formula 3>. [ka] [ka] In the above-mentioned <Chemical Formula 2> or <Chemical Formula 3>, X1 to X2 are independently hydrogen, chlorine, and a chloroalkyl group having 1 to 5 carbon atoms. R1 to R3 are independently selected from hydrogen, linear, branched, or cyclic alkyl groups with 1 to 5 carbon atoms, aryl groups with 6 to 12 carbon atoms, hydroxyl groups with 0 to 4 carbon atoms, and alkoxy groups with 0 to 4 carbon atoms.

[0039] Specifically, the etching initiator can be one of the following: dichloromethyl methyl ether (DCMME), trimethyl chloro orthoacetate (TMCOA), or chloromethyl ethyl ether (CMEE).

[0040] Subsequently, a purge gas (e.g., an inert gas such as Ar) is supplied into the chamber to remove or purify any unadsorbed etching initiator or by-products.

[0041] Next, the substrate is exposed to a reactant (or reactive gas) supplied into the chamber, and the etching process is activated by the reactant. The reactant is one of the following: O3, O2, H2O, NH3, or H2.

[0042] Next, a purge gas (e.g., an inert gas such as Ar) is supplied into the chamber to remove or purify any unreacted substances or by-products.

[0043] Figure 5 shows the heat treatment and etching process according to an embodiment of the present invention, Figure 6 is a graph showing the crystal structure of HfO2 according to Comparative Example 1 / Example 1 of the present invention, and Figure 7 is a TEM photograph showing the heat treatment and etching results according to Example 1 of the present invention.

[0044] [Comparative Example 1] 1) Prepare an HfO2 thin film with a thickness of 60 Å deposited on a Si substrate using the ALD process. 2) Annealing treatment is performed at a process temperature of 500°C in an O2 atmosphere. [Example 1] 1) Prepare an HfO2 thin film with a thickness of 60 Å deposited on a Si substrate using the ALD process. 2) Deposition a 30 Å layer of Nb2O5 on a thin film and form a stressor layer on HfO2. 3) Perform annealing at a process temperature of 500°C in an O2 atmosphere. 4) Adsorb the etching initiator trimethyl orthoformate (TMOF), then supply reactive gas O3 to activate etching and remove the stressor layer Nb2O5.

[0045] First, in Comparative Example 1, XRD analysis of the thin film confirmed that the HfO2 crystal structure had a monoclinic / tetragonal peak height ratio of 1:0.98. On the other hand, in Example 1, the monoclinic peak height decreased by 59%, and the tetragonal peak height decreased by 8%, resulting in an improvement in the monoclinic / tetragonal peak height ratio of the HfO2 crystal structure to 1:2.58. Furthermore, it was confirmed that the stressor layer Nb2O5 was removed in the example.

[0046] Figure 8 is a graph showing the crystal structure of HfO2 according to Comparative Example 2 / Example 2 of the present invention.

[0047] [Comparative Example 2] 1) Prepare an HfO2 thin film with a thickness of 40 Å deposited on a Si substrate using the ALD process. 2) Annealing treatment is performed at a process temperature of 500°C in an O2 atmosphere.

[0048] [Example 2] 1) Prepare an HfO2 thin film with a thickness of 40 Å deposited on a Si substrate using the ALD process. 2) Deposition a 30 Å layer of Nb2O5 on a thin film and form a stressor layer on HfO2. 3) Perform annealing at a process temperature of 500°C in an O2 atmosphere. 4) The etching initiator dimethylformamide dimethyl acetal (DFDA) is adsorbed, and then reactive gas O3 is supplied to activate etching and remove the stressor layer Nb2O5.

[0049] In Comparative Example 2, XRD analysis of the thin film confirmed that the HfO2 crystal structure was monoclinic. On the other hand, in Example 2, it was found that the HfO2 crystal structure was improved to a tetragonal type.

[0050] Figure 9 is a flowchart showing a thin film processing method according to another embodiment of the present invention, Figure 10 is a graph schematically showing the supply cycle according to another embodiment of the present invention, and Figures 11 and 12 are diagrams showing the heat treatment and etching processes according to another embodiment of the present invention.

[0051] Furthermore, the stressor layer also contains elements that promote the crystallization of the underlying thin film, and can be formed by mixing two or more thin films. For example, the stressor layer can have one or more of the following as its central elements: Nb, Ta, Cr, Zr, Ru, Mo, and Sn. As shown in Figures 9 and 10, the capping process using two or more capping precursors can be repeatedly performed. In this case, by including one or more films in the mixed metal oxide layer that can form the same crystal as the underlying thin film, the underlying thin film is guided to grow with a similar crystal structure due to similar lattice constants, making it easier to form the desired crystal structure than with single metal oxide layer capping. When capping two or more metal oxide films, the mixed layers can be stacked thinly and alternately, so they remain in an amorphous form even after annealing, and the capping film can be easily removed in the etching process (see Figures 11 and 12).

[0052] Figure 13 shows comparative examples 3-1 to 3-6 and Example 3 of the present invention; Figure 14 is a table showing the electrical characteristics related to comparative examples 3-1 to 3-6 and Example 3 of the present invention; and Figure 15 is a graph showing the electrical characteristics related to comparative examples 3-1 to 3-6 and Example 3 of the present invention.

[0053] [Comparative Example 3-1] 1) A 25 Å thick ZrO2 thin film is deposited on an SiO / TiN substrate by ALD, and then a 25 Å thick HfO2 thin film is deposited on top of it. 2) Anneal the material at a process temperature of 400°C in an O2 atmosphere for 10 minutes. 3) A TiN upper electrode is deposited on the thin film, and an annealing treatment is performed at 400°C in an N2 atmosphere for 30 seconds.

[0054] Analysis of the electrical properties of the thin film revealed a dielectric constant of 26.31 and leakage currents of 7.68E-07@+0.8V and 4.50E-07@-0.8V (see Figures 13 and 14).

[0055] [Comparative Example 3-2] 1) A 25 Å thick ZrO2 thin film is deposited on an SiO / TiN substrate by ALD, and then a 25 Å thick HfO2 thin film is deposited on top of it. 2) A 2 Å layer of Nb2O5 is deposited on the thin film to form a stressor layer on HfO2. 3) Anneal the material at a process temperature of 400°C in an O2 atmosphere for 10 minutes. 4) A TiN upper electrode is deposited on the thin film, and an annealing treatment is performed at 400°C in an N2 atmosphere for 30 seconds.

[0056] Analysis of the electrical properties of the thin film revealed that the dielectric constant was 27.25 and the leakage currents were 1.32E-06@+0.8V and 3.13E-05@-0.8V (see Figures 13 and 14).

[0057] [Comparative Example 3-3] 1) A 25 Å thick ZrO2 thin film is deposited on an SiO / TiN substrate by ALD, and then a 25 Å thick HfO2 thin film is deposited on top of it. 2) A 5 Å layer of Nb2O5 is deposited on the thin film to form a stressor layer on HfO2. 3) Anneal the material at a process temperature of 400°C in an O2 atmosphere for 10 minutes. 4) The etching initiator dimethylformamide dimethyl acetal (DFDA) is adsorbed, and then reactive gas O3 is supplied to activate etching and remove Nb2O5 from the stressor layer. 5) A TiN upper electrode is deposited on the thin film, and an annealing treatment is performed at 400°C in an N2 atmosphere for 30 seconds.

[0058] Analysis of the electrical properties of the thin film revealed that the dielectric constant was 31.76 and the leakage currents were 3.40E-06@+0.8V and 2.26E-06@-0.8V (see Figures 13 and 14).

[0059] [Comparative Example 3-4] 1) A 25 Å thick ZrO2 thin film is deposited on an SiO / TiN substrate by ALD, and then a 25 Å thick HfO2 thin film is deposited on top of it. 2) A 10 Å layer of Nb2O5 is deposited on the thin film to form a stressor layer on HfO2. 3) Anneal the material at a process temperature of 400°C in an O2 atmosphere for 10 minutes. 4) The etching initiator Dimethylformamide dimethyl acetal (DFDA) is adsorbed, and then reactive gas O3 is supplied to activate etching and remove Nb2O5 from the stressor layer. 5) A TiN upper electrode is deposited on the thin film, and an annealing treatment is performed at 400°C in an N2 atmosphere for 30 seconds.

[0060] Analysis of the electrical properties of the thin film revealed that the dielectric constant was 32.53 and the leakage currents were 1.47E-06@+0.8V and 2.76E-06@-0.8V (see Figures 13 and 14).

[0061] [Comparative Example 3-5] 1) A 25 Å thick ZrO2 thin film is deposited on an SiO / TiN substrate by ALD, and then a 25 Å thick HfO2 thin film is deposited on top of it. 2) A 15 Å layer of Nb2O5 is deposited on the thin film to form a stressor layer on HfO2. 3) Anneal the material at a process temperature of 400°C in an O2 atmosphere for 10 minutes. 4) The etching initiator dimethylformamide dimethyl acetal (DFDA) is adsorbed, and then reactive gas O3 is supplied to activate etching and remove Nb2O5 from the stressor layer. 5) A TiN upper electrode is deposited on the thin film, and an annealing treatment is performed at 400°C in an N2 atmosphere for 30 seconds.

[0062] Analysis of the electrical properties of the thin film revealed that the dielectric constant was 36.73 and the leakage currents were 2.02E-06@+0.8V and 3.51E-06@-0.8V (see Figures 13 and 14).

[0063] [Comparative Example 3-6] 1) A 25 Å thick ZrO2 thin film is deposited on an SiO / TiN substrate by ALD, and then a 25 Å thick HfO2 thin film is deposited on top of it. 2) A 30 Å layer of Nb2O5 is deposited on the thin film to form a stressor layer on HfO2. 3) Anneal the material at a process temperature of 400°C in an O2 atmosphere for 10 minutes. 4) The etching initiator dimethylformamide dimethyl acetal (DFDA) is adsorbed, and then reactive gas O3 is supplied to activate etching and remove Nb2O5 from the stressor layer. 5) A TiN upper electrode is deposited on the thin film, and an annealing treatment is performed at 400°C in an N2 atmosphere for 30 seconds.

[0064] Analysis of the electrical properties of the thin film revealed that the dielectric constant was 30.48 and the leakage currents were 1.34E-06@+0.8V and 3.31E-06@-0.8V (see Figures 13 and 14).

[0065] [Example 3] 1) A 25 Å thick ZrO2 thin film is deposited on an SiO / TiN substrate by ALD, and then a 25 Å thick HfO2 thin film is deposited on top of it. 2) A 20 Å layer of Nb2O5 is deposited on the thin film to form a stressor layer on HfO2. 3) Anneal the material at a process temperature of 400°C in an O2 atmosphere for 10 minutes. 4) The etching initiator dimethylformamide dimethyl acetal (DFDA) is adsorbed, and then reactive gas O3 is supplied to activate etching and remove Nb2O5 from the stressor layer. 5) A TiN upper electrode is deposited on the thin film, and an annealing treatment is performed at 400°C in an N2 atmosphere for 30 seconds.

[0066] Analysis of the electrical properties of the thin film revealed that the dielectric constant was 41.36 and the leakage currents were 1.29E-05@+0.8V and 9.32E-06@-0.8V (see Figures 13 and 14).

[0067] As a result, in a composite film with a ZrO2 / HfO2 1:1 ratio, the leakage current was observed at a similar level when capped with Nb2O 520 Å thick, confirming that the dielectric constant improvement effect was the greatest (see Figure 15). This dielectric constant improvement effect enables increased electrical capacitance and low-voltage driving, which in turn improves the performance and integration density of the device.

[0068] Figure 16 is a graph showing the PE curve of the thin film according to Comparative Example 4 of the present invention, and Figure 17 is a graph showing the PE curve of the thin film according to Example 4 of the present invention. Figure 18 is a table showing the electrical characteristics of Comparative Example 4 / Example 4 of the present invention.

[0069] [Comparative Example 4] 1) A 25 Å thick ZrO2 thin film is deposited on an SiO / TiN substrate using the ALD method, and then a 25 Å thick HfO2 thin film is deposited on top of it. 2) A 2 Å layer of Nb2O5 is deposited on the thin film to form a stressor layer on HfO2. 3) A TiN upper electrode is deposited on the thin film, and an annealing treatment is performed at 500°C in an N2 atmosphere for 30 seconds.

[0070] Analysis of the electrical properties of the thin film revealed that the leakage currents were 9.36E-07@+0.8V and 2.10E-05@-0.8V (see Figure 18). Furthermore, the PE curve of the thin film showed a 2Pr value of 15.15, indicating ferroelectric properties (see Figure 16).

[0071] [Example 4] 1) A 25 Å thick ZrO2 thin film is deposited on an SiO / TiN substrate using the ALD method, and then a 25 Å thick HfO2 thin film is deposited on top of it. 2) A 30 Å layer of Nb2O5 is deposited on the thin film to form a stressor layer on HfO2. 3) Anneal the material at a process temperature of 400°C in an O2 atmosphere for 10 minutes. 4) The etching initiator Dimethylformamide dimethyl acetal (DFDA) is adsorbed, and then the stressor layer Nb2O5 is removed by supplying reactive gas O3. 5) A TiN upper electrode is deposited on the thin film, and an annealing treatment is performed at 500°C in an N2 atmosphere for 30 seconds.

[0072] Analysis of the electrical properties of the thin film revealed that the leakage currents were 1.91E-06@+0.8V and 2.34E-06@-0.8V (see Figure 18). Furthermore, the PE curve of the thin film showed no ferroelectric properties (see Figure 17).

[0073] As a result, by appropriately controlling the capping and heat treatment conditions, the ferroelectric properties can be adjusted, thereby improving the operating voltage, reliability, and durability of the memory element.

[0074] The present invention has been described in detail above with reference to examples, but other forms of embodiments are also possible. Therefore, the technical idea and scope of the claims described below are not limited to the examples.

Claims

1. A step of supplying a capping precursor into a chamber in which a substrate is placed, and adsorbing the precursor onto a thin film formed on the substrate, The steps include purging the inside of the chamber, The steps include supplying a first reactant to the inside of the chamber to form a stressor layer, The steps include purging the inside of the chamber, The steps include annealing (heat treatment) the substrate, The steps include supplying an etching initiator to the inside of the chamber, The steps include purging the inside of the chamber, The steps include supplying a second reactant into the chamber to activate the etching initiator, A thin film processing method comprising the step of purging the inside of the chamber.

2. The steps include alternately forming a first and second stressor layer on a thin film formed on a substrate, The steps include annealing (heat treatment) the substrate, The steps include supplying an etching initiator into the chamber on which the substrate is placed, The steps include purging the inside of the chamber, The steps include supplying a third reactant into the chamber to activate the etching initiator, The step includes purging the inside of the chamber, The step of forming the first stressor layer includes the steps of supplying a first capping precursor into the chamber and adsorbing the first capping precursor onto the thin film, purging the inside of the chamber, supplying a first reactant into the chamber to form the first stressor layer, and purging the inside of the chamber. A thin film processing method comprising the steps of: supplying a second capping precursor into the chamber and adsorbing the second capping precursor onto the thin film; purging the inside of the chamber; supplying a second reactant into the chamber to form a second stressor layer; and purging the inside of the chamber.

3. The etching initiator is represented by the following chemical formula 1, as described in the thin film treatment method according to claim 1 or claim 2. In the above-mentioned <Chemical Formula 1>, n is independently selected from integers between 0 and 5, X1 to X3 are independently selected from alkoxy groups having 1 to 5 carbon atoms and dialkylamino groups having 1 to 5 carbon atoms, and R is selected from hydrogen, linear, branched, or cyclic alkyl groups having 1 to 5 carbon atoms, alkoxy groups having 1 to 5 carbon atoms, and dialkylamino groups having 1 to 5 carbon atoms.

4. The thin film treatment method according to claim 3, wherein the etching initiator is one of trimethyl orthoformate (TMOF), triethyl orthoformate (TEOF), dimethylformamide dimethyl acetal (DFDA), or tris(dimethylamino)methane (TDMAM).

5. The etching initiator is represented by the following chemical formula 2 or chemical formula 3, as described in claim 1 or claim 2, for the thin film treatment method. In the above-mentioned <Chemical Formula 2> or <Chemical Formula 3>, X1 to X2 are independently hydrogen, chlorine, and a chloroalkyl group having 1 to 5 carbon atoms. R1 to R3 are independently selected from hydrogen, linear, branched, or cyclic alkyl groups having 1 to 5 carbon atoms, aryl groups having 6 to 12 carbon atoms, hydroxyl groups having 0 to 4 carbon atoms, and alkoxy groups having 0 to 4 carbon atoms.

6. The thin film treatment method according to claim 5, wherein the etching initiator is one of dichloromethyl methyl ether (DCMME), trimethyl chloro orthoacetate (TMCOA), or chloromethyl ethyl ether (CMEE).

7. The thin film processing method according to claim 1 or claim 2, wherein the thin film is a metal oxide thin film having one of Hf, Zr, Al, Ta, or Ti as the central element.

8. The thin film treatment method according to claim 1 or claim 2, wherein the stressor layer is a metal oxide thin film having one of Nb, Ta, Cr, Zr, Ru, Mo, or Sn as the central element.

9. The thin film processing method according to claim 1 or claim 2, wherein the band gap of the stressor layer is smaller than that of the thin film.

10. The thin film processing method according to claim 1 or claim 2, wherein the crystallization temperature of the stressor layer is higher than that of the thin film.

11. The reactant is O 3 , O 2 , H 2 A thin film processing method according to claim 1 or claim 2, wherein the method is one of O.

12. The thin film processing method described above is carried out at 50 to 700°C, as described in claim 1 or claim 2.

13. The thin film treatment method according to claim 1 or claim 2, wherein the thin film and the stressor layer are one of a metal film, a metal oxide, a metal nitride, a metal sulfide, a silicon nitride, or a silicon oxide.

14. The thin film processing method according to claim 1 or claim 2, wherein the thin film is a binary compound or ternary compound doped with one or more elements.

15. A method for manufacturing a memory element, comprising the thin-film processing method described in claim 1 or claim 2.

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