Semiconductor device and method for manufacturing a semiconductor device

Abstract

To suppress the occurrence of cracks in the terminals. [Solution] The semiconductor device 1 has a conductive pattern 32 and a terminal 10. The terminal 10 has a flat joint portion 11 whose back surface is joined to the conductive pattern 32, a rising portion 12 formed extending upward from the joint portion 11, and a connecting portion 13 which is not joined to the conductive pattern 32 and connects the joint portion 11 and the rising portion 12. Furthermore, on the front surface of the joint portion 11, a row of indentations, each containing a recess, is formed in a first direction from the joint portion 11 toward the rising portion 12, extending to the boundary between the joint portion 11 and the connecting portion 13. In addition, in a second direction perpendicular to the first direction, the recesses of the terminal 10 are positioned offset in the first direction between adjacent rows of indentations, and the position of the deepest point of the recess is offset from the boundary.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device.

Background Art

[0002] In a semiconductor device, a first protrusion and a second protrusion are arranged in a plurality of rows in a pressing portion, and when the first protrusion presses a flat portion of a metal plate, it bites into the neck portion side of the flat portion (Patent Document 1). The bonding portion of a terminal bonded to a wiring portion is wider than the intermediate portion of the terminal (Patent Document 2). A connection terminal has a main body portion extending toward the main terminal side and a conductive connection portion connected to the main body portion, and the connection portion has a larger cross-sectional area perpendicular to the current path than the portion of the main body portion to which the connection portion is connected (Patent Document 3). A curved surface portion that shares a tangent with the flat surface portion and curves in the longitudinal direction is formed on the flat surface portion where a plurality of protrusions are formed (Patent Document 4). A plurality of protrusions are formed in a bonding region with a surface electrode, where the side of the conductive layer is concave and the side of the buffer layer is convex.

[0003] A connection portion of a lead frame is formed on both sides of a bonding region bonded to a wiring pattern and has an end unbonded region that faces the wiring pattern with a gap (Patent Document 6). A metallic porous member disposed on an electrode and a plate-like wiring disposed on the porous member are provided (Patent Document 7). An electrode terminal and an object to be joined are ultrasonically joined to a joining surface for joining, and the electrode terminal has a through-hole formed therein surrounded by the joining surface (Patent Document 8). Among the joining surfaces of the electrode terminals, the portion that bites into the inside of the conductor pattern is inclined outward toward the main surface of the conductor pattern (Patent Document 9).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Patent Document 3

[0005] The present invention aims to suppress the occurrence of cracks in terminals. [Means for solving the problem]

[0006] To solve the above problems, a semiconductor device is provided. The semiconductor device includes a conductive pattern, a flat bonding portion whose back surface is bonded to the conductive pattern, a rising portion formed extending upward from the bonding portion, and a connecting portion which is not bonded to the conductive pattern and connects the bonding portion and the rising portion, and a terminal having a row of indentations formed on the front surface of the bonding portion, each row of indentations including a recess arranged in a first direction from the bonding portion toward the rising portion, up to the boundary between the bonding portion and the connecting portion. Furthermore, in a second direction perpendicular to the first direction, recesses are positioned offset in the first direction between adjacent rows of indentations, and the position of the deepest point of the recess is offset from the boundary. Furthermore, a method for manufacturing a semiconductor device is provided to solve the above problems. The method for manufacturing a semiconductor device comprises a preparation step and a bonding step. The preparation step involves preparing a conductive pattern, a flat bonding portion whose back surface is bonded to the conductive pattern, a rising portion formed extending upward from the bonding portion, and a terminal including a connecting portion that is not bonded to the conductive pattern and connects the bonding portion and the rising portion. The bonding step involves placing the back surface of the bonding portion on the conductive pattern and pressing the front surface of the bonding portion with a tool having a pressing surface that forms a rectangular shape with protrusions located near the intersection of diagonals, while vibrating, thereby forming a row of indentations on the front surface of the bonding portion, with multiple indentations including recesses arranged in a first direction from the bonding portion toward the rising portion, up to the boundary between the bonding portion and the connecting portion, and bonding the back surface of the bonding portion to the conductive pattern. The bonding step also involves using a tool having a pressing surface that forms a row of indentations on the front surface of the bonding portion in a first direction and a second direction perpendicular to the first direction, and pressing the protrusions onto the front surface of the bonding portion such that the position of the deepest point of the recess is offset from the boundary. [Effects of the Invention]

[0007] One aspect of this design makes it possible to suppress the occurrence of cracks in the terminals. [Brief explanation of the drawing]

[0008] [Figure 1] This figure shows an example of a terminal connection in a semiconductor device. [Figure 2] This figure shows an example of an indentation formed on the surface of a joint. [Figure 3] This figure shows an example of the periodic structure of the indentation row in this embodiment. [Figure 4] This figure shows an example of the depth of the indentation formed at the boundary in this embodiment. [Figure 5] This figure shows an example of the periodic structure of the indentation row in a reference example. [Figure 6] This figure shows an example of the depth of the indentation formed at the boundary in a reference example. [Figure 7] This figure shows an example of the thickness of the joint. [Figure 8] It is a diagram showing an example of the relationship between the ratio of the joint thickness to the non-joint part and the breaking load. [Figure 9] It is a diagram showing an example of the width of the joint. [Figure 10] It is a diagram showing an example of the relationship between the width of the joint and the breaking load. [Figure 11] It is a side view of the tool. [Figure 12] It is a cross-sectional view of the joint tip of the tool. [Figure 13] It is a diagram showing an example of the configuration of the semiconductor device. [Figure 14] It is a diagram showing a flowchart of the manufacturing method of the semiconductor device.

Mode for Carrying Out the Invention

[0009] Hereinafter, this embodiment will be described with reference to the drawings. In the present specification and drawings, elements having substantially the same function may be denoted by the same reference numerals, and redundant description may be omitted. In the following description, "front surface" and "upper surface" represent the surface facing upward when viewed from the paper surface. Similarly, "upward" refers to the direction facing upward when viewed from the paper surface. "Back surface" and "lower surface" refer to the surface facing downward when viewed from the paper surface. Similarly, "downward" refers to the direction facing downward when viewed from the paper surface. "Front surface", "upper surface", "upward" and "back surface", "lower surface", "downward" are merely convenient expressions for specifying the relative positional relationship, and do not limit the technical idea of the present invention.

[0010] FIG. 1 is a diagram showing an example of a joint portion of a terminal in a semiconductor device. The semiconductor device 1 includes a heat sink 20 and an insulating circuit board 30 provided on the heat sink 20. The insulating circuit board 30 includes an insulating plate 31, a conductive pattern 32 formed on the front surface of the insulating plate 31, and a metal plate 33 formed on the back surface of the insulating plate 31. A terminal 10 is joined to the conductive pattern 32 by ultrasonic bonding.

[0011] The terminal 10 integrally comprises a joint portion 11, a rising portion 12, and a connecting portion 13. The joint portion 11 is flat and includes a front surface 11a and a back surface 11b in plan view. The rising portion 12 is formed extending upward from the joint portion 11. The connecting portion 13 is not joined to the conductive pattern 32 and connects the joint portion 11 and the rising portion 12.

[0012] When a terminal 10 is joined to a conductive pattern 32 by ultrasonic bonding, first, the back surface 11b of the bonding portion 11 is positioned at a predetermined location on the conductive pattern 32. Then, the bonding tip of the ultrasonic bonding tool (bonding tool) comes into contact with the front surface 11a of the bonding portion 11. This bonding tip is provided with multiple protrusions, and by pressing the front surface 11a with the bonding tip, which is provided with multiple protrusions, while vibrating in a specified direction, the back surface 11b is joined to the conductive pattern 32 (the configuration of the bonding tip of the tool will be described later). As a result of this ultrasonic bonding, a series of indentations consisting of multiple indentations 14, including recesses, is formed on the front surface 11a of the bonding portion 11.

[0013] Figure 2 shows an example of an indentation formed on the front surface of a joint. The indentation 14 may be integrally formed on the front surface 11a of the joint 11. The indentation 14 includes a recess formed when pressed by the square pyramidal projection of the joint tip of the tool, and the shape of the indentation 14 is a rectangle in plan view. In the indentation 14, the deepest point pd of the recess is located near the intersection of the diagonals d1 and d2 of the rectangle.

[0014] The indentation rows, which include multiple indentations 14, have a periodic structure. The indentation rows in the first direction (direction A) from the joint 11 toward the rising portion 12 and the indentation rows in the second direction (direction B) perpendicular to the first direction are arranged periodically. Furthermore, the indentations between adjacent indentation rows in direction B are positioned with a shift in the direction A, causing the multiple indentation rows to be arranged alternately. That is, as shown in Figure 2, indentation row 14A and indentation row 14B are arranged alternately.

[0015] Figure 3 shows an example of the periodic structure of the indentation row in this embodiment. The periodic structure of the indentation row in this embodiment is a periodic structure that stops midway at the boundary L1 between the joint 11 and the connecting part 13. In the example shown in Figure 3, if the distance between the first vertex p1 and the second vertex p2 of one indentation 14 is considered as one period, the deepest point pd of the recess of the indentation 14 closest to the boundary L1 is located shifted by 1 / 4 period ±10% relative to the boundary L1.

[0016] Figure 4 shows an example of the depth of the indentation formed at the boundary in this embodiment. It is a cross-sectional view of the terminal in direction A passing through the deepest point. Since the deepest point pd of the recess of the indentation 14 is located at a position shifted by 1 / 4 period ±10% at the boundary L1, the deepest point pd is not formed at the boundary L1, and a recess with a depth dp1 shallower than the deepest point pd is formed.

[0017] Next, the periodic structure of the indentation row in the reference example will be explained using Figures 5 and 6. Figure 5 is a diagram showing an example of the periodic structure of the indentation row in the reference example. The periodic structure of the indentation row in the reference example is a periodic structure in which the period of the indentation row begins at boundary L1. In this case, the deepest point pd of the recess of indentation 14 will be located at boundary L1.

[0018] Figure 6 shows an example of the depth of the indentation formed on the boundary in a reference example. The deepest point pd of the indentation 14 is located at boundary L1, and the indentation 14 forms a depression with a depth of dp2 on boundary L1.

[0019] Here, in the reference example with a periodic structure as shown in Figures 5 and 6, the deepest point pd of the recess of the indentation 14 is located at the boundary L1 between the joint 11 and the connecting part 13 (hereinafter sometimes referred to as the terminal neck). As a result, the thickness of the terminal neck, which is a part that is prone to stress concentration and a crack initiation point in ultrasonically bonded terminals, is thin, and the strength at which the terminal neck breaks when a load is applied to the rising part 12 is reduced.

[0020] In contrast, in the indentation row of this embodiment, which has a periodic structure as shown in Figures 3 and 4, the deepest point pd of the recess of the indentation 14 is located away from the terminal neck. Therefore, the depth dp1 formed on the terminal neck is shallower than the depth dp2 of the reference example. As a result, the stress generated on the terminal neck when a load is applied to the rising portion 12 is reduced compared to the reference example, and the fracture strength is higher compared to the reference example.

[0021] For example, when the maximum stress at the terminal neck of the reference example is set to 1, simulation results show that the maximum stress in this embodiment is 0.7. This means that the stress generated at the terminal neck when a load is applied to the rising portion 12 is reduced by 30% in this embodiment compared to the configuration of the reference example. Thus, in the terminal 10 of this embodiment, when bonded to the conductive pattern 32 by ultrasonic bonding, the position of the deepest point pd of the recess of the indentation 14 formed on the front surface 11a of the bonded portion 11 is shifted from the boundary L1. This suppresses the occurrence of cracks in the terminal and improves the product's lifespan.

[0022] Next, the thickness of the joint portion 11 will be explained using Figures 7 and 8. Figure 7 is a diagram showing an example of the thickness of the joint portion. The thickness of the terminal before joining was 0.8 mm and the width was 1.6 mm. The connecting portion 13 has a first non-jointed surface 13a located on the front surface 11a side of the joint portion 11 and parallel to the front surface 11a, and a second non-jointed surface 13b located on the back surface 11b side of the joint portion 11 and parallel to the back surface 11b.

[0023] Furthermore, the height (thickness) h1 from the back surface 11b to the shallowest point of the indentation on the front surface 11a in the joint 11 is 0.4 to 0.7 times the height h2 from the second non-joint surface 13b to the first non-joint surface 13a in the connecting portion 13. Note that the first non-joint surface 13a is the part that has not been pressed by the tool, and h2 is equal to the thickness of the terminal before joining.

[0024] Figure 8 shows an example of the relationship between the ratio of joint thickness to non-joint thickness and the breaking load. The horizontal axis represents the ratio of joint thickness to non-joint thickness (%), and the vertical axis represents the breaking load (N) at the terminal neck. The ratio of joint thickness to non-joint thickness is a parameter of h1 / h2. The breaking load is an indicator of the load that causes fracture or delamination when a load is applied perpendicular to the joint surface relative to the terminal; the larger the breaking load, the less likely fracture or delamination is to occur.

[0025] g1 shows the breaking load when the insulating plate 31 is made of Al2O3 substrate and the terminal 10 is joined to the conductive pattern 32. g2 shows the breaking load when the insulating plate 31 is made of AlN substrate and the terminal 10 is joined to the conductive pattern 32.

[0026] Interval As1 represents the parameter range when the height ratio (h1 / h2) is between 0.4 and 0.7 times. Interval As2 represents the parameter range smaller than that of interval As1, and interval As3 represents the parameter range larger than that of interval As1.

[0027] Here, the breaking loads within the parameter range of section As2 are smaller for both g1 and g2 than the breaking loads within the parameter range of section As1. Similarly, the breaking loads within the parameter range of section As3 are smaller for both g1 and g2 than the breaking loads within the parameter range of section As1.

[0028] When the thickness of the joint 11 decreases, the stress generated at the terminal neck increases during fracture load evaluation, making it more prone to fracture and reducing the fracture load. Conversely, when the thickness of the joint 11 increases, the stress generated at the joint interface during the joining process decreases, resulting in insufficient joining, reduced joint strength, and a decrease in the fracture load.

[0029] Therefore, by setting the ratio (h1 / h2) of the height h1 from the back surface 11b to the front surface 11a of the joint 11 to the height h2 from the second non-joint surface 13b to the first non-joint surface 13a of the connecting portion 13 to the range As1 of 0.4 to 0.7 times, it becomes possible to maintain joint strength while suppressing the occurrence of fracture.

[0030] Next, the width of the joint 11 will be explained using Figures 9 and 10. Figure 9 is a diagram showing an example of the width of the joint. Figure 10 is a diagram showing an example of the relationship between the width of the joint and the breaking load. The horizontal axis is the ratio of the width B1 of the joint 11 to the width B2 of the connecting part 13 (B1 / B2), and the vertical axis is the breaking load (N) at the terminal neck.

[0031] g11 shows the breaking load when the insulating plate 31 is made of Al2O3 substrate and the terminal 10 is joined to the conductive pattern 32. g12 shows the breaking load when the insulating plate 31 is made of AlN substrate and the terminal 10 is joined to the conductive pattern 32.

[0032] Interval Bw1 represents the range where the width ratio (B1 / B2) is between 1.1 and 1.9 times. Interval Bw2 represents the range where the width ratio is smaller than the width ratio (B1 / B2) of interval Bw1, and interval Bw3 represents the range where the width ratio is larger than the width ratio (B1 / B2) of interval Bw1.

[0033] Here, the breaking loads within the width ratio (B1 / B2) range of section Bw2 are smaller for both g11 and g12 than the breaking loads within the width ratio (B1 / B2) range of section Bw1. Similarly, the breaking loads within the width ratio (B1 / B2) range of section Bw3 are smaller for both g11 and g12 than the breaking loads within the width ratio (B1 / B2) range of section Bw1.

[0034] In areas where the width B1 of the joint 11 is small, the parameters in Figure 8 are large, resulting in low stress at the joint interface during the joining process, reduced joint strength, and a lower breaking load. Conversely, in areas where the width B1 of the joint 11 is large, the parameters in Figure 8 are small, resulting in a larger joining area to the conductive pattern, but the terminal neck becomes thinner, increasing the stress generated during the breaking load evaluation, making it more prone to fracture and thus lowering the breaking load.

[0035] Therefore, by setting the ratio of the width B1 of the joint portion 11 to the width B2 of the connecting portion 13 (B1 / B2) within the range Bw1 of 1.1 to 1.9 times, it becomes possible to maintain joint strength while suppressing the occurrence of fracture.

[0036] Next, the tools included in the ultrasonic bonding apparatus will be explained using Figures 11 and 12. Figure 11 is a side view of the tool. Tool 5 is included in the ultrasonic bonding apparatus. Tool 5 is columnar in shape and vibrates in a predetermined direction (dotted arrow in the figure) by a vibration generator included in the ultrasonic bonding apparatus. The columnar shape can be cylindrical or polygonal columnar. Tool 5 has a bonding tip 50 at its tip. The bonding tip 50 contacts the object to be bonded and presses the object to be bonded while vibrating in the specified direction.

[0037] Figure 12 is a cross-sectional view of the joining tip of the tool. The joining tip 50 includes a joining base 51 and a plurality of protrusions 52. The joining base 51 and the plurality of protrusions 52 included in the joining tip 50 may be made of the same material. Such a material is, for example, a cemented carbide. A cemented carbide is, for example, tungsten, tungsten carbide, or an alloy containing at least one of these.

[0038] The joining base 51 is located at the tip of the joining tip 50 that contacts the object to be joined. The joining base 51 has a rectangular shape in plan view and includes a flat tip surface 51e that is substantially parallel to the XZ plane and sides surrounding the tip surface 51e on all four sides. Multiple protrusions 52 are provided on the tip surface 51e with gaps 53 between them. Multiple protrusions 52 may be integrally formed on the tip surface 51e. That is, the tip surface 51e of the joining base 51 contains a collection of irregularities due to the multiple protrusions 52. The protrusions 52 have a square pyramidal shape and include a flat pressing surface 52e at the top, and when the protrusions 52 press against the object, the pressing surface 52e forms the deepest point.

[0039] Furthermore, the height from the tip surface 51e of the multiple protrusions 52 to the pressing surface 52e is 15% or more and 90% or less of the thickness of the object to be joined. If the height from the tip surface 51e of the multiple protrusions 52 is less than 15% of the thickness of the object to be joined, joining with such a joint tip 50 including the multiple protrusions 52 will grind the object to be joined, causing damage. Also, if the height from the tip surface 51e of the multiple protrusions 52 exceeds 90% of the thickness of the object to be joined, the object to be joined may break. In this embodiment, the height from the tip surface 51e of the multiple protrusions 52 to the pressing surface 52e is, for example, 0.15 mm or more.

[0040] Here, the multiple protrusions 52 provided on the joining tip 50 of the tool 5 all have the same shape, whether they are located at the end of the joining base 51 or in the center of the joining base 51. In this embodiment, the tool 5, which has multiple protrusions 52 of the same shape, is used to press the protrusions 52 against the front surface 11a of the joining portion 11 of the terminal 10 so that the position of the deepest point of the recess in the indentation shifts at the boundary L1.

[0041] Because the multiple protrusions 52 provided on the joining tip 50 of tool 5 have the same shape, they press uniformly all the way to the end of the joining base 51, thereby uniformly increasing the joining area. In addition, one of the degradation modes during operation is cracking at the joining interface from the end of the joining base 51, but since a joining with uniform strength can be achieved all the way to the end of the joining base 51, crack propagation can be slowed down. Furthermore, by performing multiple types of terminal joining with a tool having multiple protrusions 52 of the same shape, the process can be simplified, and the design flexibility is increased because the width, depth, and thickness of the terminal material can not be selected.

[0042] Figure 13 is a diagram showing an example of the configuration of a semiconductor device. It shows a cross-sectional view of a semiconductor device 1 in which the terminal 10 having the indentation row described above is used. The semiconductor device 1 has an insulating circuit board 30, terminals 10 and 10a bonded to the front surface of the insulating circuit board 30, a heat sink 20, and a semiconductor chip 40.

[0043] The insulated circuit board 30 has an insulating plate 31, conductive patterns 32, 32a, and a metal plate 33. If the conductive patterns 32, 32a and the metal plate 33 are, for example, copper foil patterns, a DCB board can be used in which the conductive patterns 32, 32a, and the metal plate 33 are directly bonded to each side of the insulating plate 31. The insulated circuit board 30 is mounted on the upper surface of the heat sink 20, and the terminals 10 provided on the case 60 are bonded to the conductive patterns 32 of the insulated circuit board 30 by ultrasonic bonding.

[0044] Meanwhile, a semiconductor chip 40 is bonded to the conductive pattern 32a via a bonding material. Wire w1 connects the electrodes of the semiconductor chip 40 to the conductive pattern 32, which serves as the lead electrode of the insulating circuit board 30. Wire w2 connects the conductive pattern 32a to the terminal 10a provided on the case 60. Wire bonding of wires w1 and w2 is performed using ultrasonic waves and load.

[0045] Furthermore, the wires w1 and w2 are formed using conductive metals such as copper and aluminum, or conductive alloys such as iron-aluminum alloys, to a diameter of 300 to 500 μm for high-pressure devices.

[0046] The insulating circuit board 30 to which the semiconductor chip 40 is attached is housed in a case 60, and the area enclosed by the case 60 and the heat sink 20 is filled with sealing resin 70 to seal it. The case 60 and the heat sink 20 are fixed together with an adhesive or the like.

[0047] Here, the insulating plate 31 of the insulating circuit board 30 is, for example, an insulating ceramic such as aluminum nitride, silicon nitride, or aluminum oxide, and is, for example, a plate-shaped member with a thickness of 0.2 to 1 mm.

[0048] On the other hand, the conductive patterns 32 and 32a of the insulating circuit board 30 are provided on the upper surface of the insulating plate 31 and are made of a material with excellent conductivity. Such materials are made of, for example, copper, aluminum, or an alloy containing at least one of these. The thickness of the conductive patterns 32 and 32a is, for example, 0.2 mm or 0.3 mm.

[0049] Furthermore, in addition to the semiconductor chip 40, wiring members such as bonding wires, lead frames, and connection terminals, as well as electronic components, can be appropriately placed on the conductive patterns 32 and 32a as needed.

[0050] The number, placement, and shape of the conductive patterns 32 and 32a can be selected as appropriate through design. The metal plate 33 of the insulating circuit board 30 is made of a conductive metal such as copper or aluminum, and is provided on the lower surface of the insulating plate 31 with a thickness of, for example, 0.1 to 1 mm.

[0051] The heat sink 20 can be made of, for example, a copper substrate with high heat dissipation properties, an aluminum silicon carbide composite (Al-SiC) substrate, etc. The semiconductor chip 40 is a power device made of silicon, silicon carbide, or gallium nitride. The semiconductor chip 40 includes a switching element. The switching element is a power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), etc.

[0052] Such a semiconductor chip 40 includes, for example, a drain electrode (positive electrode, collector electrode in IGBTs) as a main electrode, a gate electrode as a control electrode, and a source electrode (negative electrode, emitter electrode in IGBTs) as another main electrode.

[0053] Furthermore, the semiconductor chip 40 includes a diode element. The diode element is, for example, an SBD (Schottky Barrier Diode), a PiN (P-intrinsic-N) diode, or a FWD (Free Wheeling Diode).

[0054] Furthermore, other electronic components may be placed in the conductive patterns 32 and 32a as needed. These electronic components include, for example, capacitors, resistors, thermistors, current sensors, and control ICs (Integrated Circuits). The solder used as the bonding material is less prone to void formation and has high temperature resistance. For example, such solder is an alloy mainly composed of tin and antimony. The sealing resin 70 can be, for example, a gel filler.

[0055] Figure 14 is a flowchart showing a method for manufacturing a semiconductor device. The manufacturing method for semiconductor device 1 includes a preparation step, an assembly step, a wiring step, a bonding step, and a sealing step. [Step S1] A preparation process is carried out to prepare the components that make up the semiconductor device 1 and the manufacturing equipment for manufacturing them. Components of the semiconductor device 1, such as a semiconductor chip 40, an insulating circuit board 30 including conductive patterns 32 and 32a, a heat sink 20, a case 60, a sealing resin 70, terminals 10, etc., are prepared.

[0056] Furthermore, the semiconductor chip 40 is bonded to the insulating circuit board 30, and the lead frame is bonded to it to assemble the semiconductor unit. In addition, the equipment used in the manufacturing method of the semiconductor device 1 is also prepared. Such equipment includes, for example, an ultrasonic bonding apparatus equipped with a tool 5, a wire bonding apparatus, and a dispenser apparatus for resin encapsulation. Other necessary components and equipment not listed here may also be prepared. [Step S2] An assembly process is performed in which the semiconductor unit is attached to the heat sink 20 and the case 60 is placed on the heat sink 20. [Step S3] A wiring process is performed to connect the semiconductor unit. In this wiring process, electrical wiring is performed between each terminal and the semiconductor unit using wiring components (wires w1, w2, etc.).

[0057] [Step S4] A bonding process is performed in which the terminals 10 are joined to the conductive pattern 32 of the insulating circuit board 30. In the bonding process, the back surface 11b of the bonding portion 11 is placed on the conductive pattern 32, and the front surface 11a of the bonding portion 11 is pressed while vibrating with a tool 5 that has a pressing surface formed in a rectangular shape with protrusions located near the intersection of diagonals. Then, a series of indentations 14, including recesses, are formed on the front surface 11a of the joint 11 by a plurality of protrusions 52, with the indentations 14 extending to the boundary between the joint 11 and the connecting portion 13, thereby joining the back surface 11b of the joint 11 to the conductive pattern 32. In this case, the protrusions are pressed against the front surface 11a of the joint 11 such that the position of the deepest point of the recess of the indentation 14 is offset at the boundary between the joint 11 and the connecting portion 13.

[0058] Furthermore, when the terminal 10 is pressed with tool 5, the joint 11 is compressed until the height from the back surface 11b to the front surface 11a is 0.4 to 0.7 times the height from the second non-joint surface 13b to the first non-joint surface 13a of the connecting portion 13. In addition, the joint 11 is compressed until the width is 1.1 to 1.9 times the width of the connecting portion 13.

[0059] [Step S5] A sealing process is performed in which sealing resin 70 is filled into the unit housing portion of the case 60 in which the semiconductor unit is housed to seal it. Although embodiments have been illustrated above, the configurations of each part shown in the embodiments can be replaced with others having similar functions. Furthermore, other arbitrary components or processes may be added. Moreover, any two or more configurations (features) from the embodiments described above may be combined. [Explanation of Symbols]

[0060] 1 Semiconductor device 10, 10a terminals 11 Joint 11a Front side 11b Back side 12. Rising section 13 Connecting part 14. Indentations 14A, 14B Indentation row 20 Heat sink 30 Insulated circuit board 31 Insulating board 32, 32a Conductive pattern 33 Metal plate 5 Tools 40 semiconductor chips 50 Joint tip 51 Bonded substrate 51e Tip surface 52 Protrusion 52e Pressing surface 53 gaps 60 cases 70 Sealing resin d1, d2 diagonals pd Deepest point p1 First vertex p2 Second vertex L1 Boundary between joint and connecting part Depth formed at the dp1 boundary (in this embodiment) Depth formed at the dp2 boundary (example) Intervals for the As1, As2, and As3 parameters B1 Width of the joint B2 Width of the connecting section Bw1, Bw2, Bw3 width ratio interval g1, g11 Fracture load on Al2O3 substrate Breaking loads for AlN substrates g2 and g12 w1, w2 wires

Claims

1. Conductive pattern and, The terminal comprises a flat joint portion whose back surface is joined to the conductive pattern, a rising portion formed extending upward from the joint portion, and a connecting portion that is not joined to the conductive pattern and connects the joint portion and the rising portion, wherein a row of indentations, each including a recess, is formed on the front surface of the joint portion in a first direction from the joint portion toward the rising portion, and this row of indentations extends to the boundary between the joint portion and the connecting portion. The recess is positioned in a location offset in the first direction between adjacent rows of indentations in a second direction perpendicular to the first direction, and the position of the deepest point of the recess is offset from the boundary. Semiconductor equipment.

2. The semiconductor device according to claim 1, wherein the indentation row has a periodic structure consisting of a plurality of indentations in the shape of a rectangle, the deepest point of which is located near the intersection of the diagonals, and the position of the deepest point of the recess is shifted by 1 / 4 period ± 10% from the boundary.

3. The semiconductor device according to claim 1, wherein the indentation row has a periodic structure consisting of a plurality of indentations that are rectangular in shape, with the deepest point located near the intersection of the diagonals, and the plurality of indentation rows are arranged alternately.

4. The connecting portion has a first non-connecting surface located on the front side of the connecting portion and parallel to the front surface, and a second non-connecting surface located on the back side of the connecting portion and parallel to the back surface. The semiconductor device according to claim 1, wherein the height from the back surface to the front surface of the joint is 0.4 to 0.7 times the height from the second non-joint surface to the first non-joint surface.

5. The semiconductor device according to claim 1, wherein the width of the joint is 1.1 to 1.9 times the width of the connecting portion.

6. A preparation step of preparing a conductive pattern, a flat plate-shaped joint portion whose back surface is joined to the conductive pattern, a rising portion formed extending upward from the joint portion, and a terminal which is not joined to the conductive pattern and includes a connecting portion that connects the joint portion and the rising portion, The bonding process includes: placing the back surface of the joint portion on the conductive pattern, pressing the front surface of the joint portion with a tool having a pressing surface that has a rectangular shape with protrusions located near the intersection of diagonals, while vibrating, thereby forming a row of indentations on the front surface of the joint portion, including recesses, arranged in a first direction from the joint portion toward the rising portion, up to the boundary between the joint portion and the connecting portion, and bonding the back surface of the joint portion to the conductive pattern; The joining step involves using the tool having the pressing surface on which the row of indentations is formed on the surface of the joining portion in the first direction and a second direction perpendicular to the first direction, and pressing the projection onto the surface of the joining portion such that the position of the deepest point of the recess is offset from the boundary. A method for manufacturing a semiconductor device.

7. The method for manufacturing a semiconductor device according to claim 6, wherein the bonding step involves pressing with the pressing surface of the tool to form a periodic structure on the surface consisting of a plurality of rectangular indentations, the deepest point of which is located near the intersection of the diagonals, and shifting the position of the deepest point of the recess by 1 / 4 period ± 10% at the boundary.

8. The method for manufacturing a semiconductor device according to claim 6, wherein the bonding step involves pressing with the pressing surface of the tool to form a periodic structure on the surface consisting of a plurality of rectangular indentations, the deepest point of which is located near the intersection of the diagonals, and arranging the plurality of rows of indentations alternately.

9. The connecting portion has a first non-connecting surface located on the front side of the connecting portion and parallel to the front surface, and a second non-connecting surface located on the back side of the connecting portion and parallel to the back surface. The method for manufacturing a semiconductor device according to claim 6, wherein the bonding step involves pressing the front surface of the bonding portion with the tool to crush it until the height from the back surface to the front surface of the bonding portion is 0.4 to 0.7 times the height from the second non-bonding surface to the first non-bonding surface.

10. The method for manufacturing a semiconductor device according to claim 6, wherein the joining step involves pressing the front surface of the joining portion with the tool until the width of the joining portion becomes 1.1 to 1.9 times the width of the connecting portion.

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