Display panel, method for manufacturing the same, and display device.
By integrating electrodes and source/drain functions in a single film layer and using inorganic insulating materials, the display panel manufacturing process is simplified, reducing photomask usage and costs while enhancing performance and durability.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-06-12
- Publication Date
- 2026-03-16
AI Technical Summary
The conventional manufacturing process of thin-film transistor array substrates requires a large number of photomasks, leading to high costs and complexity, as each layer necessitates multiple photolithography steps.
A display panel design where the first and second electrodes are formed in the same film layer, reducing the need for separate photomasks and integrating the source and drain functions into a single photomask step, along with the use of inorganic insulating materials for the buffer and insulating layers to facilitate simultaneous etching.
This approach effectively reduces the number of photomasks required, lowers manufacturing costs, and enhances the water vapor barrier effect, thereby improving the service life and signal transmission efficiency of the display panel.
Smart Images

Figure 2026048038000001_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technologies, and particularly to display panels, their manufacturing methods, and display devices.
Background Art
[0002] A thin film transistor (TFT) array substrate is an important component of a display device, which can be formed on a glass substrate or a plastic substrate, and is usually used as a switching device and a driving device in liquid crystal displays (LCDs), organic electroluminescent displays (OLEDs), and the like. However, in the manufacturing process of thin-film transistor array substrates, multiple film layers in the thin-film transistor array substrate require a photolithography manufacturing process using multiple photomasks. Specifically, in the manufacturing process for the array substrate, referring to Figure 1, the array substrate includes a light-shielding layer 1a provided on the substrate, a buffer layer 2a provided on the substrate and covering the light-shielding layer 1a, an active layer 3a provided on the buffer layer 2a, a gate insulating layer and gate 4a provided on the side of the active layer 3a away from the buffer layer 2a, an interlayer medium layer 5a provided on the buffer layer 2a and covering the active layer 3a and gate 4a, a source-drain layer 6a provided on the interlayer medium layer 5a, a first inorganic insulating layer 7a provided on the interlayer medium layer 5a and covering the source-drain layer 6a, an organic insulating layer 8a provided on the first inorganic insulating layer 7a, a common electrode layer 9a provided on the organic insulating layer 8a, a second inorganic insulating layer 10a provided on the organic insulating layer 8a and covering the common electrode layer 9a, and a pixel electrode layer 11a provided on the second inorganic insulating layer 10a. Here, one photomask is required to form the light-shielding layer 1a, one photomask is required to form the active layer 3a, one photomask is required to form the gate 4a and gate insulating layer, one photomask is required to form vias in the buffer layer 2a and interlayer medium layer 5a, one photomask is required to form the source drain layer 6a, one photomask is required to form vias in the first inorganic insulating layer 7a, one photomask is required to form vias in the organic insulating layer 8a, one photomask is required to form the common electrode layer 9a, one photomask is required to form vias in the second inorganic insulating layer 10a, and one photomask is required to form the pixel electrode layer 11a. In other words, the structure of the display panel shown in Figure 1 requires 10 photomasking steps, resulting in high manufacturing costs and a complex process.
[0003] Furthermore, in the manufacturing process for other array substrates, referring to Figure 2, the array substrate includes a data line layer 1b provided on the substrate, a buffer layer 2b provided on the substrate and covering the data line layer 1b, a semiconductor layer 3b provided on the buffer layer 2b, a gate layer 4b and a gate insulating layer provided on the semiconductor layer 3b, a first inorganic insulating layer 5b provided on the buffer layer 2b and covering the semiconductor layer 3b and the gate layer 4b, an organic insulating layer 6b provided on the first inorganic insulating layer 5b, a common electrode layer 7b provided on the organic insulating layer 6b, a second inorganic insulating layer 8b provided on the organic insulating layer 6b and covering the common electrode layer 7b, and a pixel electrode layer 9b provided on the second inorganic insulating layer 8b. Here, as shown in Figure 2, by making the semiconductor layer 3b conductive and directly connecting it to the data line layer 1b to serve as a transfer line, the number of photomasks can be reduced compared to the array substrate shown in Figure 1. Specifically, one photomask is required to form the data line layer 1b, one photomask is required to form vias in the buffer layer 2b, one photomask is required to form the semiconductor layer 3b, one photomask is required to form the gate layer 4b and the gate insulating layer, one photomask is required to form vias in the organic insulating layer 6b, one photomask is required to form vias in the first inorganic insulating layer 5b and the second inorganic insulating layer 8b, one photomask is required to form the common electrode layer 7b, and one photomask is required to form the pixel electrode layer 9b. In other words, the structure of the array substrate shown in Figure 2 requires eight photomasking steps. Compared to the array substrate structure shown in Figure 1, the number of photomasks required for the array substrate structure shown in Figure 2 has decreased to some extent, but the number of photomasks required for the array substrate structure shown in Figure 2 is still relatively large. As a result, the manufacturing cost of the array substrate is relatively high and the process is relatively complex. As described above, the number of photomasks involved in the manufacturing process of conventional array substrates is relatively large, the cost of photomasks is relatively high, and consequently, the more photomasks there are, the higher the cost required for the manufacturing process of thin-film transistor array substrates, as well as the increased time and complexity of the manufacturing process. [Overview of the project] [Problems that the invention aims to solve]
[0004] The embodiments of this application provide a display panel, a method for manufacturing the same, and a display device, which can reduce the number of photomasks in the manufacturing process of the display panel and lower manufacturing costs. [Means for solving the problem]
[0005] Embodiments of the present application provide a display panel, the display panel is, circuit board and A first conductive layer is provided on the substrate and includes data lines, An active layer provided on the side of the first conductive layer away from the substrate, including a channel portion and a first contact portion and a second contact portion connected to opposite sides of the channel portion, The active layer includes a second conductive layer provided on the side of the active layer away from the first conductive layer. Here, the second conductive layer includes a first electrode and a second electrode, the first electrode connecting the first contact portion and the data line, the second electrode being connected to the second contact portion, and the second electrode including a pixel electrode or anode.
[0006] In one embodiment of the present application, the display panel is A buffer layer is provided between the first conductive layer and the active layer, A first insulating layer is provided between the active layer and the second conductive layer, An organic insulating layer provided between the first insulating layer and the second conductive layer, The present invention further includes a second insulating layer provided between the organic insulating layer and the second conductive layer. The display panel further includes a first opening that penetrates the buffer layer, the first insulating layer, the organic insulating layer, and the second insulating layer, the first electrode being located within the first opening, and a portion of the data lines and at least a portion of the first contact portion being provided corresponding to the first opening.
[0007] In one embodiment of the present application, the first opening includes a first sub-opening and a second sub-opening that communicate with each other, the second sub-opening being located between the first sub-opening and the data line, the first sub-opening penetrating the second insulating layer and the organic insulating layer, and the second sub-opening penetrating the first insulating layer and the buffer layer. Here, the side wall of the first sub-opening is the surface of the second insulating layer.
[0008] In one embodiment of the present invention, the second insulating layer includes a first sub-part located on the side wall of the first sub-opening and a second sub-part located on a surface of the organic insulating layer away from the substrate, wherein the thickness of the first sub-part is less than or equal to the thickness of the second sub-part. In one embodiment of the present application, the first contact portion includes a first surface away from one side of the first conductive layer and a first side connected to the first surface, wherein one end of the first electrode covers the first surface and the first side, and the other end of the first electrode covers the side of the data line away from the substrate.
[0009] In one embodiment of the present invention, the first conductive layer further includes a light-shielding portion provided between the channel portion and the substrate, wherein the light-shielding portion is provided at a distance from the data lines. The data lines partially overlap the first contact portion along the thickness direction of the display panel, and the data lines include a second side surface provided away from the light-shielding portion, the first side surface being located away from the channel portion of the first contact portion, and the second side surface being located away from the channel portion of the first side surface.
[0010] In one embodiment of the present invention, the display panel further includes a display area and a non-display area adjacent to the display area, and at least the second electrode is provided within the display area. The first conductive layer further includes a first signal line provided on the substrate and located within the non-display area.
[0011] The display panel further includes a third conductive layer provided between the active layer and the first insulating layer, the third conductive layer including a gate provided on the side of the channel portion away from the buffer layer and a second signal line located within the non-display area. The second conductive layer further includes transfer lines located within the non-display area.
[0012] The display panel further includes a second opening that penetrates the buffer layer, the first insulating layer, the organic insulating layer, and the second insulating layer, at least a portion of the transfer line is located within the second opening, at least a portion of the first signal line and at least a portion of the second signal line are provided corresponding to the second opening, and the transfer line connects the first signal line and the second signal line.
[0013] In one embodiment of the present invention, the second signal line includes a second surface away from one side of the substrate and a third side connected to the second surface, with one end of the transfer line covering the second surface and the third side, and the other end of the transfer line covering the surface of the first signal line away from the substrate.
[0014] In one embodiment of the present invention, the second opening includes a third sub-opening and a fourth sub-opening that communicate with each other, the fourth sub-opening being located between the third sub-opening and the first signal line, the third sub-opening penetrating the second insulating layer and the organic insulating layer, and the fourth sub-opening penetrating the first insulating layer and the buffer layer. Here, the side wall of the third sub-opening is the surface of the second insulating layer.
[0015] In one embodiment of the present invention, the display panel further includes a third opening that penetrates the first insulating layer, the organic insulating layer, and the second insulating layer, the third opening being provided corresponding to the second contact portion, one end of the second electrode being located on the side of the second insulating layer away from the organic insulating layer, and the other end of the second electrode being connected to the second contact portion through the third opening. In one embodiment of the present invention, the thickness of the active layer is 50 angstroms or more.
[0016] In one embodiment of the present invention, the display panel further includes a liquid crystal layer provided on the side of the second conductive layer away from the substrate, and a counter substrate provided on the side of the liquid crystal layer away from the second conductive layer, wherein the second electrode is the pixel electrode. Alternatively, the display panel further includes a light-emitting functional layer provided on the side of the second conductive layer away from the substrate, and a cathode layer provided on the side of the light-emitting functional layer away from the second conductive layer, wherein the second electrode is the anode.
[0017] In accordance with the above-mentioned objectives of the present application, embodiments of the present application further provide a method for manufacturing a display panel, the method for manufacturing a display panel, the method for manufacturing a display panel, the following: A first conductive layer is formed on the substrate, and data lines are formed on the first conductive layer.
[0018] An active layer is formed on the side of the first conductive layer away from the substrate, and the active layer has a channel portion and a first contact portion and a second contact portion connected to opposite sides of the channel portion, respectively. A second conductive layer is formed on the side of the active layer away from the first conductive layer, and a first electrode and a second electrode are formed on the second conductive layer, the first electrode connecting the first contact portion and the data line, the second electrode being connected to the second contact portion, and the second electrode including a pixel electrode or anode.
[0019] In accordance with the above-mentioned objectives of the present application, embodiments of the present application further provide a display device, the display device including the display panel, or a display panel obtained by manufacturing the display panel by a manufacturing method relating to the display panel. In the present application, a first electrode and a second electrode are provided on a second conductive layer. The second electrode is used as a pixel electrode or an anode, and the second electrode is directly connected to a second contact portion of the active layer, so that the second electrode further has the function of a source or a drain. Making the first electrode and the second electrode in the embodiment of the present application be located in the same film layer is equivalent to forming the first electrode, the pixel electrode (or anode), and the source (or drain) using the same photomask. Thereby, the number of photomasks in the manufacturing process of the display panel can be effectively reduced, and the manufacturing cost of the display panel can be effectively lowered.
[0020] Other features and advantages of the present application will be described in detail in the subsequent specific embodiment part.
Brief Description of the Drawings
[0021] In order to more clearly explain the technical solution in the embodiment of the present application, the necessary drawings in the description related to the embodiment will be briefly described below. However, the drawings related to the following description are merely some embodiments related to the present application, and it is obvious that those skilled in the art can obtain other drawings based on these drawings without creative efforts.
[0022] In order to more fully understand the present application and its inventive effects, the following description will be made in conjunction with the accompanying drawings, where the same reference numerals in the following description indicate the same parts. [Figure 1] It is a schematic diagram showing the structure of a display panel of the prior art. [Figure 2] It is a schematic diagram showing the structure of another display panel of the prior art. [Figure 3] It is a schematic diagram showing the structure of a display panel provided by an embodiment of the present application. [Figure 4] It is a schematic diagram showing another structure of a display panel provided by an embodiment of the present application. [Figure 5] It is a flowchart related to a manufacturing method of a display panel provided by an embodiment of the present application. [Figure 6]This is a schematic diagram showing the structure of the manufacturing process related to the display panel provided in the embodiment of the present application. [Figure 7] This is a schematic diagram showing the structure of the manufacturing process related to the display panel provided in the embodiment of the present application. [Figure 8] This is a schematic diagram showing the structure of the manufacturing process related to the display panel provided in the embodiment of the present application. [Figure 9] This is a schematic diagram showing the structure of the manufacturing process related to the display panel provided in the embodiment of the present application. [Modes for carrying out the invention]
[0023] The following describes the technical concepts in the embodiments of the present application clearly and completely, with reference to the accompanying drawings of the embodiments. However, it is clear that the embodiments described are only a few of the embodiments of the present application, and not all of them. All other embodiments that can be obtained by those skilled in the art without any creative effort based on the embodiments of the present application are within the scope of protection of the present application. Referring to Figure 3, an embodiment of the present application provides a display panel comprising a substrate 10, a first conductive layer 20, an active layer 30, and a second conductive layer 40.
[0024] Here, the first conductive layer 20 is provided on the substrate 10 and includes data lines 21. The active layer 30 is provided on the side of the first conductive layer 20 away from the substrate 10 and includes a channel portion 31 and first contact portions 32 and second contact portions 33 connected to opposite sides of the channel portion 31, respectively. The second conductive layer 40 is provided on the side of the active layer 30 away from the first conductive layer 20. Furthermore, the second conductive layer 40 includes a first electrode 41 and a second electrode 42, the first electrode 41 connecting the first contact portion 32 and the data line 21, the second electrode 42 and the second contact portion 33 being connected to each other, and the second electrode 42 including a pixel electrode or anode.
[0025] In implementation and application, in the embodiment of the present application, the first electrode 41 and the second electrode 42 are provided in the second conductive layer 40, the second electrode 42 is used as a pixel electrode or anode, and the second electrode 42 is directly connected to the second contact portion 33 of the active layer 30, thereby giving the second electrode 42 a source or drain function. In the embodiment of the present application, the fact that the first electrode 41 and the second electrode 42 are located in the same film layer is equivalent to forming the first electrode 41, the pixel electrode (or anode), and the source (or drain) using the same photomask, which effectively reduces the number of photomasks in the manufacturing process of the display panel and effectively lowers the manufacturing cost of the display panel. In the display panel provided in the embodiment of the present application, the first electrode 41 may be either a source or a drain, while the second electrode 42 may be multiplexed as the other of the source or drain. In other words, in the embodiment of the present application, the source and drain can be formed on the same photomask, and compared to the structure shown in Figure 2 in which the source and drain are formed using two separate photomasks, the number of photomasks in the manufacturing process of the display panel can be further reduced, and the manufacturing cost of the display panel can be further lowered.
[0026] Continuing with reference to Figure 3, in one embodiment of the present invention, the display panel further includes a buffer layer 51, a first insulating layer 52, an organic insulating layer 53, a second insulating layer 54, a common electrode layer 57, a gate insulating layer, and a third conductive layer 60. The buffer layer 51 is provided between the first conductive layer 20 and the active layer 30, the first insulating layer 52 is provided between the active layer 30 and the second conductive layer 40, the organic insulating layer 53 is provided between the first insulating layer 52 and the second conductive layer 40, the second insulating layer 54 is provided between the organic insulating layer 53 and the second conductive layer 40, and the third conductive layer 60 and the gate insulating layer are provided between the active layer 30 and the first insulating layer 52. Specifically, the buffer layer 51 is provided on the substrate 10 and covers the first conductive layer 20, the third conductive layer 60 and the gate insulating layer are provided on the active layer 30 and the buffer layer 51, the first insulating layer 52 is provided on the buffer layer 51 and covers the active layer 30 and the third conductive layer 60, the organic insulating layer 53 is provided on the first insulating layer 52, the common electrode layer 57 is provided on the organic insulating layer 53, the second insulating layer 54 is provided on the organic insulating layer 53 and covers the common electrode layer 57, and the second conductive layer 40 is provided on the second insulating layer 54.
[0027] In some embodiments, the display panel includes a display area 101 and a non-display area 102 adjacent to the display area 101, and the first conductive layer 20 includes data lines 21 provided in the display area 101, a light-shielding portion 22, and a first signal line 23 provided in the non-display area 102. The buffer layer 51 covers a portion of the data lines 21, the light-shielding portion 22, and a portion of the first signal line 23, and the data lines 21, the light-shielding portion 22, and the first signal line 23 are all provided with spacing between them. In some embodiments, the active layer 30 is provided on a surface of the buffer layer 51 away from the light-shielding portion 22. Here, the active layer 30 includes a channel portion 31 and first contact portions 32 and second contact portions 33 connected to opposite sides of the channel portion 31, respectively. As can be understood, the channel portion 31 is a semiconductor material, while the first contact portions 32 and second contact portions 33 may be formed by a semiconductor material that has been made conductive. The light-shielding portion 22 may be located between the channel portion 31 and the substrate 11, and more preferably, the orthographic projection of the channel portion 31 on the substrate 10 is within the range covered by the orthographic projection of the light-shielding portion 22 on the substrate 10, thereby the light-shielding portion 22 can block light from one side of the substrate 10 and reduce the influence of light on the electrical performance of the channel portion 31.
[0028] To facilitate the subsequent connection between the data line 21 and the first contact portion 32, the data line 21 needs to be located close to the first contact portion 32. In some embodiments, the material of the active layer 30 may include an oxide semiconductor material, and more specifically, a metal oxide semiconductor material. For example, the material of the active layer 30 may include at least one of indium zinc oxide (IZO), gallium indium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), and indium gallium tin oxide (IGZTO).
[0029] In some embodiments, the gate insulating layer includes a first gate insulating portion 55 provided on the side of the active layer 30 away from the buffer layer 51, and a second gate insulating portion 56 provided within the non-display area 102. The third conductive layer 60 includes a gate 61 provided on the side of the first gate insulating portion 55 away from the active layer 30, and a second signal line 62 provided on the side of the second gate insulating portion 56 away from the buffer layer 51. Here, the first gate insulating portion 55 is provided on the surface of the channel portion 31 away from the buffer layer 51, while the gate 61 is provided on the surface of the first gate insulating portion 55 away from the channel portion 31, and the second signal line 62 and the second gate insulating portion 56 are provided close to the first signal line 23 to facilitate subsequent connection between the second signal line 62 and the first signal line 23. The first insulating layer 52 covers a portion of the second signal line 62, a portion of the active layer 30, and the gate 61; the organic insulating layer 53 is located on the side of the first insulating layer 52 away from the substrate 10; and the second insulating layer 54 covers the organic insulating layer 53. In some embodiments, the display panel further includes a first opening 71 that penetrates the buffer layer 51, the first insulating layer 52, the organic insulating layer 53, and the second insulating layer 54, the first opening 71 being located within the display area 101 and corresponding to the data line 21, i.e., the first opening 71 being located on the side of the data line 21 away from the substrate 10. Here, a portion of the data line 21 and at least a portion of the first contact portion 32 are provided corresponding to the first opening 71, i.e., the first opening 71 can expose a portion of the surface of the data line 21 and a portion of the surface of the first contact portion 32.
[0030] In some embodiments, the second conductive layer 40 includes a first electrode 41 provided within the display area 101, the first electrode 41 is provided within a first opening 71, and the first electrode 41 is connected between the data line 21 and the first contact portion 32 in order to transmit data signals on the data line 21 to the active layer 30. In some embodiments, the first contact portion 32 includes a first surface on the side away from the first conductive layer 20 and a first side connected to the first surface, with one end of the first electrode 41 covering the first surface and the first side, and the other end of the first electrode 41 covering the side of the data line 21 away from the substrate 10. That is, in embodiments of the present application, compared to the structures shown in Figures 1 and 2, the first electrode 41 can cover both the first surface and the first side of the first contact portion 32, and consequently, embodiments of the present application can effectively increase the connection area between the first contact portion 32 and the data line 21, effectively reduce the connection resistance between the data line 21, the first electrode 41 and the first contact portion 32, and effectively improve the signal transmission efficiency.
[0031] In some embodiments, the material of the second conductive layer 40 may include ITO material, and consequently, the lower resistance of the first electrode 41 in the embodiments of the present invention compared to connecting data lines using a conductive semiconductor material in the structure shown in Figure 2, further reduces the connection resistance between the data line 21, the first electrode 41 and the first contact portion 32, and further improves the signal transmission efficiency. In some embodiments, the data lines 21 and the first contact portion 32 partially overlap along the thickness direction of the display panel, further contributing to the first opening 71 exposing both the data lines 21 and the first contact portion 32, reducing the opening area of the first opening 71 and improving the space utilization rate of the display panel.
[0032] In some embodiments, the data line 21 includes a second side surface provided away from the light-shielding portion 22, the first side surface being located away from the channel portion 31 of the first contact portion 32, and the second side surface being located away from the channel portion 31 of the first side surface, i.e., the data line 21 is partially not shielded by the first contact portion 32 in order to facilitate connection between the first electrode 41 and the data line 21. In some embodiments, the first opening 71 includes a first sub-opening 711 and a second sub-opening 712 that communicate with each other, the second sub-opening 712 being located between the first sub-opening 711 and the data line 21, the first sub-opening 711 penetrating the second insulating layer 54 and the organic insulating layer 53, and the second sub-opening 712 penetrating the first insulating layer 52 and the buffer layer 51. Here, the side wall of the first sub-opening 711 is the surface of the second insulating layer 54. In the embodiments of the present invention, the first opening 71 penetrates the second insulating layer 54, the first insulating layer 52, and the buffer layer 51. The second insulating layer 54, the first insulating layer 52, and the buffer layer 51 can all be manufactured using inorganic insulating materials, such as silicon nitride or silicon oxide. Consequently, the openings in the second insulating layer 54, the first insulating layer 52, and the buffer layer 51 can be formed on the same photomask. That is, the first opening 71 that penetrates the second insulating layer 54, the first insulating layer 52, and the buffer layer 51 can be formed, thereby further reducing the number of photomasks and lowering process costs.
[0033] Furthermore, since both the first insulating layer 52 and the second insulating layer 54 are manufactured using inorganic insulating materials, their water vapor barrier effect is superior to that of the organic insulating layer 53. Therefore, in this invention, by forming the side walls of the first sub-opening 711 using the second insulating layer 54, the water vapor barrier effect of the display panel is effectively increased, the probability of the inside of the display panel being corroded by water vapor is effectively reduced, and the service life of the display panel can be effectively improved. In some embodiments, the second insulating layer 54 includes a first sub-part located on the side wall of the first sub-opening 711 and a second sub-part located on the surface of the organic insulating layer 53 away from the substrate 10, wherein the thickness of the first sub-part is less than or equal to the thickness of the second sub-part. During the dry etching process, the etching gas etches the first opening 71 downwards and also in the horizontal direction, which may cause etching effects on the second insulating layer 54 on the side wall of the first sub-opening 711. As a result, the thickness of the second insulating layer 54 on the side wall of the first sub-opening 711 may be less than the thickness of the second insulating layer 54 on the surface of the organic insulating layer 53 away from the substrate 10.
[0034] Furthermore, in some embodiments, the display panel further includes a second opening 72 that penetrates the buffer layer 51, the first insulating layer 52, the organic insulating layer 53, and the second insulating layer 54, with at least a portion of the first signal line 23 and at least a portion of the second signal line 62 provided corresponding to the second opening 72. The second opening 72 is located within the non-display area 102 and on the side of the first signal line 23 away from the substrate 10, allowing a portion of the surface of the first signal line 23 and a portion of the surface of the second signal line 62 to be exposed. The second signal line 62 is also provided close to the first signal line 23. This contributes to the second opening 72 exposing both the first signal line 23 and the second signal line 62, contributes to reducing the diameter of the second opening 72, and can improve the space utilization rate of the display panel. Furthermore, the second conductive layer 40 further includes a transfer line 44 provided within the non-display area 102 and at least a portion of which is located within the second opening 72, and the transfer line 44 is connected between the first signal line 23 and the second signal line 62. The transfer line 44 may have a portion located within the second opening 72 and connected between the first signal line 23 and the second signal line 62, while the other portion extends outside the second opening 72 and is located on a surface of the second insulating layer 54 away from the substrate 10.
[0035] In one embodiment, the second signal line 62 includes a second surface away from one side of the substrate 10 and a third side connected to the second surface, with one end of the transfer line 44 covering the second surface and the third side, and the other end of the transfer line 44 covering the surface of the first signal line 23 away from the substrate 10. That is, in the embodiment of the present application, compared to the structures shown in Figures 1 and 2, the transfer line 44 can cover both the first surface and the first side of the second signal line 62, thereby effectively increasing the connection area between the second signal line 62 and the first signal line 23, effectively reducing the connection resistance between the transfer line 44, the second signal line 62 and the first signal line 23, and effectively improving the signal transmission efficiency. Furthermore, since the material of the second conductive layer 40 may include ITO material, the resistance of the transfer line 44 in the embodiment of this application is lower compared to transferring using a conductive semiconductor material in the structure shown in Figure 2. This further reduces the connection resistance between the transfer line 44, the second signal line 62, and the first signal line 23, thereby further improving the signal transmission efficiency. In some embodiments, the second opening 72 includes a third sub-opening 721 and a fourth sub-opening 722 that communicate with each other, the fourth sub-opening 722 being located between the third sub-opening 721 and the first signal line 23, the third sub-opening 721 penetrating the second insulating layer 54 and the organic insulating layer 53, and the fourth sub-opening 722 penetrating the first insulating layer 52 and the buffer layer 51. Here, the side wall of the third sub-opening 721 is a surface having the second insulating layer 54. In the embodiments of the present invention, the second opening 72 penetrates the second insulating layer 54, the first insulating layer 52, and the buffer layer 51. The second insulating layer 54, the first insulating layer 52, and the buffer layer 51 may all be manufactured using inorganic insulating materials, such as silicon nitride or silicon oxide. Consequently, the openings in the second insulating layer 54, the first insulating layer 52, and the buffer layer 51 can be formed on the same photomask. That is, the first opening 71 and the second opening 72, which penetrate the second insulating layer 54, the first insulating layer 52, and the buffer layer 51, can be formed on the same photomask, thereby further reducing the number of photomasks and lowering process costs.
[0036] Furthermore, since both the first insulating layer 52 and the second insulating layer 54 are manufactured using inorganic insulating materials, their water vapor barrier effect is superior to that of the organic insulating layer 53. Therefore, in this invention, by forming the side walls of the third sub-opening 721 using the second insulating layer 54, the water vapor barrier effect of the display panel is effectively increased, the probability of the inside of the display panel being corroded by water vapor is effectively reduced, and the service life of the display panel can be effectively improved. In some embodiments, the thickness of the second insulating layer 54 located on the side wall of the third sub-opening 721 is less than or equal to the thickness of the second insulating layer 54 on the surface of the organic insulating layer 53 away from the substrate 10. During the dry etching process, the etching gas etches the second opening 72 downwards and also horizontally, which may cause etching effects on the second insulating layer 54 on the side wall of the third sub-opening 721. As a result, the thickness of the second insulating layer 54 covering the side wall of the third sub-opening 721 may be less than the thickness of the second insulating layer 54 on the surface of the organic insulating layer 53 away from the substrate 10.
[0037] In some embodiments, the display panel further includes a third opening 73 penetrating the first insulating layer 52, the organic insulating layer 53, and the second insulating layer 54, wherein the third opening 73 is provided corresponding to the second contact portion 33, that is, the third opening 73 is located on the side of the second contact portion 33 away from the substrate 10 and may be located within the display area 101. One end of the second electrode 42 is located on the side of the second insulating layer 54 away from the organic insulating layer 53, and the other end of the second electrode 42 is connected to the second contact portion 33 through the third opening 73, that is, the second electrode 42 may have a source or drain function. In the embodiment of this application, since the first opening 71, the second opening 72, and the third opening 73 are all formed on the same photomask, the etching intensity of the etching gas is the same during the dry etching process of the first opening 71, the second opening 72, and the third opening 73. Here, the first opening 71 and the second opening 72 both penetrate the second insulating layer 54, the organic insulating layer 53, the first insulating layer 52, and the buffer layer 51, while the depth of the third opening 73 is smaller than the depths of the first opening 71 and the second opening 72, so the third opening 73 penetrates the second insulating layer 54, the organic insulating layer 53, and the first insulating layer 52. In order to prevent the second contact portion 33 from being etched through, the thickness of the second contact portion 33 must be 50 angstroms or more, that is, the thickness of the active layer 30 must be 50 angstroms or more, thereby stopping the etching of the third opening 73 at the second contact portion 33 and preventing the active layer 30 from being connected to the second electrode 42 due to the second contact portion 33 being etched through.
[0038] In some embodiments, the average thickness of the second contact portion 33 may be less than or equal to the average thickness of the first contact portion 32, because the second contact portion 33 may be partially etched during the etching process. In some embodiments, the display panel may further include a liquid crystal layer provided on the side of the second conductive layer 40 away from the substrate 10, and a counter substrate provided on the side of the liquid crystal layer away from the second conductive layer 40, and a structure such as a color filter layer may be provided on the counter substrate. In other words, in this embodiment, the display panel may be a liquid crystal display panel.
[0039] Here, the second electrode 42 is a pixel electrode provided within the display area 101, and the second electrode 42 is electrically connected to the active layer 30, the first electrode 41, and the data line 21 in order to acquire data signals on the data line 21. On the other hand, an electric field may be formed between the second electrode 42 and the common electrode layer 57 in order to control the deflection of liquid crystal molecules in the liquid crystal layer. As described above, in the embodiment of the present application, the first electrode 41 and the second electrode 42 are provided in the second conductive layer 40, the second electrode 42 is used as a pixel electrode or anode, and the second electrode 42 is directly connected to the second contact portion 33 of the active layer 30, thereby giving the second electrode 42 the function of a source or drain. In the embodiment of the present application, the fact that the first electrode 41 and the second electrode 42 are located in the same film layer is equivalent to forming the first electrode 41, the pixel electrode (or anode), and the source (or drain) using the same photomask, which effectively reduces the number of photomasks in the manufacturing process of the display panel and effectively lowers the manufacturing cost of the display panel. Furthermore, in the process of forming the first opening 71, the second opening 72, and the third opening 73, the buffer layer 51 can be formed on the same photomask as the first insulating layer 52 and the second insulating layer 54, thereby further reducing the number of photomasks in the manufacturing process of the display panel and further lowering the manufacturing cost of the display panel.
[0040] Referring to Figure 4, in other embodiments of the present invention, this embodiment differs from the embodiment shown in Figure 3 in that the display panel provided in this embodiment is an organic light-emitting diode display panel. Specifically, the display panel further includes a pixel definition layer 81 provided on the side of the second conductive layer 40 away from the substrate 10, a light-emitting functional layer 82, and a cathode layer 83 provided on the side of both the pixel definition layer 81 and the light-emitting functional layer 82 away from the second conductive layer 40, and the second electrode 42 may be an anode.
[0041] Here, the pixel definition layer 81 is provided on the side of the second conductive layer 40 away from the substrate 10 and fills the first opening 71, the second opening 72, and the third opening 73. Multiple pixel apertures are formed in the pixel definition layer 81, and the pixel apertures expose the surface of the second electrode 42. The light-emitting functional layer 82 is provided in at least each pixel aperture and is located on a surface of the second electrode 42 away from the second insulating layer 54. The cathode layer 83 covers the pixel definition layer 81, and the light-emitting functional layer 82 is away from the surface of the second electrode 42. As described above, in the embodiment of the present application, the first electrode 41 and the second electrode 42 are provided in the second conductive layer 40, the second electrode 42 is used as a pixel electrode or anode, and the second electrode 42 is directly connected to the second contact portion 33 of the active layer 30, thereby giving the second electrode 42 the function of a source or drain. In the embodiment of the present application, the fact that the first electrode 41 and the second electrode 42 are located in the same film layer is equivalent to forming the first electrode 41, the pixel electrode (or anode), and the source (or drain) using the same photomask, which effectively reduces the number of photomasks in the manufacturing process of the display panel and effectively lowers the manufacturing cost of the display panel. Furthermore, in the process of forming the first opening 71, the second opening 72, and the third opening 73, the buffer layer 51 can be formed on the same photomask as the first insulating layer 52 and the second insulating layer 54, thereby further reducing the number of photomasks in the manufacturing process of the display panel and further lowering the manufacturing cost of the display panel.
[0042] Furthermore, together with Figures 3, 5 and 6 to 9, the embodiments of the present application further provide a manufacturing method for the display panel described in the embodiments described above, and the manufacturing method for the display panel includes the following: In S10, a first conductive layer is formed on the substrate, and data lines are formed on the first conductive layer.
[0043] In S20, an active layer is formed on the side of the first conductive layer away from the substrate, and the active layer has a channel portion, and a first contact portion and a second contact portion are formed on both sides opposite the channel portion, respectively. In S30, a second conductive layer is formed on the side of the active layer away from the first conductive layer, and a first electrode and a second electrode are formed on the second conductive layer. The first electrode connects the first contact portion and the data line, and the second electrode and the second contact portion are connected to each other. The second electrode includes a pixel electrode or an anode.
[0044] Specifically, in step S10, a first conductive layer 20 with a design is formed on the substrate 10 using a first photomask process, and the first conductive layer 20 has data lines 21 and light-shielding areas 22 located within the display area 101, and a first signal line 23 located within the non-display area 102. Then, a buffer layer 51 is formed on the substrate 10 to cover the data line 21, the light shielding portion 22, and the first signal line 23. Here, the material of the buffer layer 51 may include an inorganic insulating material, such as silicon nitride or silicon oxide.
[0045] In step S20, an active layer 30 is formed on the side of the buffer layer 51 away from the first conductive layer 20 using a second photomask process, and the active layer 30 is formed on the side of the light-shielding portion 22 away from the substrate 10. Here, the active layer 30 includes a channel portion 31 and a first contact portion 32 and a second contact portion 33 connected to opposite sides of the channel portion 31, respectively, and the light-shielding portion 22 is located between the channel portion 31 and the substrate 10. In some embodiments, the material of the active layer 30 may include an oxide semiconductor material, and more specifically, a metal oxide semiconductor material. For example, the material of the active layer 30 may include at least one of indium zinc oxide (IZO), gallium indium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), and indium gallium tin oxide (IGZTO).
[0046] Then, a third photomask process is used to form the gate insulating layer and the third conductive layer 60, which are designed on the active layer 30 and the buffer layer 51. Here, the gate insulating layer includes a first gate insulating portion 55 formed on the side of the channel portion 31 away from the light-shielding portion 22, and a second gate insulating portion 56 located within the non-display area 102 and close to the first signal line 23, and the third conductive layer 60 includes a gate 61 formed on the side of the first gate insulating portion 55 away from the channel portion 31, and a first signal line 23 located on the side of the second gate insulating portion 56 away from the buffer layer 51. Subsequently, as shown in Figure 6, a first insulating layer 52 is formed on the buffer layer 51 to cover the active layer 30 and the third conductive layer 60. The material of the first insulating layer 52 may include an inorganic insulating material, such as silicon nitride or silicon oxide.
[0047] Then, as shown in Figure 7, a fourth photomask step is used to form a patterned organic insulating layer 53 on the first insulating layer 52, and the organic insulating layer 53 has a first intermediate hole 710 corresponding to the data line 21 and the first contact portion 32, a second intermediate hole 720 corresponding to the first signal line 23 and the second signal line 62, and a third intermediate hole 730 corresponding to the second contact portion 33. The material of the organic insulating layer 53 includes an organic insulating material, such as acrylic or polyimide. Subsequently, a fifth photomask step is used to form a stylized common electrode layer 57 on the side of the organic insulating layer 53 that is away from the first insulating layer 52.
[0048] As shown in Figure 8, a second insulating layer 54 covering the common electrode layer 57 is formed on the side of the organic insulating layer 53 away from the first insulating layer 52, where the second insulating layer 54 further covers the side walls and bottoms of the first intermediate hole 710, the second intermediate hole 720, and the third intermediate hole 730. The material of the second insulating layer 54 may include an inorganic insulating material, such as silicon nitride or silicon oxide. Since the second insulating layer 54, the first insulating layer 52, and the buffer layer 51 are all inorganic materials, and may be, for example, silicon nitride or silicon oxide, the second insulating layer 54, the first insulating layer 52, and the buffer layer 51 can be etched using the sixth photomask step to form a first opening 71 corresponding to the first intermediate hole 710, a second opening 72 corresponding to the second intermediate hole 720, and a third opening 73 corresponding to the third intermediate hole 730. Here, as shown in Figure 9, the first opening 71 penetrates the second insulating layer 54, the organic insulating layer 53, the first insulating layer 52, and the buffer layer 51, and a portion of the data line 21 and at least a portion of the first contact portion 32 are located within the first opening 71; the second opening 72 penetrates the second insulating layer 54, the organic insulating layer 53, the first insulating layer 52, and the buffer layer 51, and a portion of the first signal line 23 and a portion of the second signal line 62 are located within the second opening 72; and the third opening 73 penetrates the second insulating layer 54, the organic insulating layer 53, and the first insulating layer 52, and a portion of the second contact portion 33 is located within the third opening 73.
[0049] A conductive material layer is formed on the side of the second insulating layer 54 away from the organic insulating layer 53, and a design process is performed on the conductive material layer using a seventh photomask process to form the second conductive layer 40. Here, the second conductive layer 40 includes a first electrode 41 located in the first opening 71, a transfer line 44 located in at least the second opening 72, and a second electrode 42 located in at least the third opening 73.
[0050] Furthermore, as shown in Figure 3, the first electrode 41 is connected between the data line 21 and the first contact portion 32 within the first opening 71, one end of the second electrode 42 is connected to the second contact portion 33 within the third opening 73, and the other end of the second electrode 42 is located on a surface of the second insulating layer 54 away from the organic insulating layer 53, and the transfer line 44 is connected between the first signal line 23 and the second signal line 62 within the second opening 72. As described above, in the embodiment of the present application, the first electrode 41 and the second electrode 42 are provided in the second conductive layer 40, the second electrode 42 is used as a pixel electrode or anode, and the second electrode 42 is directly connected to the second contact portion 33 of the active layer 30, thereby giving the second electrode 42 the function of a source or drain. In the embodiment of the present application, the first electrode 41 and the second electrode 42 are located in the same film layer, which is equivalent to forming the first electrode 41, the pixel electrode (or anode), and the source (or drain) using the same photomask. Furthermore, in the process of forming the first opening 71, the second opening 72, and the third opening 73, the buffer layer 51 can be formed on the same photomask as the first insulating layer 52 and the second insulating layer 54. As a result, the embodiment of the present application can manufacture the display panel shown in Figure 3 using only seven photomask steps, which effectively reduces the number of photomasks in the manufacturing process of the display panel compared to the structures shown in Figures 1 and 2, and effectively lowers the manufacturing cost of the display panel.
[0051] Furthermore, embodiments of the present application further provide a display device, which may use a display panel described in the above-described embodiments, or a display panel manufactured by a manufacturing method relating to a display panel described in the above-described embodiments. In some embodiments, the display device may be a liquid crystal display device or an organic light-emitting diode display device.
[0052] To ensure understanding, since the display device includes the display panel described in the above-described embodiment, the display device has the same inventive effects as the display panel described in the above-described embodiment, and therefore its explanation is omitted here. In the description of this application, the terms "first" and "second" are used solely for the purpose of describing the objective and should not be understood as indicating or suggesting relative importance, nor as implicitly specifying the number of technical features mentioned. Therefore, features limited to "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, unless explicitly and specifically limited, "plural" means two or more.
[0053] In the embodiments described above, each embodiment has its own focus, and for parts of embodiments that are not described in detail, you can refer to the relevant descriptions in other embodiments. The embodiments, designs, and related technical features of this application can be combined or substituted for one another without contradiction.
[0054] The above are merely preferred embodiments of the present application and do not limit the present application in any form. Simple modifications, equivalent modifications, and alterations of the above embodiments based on the technical substance of the present application, without departing from the content of the present technical application, still fall within the scope of the present technical application. [Explanation of Symbols]
[0055] 10: Circuit board 101:Display area 102: Hidden area 20: First conductive layer 21: Data line 22: Light-shielding part 23: First signal line 30:Active layer 31: Channel section 32: 1st contact part 33:Second contact part 40: Second conductive layer 41: 1st electrode 42:Second electrode 44: Transfer line 51: Buffer layer 52: First insulating layer 53: Organic insulating layer 54: Second insulating layer 55: First gate insulation 56: Second gate insulation 57: Common electrode layer 60: Third conductive layer 61: Gate 62: Second signal line 71:1st hole 711: First sub-opening 712: Second sub-opening 72:Second hole 721: Third sub-opening 722: Fourth sub-opening 73:Third hole 81: Pixel Definition Layer 82: Light-emitting functional layer 83: Cathode layer
Claims
1. circuit board and A first conductive layer is provided on the substrate and includes data lines, An active layer provided on the side of the first conductive layer away from the substrate, including a channel portion and a first contact portion and a second contact portion connected to opposite sides of the channel portion, The active layer includes a second conductive layer provided on the side of the active layer away from the first conductive layer, Here, the second conductive layer includes a first electrode and a second electrode, the first electrode connects the first contact portion and the data line, the second electrode and the second contact portion are connected to each other, and the second electrode includes a pixel electrode or an anode. Display panel.
2. A buffer layer is provided between the first conductive layer and the active layer, A first insulating layer is provided between the active layer and the second conductive layer, An organic insulating layer provided between the first insulating layer and the second conductive layer, The present invention further includes a second insulating layer provided between the organic insulating layer and the second conductive layer, The display panel further includes a first opening that penetrates the buffer layer, the first insulating layer, the organic insulating layer, and the second insulating layer, the first electrode is located within the first opening, and a portion of the data lines and at least a portion of the first contact portion are provided corresponding to the first opening. The display panel according to claim 1.
3. The first opening includes a first sub-opening and a second sub-opening that communicate with each other, the second sub-opening being located between the first sub-opening and the data line, the first sub-opening penetrating the second insulating layer and the organic insulating layer, and the second sub-opening penetrating the first insulating layer and the buffer layer. Here, the side wall of the first sub-opening is the surface of the second insulating layer. The display panel according to claim 2.
4. The second insulating layer includes a first sub-part located on the side wall of the first sub-opening and a second sub-part located on the surface of the organic insulating layer away from the substrate, wherein the thickness of the first sub-part is less than or equal to the thickness of the second sub-part. The display panel according to claim 3.
5. The first contact portion includes a first surface away from one side of the first conductive layer and a first side connected to the first surface, with one end of the first electrode covering the first surface and the first side, and the other end of the first electrode covering the side of the data line away from the substrate. The display panel according to any one of claims 1 to 4.
6. The first conductive layer further includes a light-shielding portion provided between the channel portion and the substrate, the light-shielding portion being provided at a distance from the data lines, The data lines include a second side surface that partially overlaps the first contact portion along the thickness direction of the display panel and is provided away from the light-shielding portion, wherein the first side surface is located on the side of the first contact portion away from the channel portion, and the second side surface is located on the side of the first side surface away from the channel portion. The display panel according to claim 5.
7. The display panel further includes a display area and a non-display area adjacent to the display area, and at least the second electrode is provided within the display area. The first conductive layer further includes a first signal line provided on the substrate and located within the non-display area, The display panel further includes a third conductive layer provided between the active layer and the first insulating layer, the third conductive layer including a gate provided on the side of the channel portion away from the buffer layer and a second signal line located within the non-display area. The second conductive layer further includes a transfer line located within the non-display area, The display panel further includes a second opening that penetrates the buffer layer, the first insulating layer, the organic insulating layer, and the second insulating layer, at least a portion of the transfer line is located within the second opening, at least a portion of the first signal line and at least a portion of the second signal line are provided corresponding to the second opening, and the transfer line connects the first signal line and the second signal line. The display panel according to claim 2.
8. The second signal line includes a second surface away from one side of the substrate and a third surface connected to the second surface, with one end of the transfer line covering the second surface and the third surface, and the other end of the transfer line covering the surface of the first signal line away from the substrate. The display panel according to claim 7.
9. The second opening includes a third sub-opening and a fourth sub-opening that communicate with each other, the fourth sub-opening being located between the third sub-opening and the first signal line, the third sub-opening penetrating the second insulating layer and the organic insulating layer, and the fourth sub-opening penetrating the first insulating layer and the buffer layer. Here, the side wall of the third sub-opening is the surface of the second insulating layer. The display panel according to claim 7.
10. The display panel further includes a third opening that penetrates the first insulating layer, the organic insulating layer, and the second insulating layer, the third opening being provided corresponding to the second contact portion, one end of the second electrode being located on the side of the second insulating layer away from the organic insulating layer, and the other end of the second electrode being connected to the second contact portion through the third opening. The display panel according to claim 2.
11. The thickness of the active layer is 50 angstroms or more. The display panel according to claim 1 or 10.
12. The display panel further includes a liquid crystal layer provided on the side of the second conductive layer away from the substrate, and a counter substrate provided on the side of the liquid crystal layer away from the second conductive layer, wherein the second electrode is the pixel electrode. Alternatively, the display panel further includes a light-emitting functional layer provided on the side of the second conductive layer away from the substrate, and a cathode layer provided on the side of the light-emitting functional layer away from the second conductive layer, wherein the second electrode is the anode. The display panel according to claim 1.
13. A first conductive layer is formed on the substrate, and data lines are formed on the first conductive layer. An active layer is formed on the side of the first conductive layer away from the substrate, and the active layer has a channel portion and a first contact portion and a second contact portion connected to opposite sides of the channel portion, respectively. A second conductive layer is formed on the side of the active layer away from the first conductive layer, and a first electrode and a second electrode are formed on the second conductive layer, the first electrode connects the first contact portion and the data line, the second electrode and the second contact portion are connected to each other, and the second electrode includes a pixel electrode or an anode. Manufacturing method for display panels.
14. A display panel according to any one of claims 1 to 4, 7 to 10, or 12, or a display panel obtained by manufacturing a display panel according to the manufacturing method for a display panel described in claim 13, Display device.
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