Substrate processing method, semiconductor device manufacturing method, substrate processing system, and program

Abstract

The present invention provides a substrate processing method for selectively forming a film on a desired surface with high precision, a semiconductor device manufacturing method, a substrate processing system, and a program. [Solution] The method comprises: step F, which involves supplying an etching agent to a substrate to remove a native oxide film formed on the surface; step A, which includes step A1, which involves supplying an oxidizing agent and a reducing agent to a substrate having a first surface and a second surface in a plasma state, and step A2, which involves supplying a reducing agent to the substrate in a plasma state; and step B, which involves heat-treating the substrate.

Description

[Technical Field]

[0001] This disclosure relates to a substrate processing method, a semiconductor device manufacturing method, a substrate processing system, and a program. [Background technology]

[0002] As part of the manufacturing process for semiconductor devices, a process is sometimes performed in which a film is selectively grown and formed on a specific surface from among several types of surfaces with different materials exposed on the surface of a substrate (hereinafter this process is also referred to as selective growth or selective film formation) (see, for example, Patent Documents 1 to 3). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2021-106242 [Patent Document 2] Japanese Patent Publication No. 2020-155452 [Patent Document 3] Japanese Patent Publication No. 2020-155607 [Overview of the project] [Problems that the invention aims to solve]

[0004] This disclosure provides a technique for selectively forming a film on a desired surface with high precision. [Means for solving the problem]

[0005] According to one aspect of this disclosure, (a) (a1) A step of supplying an oxidizing agent and a reducing agent to a substrate having a first surface and a second surface in a plasma state, and (a2) A step of supplying a reducing agent to the substrate in a plasma state, (b) A step of heat-treating the substrate after (a) has been performed, Technology including the above will be provided. [Effects of the Invention]

[0006] According to the present disclosure, a film can be selectively formed with high precision on a desired surface.

Brief Description of the Drawings

[0007] [Figure 1] FIG. 1 is a schematic configuration diagram of a vertical processing furnace of a substrate processing apparatus suitably used in one aspect of the present disclosure, and is a diagram showing a cross-sectional view of the processing furnace 202 portion. [Figure 2] FIG. 2 is a schematic configuration diagram of a vertical processing furnace of a substrate processing apparatus suitably used in one aspect of the present disclosure, and is a diagram showing a cross-sectional view of the processing furnace 202 portion taken along the line A-A in FIG. 1. [Figure 3] FIG. 3 is a schematic configuration diagram of a controller 121 of a substrate processing apparatus suitably used in one aspect of the present disclosure, and is a diagram showing a control system of the controller 121 in a block diagram. [Figure 4] FIG. 4 is a diagram showing a processing sequence in one aspect of the present disclosure. [Figure 5] FIG. 5(a) is an enlarged cross-sectional view of a surface portion of a substrate provided with a laminated structure in which a first material (SiGe) and a second material (Si) are alternately laminated on the surface, and on which a fourth material (SiO), a third material (SiN), and a fourth material (SiO) are laminated. A concave portion having a depth direction parallel to the surface of the substrate (lateral direction) is provided on the side wall of the laminated structure by removing a part of the portion constituted by the first material among the side walls of the laminated structure of the first material and the second material. FIG. 5(b) is an enlarged cross-sectional view of a surface portion of the substrate after forming an inhibitor layer by the processing sequence in this aspect with respect to the substrate having the configuration in FIG. 5(a) on the surface. FIG. 5(c) is an enlarged cross-sectional view of a surface portion of the substrate after forming a film (SiOC) after forming an inhibitor layer by the processing sequence in this aspect with respect to the substrate having the configuration in FIG. 5(a) on the surface. FIG. 5(d) is an enlarged cross-sectional view of a surface portion of the substrate after performing heat treatment after forming an inhibitor layer and forming a film (SiOC) by the processing sequence in this aspect with respect to the substrate having the configuration in FIG. 5(a) on the surface. [Figure 6] Figure 6(a) is a magnified cross-sectional view of the surface of a substrate having a laminated structure on its surface in which a first material (SiGe) and a second material (Si) are alternately stacked, and a fourth material (SiO) and a third material (SiN) and a fourth material (SiO) are stacked on top of that, and a portion of the side wall of the laminated structure of the first and second materials made up of the first material is removed, so that a recess is provided in the side wall of the laminated structure whose depth direction is parallel to the surface of the substrate (lateral direction). Figure 6(b) is a magnified cross-sectional view of the surface of a substrate having the structure on its surface as shown in Figure 6(a) after a film (SiOC) has been formed on it by a conventional film deposition method. Figure 6(c) is a magnified cross-sectional view of the surface of a substrate having the structure on its surface as shown in Figure 6(b) after etching has been performed to remove excess film formed on the upper surface of the recess, etc. [Figure 7] Figure 7 is a block diagram illustrating an example of a substrate processing system preferably used in other embodiments of this disclosure. [Figure 8] Figure 8 is a block diagram illustrating another example of a substrate processing system preferably used in other embodiments of this disclosure. [Figure 9] Figure 9 is a cross-sectional TEM image of evaluation sample 1 in the example. [Figure 10] Figure 10 is a cross-sectional TEM image of evaluation sample 2 in the example. [Modes for carrying out the invention]

[0008] <One aspect of this disclosure> The following description will explain one aspect of this disclosure, primarily with reference to Figures 1 to 4 and Figures 5(a) to 5(d). It should be noted that the drawings used in the following description are schematic, and the dimensional relationships and proportions of the elements shown in the drawings do not necessarily correspond to reality. Furthermore, the dimensional relationships and proportions of the elements do not necessarily correspond between multiple drawings.

[0009] (1) Configuration of substrate processing equipment (substrate processing system) As shown in Figure 1, the processing furnace 202 has a heater 207 as a temperature regulator (heating unit). The heater 207 is cylindrical and is mounted vertically by being supported by a holding plate. The heater 207 also functions as an activation mechanism (excitation unit) that activates (excites) the gas with heat.

[0010] Inside the heater 207, a reaction tube 203 is arranged concentrically with the heater 207. The reaction tube 203 is made of a heat-resistant material such as quartz (SiO2) or silicon carbide (SiC), and is formed in a cylindrical shape with a closed upper end and an open lower end. Below the reaction tube 203, a manifold 209 is arranged concentrically with the reaction tube 203. The manifold 209 is made of a metal material such as stainless steel (SUS), and is formed in a cylindrical shape with open upper and lower ends. The upper end of the manifold 209 engages with the lower end of the reaction tube 203 and is configured to support the reaction tube 203. An O-ring 220a is provided between the manifold 209 and the reaction tube 203 as a sealing member. The reaction tube 203 is installed vertically, similar to the heater 207. The processing vessel (reaction vessel) is mainly composed of the reaction tube 203 and the manifold 209. A processing chamber 201 is formed in the hollow cylindrical portion of the processing container. The processing chamber 201 is configured to accommodate a wafer 200 as a substrate. Processing of the wafer 200 is performed within this processing chamber 201.

[0011] Within the processing chamber 201, nozzles 249a to 249c, which serve as the first to third supply units, are provided so as to penetrate the side walls of the manifold 209. Nozzles 249a to 249c are also referred to as the first to third nozzles. Nozzles 249a to 249c are made of a heat-resistant material such as quartz or SiC. Gas supply pipes 232a to 232c are connected to nozzles 249a to 249c, respectively. Nozzles 249a to 249c are all different nozzles, and nozzles 249a and 249c are each provided adjacent to nozzle 249b.

[0012] Gas supply pipes 232a to 232c are equipped with mass flow controllers (MFCs) 241a to 241c and valves 243a to 243c, respectively, in order from the upstream side of the gas flow. Downstream of valve 243a in gas supply pipe 232a, gas supply pipes 232d and 232f are connected, respectively. Downstream of valve 243b in gas supply pipe 232b, gas supply pipes 232e and 232g are connected, respectively. Downstream of valve 243c in gas supply pipe 232c, gas supply pipe 232h is connected. Gas supply pipes 232d to 232h are equipped with MFCs 241d to 241h and valves 243d to 243h, respectively, in order from the upstream side of the gas flow. Gas supply pipes 232a to 232h are made of a metal material such as SUS.

[0013] As shown in Figure 2, nozzles 249a to 249c are provided in an annular space in plan view between the inner wall of the reaction tube 203 and the wafer 200, extending upward from the lower part of the inner wall of the reaction tube 203 towards the direction of wafer 200 arrangement. That is, nozzles 249a to 249c are provided in a region horizontally surrounding the wafer arrangement region, on the side of the wafer arrangement region where the wafers 200 are arranged, and are provided along the wafer arrangement region. In plan view, nozzle 249b is positioned to be directly opposite the exhaust port 231a (described later) with the center of the wafer 200 being transported into the processing chamber 201 in between. Nozzles 249a and 249c are positioned to sandwich a straight line L passing through the center of nozzle 249b and the center of exhaust port 231a along the inner wall of the reaction tube 203 (outer periphery of the wafer 200) from both sides. Straight line L is also the straight line passing through nozzle 249b and the center of wafer 200. In other words, nozzle 249c is located on the opposite side of nozzle 249a, with respect to the straight line L. Nozzles 249a and 249c are arranged symmetrically with respect to the straight line L as the axis of symmetry. Gas supply holes 250a to 250c are provided on the sides of nozzles 249a to 249c, respectively. Each of the gas supply holes 250a to 250c opens so as to face (oppose) the exhaust port 231a in a plan view, making it possible to supply gas toward the wafer 200. Multiple gas supply holes 250a to 250c are provided extending from the bottom to the top of the reaction tube 203.

[0014] From the gas supply pipe 232a, the reforming agent (reformed gas) is supplied into the processing chamber 201 via the MFC 241a, valve 243a, and nozzle 249a.

[0015] From the gas supply pipe 232b, a raw material (raw material gas), which is one of the film-forming agents (film-forming gases), and a reducing agent (reducing gas) are supplied into the processing chamber 201 via the MFC 241b, valve 243b, and nozzle 249b.

[0016] From the gas supply pipe 232c, a reactant (reaction gas), which is one of the film-forming agents (film-forming gases), is supplied into the processing chamber 201 via the MFC 241c, valve 243c, and nozzle 249c.

[0017] From the gas supply pipe 232d, a catalyst (catalytic gas), which is one of the film-forming agents (film-forming gases), is supplied into the processing chamber 201 via the MFC 241d, valve 243d, gas supply pipe 232a, and nozzle 249a.

[0018] From the gas supply pipe 232e, the etching agent (etching gas) and oxidizing agent (oxidizing gas) are supplied into the processing chamber 201 via the MFC 241e, valve 243e, gas supply pipe 232b, and nozzle 249b.

[0019] Inert gas is supplied from gas supply pipes 232f to 232h into the processing chamber 201 via MFCs 241f to 241h, valves 243f to 243h, gas supply pipes 232a to 232c, and nozzles 249a to 249c, respectively. The inert gas acts as a purge gas, carrier gas, diluent gas, etc.

[0020] Downstream of the connection point between gas supply pipe 232b and gas supply pipe 232g, a remote plasma unit (hereinafter referred to as RPU) 300 is provided as a plasma excitation unit (plasma generation unit) for exciting the gas into a plasma state. Exciting the gas into a plasma state is also simply referred to as plasma excitation. The RPU 300 can excite the gas inside the RPU 300 by applying radio frequency (RF) power, that is, it can excite the gas into a plasma state. As for the plasma generation method, a capacitively coupled plasma (CCP) method may be used, or an inductively coupled plasma (ICP) method may be used. The RPU 300 is configured to excite reducing agents, oxidizing agents, and inert gases supplied from gas supply pipes 232b, 232e, and 232g into a plasma state and supply them into the processing chamber 201.

[0021] The reformer supply system is mainly composed of gas supply pipes 232a, MFC 241a, and valve 243a. The raw material supply system and reducing agent supply system are mainly composed of gas supply pipes 232b, MFC 241b, and valve 243b. The reactant supply system is mainly composed of gas supply pipes 232c, MFC 241c, and valve 243c. The catalyst supply system is mainly composed of gas supply pipes 232d, MFC 241d, and valve 243d. The etching agent supply system and oxidizing agent supply system are mainly composed of gas supply pipes 232e, MFC 241e, and valve 243e. The inert gas supply system is mainly composed of gas supply pipes 232f to 232h, MFC 241f to 241h, and valves 243f to 243h. The raw material supply system and the reactant supply system, or all of them, are also referred to as the film-forming agent supply system. The raw material supply system, reactant supply system, and catalyst supply system, or each or all of them, are also referred to as the film-forming agent supply system.

[0022] Of the various supply systems described above, one or all of them may be configured as an integrated supply system 248, which is comprised of valves 243a to 243h and MFCs 241a to 241h. The integrated supply system 248 is connected to each of the gas supply pipes 232a to 232h, and the supply operation of various substances (various gases) into the gas supply pipes 232a to 232h, i.e., the opening and closing operation of valves 243a to 243h and the flow rate adjustment operation of MFCs 241a to 241h, is controlled by a controller 121, which will be described later. The integrated supply system 248 is configured as an integrated or segmented integrated unit, and can be attached to and detached from the gas supply pipes 232a to 232h, etc., in units of the integrated unit, and is configured so that maintenance, replacement, and expansion of the integrated supply system 248 can be performed in units of the integrated unit.

[0023] An exhaust port 231a for exhausting the atmosphere inside the processing chamber 201 is provided at the lower part of the side wall of the reaction tube 203. As shown in Figure 2, the exhaust port 231a is located in a position opposite (facing) the nozzles 249a to 249c (gas supply holes 250a to 250c) with the wafer 200 in between, in a plan view. The exhaust port 231a may also be provided along the upper part of the side wall of the reaction tube 203, that is, along the wafer arrangement region. An exhaust pipe 231 is connected to the exhaust port 231a. A vacuum pump 246, which is a vacuum evacuation device, is connected to the exhaust pipe 231 via a pressure sensor 245, which is a pressure detector (pressure detection unit) for detecting the pressure inside the processing chamber 201, and an APC (Auto Pressure Controller) valve 244, which is a pressure regulator (pressure adjustment unit). The APC valve 244 can be opened and closed while the vacuum pump 246 is operating to evacuate and stop the vacuum evacuation in the processing chamber 201. Furthermore, while the vacuum pump 246 is operating, the valve opening can be adjusted based on the pressure information detected by the pressure sensor 245 to adjust the pressure in the processing chamber 201. The exhaust system mainly consists of the exhaust pipe 231, the APC valve 244, and the pressure sensor 245. The vacuum pump 246 may also be considered as part of the exhaust system.

[0024] Below the manifold 209, a seal cap 219 is provided as a furnace opening cover capable of airtightly closing the lower end opening of the manifold 209. The seal cap 219 is made of a metal material such as SUS and is formed in a disc shape. An O-ring 220b is provided on the upper surface of the seal cap 219 as a sealing member that contacts the lower end of the manifold 209. Below the seal cap 219, a rotating mechanism 267 for rotating the boat 217, which will be described later, is installed. The rotating shaft 255 of the rotating mechanism 267 passes through the seal cap 219 and is connected to the boat 217. The rotating mechanism 267 is configured to rotate the wafer 200 by rotating the boat 217. The seal cap 219 is configured to be raised and lowered vertically by a boat elevator 115, which is installed outside the reaction tube 203 as a lifting mechanism. The boat elevator 115 is configured as a transport device (transport mechanism) that moves the wafer 200 into and out of the processing chamber 201 by raising and lowering the seal cap 219.

[0025] Below the manifold 209, a shutter 219s is provided as a furnace opening cover that can airtightly close the lower end opening of the manifold 209 when the seal cap 219 is lowered and the boat 217 is removed from the processing chamber 201. The shutter 219s is made of a metal material such as SUS and is formed in a disc shape. An O-ring 220c is provided on the upper surface of the shutter 219s as a sealing member that contacts the lower end of the manifold 209. The opening and closing operation of the shutter 219s (such as lifting and lowering or rotating) is controlled by the shutter opening and closing mechanism 115s.

[0026] The boat 217, which serves as a substrate support, is configured to support multiple wafers 200, for example 25 to 200 wafers 200, in a horizontal position and aligned vertically with their centers aligned, in a multi-stage arrangement, that is, arranged with spacing between them. The boat 217 is made of a heat-resistant material such as quartz or SiC. Below the boat 217, a multi-stage insulation plate 218, also made of a heat-resistant material such as quartz or SiC, is supported.

[0027] A temperature sensor 263 is installed inside the reaction tube 203 as a temperature detector. By adjusting the amount of power supplied to the heater 207 based on the temperature information detected by the temperature sensor 263, the temperature inside the processing chamber 201 is adjusted to the desired temperature distribution. The temperature sensor 263 is installed along the inner wall of the reaction tube 203.

[0028] As shown in Figure 3, the controller 121, which is the control unit (control means), is configured as a computer equipped with a CPU (Central Processing Unit) 121a, RAM (Random Access Memory) 121b, storage device 121c, and I / O port 121d. The RAM 121b, storage device 121c, and I / O port 121d are configured to exchange data with the CPU 121a via an internal bus 121e. An input / output device 122, configured as, for example, a touch panel, is connected to the controller 121. Furthermore, an external storage device 123 can be connected to the controller 121.

[0029] The storage device 121c is composed of, for example, flash memory, HDD (Hard Disk Drive), SSD (Solid State Drive), etc. The storage device 121c contains, in a readable format, control programs that control the operation of the substrate processing device, and process recipes that describe the procedures and conditions for substrate processing, as described later. The process recipe functions as a program, combining the procedures in the substrate processing described later so that the controller 121 causes the substrate processing device (substrate processing system) to execute them and obtain a predetermined result. Hereinafter, process recipes and control programs will be collectively referred to simply as "programs." Similarly, process recipes will be referred to simply as "recipes." In this specification, the term "program" may include only a recipe, only a control program, or both. The RAM 121b is configured as a memory area (work area) where programs and data read by the CPU 121a are temporarily held.

[0030] I / O port 121d is connected to the MFCs 241a to 241h, valves 243a to 243h, pressure sensor 245, APC valve 244, vacuum pump 246, temperature sensor 263, heater 207, rotary mechanism 267, boat elevator 115, shutter opening / closing mechanism 115s, RPU 300, etc.

[0031] The CPU 121a is configured to read and execute a control program from the storage device 121c, and to read a recipe from the storage device 121c in response to input of operation commands from the input / output device 122. The CPU 121a is configured to control the flow rate adjustment operation of various substances (various gases) by the MFCs 241a to 241h, the opening and closing operation of valves 243a to 243h, the opening and closing operation of the APC valve 244 and the pressure adjustment operation of the APC valve 244 based on the pressure sensor 245, the starting and stopping of the vacuum pump 246, the temperature adjustment operation of the heater 207 based on the temperature sensor 263, the rotation and rotation speed adjustment operation of the boat 217 by the rotating mechanism 267, the raising and lowering operation of the boat 217 by the boat elevator 115, the opening and closing operation of the shutter 219s by the shutter opening and closing mechanism 115s, and the plasma excitation operation of gas by the RPU 300, etc., in accordance with the contents of the read recipe.

[0032] The controller 121 can be configured by installing the above-mentioned program, recorded and stored in the external storage device 123, onto a computer. The external storage device 123 includes, for example, magnetic disks such as HDDs, optical disks such as CDs, magneto-optical disks such as MOs, and semiconductor memory such as USB memory and SSDs. The storage device 121c and the external storage device 123 are configured as computer-readable recording media. Hereinafter, these will be collectively referred to simply as recording media. In this specification, the term recording media may include only the storage device 121c, only the external storage device 123, or both. Note that the program may be provided to the computer using communication means such as the Internet or a dedicated line, without using the external storage device 123.

[0033] (2) Substrate processing process Using the substrate processing apparatus (substrate processing system) described above, a method for processing a substrate as one step in the manufacturing process of a semiconductor device, specifically, an example of a processing sequence for forming a film on the first surface of the wafer 200, which is the substrate, will be explained mainly using Figures 4 and 5(a) to 5(d). Here, an example of a processing sequence for forming a film on the first surface of the wafer 200, which is the first, second, third, and fourth surface, will be explained. In the following explanation, the operation of each part constituting the substrate processing apparatus is controlled by the controller 121.

[0034] Here, as shown in Figure 5(a), the surface of the wafer 200 is provided with a recess whose depth direction is parallel to the surface of the wafer 200 (lateral direction), where the bottom surface is made of a first material containing a first element, and the sides and top surface are made of a second material containing a second element different from the first element. The first surface is the bottom surface of the recess, and the second surface is the side surface of the recess, or the side surface and top surface of the recess. The third surface and the fourth surface are surfaces of parts of the wafer 200 that are different from the recess. The third surface is made of a third material containing a third element different from the first and second elements, and the fourth surface is made of a fourth material containing a fourth element different from the first, second, and third elements. Note that the first element includes a group 14 element, the second element includes a group 14 element, the third element includes a group 15 element, and the fourth element includes a group 16 element.

[0035] Figure 5(a) shows an example where the first element is germanium (Ge), the second element is silicon (Si), the third element is nitrogen (N), the fourth element is oxygen (O), the first material is silicon germanium (SiGe), the second material is silicon (Si), the third material is silicon nitride (SiN), the fourth material is silicon oxide (SiO), and wafer 200 is single crystal Si. In other words, the first material contains the first element as well as the second element. The third material contains the third element as well as the second element. The fourth material contains the fourth element as well as the second element. Wafer 200 contains the first element. In other words, in this example, the first surface is composed of a silicon germanium film (SiGe film) as a germanium-containing film, the second surface is composed of a silicon film (Si film) as a silicon-containing film, the third surface is composed of a silicon nitride film (Si3N4 film, hereinafter also referred to as SiN film) as a nitrogen-containing film, and the fourth surface is composed of a silicon oxide film (SiO2 film, hereinafter also referred to as SiO film) as an oxygen-containing film.

[0036] More specifically, the surface of the wafer 200 is provided with a laminated structure in which a first material (SiGe) and a second material (Si) are alternately stacked, a third material (SiN) is provided above that, and a fourth material (SiO) is provided on top of that. Furthermore, the fourth material (SiO) is provided between the laminated structure of the first material (SiGe) and the second material (Si) and the third material (SiN). In other words, the surface of the wafer 200 is provided with a laminated structure in which SiGe films and Si films are alternately stacked, an SiO film is provided on top of that, a SiN film is provided above that, and an SiO film is provided on top of that. By removing a portion of the side wall of the laminated structure of SiGe films and Si films that is composed of SiGe films, a recess is provided in the side wall of the laminated structure, where the top and sides are composed of the second material (Si) and the bottom is composed of the first material (SiGe), and the depth direction is parallel to the surface of the wafer 200 (lateral direction). In this specification, as shown in Figure 5(a), the portion of the recess made of the first material (SiGe) is referred to as the bottom surface, and with respect to that, the portion of the recess made of the second material (Si), which is in contact with the bottom surface and is provided perpendicular to the bottom surface is referred to as the side surface, and the portion of the recess made of the second material (Si), which is not in contact with the bottom surface and is provided parallel to the bottom surface is referred to as the top surface.

[0037] Furthermore, the symbols A, A1, A2, B, C, D, E, and F in Figure 4 represent steps A, A1, A2, B, C, D, E, and F, respectively, and the symbol P indicates a purge performed in any step other than step D.

[0038] The processing sequence shown in Figure 4 comprises step A, which includes step A1 of supplying an oxidizing agent and a reducing agent to a wafer 200 having a first surface and a second surface in an excited plasma state, and step A2 of supplying a reducing agent to the wafer 200 in an excited plasma state, and step B of heat-treating the wafer 200 after step A has been performed. The wafer 200 further has at least one of a third surface and a fourth surface. Figure 5(a) shows an example in which the wafer 200 has a first surface (SiGe film surface), a second surface (Si film surface), a third surface (SiN film surface), and a fourth surface (SiO film surface).

[0039] Furthermore, it is preferable that the processing temperature in step B be higher than or equal to the processing temperature in step A. It is also preferable that the processing temperature in step B be higher than or equal to the processing temperatures in steps A and C. Furthermore, it is preferable that the processing temperature in step B be higher than or equal to the processing temperatures in steps A, C, and D. The processing sequence shown in Figure 4 illustrates an example where the processing temperature in step B is higher than the processing temperature in step A. The processing sequence shown in Figure 4 illustrates an example where the processing temperature in step B is higher than the processing temperatures in steps A and C. Furthermore, the processing sequence shown in Figure 4 illustrates an example where the processing temperature in step B is higher than the processing temperatures in steps A, C, and D. In the processing sequence shown in Figure 4, for example, the processing temperature in step B can be between 100°C and 400°C.

[0040] In step A, high-density hydroxyl group terminations (hereinafter also referred to as OH terminations or OH groups) are formed on the first and second surfaces of the wafer 200, and in step B, the OH terminations formed on the first surface are removed while retaining the high-density OH terminations formed on the second surface. More specifically, in step A, high-density OH terminations are formed on the first surface, the second surface, and at least one of the third and fourth surfaces of the wafer 200, and in step B, the OH terminations formed on the first surface are removed while retaining the high-density OH terminations formed on the second surface, and at least one of the third and fourth surfaces. In this embodiment, high-density OH terminations are formed on the first surface, the second surface, and the third surface of the wafer 200 in step A. Since the fourth surface is composed of an SiO film, a sufficient amount of OH terminations are formed on the fourth surface before step A is performed. However, if the OH terminations on the fourth surface are insufficient, etc., the OH terminations on the fourth surface can be reinforced in step A. As a result, in this embodiment, by performing step A, a state can be achieved in which high-density OH terminations are formed on each of the first, second, third, and fourth surfaces (a state in which each surface has high-density OH terminations), and by performing step B, the OH terminations formed on the first surface can be removed while maintaining the state in which high-density OH terminations are formed on each of the second, third, and fourth surfaces (a state in which each surface has high-density OH terminations).

[0041] In other words, in step A, the first and second surfaces are oxidized (plasma oxidized) to modify them, and in step B, the oxide formed on the first surface is sublimated and removed while the oxide (oxide film) formed on the second surface remains. More specifically, in step A, the first surface, the second surface, and at least one of the third and fourth surfaces are oxidized and modified, and in step B, the oxide formed on the first surface is sublimated and removed while the oxide formed on the second surface, and at least one of the third and fourth surfaces remains. In this embodiment, in step A, the first surface, the second surface, and the third surface of the wafer 200 are oxidized and modified. Since the fourth surface is composed of an SiO film, the fourth surface is not oxidized. However, if the fourth surface contains elements that can be oxidized, the fourth surface can also be oxidized and modified. As a result, in this embodiment, by performing step A, the first surface, second surface, third surface, and fourth surface of the wafer 200 can be oxidized (each surface has oxide), and by performing step B, the oxide formed on the first surface can be sublimated and removed while maintaining the oxidized state of the second surface, third surface, and fourth surface (each surface has oxide). In step A, the oxide formed on the first surface, second surface, and third surface of the wafer 200 is composed of a very thin, uniform layered or film-like substance. This very thin, uniform layered or film-like oxide is also simply referred to as an oxide layer or oxide film.

[0042] By oxidizing and modifying each surface as described above, a high density of OH terminations can be formed on each surface. Furthermore, by retaining (maintaining) oxides on a given surface, a high density of OH terminations can be retained (maintained) on that surface. Additionally, by sublimating and removing oxides on a specific surface, OH terminations on that surface can be removed. As a result, the second, third, and fourth surfaces before step C will have a high density of OH terminations. On the other hand, the first surface before step C will either have no OH terminations or have a much smaller amount of OH terminations than the second, third, and fourth surfaces.

[0043] Furthermore, the processing sequence shown in Figure 4 further includes step C, in which a modifier is supplied to the wafer 200 after step B has been performed, thereby forming an inhibitor layer on the second surface. More specifically, in step C, an inhibitor layer is formed on the second surface and at least one of the third and fourth surfaces. In this embodiment, as shown in Figure 5(b), an example is shown in which inhibitor layers are formed on the second surface, the third surface, and the fourth surface. In this embodiment, a high-density inhibitor layer can be formed on the second surface, the third surface, and the fourth surface.

[0044] Furthermore, the processing sequence shown in Figure 4 further includes step D, in which a film-forming agent is supplied to the wafer 200 after step C has been performed to form a film on the first surface. Figure 5(c) shows an example in which a film is selectively grown on the first surface among the first, second, third, and fourth surfaces to fill the recesses with a film.

[0045] More specifically, as shown in FIG. 4, in step D, a cycle in which step D1 of supplying a raw material and a catalyst as film-forming agents to the wafer 200 and step D2 of supplying a reactant and a catalyst as film-forming agents to the wafer 200 are performed non-simultaneously is repeated a predetermined number of times. As a result, a film can be grown starting from the first surface, i.e., the bottom surface of the concave portion, and the film can be grown bottom-up in the concave portion to fill the concave portion with the film.

[0046] In this specification, for convenience, the above-described processing sequence may be shown as follows. The same notation will be used in the following description of modified examples and other aspects. Note that the notations "oxidizing agent" * , , * , * , , * , , * ,

[0048] , * , * , , , * , , * ,

[0049] , * ", "reducing agent" [[ID=!7]] * " each mean an oxidizing agent and a reducing agent excited to a plasma state.

[0047] Oxidizing agent * + Reducing agent * → Reducing agent * → Heat treatment → Modifying agent → (Raw material + Catalyst → Reactant + Catalyst) × n

[0048] At this time, depending on the processing conditions, the catalyst may not be supplied as in the processing sequence shown below, or the catalyst may be supplied to the wafer 200 in at least one of step D1 and step D2. In FIG. 4, an example in which the catalyst is supplied to the wafer 200 in each of step D1 and step D2 is shown.

[0049] Oxidizing agent * + Reducing agent * → Reducing agent * → Heat treatment → Modifying agent → (Raw material → Reactant) × n Oxidizing agent * + Reducing agent * → Reducing agent * → Heat treatment → Modifying agent → (Raw material + Catalyst → Reactant) × n Oxidizing agent * + Reducing agent * → Reducing agent * → Heat treatment → Modifying agent → (Raw material → Reactant + Catalyst) × n Oxidizing agent <o * + Reducing agent* →reducing agent * → Heat treatment → Modifier → (Raw material + Catalyst → Reactant + Catalyst) × n

[0050] Furthermore, the processing sequence shown in Figure 4 includes a step E in which, after step D, the wafer 200 is heated and heat-treated to perform post-treatment, or post-treatment (hereinafter also referred to as PT), on the film formed to fill the recesses.

[0051] Furthermore, the processing sequence shown in Figure 4 further includes step F, in which an etching agent is supplied to the wafer 200 before step A is performed, and the native oxide film formed on the first surface, the second surface, and at least one of the third and fourth surfaces is removed. In this embodiment, the native oxide film formed on the first surface, the second surface, and the third surface can be removed in step F.

[0052] In this embodiment, the first surface is the surface of a SiGe film, the second surface is the surface of a Si film, the third surface is the surface of a SiN film, and the fourth surface is the surface of an SiO film. In step D, an example is described in which a silicon carbide film (SiOC film), which is one of the films containing silicon (Si), oxygen (O), and carbon (C), or a silicon oxide film (SiO film), which is one of the films containing silicon (Si) and oxygen (O), is grown as the film.

[0053] In this specification, the term "wafer" may refer to the wafer itself or to a laminate of a wafer and a predetermined layer or film formed on its surface. In this specification, the term "surface of the wafer" may refer to the surface of the wafer itself or to the surface of a predetermined layer formed on the wafer. In this specification, when it is stated that "a predetermined layer is formed on the wafer," it may mean that the predetermined layer is formed directly on the surface of the wafer itself or that the predetermined layer is formed on a layer already formed on the wafer. In this specification, the term "substrate" has the same meaning as when it is used with the term "wafer."

[0054] As used herein, the term "agent" includes at least one of gaseous substances and liquid substances. Liquid substances include mist-like substances. That is, each of the etching agents, oxidizing agents, reducing agents, modifiers, and film-forming agents (raw materials, reactants, catalysts) may contain gaseous substances, liquid substances such as mist-like substances, or both.

[0055] As used herein, the term "layer" includes at least one of a continuous layer and a discontinuous layer. For example, an inhibitor layer may include a continuous layer, a discontinuous layer, or both, as long as it is capable of producing a film-forming inhibitory effect (adsorption inhibition, reaction inhibition).

[0056] (Wafer charge and boat load) When multiple wafers 200 are loaded into the boat 217 (wafer charging), the shutter 219s is moved by the shutter opening / closing mechanism 115s, opening the lower end opening of the manifold 209 (shutter opening). Then, as shown in Figure 1, the boat 217 supporting the multiple wafers 200 is lifted by the boat elevator 115 and transported into the processing chamber 201 (boat loading). In this state, the seal cap 219 seals the lower end of the manifold 209 via the O-ring 220b. In this way, the wafers 200 are prepared in the processing chamber 201.

[0057] (Pressure adjustment and temperature adjustment) After the boat loading is complete, the processing chamber 201, i.e., the space where the wafer 200 is located, is evacuated (reduced pressure exhaust) by a vacuum pump 246 to achieve the desired pressure (vacuum level). At this time, the pressure inside the processing chamber 201 is measured by a pressure sensor 245, and the APC valve 244 is feedback-controlled based on this measured pressure information. The wafer 200 inside the processing chamber 201 is also heated by a heater 207 to reach the desired processing temperature. At this time, the amount of power supplied to the heater 207 is feedback-controlled based on the temperature information detected by a temperature sensor 263 to ensure that the processing chamber 201 has the desired temperature distribution. The rotation of the wafer 200 by the rotation mechanism 267 is also started. The exhaust of the processing chamber 201, the heating of the wafer 200, and the rotation are all continued at least until the processing of the wafer 200 is completed.

[0058] (Step F: Removal of native oxide film) Subsequently, an etching agent is supplied to the wafer 200.

[0059] Specifically, valve 243e is opened, and etching agent (etching gas) is flowed into the gas supply pipe 232e. The flow rate of the etching agent is adjusted by MFC 241e and supplied into the processing chamber 201 via gas supply pipe 232b and nozzle 249b, and exhausted from exhaust port 231a. At this time, etching agent is supplied to the wafer 200 from the side of the wafer 200 (etching agent supply). At this time, valves 243f to 243h may be opened to supply inert gas into the processing chamber 201 via nozzles 249a to 249c, respectively.

[0060] By supplying an etching agent to the wafer 200 under the processing conditions described later, the native oxide film formed on the surface of the wafer 200 can be removed. Specifically, the native oxide film on the first and second surfaces of the wafer 200 can be removed. More precisely, the native oxide film on the surface of a recess on the wafer 200, where the top and side surfaces are made of Si film and the bottom surface is made of SiGe film, and the depth direction is parallel to the surface of the wafer 200 (lateral direction), can be removed. The native oxide film on the third surface of the wafer 200 can also be removed. More precisely, the native oxide film on the third surface, which is a part of the wafer 200 different from the recess and is made of SiN film, can be removed. Since the fourth surface of the wafer 200 is made of SiO film, no native oxide film will form on the fourth surface. However, if a native oxide film has formed on the fourth surface due to some factor, that native oxide film can also be removed.

[0061] The processing conditions when supplying the etching agent in step F are as follows: Processing temperature: Room temperature (25°C) to 200°C, preferably 50 to 150°C Processing pressure: 10-13332 Pa, 20-1333 Pa Processing time: 1 to 120 minutes, preferably 10 to 60 minutes Etching agent supply flow rate: 0.05 to 5 slm, preferably 0.5 to 2 slm Inert gas supply flow rate (per gas supply pipe): 0-20 slm Examples are given.

[0062] In this specification, numerical ranges such as "25~200°C" mean that the lower and upper limits are included within that range. For example, "25~200°C" means "25°C or more and 200°C or less." The same applies to other numerical ranges. In this specification, processing temperature refers to the temperature of the wafer 200 or the temperature inside the processing chamber 201, and processing pressure refers to the pressure inside the processing chamber 201. Also, gas supply flow rate: 0 slm means the case in which the gas is not supplied. These also apply in the following explanations.

[0063] After removing the native oxide film formed on the surface of the wafer 200, valve 243e is closed to stop the supply of etching agent into the processing chamber 201. Then, the processing chamber 201 is evacuated to remove any remaining gaseous substances. At this time, valves 243f to 243h are opened, and inert gas is supplied into the processing chamber 201 via nozzles 249a to 249c. The inert gas supplied from nozzles 249a to 249c acts as a purge gas, thereby purging the processing chamber 201.

[0064] The processing conditions when purging in step F are as follows: Processing pressure: 1-30 Pa Processing time: 1 to 120 seconds, preferably 1 to 60 seconds Inert gas supply flow rate (per gas supply pipe): 0.5~20 slm Examples are given. It is preferable that the processing temperature during purging in this step be the same as the processing temperature when supplying the etching agent.

[0065] As an etching agent, for example, a fluorine (F)-containing gas can be used. Examples of F-containing gases include chlorine trifluoride (ClF3) gas, chlorine fluoride (ClF) gas, nitrogen fluoride (NF3) gas, hydrogen fluoride (HF) gas, and fluorine (F2) gas. In addition, various cleaning solutions can be used as etching agents. For example, an aqueous HF solution can be used as an etching agent to perform DHF cleaning. Alternatively, a cleaning solution containing ammonia water, hydrogen peroxide, and pure water can be used as an etching agent to perform SC-1 cleaning (APM cleaning). Alternatively, a cleaning solution containing hydrochloric acid, hydrogen peroxide, and pure water can be used as an etching agent to perform SC-2 cleaning (HPM cleaning). Alternatively, a cleaning solution containing sulfuric acid and hydrogen peroxide can be used as an etching agent to perform SPM cleaning. One or more of these can be used as etching agents.

[0066] As the inert gas, nitrogen (N2) gas, argon (Ar) gas, helium (He) gas, neon (Ne) gas, xenon (Xe) gas, and other noble gases can be used. This also applies to each step described later. One or more of these can be used as the inert gas.

[0067] (Step A: Plasma Treatment) Subsequently, step A1 is performed to supply the oxidizing agent and reducing agent to the wafer 200 in a plasma state, and step A2 is performed to supply the reducing agent to the wafer 200 in a plasma state.

[0068] [Step A1: First Plasma Treatment] In step A1, an oxidizing agent and a reducing agent are supplied to the wafer 200 in a plasma state.

[0069] Specifically, valves 243e and 243b are opened, and the oxidizing agent and reducing agent are flowed into the gas supply pipes 232e and 232b, respectively. The flow rates of the oxidizing agent and reducing agent are adjusted by MFCs 241e and 241b, respectively, mixed in the gas supply pipe 232b, excited to a plasma state by the RPU 300, and then supplied into the processing chamber 201 via nozzle 249b and exhausted from exhaust port 231a. At this time, the oxidizing agent and reducing agent excited to a plasma state are supplied to the wafer 200 from the side of the wafer 200 (oxidizing agent * +reducing agent * (Supply). In this way, it becomes possible to supply the oxidizing agent and reducing agent to the wafer 200 in an excited plasma state, thereby supplying oxygen (O)-containing radicals, hydrogen (H)-containing radicals, etc., to the wafer 200. These radicals may include O radicals, H radicals, and OH radicals. The process using the oxidizing agent and reducing agent excited to a plasma state can be said to be a process that includes at least one of the following: plasma oxidation treatment, oxidizing agent plasma treatment (oxygen plasma treatment, etc.), plasma reduction treatment, reducing agent plasma treatment (hydrogen plasma treatment), and plasma oxidation-reduction treatment. At this time, valves 243f to 243h may be opened and inert gas may be supplied into the processing chamber 201 through nozzles 249a to 249c, respectively, or the inert gas may not be supplied.

[0070] By supplying an oxidizing agent and a reducing agent to the wafer 200 in a plasma state under the processing conditions described later, OH terminations can be formed on the first and second surfaces of the wafer 200 after the native oxide film has been removed. More specifically, OH terminations can be formed on the first surface, the second surface, and at least one of the third and fourth surfaces of the wafer 200 after the native oxide film has been removed. In this embodiment, OH terminations can be formed on the first surface, the second surface, and the third surface of the wafer 200 after the native oxide film has been removed. Since the fourth surface is composed of an SiO film, a sufficient amount of OH terminations are formed on the fourth surface before this step is performed. However, if the OH terminations on the fourth surface are insufficient, etc., the OH terminations on the fourth surface can be reinforced in this step. Thus, in this embodiment, by performing this step, it is possible to achieve a state in which OH terminations are formed on each of the first surface, the second surface, the third surface, and the fourth surface of the wafer 200 after the native oxide film has been removed (a state in which each surface has OH terminations).

[0071] In other words, by supplying an oxidizing agent and a reducing agent to the wafer 200 in a plasma state under the processing conditions described later, the first and second surfaces of the wafer 200 after the native oxide film has been removed can be oxidized (plasma oxidation). More specifically, the first surface, the second surface, and at least one of the third and fourth surfaces of the wafer 200 after the native oxide film has been removed can be oxidized. In this embodiment, the first surface, the second surface, and the third surface of the wafer 200 after the native oxide film has been removed can be oxidized. Since the fourth surface is composed of an SiO film, the fourth surface will not be oxidized. However, if the fourth surface contains elements that can be oxidized, the fourth surface can also be oxidized. Thus, in this embodiment, by performing this step, the first surface, the second surface, the third surface, and the fourth surface of the wafer 200 after the native oxide film has been removed can be oxidized (each surface has an oxide). This allows the first, second, third, and fourth surfaces of the wafer 200 to have OH terminations formed on each of them after the native oxide film has been removed (each surface having OH terminations). As described above, the oxides formed on the first, second, and third surfaces of the wafer 200 will consist of a very thin and uniform layered or film-like substance.

[0072] As a result of this step, an oxide film such as a silicon oxide film (SiO film), a germanium oxide film (GeO film), or a silicon germanium oxide film (SiGeO film) is formed on the first surface composed of a SiGe film, and OH terminations are formed on its surface. Similarly, an oxide film such as an SiO film is formed on the second surface composed of a Si film, and OH terminations are formed on its surface. Furthermore, an oxide film such as an SiO film or a silicon oxynitride film (SiON film) is formed on the third surface composed of a SiN film, and OH terminations are formed on its surface. The fourth surface composed of a SiO film maintains its state, and the OH terminations on its surface are maintained, or the OH terminations on its surface are reinforced.

[0073] The processing conditions when supplying the oxidizing agent and reducing agent in a plasma state in step A1 are as follows: Processing temperature: Room temperature (25°C) to 300°C, preferably room temperature to 200°C Processing pressure: 1 to 10,000 Pa, preferably 50 to 1,000 Pa Processing time: 1 to 1000 seconds, preferably 60 to 500 seconds Oxidizing agent supply flow rate: 0.01 to 1 slm, preferably 0.1 to 0.5 slm Reducing agent supply flow rate: 0.01 to 1 slm, preferably 0.1 to 0.5 slm Inert gas supply flow rate (per gas supply pipe): 0-10 slm RF power: 1 to 10,000W, preferably 100 to 5,000W Examples are given.

[0074] OH terminations are formed on the first, second, and third surfaces of the wafer 200, and after OH terminations have been formed on each of the first, second, third, and fourth surfaces, valves 243e and 243b are closed to stop the supply of the oxidizing agent and reducing agent into the processing chamber 201. Then, using the same processing procedure and conditions as in step F, any gaseous substances remaining in the processing chamber 201 are removed (purged). It is preferable that the processing temperature during purging be the same as the processing temperature when the oxidizing agent and reducing agent are excited into a plasma state and supplied.

[0075] As an oxidizing agent, for example, an oxygen (O)-containing gas can be used. Examples of O-containing gases include oxygen (O2) gas, ozone (O3) gas, water vapor (H2O gas), hydrogen peroxide (H2O2) gas, nitrous oxide (N2O) gas, nitric oxide (NO) gas, nitrogen dioxide (NO2) gas, carbon monoxide (CO) gas, carbon dioxide (CO2) gas, etc. One or more of these can be used as the oxidizing agent.

[0076] As a reducing agent, for example, hydrogen (H)-containing gases such as hydrogen (H2) gas, or deuterium (D)-containing gases such as deuterium (D2) gas can be used. One or more of these can be used as the reducing agent. This also applies to step A2 described later.

[0077] [Step A2: Second Plasma Treatment] After step A1 is completed, step A2 is performed. In step A2, a reducing agent is supplied to the wafer 200 in an excited plasma state.

[0078] Specifically, valve 243b is opened and the reducing agent flows into the gas supply pipe 232b. The reducing agent's flow rate is regulated by MFC 241b, excited to a plasma state by RPU 300, and then supplied into the processing chamber 201 via nozzle 249b and exhausted from exhaust port 231a. At this time, the plasma-excited reducing agent is supplied to the wafer 200 from the side of the wafer 200 (reducing agent). * (Supply). In this way, it becomes possible to supply the reducing agent to the wafer 200 in a plasma state, thereby supplying hydrogen (H)-containing radicals to the wafer 200. The H-containing radicals may include H radicals. The process using a reducing agent excited to a plasma state can be said to be a process that includes at least one of plasma reduction processing or reducing agent plasma processing (hydrogen plasma processing). At this time, valves 243f to 243h may be opened to supply inert gas into the processing chamber 201 through nozzles 249a to 249c, respectively, or the inert gas may not be supplied.

[0079] By supplying a reducing agent to the wafer 200 in a plasma state under the processing conditions described later, the first and second surfaces of the wafer 200, where OH terminations have been formed, are treated with the reducing agent. * It can be modified by plasma treatment using a reducing agent. More specifically, the first surface, the second surface, and at least one of the third and fourth surfaces of the wafer 200 on which the OH terminations are formed are treated with a reducing agent. *It can be modified by plasma treatment using [a certain method]. In this embodiment, the first surface, second surface, third surface, and fourth surface of the wafer 200 in a state in which OH terminations have been formed (state in which OH terminations have been formed) are each treated with a reducing agent. * The surface can be modified by plasma treatment using [a specific method]. This removes impurities such as carbon (C) and nitrogen (N) that may be present on each surface, increasing the purity of the oxide film on each surface and improving the state of the OH termination. This increases the density of OH terminations (Si-OH terminations) on each surface, creating a state where each surface has high-density OH terminations. In other words, by performing steps A1 and A2, it becomes possible to create a state where the first, second, third, and fourth surfaces of the wafer 200 each have high-density OH terminations.

[0080] In this case, since an oxide film is formed on each surface, each surface is not directly exposed to the plasma-excited reducing agent, i.e., H-containing radicals, and plasma damage to the underlying layers (SiGe film, Si film, SiN film, SiO film) constituting each surface can be prevented. However, if step A2 is performed before step A1, since no oxide film is formed on each surface when step A2 is performed, each surface will be directly exposed to the plasma-excited reducing agent, i.e., H-containing radicals. As a result, the underlying layers (SiGe film, Si film, SiN film, SiO film) constituting each surface may suffer plasma damage. In particular, the Si film constituting the second surface tends to be more susceptible to plasma damage than the other surfaces, and its shape may change when exposed to H-containing radicals. In contrast, according to this embodiment, the oxide film formed on each surface in step A1 acts as a protective film (blocking film, barrier film), making it possible to prevent plasma damage to the underlying layers (SiGe film, Si film, SiN film, SiO film) constituting each surface.

[0081] The processing conditions when supplying the reducing agent in step A2 after exciting it into a plasma state are as follows: Processing temperature: Room temperature (25°C) to 300°C, preferably room temperature to 200°C Processing pressure: 1 to 10,000 Pa, preferably 50 to 1,000 Pa Processing time: 1 to 1000 seconds, preferably 60 to 500 seconds Reducing agent supply flow rate: 0.01 to 1 slm, preferably 0.1 to 0.5 slm Inert gas supply flow rate (per gas supply pipe): 0-10 slm RF power: 1 to 10,000W, preferably 100 to 5,000W Examples are given.

[0082] The first surface, second surface, third surface, and fourth surface of the wafer 200 having OH terminations are each treated with a reducing agent. * After modification by plasma treatment using the device, valve 243b is closed to stop the supply of reducing agent to the treatment chamber 201. Then, any gaseous substances remaining in the treatment chamber 201 are removed from the treatment chamber 201 using the same treatment procedure and conditions as in step F (purging). It is preferable that the treatment temperature during purging be the same as the treatment temperature when the reducing agent is excited into a plasma state and supplied.

[0083] As a reducing agent, for example, a reducing agent similar to the various reducing agents exemplified in step A1 above can be used.

[0084] (Step B: Heat treatment) After step A is completed, step B is performed. In step B, heat treatment (annealing) is performed on the wafer 200 after step A has been completed. In step B, the output of the heater 207 is adjusted to raise the temperature of the wafer 200 to a state equal to or higher than the temperature of the wafer 200 in step A, preferably higher than the temperature of the wafer 200 in step A, and this state is maintained.

[0085] Specifically, as shown in Figure 4, for example, in step B, the temperature of the wafer 200, i.e., the processing temperature, is made higher than the processing temperature in step A. It is preferable, as shown in Figure 4, that the processing temperature in step B be higher than the processing temperatures in steps A and C, and further, that the processing temperature in step B be higher than the processing temperatures in steps A, C, and D, and further, that the processing temperature in step B be higher than the processing temperatures in steps A, C, D, and F. Hereinafter, the processing temperature in step B will also be simply referred to as the heat treatment temperature.

[0086] As shown in Figure 4, step B may be performed in parallel with the purging that takes place after step A (step A2). That is, in step B, heat treatment may be performed on the wafer 200 while supplying an inert gas into the processing chamber 201.

[0087] In this case, valves 243f to 243h are opened, and inert gas is supplied into gas supply pipes 232a to 232c, respectively. The flow rate of the inert gas is adjusted by MFCs 241f to 241h, and supplied into the processing chamber 201 via nozzles 249a to 249c, respectively, and exhausted from exhaust port 231a. At this time, the inert gas is supplied to the wafer 200 from the side of the wafer 200. However, after sufficient purging has been performed following step A (step A2), in step B, the supply of inert gas into the processing chamber 201 may be omitted.

[0088] By performing heat treatment on the wafer 200 under the processing conditions described later, it is possible to remove the OH terminations formed on the first surface of the wafer 200 while leaving the high-density OH terminations formed on the second surface of the wafer 200. More specifically, it is possible to remove the OH terminations formed on the first surface of the wafer 200 while leaving the high-density OH terminations formed on the second surface of the wafer 200 and at least one of the third and fourth surfaces. In this embodiment, it is possible to remove the OH terminations formed on the first surface of the wafer 200 while maintaining a state in which high-density OH terminations are formed on each of the second, third, and fourth surfaces of the wafer 200 (a state in which each surface has high-density OH terminations). In some cases, not all of the OH terminations formed on the first surface of the wafer 200 may be removed, and a small portion may remain.

[0089] In other words, by performing heat treatment on the wafer 200 under the processing conditions described later, the oxide (GeO film, etc.) formed on the first surface of the wafer 200 can be sublimated and removed while the oxide formed on the second surface of the wafer 200 remains. More specifically, the oxide formed on the first surface of the wafer 200 can be sublimated and removed while the oxide formed on the second surface of the wafer 200 and at least one of the third and fourth surfaces can be retained. In this embodiment, the oxide formed on the first surface of the wafer 200 can be sublimated and removed while maintaining the oxidized state (state in which each surface has oxide) of the second surface, third surface, and fourth surface of the wafer 200. In some cases, not all of the oxide formed on the first surface of the wafer 200 may be removed, and a small portion may remain.

[0090] Thus, the reason why oxides formed on the first surface of the wafer 200 can be selectively sublimated and removed is that, under the processing conditions described later, oxides such as GeO films formed on the first surface are easier to sublimate than oxides formed on the second, third, and fourth surfaces. Under the processing conditions described later, it is also possible to sublimate oxides such as GeO films formed on the first surface while preventing the sublimation of oxides formed on the second, third, and fourth surfaces. In other words, under the processing conditions described later, it is also possible to perform heat treatment under processing conditions in which oxides such as GeO films formed on the first surface are sublimated, but oxides formed on the second, third, and fourth surfaces are not sublimated.

[0091] By retaining oxides on the second, third, and fourth surfaces of wafer 200, high-density OH terminations can be retained on these surfaces, and by sublimating and removing the oxides on the first surface of wafer 200, OH terminations on the first surface can be removed. As a result, the second, third, and fourth surfaces have high-density OH terminations before step C. On the other hand, the first surface before step C either has no OH terminations or has a much smaller amount of OH terminations than the second, third, and fourth surfaces. In other words, the amount (density, concentration) of OH terminations on the second, third, and fourth surfaces before step C can be greater than the amount (density, concentration) of OH terminations on the first surface. It is also possible to make the amount (density, concentration) of OH terminations on the first surface zero.

[0092] The processing conditions when performing heat treatment on wafer 200 in step B are as follows: Processing temperature (heat treatment temperature): 100-400°C, preferably 100-350°C, more preferably 100-300°C Processing pressure: 1 to 10,000 Pa, preferably 1 to 2,000 Pa Processing time: 1 to 180 minutes, preferably 10 to 60 minutes Inert gas supply flow rate (per gas supply pipe): 0-20 slm Examples are given.

[0093] If the heat treatment temperature is set below 100°C, the oxide formed on the first surface of the wafer 200 may not sublimate sufficiently, making it impossible to completely remove the oxide. By setting the heat treatment temperature to 100°C or higher, the oxide formed on the first surface of the wafer 200 can be sufficiently sublimated and completely removed.

[0094] If the heat treatment temperature exceeds 400°C, at least a portion of the OH terminations on the second, third, and fourth surfaces of the wafer 200 may detach and be removed, reducing the density of OH terminations on these surfaces. In this case, in step C, the film formation inhibiting effect (adsorption inhibition effect, reaction inhibition effect) by the inhibitor layer formed on the second, third, and fourth surfaces of the wafer 200 may decrease, reducing the selectivity in selective growth in step D. By setting the heat treatment temperature to 400°C or lower, the detachment and removal of OH terminations on the second, third, and fourth surfaces of the wafer 200 can be sufficiently suppressed, and the decrease in the density of OH terminations on these surfaces can be sufficiently suppressed. In this case, in step C, the film formation inhibiting effect by the inhibitor layer formed on the second, third, and fourth surfaces of the wafer 200 can be sufficiently obtained, and the selectivity in selective growth in step D can be sufficiently ensured. By setting the heat treatment temperature to 350°C or lower, the detachment and removal of OH terminations on the second, third, and fourth surfaces of the wafer 200 can be effectively suppressed, thereby effectively suppressing the decrease in the density of OH terminations on these surfaces. By setting the heat treatment temperature to 300°C or lower, the detachment and removal of OH terminations on the second, third, and fourth surfaces of the wafer 200 can be suppressed even more effectively, thereby more effectively suppressing the decrease in the density of OH terminations on these surfaces.

[0095] For these reasons, in step B, it is desirable to set the heat treatment temperature to 100°C or higher and 400°C or lower, preferably 100°C or higher and 350°C or lower, and more preferably 100°C or higher and 300°C or lower.

[0096] While maintaining the state in which the second, third, and fourth surfaces of the wafer 200 each have OH terminations, the OH terminations formed on the first surface of the wafer 200 are removed, and then any gaseous substances remaining in the processing chamber 201 are removed from the processing chamber 201 using the same processing procedure and conditions as in the purging in step F (purging). The processing temperature during purging is preferably the same as the processing temperature when heat-treating the wafer 200, but it may also be a different temperature.

[0097] (Step C: Inhibitor layer formation) After step B is completed, step C is performed. In step C, a modifier is supplied to the wafer 200 after step B has been performed.

[0098] Specifically, valve 243a is opened and the modifying agent flows into the gas supply pipe 232a. The flow rate of the modifying agent is adjusted by MFC 241a and supplied into the processing chamber 201 via nozzle 249a, and exhausted from exhaust port 231a. At this time, the modifying agent is supplied to the wafer 200 from the side of the wafer 200 (modifying agent supply). At this time, valves 243f to 243h may be opened and inert gas may be supplied into the processing chamber 201 via nozzles 249a to 249c, respectively. In step C, the output of heater 207 is adjusted to keep the temperature of the wafer 200 below the temperature of the wafer 200 in step B, preferably lower than the temperature of the wafer 200 in step B, and this state is maintained.

[0099] By supplying the modifier to the wafer 200 under the processing conditions described later, as shown in Figure 5(b), at least a portion of the molecular structure of the molecules constituting the modifier can be selectively (preferentially) adsorbed at high density onto the second, third, and fourth surfaces of the wafer 200, thereby forming a high-density inhibitor layer on the second, third, and fourth surfaces. Specifically, while suppressing the adsorption of at least a portion of the molecular structure of the molecules constituting the modifier onto the first surface, the modifier is reacted with the high-density OH groups terminating the second, third, and fourth surfaces, making it possible to selectively (preferentially) adsorb at least a portion of the molecular structure of the molecules constituting the modifier onto the second, third, and fourth surfaces at high density. This makes it possible to terminate the second, third, and fourth surfaces at high density with at least a portion of the molecular structure of the molecules constituting the modifier. In this way, the second, third, and fourth surfaces can be modified.

[0100] The inhibitor layer formed in this step contains residues derived from the modifier, which are at least a portion of the molecular structure of the molecules constituting the modifier. In step D, described later, the inhibitor layer prevents the adsorption of the raw material (film-forming agent) onto the second, third, and fourth surfaces, thereby inhibiting (suppressing) the progress of the film-forming reaction on the second, third, and fourth surfaces.

[0101] Examples of trialkylsilyl groups, such as trimethylsilyl (Si-Me3) and triethylsilyl (Si-Et3), can be found as at least a part of the molecular structure of the molecules constituting the modifier. Trialkylsilyl groups include alkyl groups, i.e., hydrocarbon groups. In these cases, the Si of the trimethylsilyl or triethylsilyl group is chemically adsorbed at high density on the second, third, and fourth surfaces of the wafer 200, and the outermost surfaces of the second, third, and fourth surfaces are densely terminated by alkyl groups such as methyl or ethyl groups, i.e., hydrocarbon groups. Alkyl groups (alkylsilyl groups), such as methyl groups (trimethylsilyl groups) and ethyl groups (triethylsilyl groups), i.e., hydrocarbon groups, which are densely terminated on the second, third, and fourth surfaces, act as inhibitor layers (film formation inhibiting layers, adsorption inhibiting layers, reaction inhibiting layers) in the film formation process (selective growth) described later. These inhibitor layers prevent the adsorption of raw materials onto the second, third, and fourth surfaces and inhibit the progress of the film formation reaction on the second, third, and fourth surfaces.

[0102] In this step, at least a portion of the molecular structure of the molecules constituting the modifier may be adsorbed onto a part of the first surface of the wafer 200, but the amount of adsorption is small, and the amount of adsorption onto the second, third, and fourth surfaces of the wafer 200 is overwhelmingly larger. Such selective (preferential) adsorption is possible because the processing conditions in this step are set so that the modifier does not undergo gas phase decomposition in the processing chamber 201. In addition, the second, third, and fourth surfaces are densely OH-terminated throughout their entire surface, while many areas of the first surface are not OH-terminated. In this step, since the modifier does not undergo gas-phase decomposition in the processing chamber 201, at least a portion of the molecular structure of the molecules constituting the modifier does not accumulate on the first, second, third, and fourth surfaces. Instead, at least a portion of the molecular structure of the molecules constituting the modifier is selectively adsorbed at high density on the second, third, and fourth surfaces, thereby selectively terminating the second, third, and fourth surfaces at high density with at least a portion of the molecular structure of the molecules constituting the modifier.

[0103] The processing conditions when supplying the modifier in step C are as follows: Processing temperature: Room temperature (25°C) to 500°C, preferably room temperature to 250°C Processing pressure: 5-2000 Pa, preferably 10-1000 Pa Processing time: 1 second to 120 minutes, preferably 30 seconds to 60 minutes Modifier supply flow rate: 0.001 to 3 slm, preferably 0.001 to 0.5 slm Inert gas supply flow rate (per gas supply pipe): 0-20 slm Examples are given.

[0104] After selectively forming high-density inhibitor layers on the second, third, and fourth surfaces of the wafer 200, the valve 243a is closed to stop the supply of the modifier into the processing chamber 201. Then, using the same processing procedure and conditions as in step F, any remaining gaseous substances in the processing chamber 201 are removed (purged). It is preferable that the processing temperature during purging be the same as the processing temperature when supplying the modifier.

[0105] As modifiers, for example, compounds having a structure in which an amino group is directly bonded to Si, or compounds having a structure in which an amino group and an alkyl group are directly bonded to Si, can be used.

[0106] Examples of modifiers include (dimethylamino)silane ((CH3)2NSiH3), (diethylamino)silane ((C2H5)2NSiH3), (dipropylamino)silane ((C3H7)2NSiH3), (dibutylamino)silane ((C4H9)2NSiH3), (dimethylamino)trimethylsilane ((CH3)2NSi(CH3)3), (diethylamino)triethylsilane ((C2H5)2NSi(C2H5)3), and (dimethylamino) Triethylsilane ((CH3)2NSi(C2H5)3), (diethylamino)trimethylsilane ((C2H5)2NSi(CH3)3), (dipropylamino)trimethylsilane ((C3H7)2NSi(CH3)3), (dibutylamino)trimethylsilane ((C4H9)2NSi(CH3)3), (trimethylsilyl)amine ((CH3)3SiNH2), (triethylsilyl)amine ((C2H5)3SiNH2), etc. can be used.Furthermore, examples of modifiers include bis(dimethylamino)dimethylsilane ([(CH3)2N]2Si(CH3)2), bis(diethylamino)diethylsilane ([(C2H5)2N]2Si(C2H5)2), bis(dimethylamino)diethylsilane ([(CH3)2N]2Si(C2H5)2), bis(diethylamino)dimethylsilane ([(C2H5)2N]2Si(CH3)2), bis(dimethylamino)silane ([(CH3)2N]2SiH2), bis(diethylamino)silane ([(C2H5)2N]2SiH2), bis(dimethylaminodimethylsilyl)ethane ([(CH3)2N(CH3)2Si]2C2H6), and bis(dipropylamino)silane ([(C3H7)2N]2S Other substances that can be used include iH2), bis(dibutylamino)silane ([(C4H9)2N]2SiH2), bis(dipropylamino)dimethylsilane ([(C3H7)2N]2Si(CH3)2), bis(dipropylamino)diethylsilane ([(C3H7)2N]2Si(C2H5)2), (dimethylsilyl)diamine ((CH3)2Si(NH2)2), (diethylsilyl)diamine ((C2H5)2Si(NH2)2), (dipropylsilyl)diamine ((C3H7)2Si(NH2)2), bis(dimethylaminodimethylsilyl)methane ([(CH3)2N(CH3)2Si]2CH2), bis(dimethylamino)tetramethyldisilane ([(CH3)2N]2(CH3)4Si2), etc. One or more of these can be used as modifiers.

[0107] (Step D: Film deposition process (selective growth)) After step C is completed, step D is performed. In step D, a film-forming agent is supplied to the wafer 200 after step C has been performed. In step D, the output of the heater 207 is adjusted so that the temperature of the wafer 200 is below the temperature of the wafer 200 in step C, and steps D1 and D2 are executed sequentially while maintaining this state.

[0108] [Step D1: Formation of the first layer] In step D1, raw materials (raw material gas) and catalyst (catalyst gas) are supplied as film-forming agents to the wafer 200 after step C has been performed, i.e., after high-density inhibitor layers have been selectively formed on the second, third, and fourth surfaces.

[0109] Specifically, valves 243b and 243d are opened, and the raw material and catalyst are flowed into the gas supply pipes 232b and 232d, respectively. The flow rates of the raw material and catalyst are adjusted by MFCs 241b and 241d, respectively, and supplied into the processing chamber 201 via nozzles 249b and 249a. They are mixed in the processing chamber 201 and exhausted from the exhaust port 231a. At this time, the raw material and catalyst are supplied to the wafer 200 from the side of the wafer 200 (raw material + catalyst supply). At this time, valves 243f to 243h may be opened to supply inert gas into the processing chamber 201 via nozzles 249a to 249c, respectively.

[0110] By supplying the raw material and catalyst to the wafer 200 under the processing conditions described later, it becomes possible to selectively (preferentially) chemically adsorb at least a portion of the molecular structure of the molecules constituting the raw material onto the first surface of the wafer 200, while suppressing the chemical adsorption of at least a portion of the molecular structure of the molecules constituting the raw material onto the second, third, and fourth surfaces of the wafer 200. As a result, the first layer is selectively (preferentially) formed on the first surface. The first layer contains at least a portion of the molecular structure of the molecules constituting the raw material, which are residues of the raw material. That is, the first layer contains at least a portion of the atoms constituting the raw material.

[0111] In this step, by supplying the catalyst together with the raw materials, the above-described reaction can be carried out in a non-plasma atmosphere and under low temperature conditions as described later. By forming the first layer in a non-plasma atmosphere and under low temperature conditions as described later, it is possible to suppress the removal and / or deactivation of the inhibitor layers formed on the second, third, and fourth surfaces of the wafer 200. Deactivation of the inhibitor layer means that the molecular structure and atomic arrangement structure of the molecules constituting the inhibitor layer change, making it possible for the film-forming agent to be adsorbed onto the second, third, and fourth surfaces of the wafer 200, and for the second, third, and fourth surfaces to react with the film-forming agent.

[0112] Furthermore, by forming the first layer in a non-plasma atmosphere and under low temperature conditions as described later, the raw material can be prevented from thermally decomposing (gas phase decomposition), i.e., self-decomposing, within the processing chamber 201. This suppresses the layering of at least a portion of the molecular structure of the molecules constituting the raw material on the first, second, third, and fourth surfaces of the wafer 200, and makes it possible to selectively adsorb the raw material onto the first surface of the wafer 200 among the first, second, third, and fourth surfaces.

[0113] The processing conditions when supplying the raw materials and catalyst in step D1 are as follows: Processing temperature: Room temperature (25°C) to 200°C, preferably room temperature to 150°C Processing pressure: 133~1333 Pa Processing time: 1 to 120 seconds, preferably 1 to 60 seconds Raw material supply flow rate: 0.001~2slm Catalyst supply flow rate: 0.001~2slm Inert gas supply flow rate (per gas supply pipe): 0-20 slm Examples are given.

[0114] After selectively forming the first layer on the first surface of the wafer 200, valves 243b and 243d are closed to stop the supply of raw materials and catalyst to the processing chamber 201, respectively. Then, using the same processing procedure and conditions as in step F, any remaining gaseous substances in the processing chamber 201 are removed (purged). It is preferable that the processing temperature during purging be the same as the processing temperature when supplying the raw materials and catalyst.

[0115] In this step, when forming the first layer, at least a portion of the molecular structure of the molecules constituting the raw material may be adsorbed onto parts of the second, third, and fourth surfaces of the wafer 200. However, the amount of adsorption is very small, and the amount adsorbed onto the first surface of the wafer 200 is overwhelmingly larger. This selective (preferential) adsorption is possible because the processing conditions in this step are low temperature conditions as described above, and the raw material does not undergo gas phase decomposition in the processing chamber 201. Furthermore, a high-density inhibitor layer is formed over the entire area of ​​the second, third, and fourth surfaces of the wafer 200, while an inhibitor layer is not formed over a large area of ​​the first surface of the wafer 200.

[0116] As raw materials, for example, halosilane-based gases, i.e., Si and halogen-containing gases (Si and halogen-containing substances), can be used. Halogens include chlorine (Cl), fluorine (F), bromine (Br), iodine (I), etc. It is preferable that the Si and halogen-containing gas contains halogen in the form of a chemical bond between Si and halogen. As Si and halogen-containing gases, for example, silane-based gases having Si-Cl bonds, i.e., chlorosilane-based gases, can be used. The Si and halogen-containing gas may further contain C, in which case it is preferable that C is contained in the form of a Si-C bond. As Si and halogen-containing gases, for example, silane-based gases containing Si, Cl, and alkylene groups and having Si-C bonds, i.e., alkylenechlorosilane-based gases, can be used. Alkylene groups include methylene groups, ethylene groups, propylene groups, butylene groups, etc. Furthermore, as Si and halogen-containing gases, for example, silane-based gases containing Si, Cl, and alkyl groups and having Si-C bonds, i.e., alkylchlorosilane-based gases, can be used. Alkyl groups include methyl groups, ethyl groups, propyl groups, butyl groups, etc. The Si and halogen-containing gas may also contain oxygen, in which case it is preferable that the oxygen be contained in the form of a Si-O bond, for example, a siloxane bond (Si-O-Si bond). As the Si and halogen-containing gas, for example, a silane-based gas having Si, Cl, and a siloxane bond, i.e., a chlorosiloxane-based gas, can be used. In all of these gases, it is preferable that Cl be contained in the form of a Si-Cl bond. In addition to these, amino group-containing gases (amino group-containing substances) such as aminosilane-based gases can also be used as raw materials.

[0117] Examples of raw materials that can be used include 1,1,3,3-tetrachloro-1,3-disilacyclobutane (C2H4Cl4Si2), 1,1,2,2-tetrachloro-1,2-dimethyldisilane ((CH3)2Si2Cl4), 1,2-dichloro-1,1,2,2-tetramethyldisilane ((CH3)4Si2Cl2), bis(trichlorosilyl)methane ((SiCl3)2CH2), 1,2-bis(trichlorosilyl)ethane ((SiCl3)2C2H4), etc. In addition, tetrachlorosilane (SiCl4), hexachlorodisilane (Si2Cl6), octachlorotricilane (Si3Cl8), etc. can also be used as raw materials. Furthermore, as raw materials, for example, hexachlorodisiloxane (Cl3Si-O-SiCl3) and octachlorotrisiloxane (Cl3Si-O-SiCl2-O-SiCl3) can be used. In addition, as raw materials, for example, tetrakis(dimethylamino)silane (Si[N(CH3)2]4), tris(dimethylamino)silane (Si[N(CH3)2]3H), bis(diethylamino)silane (Si[N(C2H5)2]2H2), bis(tert-butylamino)silane (SiH2[NH(C4H9)]2), and (diisopropylamino)silane (SiH3[N(C3H7)2]) can also be used. One or more of these can be used as raw materials.

[0118] As catalysts, for example, amine gases (amine substances) containing carbon (C), nitrogen (N), and hydrogen (H) can be used. As amine gases (amine substances), chain-like amine gases (chain-like amine substances) and cyclic amine gases (cyclic amine substances) can be used. As catalysts, for example, chain-like amines such as triethylamine ((C2H5)3N), diethylamine ((C2H5)2NH), monoethylamine ((C2H5)NH2), trimethylamine ((CH3)3N), dimethylamine ((CH3)2NH), and monomethylamine ((CH3)NH2) can be used. In addition, as catalysts, for example, aminopyridine (C5H6N2), pyridine (C5H5N), picoline (C6H7N), lutidine (C7H9N), pyrimidine (C4H4N2), quinoline (C9H7N), piperazine (C4H10 N2), piperidine (C5H 11 A cyclic amine such as N, aniline (C6H7N) can be used. One or more of these can be used as a catalyst. This also applies to the reactant supply step described later.

[0119] [Step D2: Formation of the second layer] In step D2, a reactant (reaction gas) and a catalyst (catalytic gas) are supplied as film-forming agents to the wafer 200 after step D1 has been performed, i.e., the wafer 200 after the first layer has been selectively formed on the first surface. Here, an example in which an oxidizing agent (oxidizing gas) is used as the reactant (reaction gas) is described.

[0120] Specifically, valves 243c and 243d are opened, and the reactant and catalyst are flowed into the gas supply pipes 232c and 232d, respectively. The flow rates of the reactant and catalyst are adjusted by MFCs 241c and 241d, respectively, and supplied into the processing chamber 201 via nozzles 249c and 249a. They are mixed in the processing chamber 201 and exhausted from the exhaust port 231a. At this time, the reactant and catalyst are supplied to the wafer 200 from the side of the wafer 200 (reactant + catalyst supply). At this time, valves 243f to 243h may be opened to supply inert gas into the processing chamber 201 via nozzles 249a to 249c, respectively.

[0121] By supplying the reactant and catalyst to the wafer 200 under the processing conditions described later, it becomes possible to oxidize at least a portion of the first layer formed on the first surface of the wafer 200 in step D1. As a result, a second layer is formed on the first surface, which is the oxidized first layer.

[0122] In this step, by supplying the catalyst together with the reactants, the above-described reaction can be carried out in a non-plasma atmosphere and under low temperature conditions as described later. In this way, by forming the second layer on the first surface in a non-plasma atmosphere and under low temperature conditions as described later, it is possible to suppress the removal and / or deactivation of the inhibitor layers formed on the second, third, and fourth surfaces of the wafer 200.

[0123] The processing conditions when supplying the reactants and catalyst in step D2 are as follows: Processing temperature: Room temperature (25°C) to 200°C, preferably room temperature to 150°C Processing pressure: 133~1333 Pa Processing time: 1 to 120 seconds, preferably 1 to 60 seconds Reactant supply flow rate: 0.001~2 slm Catalyst supply flow rate: 0.001~2slm Inert gas supply flow rate (per gas supply pipe): 0-20 slm Examples are given.

[0124] After oxidizing the first layer formed on the first surface of the wafer 200 to transform it into the second layer, valves 243c and 243d are closed to stop the supply of the reactant and catalyst into the processing chamber 201, respectively. Then, using the same processing procedure and conditions as in step F, any remaining gaseous substances in the processing chamber 201 are removed (purged). It is preferable that the processing temperature during purging be the same as the processing temperature when supplying the reactant and catalyst.

[0125] As the reactant, for example, an oxidizing agent similar to the various oxidizing agents exemplified in step A1 above can be used. As the catalyst, for example, a catalyst similar to the various catalysts exemplified in step D1 above can be used.

[0126] [Perform the prescribed number of times] By performing the above steps D1 and D2 alternately, i.e., without synchronization, a predetermined number of cycles (n times, where n is 1 or an integer of 2 or more), a film can be selectively (preferentially) grown on the first surface among the first, second, third, and fourth surfaces of the wafer 200, as shown in Figure 5(c), and the recesses can be filled with the film. That is, the film can be grown starting from the bottom surface of the recess, which is the first surface of the wafer 200, and the film can be grown in a bottom-up manner within the recess, filling the recess with the film. For example, when using the above-mentioned raw materials, reactants, and catalysts, a SiOC film or an SiO film can be selectively grown as a film on the first surface, and the recesses can be filled with the SiOC film or SiO film. It is preferable to repeat the above cycle multiple times. That is, it is preferable to make the thickness of the second layer formed per cycle thinner than the desired film thickness, and to repeat the above cycle multiple times until the film thickness formed by stacking the second layers reaches the desired film thickness.

[0127] Furthermore, by performing the above cycle a predetermined number of times, the film can be grown from the bottom surface (first surface) of the recess on the surface of the wafer 200 toward the opening side of the recess. At this time, since a high-density inhibitor layer is formed on the second surface which constitutes the top and side surfaces of the recess, the growth of the film starting from the second surface can be suppressed. In addition, since a high-density inhibitor layer is formed on the third and fourth surfaces, which are surfaces of parts of the wafer 200 different from the recess, the growth of the film starting from the third and fourth surfaces can also be suppressed. In other words, by performing the above cycle a predetermined number of times, it is possible to suppress the growth of the film starting from the top surface, side surfaces, and surfaces of parts different from the recess, while promoting the growth of the film starting from the bottom surface of the recess. As a result, it is possible to grow the film in the recess from the bottom up and fill the inside of the recess with the film, as shown in Figure 5(c).

[0128] Furthermore, when performing steps D1 and D2, as shown in Figure 5(c), the inhibitor layers formed on the second, third, and fourth surfaces of the wafer 200 are maintained on the second, third, and fourth surfaces as described above, thereby suppressing film growth originating from the second, third, and fourth surfaces. However, in cases where the formation of inhibitor layers on the second, third, and fourth surfaces is insufficient due to some factor, very slight film growth originating from the second, third, and fourth surfaces may occur. However, even in this case, the thickness of the film formed originating from the second, third, and fourth surfaces will be much thinner than the thickness of the film formed originating from the first surface. Therefore, even in this case, the filling of recesses by bottom-up growth described above can be properly performed.

[0129] (Step E:PT) After step D is completed, step E is performed. In step E, post-treatment (PT) is performed on the wafer 200 by heat treatment (annealing) to create a film that fills the recesses. At this time, the output of the heater 207 is adjusted so that the temperature inside the processing chamber 201, i.e., the temperature of the wafer 200 after the film has been formed to fill the recesses, is equal to or higher than the temperature of the wafer 200 in steps A, B, C, and D, preferably higher than the temperature of the wafer 200 in those steps.

[0130] By performing PT on wafer 200, impurities in the film formed to fill recesses can be removed, defects can be repaired, and the film can be hardened. Hardening the film improves its processing resistance, i.e., its etching resistance.

[0131] Furthermore, by performing PT on the wafer 200, as shown in Figure 5(d), the inhibitor layer can be removed and / or disabled on the second, third, and fourth surfaces of the wafer 200, namely the interface between the side of the recess and the film (SiOC), other sides of the recess, the top surface of the recess, and the surfaces of parts other than the recess.

[0132] This step may be performed with an inert gas supplied to the processing chamber 201, or with a reactive substance such as an oxidizing agent (oxidizing gas) supplied. When a reactive substance such as an oxidizing agent is supplied, it becomes possible to effectively remove impurities contained in the film formed to fill the recesses, repair defects, and harden the film. It also becomes possible to enhance the effect of removing and / or neutralizing the inhibitor layer at the interface between the side surface of the recess and the film, other sides of the recess, the top surface of the recess, and the surface of parts other than the recess. In this case, the inert gas or reactive substance such as an oxidizing agent (oxidizing gas) is also called an assisting substance. At this time, the assisting substance may also be supplied in a plasma state, which can further enhance the above-mentioned effects.

[0133] The processing conditions when performing PT in step E are as follows: Processing temperature: 200-1000°C, preferably 400-700°C Processing pressure: 1~120000Pa Processing time: 1-18000 seconds Assist substance supply flow rate: 0-50 slm RF power: 0~10000W Examples are given.

[0134] Furthermore, if it is not necessary to remove impurities, repair defects, or harden the film formed to fill the recess, or if it is not necessary to remove and / or disable the inhibitor layer, step E can be omitted.

[0135] (After-purge and return to atmospheric pressure) After step E is completed (or after step D is completed if step E is omitted), inert gas is supplied as a purge gas into the processing chamber 201 from nozzles 249a to 249c and exhausted from exhaust port 231a. This purges the processing chamber 201, removing any remaining gases and reaction by-products (after-purge). Subsequently, the atmosphere inside the processing chamber 201 is replaced with inert gas (inert gas replacement), and the pressure inside the processing chamber 201 is returned to atmospheric pressure (atmospheric pressure return).

[0136] (Boat unloading and wafer discharge) Subsequently, the seal cap 219 is lowered by the boat elevator 115, opening the lower end of the manifold 209. Then, the processed wafer 200, supported by the boat 217, is unloaded from the lower end of the manifold 209 to the outside of the reaction tube 203 (boat unloading). After boat unloading, the shutters 219s are moved, and the lower end opening of the manifold 209 is sealed by the shutters 219s via the O-ring 220c (shutter closing). After the processed wafer 200 has been unloaded from the reaction tube 203, it is removed from the boat 217 (wafer discharge).

[0137] (3) Effects of this embodiment According to this embodiment, one or more of the following effects can be obtained.

[0138] (a) Step A includes step A1 of supplying an oxidizing agent and a reducing agent to the wafer 200 in a plasma state, and step A2 of supplying a reducing agent to the wafer 200 in a plasma state, and step B of heat-treating the wafer 200 after step A has been performed. By performing these steps, the second surface of the wafer 200 can have a high density of OH terminations, and the first surface of the wafer 200 can have no OH terminations, or have a much smaller amount of OH terminations than the amount of OH terminations on the second surface of the wafer 200. In other words, the amount (density, concentration) of OH terminations on the second surface of the wafer 200 can be greater (higher) than the amount (density, concentration) of OH terminations on the first surface of the wafer 200. It is also possible to make the amount (density, concentration) of OH terminations on the first surface of the wafer 200 zero. These steps make it possible to selectively (preferentially) adsorb at least a portion of the molecular structure of the molecules constituting the modifier onto the second surface of the wafer 200 at high density in step C, thereby selectively (preferentially) forming a high-density inhibitor layer on the second surface. Furthermore, in step D, it becomes possible to selectively (preferentially) grow a film on the first surface of the wafer 200 with high precision while suppressing film growth on the second surface of the wafer 200. As a result, it becomes possible to fill the recesses with a film with high selectivity while suppressing film growth on the second surface of the wafer 200.

[0139] (b) Step A includes step A1 of supplying an oxidizing agent and a reducing agent to the wafer 200 in a plasma state, and step A2 of supplying a reducing agent to the wafer 200 in a plasma state, and step B of heat-treating the wafer 200 after step A has been performed, thereby making the second surface and other surfaces (third surface and fourth surface) of the wafer 200 each have high-density OH terminations, and the first surface of the wafer 200 either has no OH terminations or has a much smaller amount of OH terminations than the second surface and other surfaces (third surface and fourth surface). In other words, the amount (density, concentration) of OH terminations on the second surface and other surfaces (third surface and fourth surface) of the wafer 200 can be greater (higher) than the amount (density, concentration) of OH terminations on the first surface of the wafer 200. It is also possible to make the amount (density, concentration) of OH terminations on the first surface of the wafer 200 zero. These steps enable the selective (preferential) adsorption of at least a portion of the molecular structure of the modifier molecules onto the second surface and other surfaces (third and fourth surfaces) of the wafer 200 at high density in step C, thereby enabling the selective (preferential) formation of a high-density inhibitor layer on the second surface and other surfaces (third and fourth surfaces). Furthermore, in step D, it becomes possible to selectively (preferentially) grow a film on the first surface of the wafer 200 with high precision while suppressing film growth on the second surface and other surfaces (third and fourth surfaces) of the wafer 200. As a result, it becomes possible to fill the recesses with a film with high selectivity while suppressing film growth on the second surface and other surfaces (third and fourth surfaces) of the wafer 200.

[0140] (c) By selectively forming a high-density inhibitor layer on the second surface constituting the upper and side surfaces of the recess of the wafer 200, it is possible to suppress film growth originating from the upper and side surfaces of the recess while promoting film growth originating from the bottom surface of the recess. This allows the film to grow from the bottom side of the recess toward the opening side of the recess, enabling bottom-up film growth within the recess. As a result, it becomes possible to fill the recess with film without generating voids or seams in the film. In other words, it becomes possible to form a void-free and seamless film within the recess, improving the filling characteristics.

[0141] (d) By selectively forming a high-density inhibitor layer on the second surface and other surfaces (third and fourth surfaces) that constitute the upper and side surfaces of the recesses of the wafer 200, it is possible to suppress film growth starting from the upper and side surfaces and other surfaces (third and fourth surfaces) of the recesses while promoting film growth starting from the bottom surface of the recesses. As a result, the inside of the recesses can be filled with film without growing film on the upper surface (second surface) and other surfaces (third and fourth surfaces). As a result, as shown in Figure 5(c), it is possible to create a state in which no film (SiOC) is formed on the upper surface and other surfaces (third and fourth surfaces) of the recesses when the film deposition process is completed. Also, as shown in Figure 5(c), when the film deposition process is completed, the inside of the recesses in the side walls of the laminated structure on the surface of the wafer 200, in which the first material (SiGe) and the second material (Si) are alternately stacked, can be filled with film (SiOC), and the side walls can be made flat. These advancements make it possible to eliminate the conventional step of removing excess film formed on the upper surface of recesses (second surface) or other surfaces (third and fourth surfaces) by etching after the film formation process.

[0142] As mentioned above, even though inhibitor layers are formed on the second, third, and fourth surfaces, slight film growth may occur originating from the second, third, and fourth surfaces due to various factors. In such cases, it may be necessary to etch the excess film formed on the upper surface of the recess (second surface) or other surfaces (third and fourth surfaces). However, even in such cases, the excess film formed on the upper surface of the recess or other surfaces (third and fourth surfaces) is very small, as described above, and the load on the etching process can be significantly reduced, thereby drastically shortening the etching time.

[0143] On the other hand, when filling recesses with a film using a conventional film deposition method that only performs step D, as shown in Figure 6(b), a film (SiOC) is formed on the entire sidewall of the laminated structure on the surface of the wafer 200, which is made up of alternating layers of the first material (SiGe) and the second material (Si). Films (SiOC) are also formed on other surfaces (third surface, fourth surface, etc.). In this case, as shown in Figure 6(b), voids or seams may be formed in the film due to the shape of the recesses. In this case, in order to fill the recesses in the sidewall of the laminated structure, which is made up of alternating layers of the first and second materials, with a film and to make the sidewall flat, it is necessary to perform a process of etching the excess film formed on the upper surface of the recesses. In addition, it may be necessary to etch the films formed on other surfaces (third surface, fourth surface, etc.). For example, if a substrate having the configuration shown in Figure 6(b) has an etching process performed on the upper surface of a recess or other surfaces (hereinafter referred to as the upper surface of a recess, etc.), it is possible to create a state in which no film is formed on the upper surface of a recess, etc., as shown in Figure 6(c). However, in this case, as shown in Figure 6(c), voids or seams formed in the film during film formation are maintained, and in some cases, etching may make the voids or seams deeper, making it impossible to flatten the side walls of the laminated structure in which the first and second materials are alternately stacked. Furthermore, when using conventional film formation methods, it becomes essential to perform the etching process for excess film, which prolongs the total processing time and reduces productivity.

[0144] In contrast, according to this embodiment, as shown in Figure 5(c), it is possible to form a void-free and seamless film within the recess while suppressing film growth on the upper surface of the recess, etc. Furthermore, when the film deposition process is completed, the recesses in the sidewalls of the laminated structure, in which the first material (SiGe) and the second material (Si) are alternately stacked, can be filled with the film (SiOC), and the sidewalls can be made flat. In addition, film growth on other surfaces (third surface, fourth surface, etc.) can also be suppressed. As a result, it is possible to omit the step of removing excess film formed on the upper surface of the recess, etc. by etching after the film deposition process, which was essential in conventional film deposition methods. Even if, despite forming an inhibitor layer on the upper surface of the recess, etc., some factor causes very slight film growth starting from the upper surface of the recess, etc., the excess film formed on the upper surface of the recess, etc. will be very small, significantly reducing the load in the etching process and significantly shortening the time required for etching. In other words, according to this embodiment, void-free and seamless embedding becomes possible, improving the embedding characteristics. Furthermore, by eliminating the process of etching excess film, or by reducing the load of the process of etching excess film, the total processing time can be significantly reduced, and productivity can be significantly improved.

[0145] (e) By setting the processing temperature in step B to be higher than or equal to the processing temperature in step A, it becomes possible to selectively sublimate and remove the oxide formed on the first surface of the wafer 200 while retaining (maintaining) the OH terminations on the second, third, and fourth surfaces of the wafer 200, and to selectively remove the OH terminations on the first surface. It is possible to perform these actions more effectively by setting the processing temperature in step B higher than the processing temperature in step A. In this case, it is preferable to set the processing temperature in step B to be higher than or equal to the processing temperatures in steps A and C. In this case, it is even more preferable to set the processing temperature in step B higher than the processing temperatures in steps A and C. In this case, it is preferable to set the processing temperature in step B to be higher than or equal to the processing temperatures in steps A, C, and D. In this case, it is even more preferable to set the processing temperature in step B higher than the processing temperatures in steps A, C, and D.

[0146] These steps make it possible to effectively ensure that the amount (density, concentration) of OH terminations on the second, third, and fourth surfaces of wafer 200 before step C is greater (higher) than the amount (density, concentration) of OH terminations on the first surface of wafer 200. It is also possible to set the amount (density, concentration) of OH terminations on the first surface of wafer 200 to zero. These steps make it possible to effectively selectively (preferentially) adsorb at least a portion of the molecular structure of the molecules constituting the modifier onto the second, third, and fourth surfaces of wafer 200 at high density during step C, thereby selectively (preferentially) forming a high-density inhibitor layer on these surfaces. As a result, it becomes possible to fill the recesses with a film with high selectivity while suppressing film growth on the second, third, and fourth surfaces of wafer 200. In step B, by simply adjusting the temperature of the wafer 200, that is, by simply heating the wafer 200 to a predetermined temperature, the oxide formed on the first surface of the wafer 200 can be selectively sublimated and removed while retaining (maintaining) the OH terminations on the second, third, and fourth surfaces of the wafer 200, thereby selectively removing the OH terminations on the first surface.

[0147] (f) Before performing step A, step F is performed to remove the native oxide film on the surface of wafer 200, thereby removing the non-uniformly formed native oxide film on the first, second, and third surfaces of wafer 200, and thus removing the non-uniformly formed OH terminations on these surfaces. Subsequently, by performing step A, the first, second, and third surfaces of wafer 200 can be uniformly oxidized, and a very thin and very uniform oxide film can be formed on these surfaces. As a result, OH terminations can be uniformly formed on these surfaces. If the fourth surface is composed of an SiO film, OH terminations will also be uniformly formed on the fourth surface. Subsequently, by performing step B, the OH terminations uniformly formed on the second, third, and fourth surfaces of wafer 200 can be retained (maintained), while the oxide film uniformly formed on the first surface of wafer 200 can be selectively sublimated and removed, thereby selectively removing OH terminations on the first surface. As a result, in step C, at least a portion of the molecular structure of the molecules constituting the modifier can be more uniformly adsorbed onto the second, third, and fourth surfaces, making it possible to form a more uniform inhibitor layer. Furthermore, in step D, it becomes possible to form a uniform film on the first surface.

[0148] (g) After step D is completed, the film formed to fill the recesses can be heat-treated (PT) to remove impurities, repair defects, and harden the film. Furthermore, the inhibitor layer on the second, third, and fourth surfaces of the wafer 200, i.e., the interface between the side of the recess and the film, other sides of the recess, the top surface of the recess, and the surface of parts other than the recess, can be removed and / or neutralized. At this time, the temperature of the wafer 200 can be set to be higher than the temperature of the wafer 200 in steps A to D to enhance these effects. At this time, the temperature of the wafer 200 can be set to be higher than the temperature of the wafer 200 in steps A to D to enhance these effects. At this time, the temperature of the wafer 200 can be set to be higher than the temperature of the wafer 200 in steps A to D to further enhance these effects. At this time, reactive substances such as inert gas or oxidizing agents (oxidizing gases), i.e., assisting substances, may be supplied into the processing chamber 201. By supplying assisting substances during heat treatment, the above effects can be enhanced. At this time, the assisting substances may be supplied in a plasma state. This can further enhance the above effects.

[0149] (h) The above-mentioned effect is significantly enhanced when the first surface of wafer 200 is composed of a film containing the first element and the second surface is composed of a film containing the second element. Note that the first element includes a group 14 element, and the second element includes a group 14 element. The above-mentioned effect is even more significantly enhanced when the first surface of wafer 200 is composed of a Ge-containing film and the second surface is composed of a Si-containing film. The above-mentioned effect is even more significantly enhanced when the first surface of wafer 200 is composed of Si and Ge-containing films and the second surface is composed of a Si-containing film.

[0150] (i) The above-mentioned effects are significantly enhanced when the first surface of wafer 200 is composed of a film containing the first element, the second surface is composed of a film containing the second element, the third surface is composed of a film containing the third element, and the fourth surface is composed of a film containing the fourth element. Note that the first element includes a group 14 element, the second element includes a group 14 element, the third element includes a group 15 element, and the fourth element includes a group 16 element. The above-mentioned effects are even more significantly enhanced when the first surface of wafer 200 is composed of a Ge-containing film, the second surface is composed of a Si-containing film, the third surface is composed of an N-containing film, and the fourth surface is composed of an O-containing film. The above-mentioned effects are even more significantly enhanced when the first surface of wafer 200 is composed of a Si and Ge-containing film, the second surface is composed of a Si-containing film, the third surface is composed of a Si and N-containing film, and the fourth surface is composed of a Si and O-containing film.

[0151] (4) Variations The substrate processing sequence in this embodiment can be modified as shown in the following examples. These modifications can be combined in any way. Unless otherwise specified, the processing procedures and conditions in each step of each modification can be the same as those in each step of the substrate processing sequence described above.

[0152] (Variation 1) As shown in the processing sequence below, step A may further involve step A3, in which an oxidizing agent and a reducing agent are excited into a plasma state and supplied to the wafer 200 after steps A1 and A2 have been performed. In this case, step A further includes step A3. That is, step A includes step A1, step A2, and step A3. The processing procedure and processing conditions in step A3 can be, for example, the same as the processing procedure and processing conditions in step A1 described above.

[0153] Oxidizing agent * +reducing agent * →reducing agent* → Oxidizing agent * +reducing agent * → Heat treatment → Modifier → (Raw material → Reactant) × n Oxidizing agent * +reducing agent * →reducing agent * → Oxidizing agent * +reducing agent * → Heat treatment → Modifier → (Raw material + Catalyst → Reactant) × n Oxidizing agent * +reducing agent * →reducing agent * → Oxidizing agent * +reducing agent * → Heat treatment → Modifier → (Raw material → Reactant + Catalyst) × n Oxidizing agent * +reducing agent * →reducing agent * → Oxidizing agent * +reducing agent * → Heat treatment → Modifier → (Raw material + Catalyst → Reactant + Catalyst) × n

[0154] In this modified example, the same effects as in the above-described embodiment can be obtained. Furthermore, in this modified example, by adding step A3 in step A, the density of OH terminations on the first, second, third, and fourth surfaces of the wafer 200 can be further increased, making it possible to create a state in which each surface has a higher density of OH terminations. As a result, in step C, the density of the inhibitor layer formed on the second, third, and fourth surfaces of the wafer 200 can be further increased, making it possible to further enhance the film formation inhibitory effect (adsorption inhibition effect, reaction inhibition effect) by the inhibitor layer.

[0155] (Modification 2) Depending on the surface condition of the wafer 200, step F (removal of native oxide film) may be omitted. For example, after forming a laminated structure on the surface of the wafer 200 having a first surface (SiGe film surface), a second surface (Si film surface), a third surface (SiN film surface), and a fourth surface (SiO film surface) as shown in Figure 5(a), if the surface of the wafer 200 is not exposed to the atmosphere, or if the amount of atmosphere exposure is small, or if the atmosphere exposure time is short, each surface may be in an appropriate surface condition. In such cases, step F can be omitted, and the processing sequence can be started from step A. The same effects as in the above-described embodiment can be obtained in this modified example as well. Furthermore, by omitting step F, the total processing time can be shortened, and productivity can be improved.

[0156] (Variation 3) Step E may be omitted if it is not necessary to remove impurities, repair defects, or harden the film formed to fill the recesses, or if it is not necessary to remove and / or disable the inhibitor layer on each surface of the wafer 200. For example, if the amount of impurities and defects in the film formed to fill the recesses is within an acceptable range, Step E can be omitted. Also, if the amount of inhibitor layer residues and remnants at the interface between the side of the recess and the film, other sides of the recess, the top surface of the recess, or surfaces of parts other than the recess is within an acceptable range, Step E can be omitted. Furthermore, if the inhibitor layer residues and remnants at the interface between the side of the recess and the film, other sides of the recess, the top surface of the recess, or surfaces of parts other than the recess are removed by reactions in the film formation process or post-film formation processing, Step E can be omitted. The same effects as in the above-described embodiment can be obtained in this modified example as well. In addition, by omitting Step E, the total processing time can be shortened, and productivity can be improved.

[0157] <Other aspects of this disclosure> The aspects of this disclosure have been described in detail above. However, this disclosure is not limited to the aspects described above and can be modified in various ways without departing from its essence.

[0158] For example, in step F, an etching agent may be supplied to the wafer 200 by plasma excitation. This can increase the etching rate when etching the native oxide film. In step B, an inert gas may be supplied by plasma excitation. This makes it possible to remove oxides such as GeO formed on the first surface by sublimation and simultaneously perform plasma treatment on the first surface after the oxides have been removed. In step E, an inert gas or assisting substance may be supplied by plasma excitation. This makes it possible to more effectively remove impurities contained in the film formed to fill the recesses, repair defects, and harden the film. It also makes it possible to further enhance the effect of removing and / or neutralizing the inhibitor layer at the interface between the side surface of the recess and the film, other sides of the recess, the top surface of the recess, and the surface of parts other than the recess.

[0159] Furthermore, in step D, for example, in addition to SiOC films and SiO films, silicon-based oxide films such as silicon oxynitride films (SiOCN films), silicon oxynitride films (SiON films), silicon boronitride films (SiBON films), and silicon borocarbonite films (SiBOCN films) may be formed. Also in step D, metallic oxide films such as aluminum oxide films (AlO films), titanium oxide films (TiO films), hafnium oxide films (HfO films), and zirconium oxide films (ZrO films) may be formed.

[0160] It is preferable that the recipes used for each process be prepared individually according to the processing content, recorded and stored in the storage device 121c via a telecommunications line or external storage device 123. When starting each process, it is preferable that the CPU 121a appropriately selects the appropriate recipe from among the multiple recipes recorded and stored in the storage device 121c according to the processing content. This makes it possible to form films of various film types, composition ratios, film quality, and film thickness with good reproducibility using a single substrate processing device. Furthermore, it reduces the burden on the operator and allows each process to be started quickly while avoiding operational errors.

[0161] The above-mentioned recipes are not limited to newly created ones; they may also be prepared, for example, by modifying existing recipes already installed in the board processing device. When modifying a recipe, the modified recipe may be installed in the board processing device via a telecommunications line or a recording medium containing the recipe. Alternatively, existing recipes already installed in the board processing device may be directly modified by operating the input / output device 122 provided in the existing board processing device.

[0162] The above-described embodiments illustrate an example of forming a film using a batch-type substrate processing apparatus that processes multiple substrates at once. This disclosure is not limited to the above-described embodiments and can be suitably applied, for example, to forming a film using a single-wafer substrate processing apparatus that processes one or several substrates at once. Furthermore, the above-described embodiments illustrate an example of forming a film using a substrate processing apparatus having a hot-wall type processing furnace. This disclosure is not limited to the above-described embodiments and can be suitably applied to forming a film using a substrate processing apparatus having a cold-wall type processing furnace.

[0163] Furthermore, the above-described embodiment described an example in which steps F and A to E are performed consecutively in the same processing chamber of the same substrate processing apparatus (substrate processing system), i.e., in the same processing unit. This disclosure is not limited to the above-described embodiment, and can be suitably applied to cases where, for example, as shown in Figure 7, a substrate processing system including a plurality of standalone substrate processing apparatuses (first substrate processing apparatus, second substrate processing apparatus, third substrate processing apparatus) is used, and each step is performed in different processing chambers of different substrate processing apparatuses, i.e., in different processing units. In this case, for example, step F can be performed in the first substrate processing apparatus, step A in the second substrate processing apparatus, and steps B to E in the third substrate processing apparatus. Also, if step A can be omitted, for example, step A can be performed in the first substrate processing apparatus, steps B to D in the second substrate processing apparatus, and step E in the third substrate processing apparatus. Furthermore, if steps A and E can be omitted, for example, step A can be performed in the first substrate processing apparatus, step B in the second substrate processing apparatus, and steps C to D in the third substrate processing apparatus. In this case, for example, two substrate processing apparatuses can be used, with step A performed in the first substrate processing apparatus and steps B to D performed in the second substrate processing apparatus. In these cases, the first substrate processing apparatus, the second substrate processing apparatus, and the third substrate processing apparatus are also referred to as the first processing unit, the second processing unit, and the third processing unit, respectively. Note that the above-described embodiment can also be considered an example in which the first processing unit, the second processing unit, and the third processing unit are the same processing unit.

[0164] Furthermore, as shown in Figure 8, this method can also be suitably applied to substrate processing systems that include a cluster-type substrate processing apparatus in which multiple processing chambers (first processing chamber, second processing chamber, and third processing chamber) are arranged around a transport chamber, and each step is performed in a different processing chamber of the same substrate processing apparatus, i.e., in a different processing unit. In this case, for example, step F can be performed in the first processing chamber, step A in the second processing chamber, and steps B to E in the third processing chamber. Also, if step A can be omitted, for example, step A can be performed in the first processing chamber, steps B to D in the second processing chamber, and step E in the third processing chamber. Also, if steps A and E can be omitted, for example, step A can be performed in the first processing chamber, step B in the second processing chamber, and steps C to D in the third processing chamber. In this case, for example, two processing chambers can be used, with step A performed in the first processing chamber and steps B to D in the second processing chamber. In these cases, the first processing chamber, the second processing chamber, and the third processing chamber are also referred to as the first processing unit, the second processing unit, and the third processing unit, respectively. Furthermore, the above-described configuration can also be considered an example where the first processing unit, the second processing unit, and the third processing unit are the same processing unit. ru.

[0165] Even when using these substrate processing systems or substrate processing devices, each process can be carried out using the same processing procedures and processing conditions as described above, and the same effects as described above can be obtained.

[0166] The above embodiments can be used in combination as appropriate. The processing procedure and processing conditions in this case can be the same as, for example, the processing procedure and processing conditions in the above embodiments. [Examples]

[0167] As shown in Figure 5(a), the wafer has a laminated structure on its surface in which SiGe films and Si films are alternately stacked, and on top of that, SiO films, SiN films, and SiO films are stacked. The side walls of the SiGe and Si film laminated structure have recesses in which the top and sides are made of Si films and the bottom surface is made of SiGe films, with the depth direction being parallel to the wafer surface (lateral direction). By performing the processing sequence of the above embodiment on the wafer, an SiOC film was formed to fill the recesses, and evaluation sample 1 was fabricated. Subsequently, a cross-sectional TEM image of evaluation sample 1 was taken. Figure 9 shows the cross-sectional TEM image of evaluation sample 1.

[0168] Evaluation sample 2 was prepared by forming an OSiOC film in the recesses of a wafer with a similar configuration to the wafer used to prepare evaluation sample 1, by performing the processing sequence described in Modification 1 above. Subsequently, a cross-sectional TEM image of evaluation sample 2 was taken. Figure 10 shows the cross-sectional TEM image of evaluation sample 2.

[0169] As shown in Figures 9 and 10, in both evaluation sample 1 and evaluation sample 2, it was confirmed that the SiOC film was selectively formed only within the recesses, without being formed on the upper surface of the recesses (the surface of the Si film) or other surfaces (the surfaces of the SiN film or SiO film). Furthermore, in both evaluation sample 1 and evaluation sample 2, it was confirmed that the recesses in the sidewalls of the laminated structure, in which SiGe films and Si films are alternately stacked, could be filled with the SiOC film, and that the sidewalls could be made flat. In addition, in both evaluation sample 1 and evaluation sample 2, it was confirmed that no voids or seams were generated in the SiOC film in the state where the recesses were filled. Moreover, in both evaluation sample 1 and evaluation sample 2, it was confirmed that no plasma damage occurred to any of the SiGe films, Si films, SiN films, or SiO films on the surface of the wafer. [Explanation of Symbols]

[0170] 200 wafers (substrates)

Claims

1. (a) (a1) A step of supplying an oxidizing agent and a reducing agent to a substrate having a first surface and a second surface in a plasma state, and (a2) A step of supplying a reducing agent to the substrate in a plasma state, (b) A step of heat-treating the substrate after (a) has been performed, A substrate processing method having the following characteristics.

2. The substrate processing method according to claim 1, further comprising the step of supplying a modifier to the substrate after (c) and (b) have been performed to form an inhibitor layer on the second surface.

3. The substrate processing method according to claim 2, further comprising the step of supplying a film-forming agent to the substrate after (d) and (c) have been performed to form a film on the first surface.

4. (a) The substrate processing method according to claim 1, further comprising the step of supplying an oxidizing agent and a reducing agent to the substrate after (a3), (a1) and (a2) have been performed, in a plasma state.

5. The substrate processing method according to claim 1, wherein the processing temperature in (b) is equal to or greater than the processing temperature in (a).

6. The substrate processing method according to claim 2, wherein the processing temperature in (b) is equal to or greater than the respective processing temperatures in (a) and (c).

7. The substrate processing method according to claim 3, wherein the processing temperature in (b) is equal to or greater than the respective processing temperatures in (a), (c), and (d).

8. The substrate processing method according to claim 1, wherein the processing temperature in (b) is 100°C or more and 400°C or less.

9. The substrate processing method according to claim 1, wherein (a) OH terminations are formed on the first surface and the second surface, and (b) OH terminations formed on the first surface are removed while leaving the OH terminations formed on the second surface.

10. A substrate processing method according to claim 1, wherein (a) the first surface and the second surface are oxidized, and (b) the oxide formed on the first surface is sublimated while the oxide formed on the second surface remains.

11. The substrate processing method according to claim 1, wherein the substrate further comprises at least one of the third surface and the fourth surface.

12. The substrate processing method according to claim 11, wherein in (a), OH terminations are formed on the first surface, the second surface, and at least one of the third surface and the fourth surface, and in (b), the OH terminations formed on the first surface are removed while leaving the OH terminations formed on the second surface and at least one of the third surface and the fourth surface.

13. A substrate processing method according to claim 11, wherein (a) the first surface, the second surface, and at least one of the third surface and the fourth surface are oxidized, and (b) the oxide formed on the first surface is sublimated while the oxide formed on the second surface, the third surface and the fourth surface remains.

14. The substrate further has at least one of the third surface and the fourth surface, (c) The substrate processing method according to claim 2, wherein the inhibitor layer is formed on the second surface and at least one of the third surface and the fourth surface.

15. The substrate further has at least one of the third surface and the fourth surface, (c) The substrate processing method according to claim 3, wherein the inhibitor layer is formed on the second surface and at least one of the third surface and the fourth surface.

16. The substrate processing method according to any one of claims 1 to 10, wherein the first surface is composed of a germanium-containing film and the second surface is composed of a silicon-containing film.

17. A substrate processing method according to any one of claims 11 to 15, wherein the first surface is composed of a germanium-containing film, the second surface is composed of a silicon-containing film, the third surface is composed of a nitrogen-containing film, and the fourth surface is composed of an oxygen-containing film.

18. A substrate processing method according to any one of claims 1 to 10, wherein a recess is provided on the surface of the substrate, the first surface is the bottom surface of the recess, and the second surface is the side surface of the recess, or the side surface and top surface of the recess.

19. A substrate processing method according to any one of claims 11 to 15, wherein a recess is provided on the surface of the substrate, the first surface is the bottom surface of the recess, the second surface is the side surface of the recess, or the side surface and the top surface of the recess, and the third surface and the fourth surface are surfaces of portions of the substrate surface different from the recess.

20. (a) (a1) A step of supplying an oxidizing agent and a reducing agent to a substrate having a first surface and a second surface in a plasma state, and (a2) A step of supplying a reducing agent to the substrate in a plasma state, (b) A step of heat-treating the substrate after (a) has been performed, A method for manufacturing a semiconductor device having [a certain feature].

21. A substrate processing system for processing substrates, An oxidizing agent supply system that supplies an oxidizing agent to the substrate, A reducing agent supply system that supplies a reducing agent to the substrate, A plasma excitation unit that excites an oxidizing agent and a reducing agent into a plasma state, A heater for heating the circuit board, A control unit configured to control the oxidizing agent supply system, the reducing agent supply system, and the heater so as to perform (a) (a1) a process of supplying the oxidizing agent and the reducing agent to a substrate having a first surface and a second surface in an excited plasma state, (a2) a process of supplying the reducing agent to the substrate in an excited plasma state, and (b) a process of heat-treating the substrate after (a) has been performed, A substrate processing system having the following features.

22. (a) (a1) A procedure for supplying an oxidizing agent and a reducing agent to a substrate having a first surface and a second surface in a plasma state, and (a2) A procedure for supplying a reducing agent to the substrate in a plasma state, (b) A procedure for heat-treating the substrate after (a) has been performed, A program that causes a circuit board processing unit to execute commands via a computer.

Images