Multilayer ceramic electronic components and methods for manufacturing multilayer ceramic electronic components

Abstract

The present invention provides a multilayer ceramic electronic component that allows for the creation of multiple layers of internal electrodes and suppresses structural defects in the ceramic body, as well as a method for manufacturing the same. [Solution] The multilayer ceramic electronic component 10 comprises a ceramic body 11 and external electrodes 13b, etc., and the dimension T in the Z-axis direction is larger than the dimension in the Y-axis direction. The ceramic body has an electrode stacking portion 16 in which internal electrodes are stacked, first and second cover portions 17a and 17b, and a side margin portion 15a. The multiple internal electrodes are composed of multiple first peripheral internal electrodes 121 arranged together at the Z-axis peripheral edge on the first cover portion side, multiple second peripheral internal electrodes 122 arranged together at the Z-axis peripheral edge on the second cover portion side, and multiple central internal electrodes 123 arranged together towards the center in the X-axis direction than the multiple peripheral internal electrodes. Each of the multiple peripheral internal electrodes has a higher proportion of ceramic particles than each of the multiple central internal electrodes.

Description

Technical Field

[0001] The present invention relates to a multilayer ceramic electronic component and a method for manufacturing the same.

Background Art

[0002] A multilayer ceramic electronic component has a structure in which a plurality of ceramic layers and a plurality of internal electrodes are alternately laminated. Such a multilayer ceramic electronic component is produced, for example, by laminating ceramic green sheets on which unfired electrode layers made of a conductive paste or the like are formed and firing them. By firing, the unfired electrode layer becomes an internal electrode, and the ceramic green sheet becomes a ceramic layer.

[0003] The sintering temperature of ceramic materials is higher than that of metals. Therefore, the ceramic green sheet and the electrode layer containing metal exhibit different sintering behaviors. In the firing process, since the temperature is raised to the sintering temperature of the ceramic material, the electrode layer is excessively sintered, and spheroidization and disconnection are likely to occur. For example, Patent Document 1 discloses a technique of adding ceramic particles to a paste for forming an internal electrode in order to suppress spheroidization and disconnection of the internal electrode.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] On the other hand, with the miniaturization and increased functionality of electronic components in recent years, internal electrodes and ceramic layers tend to become thinner, while the number of layers of internal electrodes increases. As a result, distortion of the entire multilayer ceramic electronic component due to spheroidization or interruptions of internal electrodes becomes more likely. Furthermore, as the number of layers of internal electrodes increases, the amount of shrinkage in the stacking direction of the region where the internal electrodes are stacked increases during firing of the ceramic body. This generates large stresses in the peripheral region in the stacking direction of the ceramic body, making it easier for structural defects such as cracks to occur.

[0006] In view of the above circumstances, the object of the present invention is to provide a multilayer ceramic electronic component and a method for manufacturing the same, which can have multiple layers of internal electrodes and can suppress structural defects in the ceramic body. [Means for solving the problem]

[0007] To achieve the above objective, a multilayer ceramic electronic component according to one embodiment of the present invention comprises a ceramic body and first and second external electrodes. The ceramic body comprises an electrode stacking portion, first and second cover portions, and first and second side margin portions. The electrode stacking portion includes a plurality of ceramic layers stacked in the first axial direction, and a plurality of internal electrodes arranged between the plurality of ceramic layers and alternately drawn out on both sides along a second axis perpendicular to the first axis. The first and second cover portions face each other in the first axial direction, with the electrode stacking portion in between. The first and second side margin portions face each other in a third axial direction perpendicular to the first and second axes, with the electrode stacking portion in between. The first and second external electrodes are connected to the plurality of internal electrodes and face each other in the second axial direction with the ceramic body in between. The multilayer ceramic electronic component is configured such that the dimension in the first axial direction is larger than the dimension in the third axial direction. The aforementioned plurality of internal electrodes are A plurality of first peripheral internal electrodes are arranged together at the first axial peripheral edge on the first cover portion side, Multiple second peripheral internal electrodes are arranged together at the first axial peripheral edge on the second cover portion side, It is composed of a plurality of central internal electrodes that are arranged together on the second axial side of the plurality of first and second peripheral internal electrodes. Each of the plurality of first and second peripheral internal electrodes has a higher proportion of ceramic particles than each of the plurality of central internal electrodes.

[0008] Another embodiment of the present invention provides a multilayer ceramic electronic component comprising a ceramic body and first and second external electrodes. The ceramic body comprises an electrode stacking portion, first and second cover portions, and first and second side margin portions. The electrode stacking portion includes a plurality of ceramic layers stacked in the first axial direction, and a plurality of internal electrodes arranged between the plurality of ceramic layers and alternately drawn out on both sides along a second axis perpendicular to the first axis. The first and second cover portions face each other in the first axial direction, with the electrode stacking portion in between. The first and second side margin portions face each other in a third axial direction perpendicular to the first and second axes, with the electrode stacking portion in between. The first and second external electrodes are connected to the plurality of internal electrodes and face each other in the second axial direction with the ceramic body in between. The multilayer ceramic electronic component is configured such that the dimension in the first axial direction is larger than the dimension in the third axial direction. The aforementioned plurality of internal electrodes are A plurality of first peripheral internal electrodes are arranged together at the first axial peripheral edge on the first cover portion side, Multiple second peripheral internal electrodes are arranged together at the first axial peripheral edge on the second cover portion side, It is composed of a plurality of central internal electrodes that are arranged together on the second axial side of the plurality of first and second peripheral internal electrodes. Each of the plurality of first and second peripheral internal electrodes has a larger average particle size of ceramic particles than each of the plurality of central internal electrodes.

[0009] A multilayer ceramic electronic component according to yet another embodiment of the present invention comprises a ceramic body and first and second external electrodes. The ceramic body comprises an electrode stacking portion, first and second cover portions, and first and second side margin portions. The electrode stacking portion includes a plurality of ceramic layers stacked in the first axial direction, and a plurality of internal electrodes arranged between the plurality of ceramic layers and alternately drawn out on both sides along a second axis perpendicular to the first axis. The first and second cover portions face each other in the first axial direction, with the electrode stacking portion in between. The first and second side margin portions face each other in a third axial direction perpendicular to the first and second axes, with the electrode stacking portion in between. The first and second external electrodes are connected to the plurality of internal electrodes and face each other in the second axial direction with the ceramic body in between. The multilayer ceramic electronic component is configured such that the dimension in the first axial direction is larger than the dimension in the third axial direction. The aforementioned plurality of internal electrodes are A plurality of first peripheral internal electrodes are arranged together at the first axial peripheral edge on the first cover portion side, Multiple second peripheral internal electrodes are arranged together at the first axial peripheral edge on the second cover portion side, It is composed of a plurality of central internal electrodes that are arranged together on the second axial side of the plurality of first and second peripheral internal electrodes. Each of the plurality of first and second peripheral internal electrodes has a greater thickness in the first axial direction than each of the plurality of central internal electrodes.

[0010] In these configurations, the first and second peripheral internal electrodes have lower sinterability than the plurality of central internal electrodes. Therefore, excessive sintering of the first and second peripheral internal electrodes is suppressed, and spheroidization and disconnection are suppressed. Accordingly, in particular, distortion in the peripheral portion of the ceramic element in the first axial direction is suppressed. Further, as the thermal shrinkage behavior of the first and second peripheral internal electrodes approaches the cover portion and the side margin portion having low sinterability, etc., the stress between them is suppressed. Therefore, even in a ceramic element configured such that the dimension in the first axial direction is larger than the dimension in the third axial direction, structural defects such as cracks in the peripheral portion of the ceramic element in the first axial direction can be suppressed.

[0011] Further, the positions of the ends of the plurality of internal electrodes in the third axial direction may be aligned with each other within a range of 0.5 μm in the third axial direction.

[0012] Further, the electrode laminate portion is along the first axial direction, a first peripheral region where the plurality of first peripheral internal electrodes are arranged, a central region where the plurality of central internal electrodes are arranged, and a second peripheral region where the plurality of second peripheral internal electrodes are arranged, and is divided into, the dimensions in the first axial direction of each of the first and second peripheral regions may be 10% or more and 30% or less of the dimension in the first axial direction of the electrode laminate portion.

[0013] A method for manufacturing a multilayer ceramic electronic component according to still another aspect of the present invention includes a step of preparing a plurality of ceramic sheets for the center in which a first electrode layer is formed, a plurality of ceramic sheets for the periphery in which a second electrode layer having lower sinterability than the first electrode layer is formed, and a plurality of ceramic sheets for the cover that do not include internal electrodes . The plurality of central ceramic sheets are laminated in the first axial direction, the plurality of peripheral ceramic sheets are laminated on both sides in the first axial direction of the laminated plurality of central ceramic sheets, and the plurality of cover ceramic sheets are laminated on both sides in the first axial direction of the laminated plurality of peripheral ceramic sheets, thereby forming a laminated chip having first and second side surfaces perpendicular to a second axis orthogonal to the first axis, with the ends of the first and second electrode layers exposed. First and second side margin portions are formed on the first and second side surfaces of the laminated chip. By firing an unfired ceramic body having the laminated chip and the first and second side margin portions, a ceramic body having a dimension in the first axial direction larger than the dimension in the second axial direction is fired.

[0014] For example, the second electrode layer may have a higher content ratio of the ceramic material to the conductive material than the first electrode layer. For example, the first and second electrode layers contain ceramic powder. The second electrode layer may have a larger average particle size of the ceramic powder than the first electrode layer. For example, the second electrode layer may have a greater thickness in the first axial direction than the first electrode layer. Thereby, the sinterability of the second electrode layer can be made lower than that of the first electrode layer, and structural defects such as cracks in the peripheral portion in the first axial direction of the ceramic body can be suppressed.

Advantages of the Invention

[0015] [[ID=P22]] As described above, according to the present invention, it is possible to provide a multilayer ceramic electronic component and a method for manufacturing the same that can multilayer internal electrodes and suppress structural defects of a ceramic body.

Brief Description of the Drawings

[0017] Embodiments of the present invention will be described below with reference to the drawings. The drawings show mutually orthogonal X, Y, and Z axes as appropriate. The X, Y, and Z axes define a fixed coordinate system fixed to the multilayer ceramic capacitor 10.

[0018] <First Embodiment> [Overall configuration of a multilayer ceramic capacitor] Figures 1-3 show a multilayer ceramic capacitor 10 according to one embodiment of the present invention. Figure 1 is a perspective view of the multilayer ceramic capacitor 10. Figure 2 is a cross-sectional view of the multilayer ceramic capacitor 10 along line AA' in Figure 1. Figure 3 is a cross-sectional view of the multilayer ceramic capacitor 10 along line BB' in Figure 1.

[0019] The multilayer ceramic capacitor 10 comprises a ceramic element 11, a first external electrode 13a, and a second external electrode 13b. The ceramic element 11 is configured as a rectangular parallelepiped having a first end face and a second end face perpendicular to the X-axis, a first side face and a second side face perpendicular to the Y-axis, and a first main face and a second main face perpendicular to the Z-axis. Note that "rectangular parallelepiped" means that it is substantially rectangular in shape, and for example, the edges connecting each face of the ceramic element 11 may be rounded.

[0020] The main surface, end surface, and side surface of the ceramic body 11 are all configured as flat surfaces. In this embodiment, a flat surface does not have to be strictly planar as long as it is perceived as flat when viewed as a whole, and includes, for example, surfaces having minute irregularities on the surface or gently curved shapes within a predetermined range.

[0021] The multilayer ceramic capacitor 10 is configured as a tall-profile type, where the dimension T in the Z-axis direction of the ceramic element 11 is larger than the dimension W in the Y-axis direction. In other words, the multilayer ceramic capacitor 10 can be mounted in a mounting space limited by the Y-axis direction while ensuring high capacitance by increasing the dimension T of the ceramic element 11.

[0022] Specifically, the multilayer ceramic capacitor 10 has the following dimensions, for example: The dimension L of the multilayer ceramic capacitor 10 in the X-axis direction is, for example, 0.2 mm or more and 1.2 mm or less. The dimension W of the multilayer ceramic capacitor 10 in the Y-axis direction is, for example, 0.1 mm or more and 0.7 mm or less. The dimension T of the multilayer ceramic capacitor 10 in the Z-axis direction is, for example, 0.15 mm or more and 1.0 mm or less. The ratio of dimension T to dimension W of the multilayer ceramic capacitor 10 is, for example, 1.2 times or more and 2.0 times or less. The ratio of dimension T to dimension L of the multilayer ceramic capacitor 10 is, for example, 0.6 times or more and 1.0 times or less. The "dimension" of the multilayer ceramic capacitor 10 in a certain direction refers to the maximum dimension in that direction.

[0023] Furthermore, in the following explanation, "center side in the Z-axis direction" refers to the side closer to the virtual XY plane that divides the multilayer ceramic capacitor 10 into two equal parts in the Z-axis direction, and "peripheral side in the Z-axis direction" or "outer side in the Z-axis direction" refers to the side further away from the above-mentioned virtual XY plane.

[0024] The external electrodes 13a and 13b face each other in the X-axis direction with the ceramic body 11 in between, and cover the end face of the ceramic body 11. For example, the external electrodes 13a and 13b shown in Figure 1 extend from the end face of the ceramic body 11 to the main surface and side surface. Note that the shape of the external electrodes 13a and 13b is not limited to the example shown in Figure 1.

[0025] The external electrodes 13a and 13b mainly consist of a metallic material. Examples of metallic materials that make up the external electrodes 13a and 13b include copper (Cu), nickel (Ni), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), and alloys thereof. In this embodiment, the main component refers to the component with the highest content.

[0026] The ceramic body 11 includes a laminate 14, a first side margin portion 15a, and a second side margin portion 15b. The laminate 14 is configured as a rectangular parallelepiped having a first end face 14a and a second end face 14b perpendicular to the X axis, a first side surface 14c and a second side surface 14d perpendicular to the Y axis, and a first main surface 14e and a second main surface 14f perpendicular to the Z axis.

[0027] The side margins 15a and 15b face each other in the Y-axis direction, with the laminate 14 in between. The side margins 15a and 15b cover the sides 14c and 14d of the laminate 14, respectively.

[0028] The laminate 14 has an electrode stacking portion 16, a first cover portion 17a, and a second cover portion 17b. The cover portions 17a and 17b cover the electrode stacking portion 16 from above and below in the Z-axis direction and constitute a pair of main surfaces of the laminate 14.

[0029] The electrode stacked portion 16 includes a plurality of ceramic layers 18 stacked in the Z-axis direction, and a first internal electrode 12a and a second internal electrode 12b positioned between the ceramic layers 18 and alternately drawn out on both sides along the Y-axis. In this embodiment, both the ceramic layers 18 and the internal electrodes 12a and 12b are configured as sheets extending along the XY plane. The internal electrodes 12a and 12b are arranged alternately along the Z-axis direction. That is, the internal electrodes 12a and 12b face each other in the Z-axis direction with the ceramic layer 18 in between.

[0030] The first internal electrode 12a is led out to the first end face 14a, which is covered by the first external electrode 13a. On the other hand, the second internal electrode 12b is led out to the second end face 14b, which is covered by the second external electrode 13b. In other words, the internal electrodes 12a and 12b are alternately led out to the first and second end faces 14a and 14b. As a result, the first internal electrode 12a is connected only to the first external electrode 13a, and the second internal electrode 12b is connected only to the second external electrode 13b.

[0031] The internal electrodes 12a and 12b are formed across the entire width of the electrode stacking portion 16 in the Y-axis direction, with their ends extending to the sides 14c and 14d of the stacking body 14. The sides 14c and 14d of the stacking body 14 are covered by the side margin portions 15a and 15b, thereby ensuring insulation between the internal electrodes 12a and 12b on the sides 14c and 14d of the stacking body 14.

[0032] With this configuration, when a voltage is applied between the external electrodes 13a and 13b of the multilayer ceramic capacitor 10, a voltage is applied to multiple ceramic layers 18 between the internal electrodes 12a and 12b. As a result, the multilayer ceramic capacitor 10 stores a charge corresponding to the voltage between the external electrodes 13a and 13b.

[0033] The ceramic layer 18 mainly contains a high dielectric ceramic material in order to increase the capacitance of each ceramic layer 18 between the internal electrodes 12a and 12b. Examples of high dielectric ceramic materials include perovskite materials containing barium (Ba) and titanium (Ti), such as barium titanate (BaTiO3).

[0034] Furthermore, dielectric ceramics may also be composed of elements such as strontium titanate (SrTiO3), calcium titanate (CaTiO3), magnesium titanate (MgTiO3), calcium zirconate (CaZrO3), calcium zirconate titanate (Ca(Ti,Zr)O3), barium calcium zirconate titanate ((Ba,Ca)(Ti,Zr)O3), barium zirconate (BaZrO3), and titanium dioxide (TiO2).

[0035] The side margin portions 15a, 15b and the cover portions 17a, 17b also contain insulating ceramics as their main component, preferably dielectric ceramics with a composition system similar to that of the ceramic layer 18. This makes it possible to alleviate stress caused by the difference in physical properties between the electrode stacked portion 16 and its surroundings.

[0036] The thickness of each ceramic layer 18 in the Z-axis direction can be set to, for example, 0.1 μm to 1.0 μm, taking into account the particle size of the ceramic particles and from the viewpoint of increasing capacitance. The thickness of the ceramic layer 18 is the average value of the thickness measured at multiple locations on the ceramic layer 18. As an example, six layers are selected from the ceramic layer 18 in the field of view observed by a scanning electron microscope, and the thickness is measured at five equally spaced locations on each layer. The average value of the obtained 30 thicknesses is then taken as the thickness of the ceramic layer 18.

[0037] The internal electrodes 12a and 12b mainly consist of a metallic material. Typical examples of this metallic material include nickel (Ni), but other examples include copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), and alloys thereof.

[0038] The thickness of each internal electrode 12a, 12b in the Z-axis direction can be, for example, 0.1 μm to 1.0 μm, from the viewpoint of increasing the continuity of the internal electrodes 12a, 12b and increasing the capacitance by making the electrode stacked portion 16 multilayered. The thickness of the internal electrodes 12a, 12b is the average value of the thickness measured at multiple locations on the internal electrodes 12a, 12b. As an example, six layers are selected from the internal electrodes 12a, 12b in the field of view observed by a scanning electron microscope, and the thickness is measured at five equally spaced locations in each layer. The average value of the obtained 30 thicknesses is then taken as the thickness of the internal electrodes 12a, 12b.

[0039] The ceramic element 11 is constructed as a sintered body of dielectric ceramics. On the other hand, the internal electrodes 12a and 12b included in the electrode stack 16 contain metallic material and therefore have a different sintering behavior than dielectric ceramics. Specifically, the internal electrodes 12a and 12b have a lower sintering temperature and sinter faster than dielectric ceramics. Due to these differences in sintering behavior, conventional multilayer ceramic capacitors had the following problems.

[0040] Figure 4 is a cross-sectional view of a conventional multilayer ceramic capacitor 20, showing the cross-section at the same position as in Figure 3. In the multilayer ceramic capacitor 20, the internal electrodes 22a and 22b have substantially the same configuration and the same sinterability throughout the entire electrode stacking portion 26 of the ceramic element 21.

[0041] For example, in the firing process of the ceramic body 21, the firing temperature is set to match that of the dielectric ceramic, making the internal electrodes 22a and 22b prone to excessive sintering. This can cause deformation of the internal electrodes 22a and 22b, such as breakage or spheroidization. Furthermore, the thinning of the internal electrodes 22a and 22b increases the likelihood of such deformation.

[0042] Furthermore, if the ceramic body 21 is tall, the number of layers of internal electrodes 22a and 22b increases, making it easier for deformation of the internal electrodes 22a and 22b to cause strain throughout the ceramic body 21. This strain tends to be more pronounced at the periphery in the Z-axis direction, which is the stacking direction of the internal electrodes 22a and 22b, making it easier for stress to occur in the cover portions 17a and 17b and the side margin portions 15a and 15b that cover the Z-axis periphery of the electrode stacking portion 26.

[0043] Furthermore, the internal electrodes 12a and 12b have a lower sintering temperature than the dielectric ceramics, and a lower shrinkage initiation temperature during sintering. In other words, during the firing process, the electrode stacked portion 26 begins to shrink earlier than the surrounding cover portions 17a and 17b and the side margin portions 18a and 18b.

[0044] Furthermore, if the ceramic body 21 is tall, the difference in shrinkage in the Z-axis direction, which is the stacking direction of the electrode stacking portion 26, tends to be large. As a result, stress caused by the difference in shrinkage tends to concentrate between the Z-axis peripheral portion of the electrode stacking portion 26 and the cover portions 17a, 17b and side margin portions 15a, 15b that cover it.

[0045] As a result, as shown in Figure 4, in the conventional tall-back multilayer ceramic capacitor 20, cracks C1 and C2 due to stress are likely to occur near the boundary between the electrode stacked portion 26 and the cover portions 17a and 17b, and near the boundary between the electrode stacked portion 26 and the side margin portions 15a and 15b.

[0046] For example, the crack C1 shown in Figure 4 may occur during the firing process when the cover portions 17a and 17b are unable to follow the shrinkage of the electrode stacked portion 26 in the Z-axis direction, resulting in increased stress between the cover portions 17a and 17b and the electrode stacked portion 26.

[0047] Furthermore, for example, the crack C2 shown in Figure 4 may occur during the firing process due to a large difference in the amount of shrinkage in the Z-axis direction between the electrode laminated portion 26 and the side margin portions 15a and 15b, resulting in increased stress between the side margin portions 15a and 15b and the electrode laminated portion 26. Moreover, as shown in the manufacturing method described later, if a method is adopted in which the side margin portions 15a and 15b are added later, the boundary between the laminated body of the electrode laminated portion 26 and the cover portions 17a and 17b and the side margin portions 15a and 15b becomes more prone to delamination, making the crack C2 particularly likely to occur.

[0048] In contrast, in the multilayer ceramic capacitor 10 of this embodiment shown in Figures 1 to 3, the occurrence of cracks C1 and C2 can be suppressed by changing the sinterability of the internal electrodes 12a and 12b located on the cover portion 17a and 17b side of the electrode stacked portion 16 and the internal electrodes 12a and 12b located on the Z-axis center side of the electrode stacked portion 16. The detailed configuration of the electrode stacked portion 16 of this embodiment will be described below.

[0049] As shown in Figure 3, the internal electrodes 12a and 12b are composed of a plurality of first peripheral internal electrodes 121, a plurality of second peripheral internal electrodes 122, and a plurality of central internal electrodes 123. The peripheral internal electrodes 121 and 122 are internal electrodes with lower sinterability than the central internal electrode 123.

[0050] The first peripheral internal electrode 121 is arranged together at the Z-axis peripheral edge on the first cover portion 17a side. The second peripheral internal electrode 122 is arranged together at the Z-axis peripheral edge on the second cover portion 17b side. The central internal electrode 123 is arranged together towards the center in the Z-axis direction, further than the peripheral internal electrodes 121 and 122. Note that "arranged together" means that the multiple internal electrodes are arranged continuously in the Z-axis direction via the ceramic layer 18. Specifically, the peripheral internal electrodes 121 and 122 are the outermost internal electrode in the Z-axis direction and multiple internal electrodes arranged continuously from that internal electrode via the ceramic layer 18.

[0051] The electrode stacking portion 16 is divided along the Z-axis direction into a first peripheral region 161 where the first peripheral internal electrode 121 is located, a central region 163 where the central internal electrode 123 is located, and a second peripheral region 162 where the second peripheral internal electrode 122 is located. When the dimensions of the entire electrode stacking portion 16 in the Z-axis direction are taken as 100%, the lower limit of the ratio of the dimensions of each peripheral region 161 and 162 in the Z-axis direction is, for example, 10% or more, more preferably 15% or more, and the upper limit of the ratio is, for example, 30% or less, more preferably 25% or less. When the dimensions of the entire electrode stacking portion 16 in the Z-axis direction are taken as 100%, the lower limit of the ratio of the dimensions of the central region 163 in the Z-axis direction is, for example, 40% or more, more preferably 50% or more, and the upper limit of the ratio is, for example, 80% or less, more preferably 70% or less.

[0052] The first peripheral region 161 is the region from the outermost first peripheral internal electrode 121 in the Z-axis direction to the central first peripheral internal electrode 121 in the Z-axis direction. Similarly, the second peripheral region 162 is the region from the outermost second peripheral internal electrode 122 in the Z-axis direction to the central second peripheral internal electrode 122 in the Z-axis direction. The central region 163 is the region of the electrode stacking portion 16 excluding the peripheral regions 161 and 162.

[0053] In this embodiment, the sinterability of the peripheral internal electrodes 121, 122 and the central internal electrode 123 is controlled by the proportion of ceramic particles. The ceramic particles are crystalline particles formed from dielectric ceramics added as the material for the internal electrodes. The inclusion of ceramic particles in the internal electrodes brings the composition of the internal electrodes closer to that of the ceramic layer 18, cover portions 17a, 17b, and side margin portions 15a, 15b. This makes the sintering behavior of the internal electrodes closer to that of the ceramic layer 18, cover portions 17a, 17b, and side margin portions 15a, 15b, thereby delaying the sintering of the internal electrodes and suppressing excessive sintering and rapid shrinkage.

[0054] Figures 5A and 5B are enlarged views of Figure 3. Figure 5A schematically shows a portion of the first peripheral region 161, and Figure 5B schematically shows a portion of the central region 163. Note that the second peripheral region 162 is constructed similarly to the first peripheral region 161, and therefore is not shown.

[0055] As shown in Figures 5A and 5B, in this embodiment, each of the peripheral internal electrodes 121 and 122 has a higher proportion of ceramic particles P than each of the central internal electrodes 123. This suppresses excessive sintering, especially in the peripheral internal electrodes 121 and 122 on the outer layer side, which is prone to sintering, and suppresses spheroidization and breakage of the peripheral internal electrodes 121 and 122. Therefore, the distortion of the ceramic body 11 caused by spheroidization and breakage of the peripheral internal electrodes 121 and 122 is eliminated, and stress generated in the cover portions 17a and 17b and the side margin portions 18a and 18b covering the peripheral regions 161 and 162 can be suppressed.

[0056] Furthermore, because the peripheral internal electrodes 121 and 122 contain more ceramic particles P than the central internal electrode 123, rapid shrinkage of the peripheral regions 161 and 162 during the firing process can be suppressed. This makes it possible to suppress stress near the boundary between the peripheral regions 161 and 162 and the cover portions 17a and 17b and the side margin portions 15a and 15b.

[0057] These stress-relaxing effects effectively suppress cracks that are particularly likely to occur in high-profile multilayer ceramic capacitors 10, near the boundary between the peripheral regions 161, 162 and the cover portions 17a, 17b, and near the boundary between the peripheral regions 161, 162 and the side margin portions 15a, 15b.

[0058] Furthermore, as shown in the embodiments described later, the inventors have found that in a tall-profile multilayer ceramic capacitor 10, increasing the amount of ceramic particles P added to the peripheral internal electrodes 121 and 122 compared to the central internal electrode 123 is more effective in suppressing cracks than uniformly increasing the amount of ceramic particles P added to all internal electrodes 12a and 12b. The following reasons can be considered for this.

[0059] During the firing process, the ceramic body 11 shrinks towards the center of the electrode stacked portion 16, where the shrinkage start temperature is low. However, the Z-axis peripheral portions of the cover portions 17a, 17b and the side margin portions 15a, 15b shrink relatively less because they are farther from the center. As a result, the ceramic body 11 tends to distort during the shrinkage process, with corners located at the Z-axis peripheral portions protruding outward. In this embodiment, by increasing the amount of ceramic particles P added to the peripheral internal electrodes 121 and 122 compared to the central internal electrode 123, the shrinkage of the peripheral internal electrodes 121 and 122 becomes slower, and the distortion of the Z-axis peripheral portions is also mitigated. In other words, the peripheral internal electrodes 121 and 122 act as a buffer layer between themselves and the Z-axis peripheral portions of the ceramic body 11, buffering the distortion caused by firing and suppressing cracks caused by this distortion.

[0060] Furthermore, suppose that, in order to sufficiently obtain the sintering suppression effect of the electrode stack 16, a large amount of ceramic particles P is uniformly added to all internal electrodes 12a and 12b. In this case, the ceramic particles P are more likely to grow in the internal electrodes 12a and 12b, increasing the risk of a decrease in the continuity of the internal electrodes 12a and 12b. If the continuity decreases in many of the internal electrodes 12a and 12b, distortion of the multilayer ceramic capacitor 10 is more likely to occur, and a decrease in capacitance is a concern.

[0061] Therefore, in this embodiment, by reducing the sinterability of the peripheral internal electrodes 121 and 122 located at the Z-axis peripheral edge of the electrode stacked portion 16 compared to the central internal electrode 123, a decrease in capacitance can be suppressed, and cracks in the tall ceramic body 11 can be effectively suppressed.

[0062] The proportion of ceramic particles P in the internal electrode can be measured, for example, as follows: First, a cross-section parallel to the YZ plane is cut out of the multilayer ceramic capacitor. This cross-section represents the central part of the multilayer ceramic capacitor in the X-axis direction. Then, using a scanning electron microscope or transmission electron microscope, images are taken of the cross-section of each region of the electrode layer at a magnification that includes approximately 5 to 10 layers of internal electrodes within the field of view. From the captured images, the ratio of the area of ​​ceramic particles to the area of ​​the internal electrodes is calculated.

[0063] The method for evaluating the ceramic particle content in each region is described below. For example, for the 5th to 10th layers of internal electrodes near the outermost layer in the Z-axis direction of the electrode stack 16, the average value of the ratio of the area of ​​ceramic particles to the area of ​​internal electrodes in the field of view is calculated, and this average value is taken as the ceramic particle content in the peripheral internal electrodes. Similarly, for the 5th to 10th layers of internal electrodes in the central part of the electrode stack in the Z-axis direction, the average value of the ratio of the area of ​​ceramic particles to the area of ​​internal electrodes in the field of view is calculated, and this average value is taken as the ceramic particle content in the central internal electrodes. The calculated ceramic particle content in the peripheral internal electrodes and the ceramic particle content in the central internal electrodes are compared to determine whether the ceramic particle content in the peripheral internal electrodes is greater or less.

[0064] The content of ceramic particles P in the peripheral internal electrodes 121 and 122 is, for example, 5% to 25%. The content of ceramic particles P in the central internal electrode 123 is, for example, 0% to 20%. The ratio of the content of ceramic particles P in the peripheral internal electrodes 121 and 122 to the content of ceramic particles P in the central internal electrode 123 is, for example, 1.2 to 5 times.

[0065] To increase the proportion of ceramic particles P in the peripheral internal electrodes 121 and 122, more ceramic particles P should be added to the material of the peripheral internal electrodes 121 and 122. The manufacturing method of the multilayer ceramic capacitor 10 will be described below.

[0066] [Manufacturing method for multilayer ceramic capacitors] Figure 6 is a flowchart showing the manufacturing method of the multilayer ceramic capacitor 10 according to this embodiment. Figures 7 to 11 show the manufacturing process of the multilayer ceramic capacitor 10. Hereinafter, the manufacturing method of the multilayer ceramic capacitor 10 will be described in reference to Figure 6, with appropriate reference to Figures 7 to 11.

[0067] (Step S01: Prepare the ceramic sheet) In step S01, a central ceramic sheet 101 for forming the central internal electrode 123, a peripheral ceramic sheet 102 for forming the peripheral internal electrodes 121 and 122, and a cover ceramic sheet 103 for forming the first and second cover portions 17a and 17b are prepared. In the following description, these three types of ceramic sheets will also be referred to as "ceramic sheet 101," "ceramic sheet 102," and "ceramic sheet 103." Ceramic sheets 101, 102, and 103 are configured as large sheets having areas corresponding to multiple chips.

[0068] The ceramic sheets 101, 102, and 103 shown in Figures 7A, B and 8A, B are composed of unfired ceramic green sheets. A slurry is obtained by mixing the materials of the ceramic sheets 101, 102, and 103. This slurry contains dielectric ceramic powder, binder resin, and organic solvent. The slurry, obtained by mixing these materials in a ball mill or the like, is formed into a sheet using a roll coater or doctor blade. The thickness of the ceramic sheets 101 and 102 is adjusted according to the thickness of the ceramic layer 18 after firing. The thickness of the ceramic sheet 103 is adjusted appropriately according to the thickness of the cover portions 17a and 17b after firing.

[0069] An unfired first electrode layer E1 corresponding to the central internal electrode 123 is formed on the central ceramic sheet 101. An unfired second electrode layer E2 corresponding to the peripheral internal electrodes 121 and 122 is formed on the peripheral ceramic sheet 102. As shown in Figure 9, no electrode layer is formed on the cover ceramic sheet 103.

[0070] In this embodiment, electrode layers E1 and E2 are formed from a conductive paste. The conductive paste basically contains conductive powder as a conductive material, a binder resin, and an organic solvent. The conductive powder consists of nickel (Ni), copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), and mixtures or alloys thereof. Furthermore, the conductive paste may also contain a ceramic material. The ceramic material is, for example, ceramic powder, which is a dielectric ceramic powder.

[0071] In this embodiment, the second electrode layer E2 has a higher proportion of ceramic material relative to the conductive powder (conductive material) than the first electrode layer E1. As a result, in the firing process described later, the sinterability of the second electrode layer E2 is lower than that of the first electrode layer E1, and the sintering of the second electrode layer E2 can be delayed compared to that of the first electrode layer E1.

[0072] Specifically, the content ratio of ceramic material to conductive material in the second electrode layer E2 is, for example, 5% by mass or more and 25% by mass or less. Furthermore, the difference in the content ratio of ceramic material to conductive material between the second electrode layer E2 and the first electrode layer E1 is, for example, 5% by mass or more and 25% by mass or less. In this embodiment, the first electrode layer E1 does not necessarily have to contain ceramic material.

[0073] These conductive pastes are printed onto ceramic sheets 101 and 102 using screen printing, gravure printing, or the like, in patterns as shown in Figures 7A, B and 8A, B. This forms the first electrode layer E1 and the second electrode layer E2.

[0074] In ceramic sheets 101 and 102, electrode layers E1 and E2 each have multiple strip-like patterns that cross a cutting line Lx parallel to the X-axis direction and extend along a cutting line Ly parallel to the Y-axis direction. The cutting lines Lx and Ly are imaginary lines used to separate the material into individual chips in the cutting process described later.

[0075] Furthermore, for each of the ceramic sheets 101 and 102, two types of ceramic sheets with electrode layer patterns corresponding to the internal electrodes 12a and 12b described above are prepared.

[0076] Specifically, as shown in Figures 7A and 7B, first and second central ceramic sheets 101a and 101b are prepared as central ceramic sheets 101, in which the pattern of the first electrode layer E1 is shifted by one chip in the X-axis direction. Similarly, as shown in Figures 8A and 8B, first and second peripheral ceramic sheets 102a and 102b are prepared as peripheral ceramic sheets 102, in which the pattern of the second electrode layer E2 is shifted by one chip in the X-axis direction.

[0077] As shown in Figures 7A and 8A, the patterns of the first electrode layer E1 of the first central ceramic sheet 101a and the second electrode layer E2 of the first peripheral ceramic sheet 102a are identical, and these correspond to the first internal electrode 12a. As shown in Figures 7B and 8B, the patterns of the first electrode layer E1 of the second central ceramic sheet 101b and the second electrode layer E2 of the second peripheral ceramic sheet 102b are identical, and these correspond to the second internal electrode 12b.

[0078] (Step S02: Lamination) In step S02, a large laminated sheet 104 is formed by laminating the prepared central ceramic sheet 101, the peripheral ceramic sheet 102, and the cover ceramic sheet 103.

[0079] As shown in Figure 9, in the laminated sheet 104, the central ceramic sheet 101 is laminated in the Z-axis direction. Furthermore, the peripheral ceramic sheet 102 is laminated on both sides (top and bottom) of the laminated central ceramic sheet 101 in the Z-axis direction. Furthermore, the cover ceramic sheet 103 is laminated on both sides (top and bottom) of the laminated peripheral ceramic sheet 102 in the Z-axis direction. The laminate of the central ceramic sheet 101 corresponds to the central region 163 of the electrode laminated section 16. The laminate of the peripheral ceramic sheet 102 corresponds to the peripheral regions 161 and 162 of the electrode laminated section 16. The laminate of the cover ceramic sheet 103 corresponds to the cover sections 17a and 17b.

[0080] More specifically, in the laminate of the central ceramic sheet 101, the first central ceramic sheet 101a and the second central ceramic sheet 101b are stacked alternately. Similarly, in the laminate of the peripheral ceramic sheets 102, the first peripheral ceramic sheet 102a and the second peripheral ceramic sheet 102b are stacked alternately.

[0081] In practice, the ceramic sheets 101, 102, and 103 may be laminated sequentially from the bottom in the Z-axis direction on the laminated sheet 104. Furthermore, each ceramic sheet 101, 102, and 103 may be laminated, and / or all ceramic sheets 101, 102, and 103 may be compressed from the Z-axis direction.

[0082] The number of layers of each ceramic sheet 101, 102, and 103 is adjusted as appropriate, taking into account the dimensions in the Z-axis direction of each region after firing. In this embodiment, for example, the number of layers of ceramic sheets 101 and 102 corresponding to the electrode stacking portion 16 is 200 to 1000 layers. When the total number of layers of ceramic sheets 101 and 102 is set to 100%, the lower limit of the ratio of the number of layers of peripheral ceramic sheets 102 stacked on either the upper or lower side in the Z-axis direction is, for example, 10% or more, more preferably 15% or more, and the upper limit of this ratio is, for example, 30% or less, more preferably 25% or less. In other words, the number of layers of peripheral ceramic sheets 102 referred to here is the number of layers of peripheral ceramic sheets 102 corresponding to either the first peripheral region 161 or the second peripheral region 162. When the total number of layers of ceramic sheets 101 and 102 is set to 100%, the lower limit of the ratio of the number of layers of the central ceramic sheet 101 is, for example, 40% or more, more preferably 50% or more, and the upper limit of the ratio is, for example, 70% or less, more preferably 80% or less.

[0083] (Step S03: Cutting) In step S03, the laminated sheet 104 shown in Figure 9 is cut along the cutting lines Lx and Ly. This separates the laminated sheet 104 into individual pieces, forming the laminated chips 114. For cutting the laminated sheet 104, for example, a push-cut blade or a rotary blade can be used.

[0084] Figure 10 is a perspective view showing the stacked chip 114. Note that the number of electrode layers E1 and E2 shown in this figure is a schematic representation and differs from that in Figures 1-3.

[0085] As shown in the figure, the laminated chip 114 has a first side surface S1 and a second side surface S2 perpendicular to the Y axis, a first end surface and a second end surface perpendicular to the X axis, and a first main surface and a second main surface perpendicular to the Z axis. Side surfaces S1 and S2 are cross-sections corresponding to the cutting line Lx. The end surfaces are cross-sections corresponding to the cutting line Ly. The laminated chip 114 also has a region corresponding to the electrode laminated portion 16 in which unfired electrode layers E1 and E2 are laminated. The edges of the unfired electrode layers E1 and E2 are exposed on side surfaces S1 and S2.

[0086] (Step S04: Formation of side margins) In step S04, unfired first and second side margin portions 115a and 115b are provided on the sides S1 and S2 of the laminated chip 114 obtained in step S03. As a result, as shown in Figure 11, an unfired ceramic body 111 is obtained in which the sides S1 and S2 are covered by the first and second side margin portions 115a and 115b. The size of the unfired ceramic body 111 is adjusted so that the dimension in the Z-axis direction is larger than the dimension in the Y-axis direction in the fired ceramic body 11.

[0087] The method for forming the side margins 115a and 115b is not particularly limited. For example, the side margins 115a and 115b may be formed by punching out the ceramic sheet along the sides S1 and S2. Alternatively, the side margins 115a and 115b may be formed by applying or dipping a ceramic slurry.

[0088] (Step S05: Firing) In step S05, the ceramic body 11 of the multilayer ceramic capacitor 10 shown in Figures 1-3 is fabricated by firing the ceramic body 111 obtained in step S04. In this ceramic body 11, the dimensions in the Z-axis direction are larger than the dimensions in the Y-axis direction. In step S05, the side margin portions 115a and 115b become side margin portions 15a and 15b.

[0089] The firing temperature in step S05 can be determined based on the sintering temperature of the ceramic body 111. For example, when using a barium titanate (BaTiO3)-based material, the firing temperature can be set to approximately 1000-1300°C. Furthermore, firing can be carried out, for example, under a reducing atmosphere or a low oxygen partial pressure atmosphere.

[0090] In this step, sintering begins first with the electrode layers E1 and E2, which have lower sintering temperatures. Subsequently, sintering begins with the cover portions 17a and 17b, the side margin portions 15a and 15b, and the ceramic layer 18, which are made of dielectric ceramics with higher sintering temperatures. As sintering progresses, the electrode layers E1 and E2, which sinter faster, shrink more than the dielectric ceramics.

[0091] In this embodiment, the second electrode layer E2 has a higher proportion of ceramic material relative to the conductive material than the first electrode layer E1. Therefore, the second electrode layer E2, which is located on the peripheral side in the Z-axis direction, has lower sinterability than the first electrode layer E1, which is located on the central side in the Z-axis direction. In other words, the second electrode layer E2 sintersects more slowly than the first electrode layer E1. This suppresses rapid shrinkage of the second electrode layer E2 and relieves stress between the second electrode layer E2 and the surrounding cover portions 17a, 17b and side margin portions 15a, 15b.

[0092] Furthermore, excessive sintering of the second electrode layer E2, which is located on the Z-axis peripheral side and is relatively prone to heating, is suppressed. As a result, spheroidization and breakage of the second electrode layer E2 are suppressed, and the resulting distortion of the ceramic body 11 is also suppressed.

[0093] In this step, as sintering progresses, some ceramic particles contained in electrode layers E1 and E2 may migrate to the outside of electrode layers E1 and E2. However, the amount of such migration of ceramic particles is considered to be uniform within the electrode stacked portion 16. As a result, there is an almost positive correlation between the ceramic material content ratio in electrode layers E1 and E2 and the ceramic particle content ratio of internal electrodes 12a and 12b after firing. Therefore, by increasing the ceramic material content ratio of the second electrode layer E2 compared to the first electrode layer E1, the ceramic particle content ratio of the peripheral internal electrodes 121 and 122 can be increased compared to the central internal electrode 123 even after firing.

[0094] (Step S06: External electrode formation) In step S06, the multilayer ceramic capacitor 10 shown in Figures 1-3 is fabricated by forming external electrodes 13a and 13b on both ends of the ceramic body 11 obtained in step S05 in the X-axis direction. The method for forming the external electrodes 13a and 13b in step S06 can be arbitrarily selected from known methods. For example, the external electrodes 13a and 13b may be formed by applying conductive paste to both ends of the ceramic body 11 in the X-axis direction and baking it. Alternatively, one or more plating films may be formed on this baked film.

[0095] As a result, the multilayer ceramic capacitor 10 is completed. In this manufacturing method, side margin portions 115a and 115b are formed on the sides S1 and S2 of the multilayer chip 114 where the electrode layers E1 and E2 are exposed, so that the positions of the ends of the multiple internal electrodes 12a and 12b in the ceramic body 11 in the Y-axis direction are aligned within a range of 0.5 μm or less.

[0096] <Second Embodiment> The method for reducing the sinterability of the peripheral internal electrodes 121, 122 (second electrode layer E2) is not limited to increasing the content ratio of ceramic particles P in the peripheral internal electrodes 121, 122 (second electrode layer E2), as described in the first embodiment. For example, the sinterability of the peripheral internal electrodes 121, 122 (second electrode layer E2) may be reduced by adjusting the average particle size of the ceramic particles P, as described below.

[0097] The multilayer ceramic capacitor in the second embodiment of the present invention has the same basic configuration as the multilayer ceramic capacitor 10 shown in Figures 1 to 3, and will therefore be described using the same reference numerals with reference to these drawings.

[0098] As shown in Figure 3, in this embodiment as well, the ceramic body 11 of the multilayer ceramic capacitor 10 has an electrode stacked portion 16 and first and second cover portions 17a and 17b, and the dimension in the Z-axis direction is larger than the dimension in the Y-axis direction. The internal electrodes 12a and 12b of the electrode stacked portion 16 are composed of a plurality of first peripheral internal electrodes 121, a plurality of second peripheral internal electrodes 122, and a plurality of central internal electrodes 123. The electrode stacking portion 16 is divided along the Z-axis direction into a first peripheral region 161 where the first peripheral internal electrode 121 is located, a central region 163 where the central internal electrode 123 is located, and a second peripheral region 162 where the second peripheral internal electrode 122 is located.

[0099] Figures 12A and 12B are enlarged views similar to those in Figures 5A and 5B. Figure 12A schematically shows a portion of the first peripheral region 161, and Figure 12B schematically shows a portion of the central region 163. Note that the second peripheral region 162 is constructed similarly to the first peripheral region 161, and therefore its illustration is omitted.

[0100] In this embodiment, the sinterability of the peripheral internal electrodes 121, 122 and the central internal electrode 123 is controlled by the average particle size of the ceramic particles P. By increasing the average particle size of the ceramic particles P in the internal electrodes, the sintering of the conductor (metal) in the internal electrodes is suppressed, and the sintering of the internal electrodes can be delayed. As a result, the thermal shrinkage behavior of the internal electrodes can be made closer to the thermal shrinkage behavior of the cover portions 17a, 17b and the side margin portions 15a, 15b, thereby suppressing excessive sintering and rapid shrinkage.

[0101] Therefore, in this embodiment, the average particle size of the ceramic particles P in each of the peripheral internal electrodes 121 and 122 is larger than that of each of the central internal electrodes 123. This suppresses spheroidization and breakage of the peripheral internal electrodes 121 and 122. It also suppresses rapid shrinkage of the peripheral regions 161 and 162 during the firing process. These stress-relieving effects effectively suppress cracks that are particularly likely to occur in high-profile multilayer ceramic capacitors 10, at the boundaries between the peripheral regions 161 and 162 and the cover portions 17a and 17b, and near the boundaries between the peripheral regions 161 and 162 and the side margin portions 15a and 15b.

[0102] Furthermore, as shown in the examples described later, increasing the average particle size of the ceramic particles P of the peripheral internal electrodes 121 and 122 compared to the central internal electrode 123 can enhance the crack suppression effect more effectively than uniformly increasing the average particle size of the ceramic particles P of all internal electrodes 12a and 12b.

[0103] The average particle size of ceramic particles in the internal electrode can be measured, for example, as follows: First, a cross-section parallel to the YZ plane is cut from the multilayer ceramic capacitor. This cross-section represents the central part of the multilayer ceramic capacitor in the X-axis direction. Then, using a scanning electron microscope or transmission electron microscope, images are taken of the cross-sections of each region of the electrode stack at a magnification that includes approximately 5 to 15 layers of internal electrodes within the field of view. From the captured images, the average particle size of the ceramic particles in the internal electrodes is calculated.

[0104] The method for evaluating the average particle size of ceramic particles in each region is described below. For example, for the 5 to 15 layers of internal electrodes near the outermost layer in the Z-axis direction of the electrode stack, the average particle size of the ceramic particles contained in the internal electrodes within the field of view is calculated, and this average value is taken as the average particle size of ceramic particles in the peripheral internal electrodes. Similarly, for the 5 to 15 layers of internal electrodes in the central part of the electrode stack in the Z-axis direction, the average particle size of the ceramic particles contained in the internal electrodes within the field of view is calculated, and this average value is taken as the average particle size of ceramic particles in the central internal electrode. It is preferable that the average particle size is the average particle size of 5 or more ceramic particles. The calculated average particle size of ceramic particles in the peripheral internal electrodes and the average particle size of ceramic particles in the central internal electrodes are compared to determine whether the average particle size of ceramic particles in the peripheral internal electrodes is larger or not.

[0105] The average particle size of the ceramic particles P in the peripheral internal electrodes 121 and 122 is, for example, between 10 nm and 30 nm. The average particle size of the ceramic particles P in the central internal electrode 123 is, for example, between 5 nm and 20 nm. Furthermore, the ratio of the average particle size of the ceramic particles P in the peripheral internal electrodes 121 and 122 to the average particle size of the ceramic particles P in the central internal electrode 123 is, for example, between 1.5 and 5 times. To increase the average particle size of the ceramic particles P in the peripheral internal electrodes 121 and 122, ceramic particles P with a larger average particle size can be added to the material of the peripheral internal electrodes 121 and 122.

[0106] The method for manufacturing the ceramic capacitor of this embodiment may include steps similar to those of the first embodiment, but the compositions of the electrode layers E1 and E2 are different.

[0107] In this embodiment, electrode layers E1 and E2 contain ceramic powder, and the average particle size of the ceramic powder in the second electrode layer E2 is larger than that of the first electrode layer E1. Specifically, the average particle size of the ceramic powder in the second electrode layer E2 is, for example, 10 nm to 30 nm. The average particle size of the ceramic powder in the first electrode layer E1 is, for example, 5 nm to 20 nm. Furthermore, the ratio of the average particle size of the ceramic powder in the second electrode layer E2 to the average particle size of the ceramic powder in the first electrode layer E1 is, for example, 1.5 to 5 times.

[0108] As a result, in the firing process of step S05, the sinterability of the second electrode layer E2, which is located on the peripheral side in the Z-axis direction, can be kept low compared to the first electrode layer E1, which is located on the central side in the Z-axis direction. Therefore, cracks in the ceramic body 11 can be effectively suppressed.

[0109] Furthermore, as sintering progresses, grain growth occurs in the dielectric ceramics contained in electrode layers E1 and E2, which may result in a difference between the particle size of the ceramic powder added to the conductive paste and the particle size of the ceramic particles after firing. On the other hand, larger particle sizes of the ceramic powder added to the conductive paste tend to result in larger particle sizes of the ceramic particles after firing. Therefore, it can be said that there is a positive correlation between the average particle size of the ceramic powder added to the conductive paste and the average particle size of the ceramic particles after firing. Accordingly, by making the average particle size of the ceramic powder in the second electrode layer E2 larger than that of the first electrode layer E1, the average particle size of the ceramic particles P of the peripheral internal electrodes 121 and 122 can be adjusted to be larger than that of the central internal electrode 123 even after firing. It is possible.

[0110] <Third Embodiment> Furthermore, the sinterability can be adjusted by changing the thickness of the internal electrodes. Hereafter, components common to the first embodiment described above will be denoted by the same reference numerals and their descriptions will be omitted. ru.

[0111] Figure 13 is a cross-sectional view of a multilayer ceramic capacitor 30 according to a third embodiment of the present invention, showing a cross-section at the same position as in Figure 3. As shown in Figure 13, the ceramic body 31 of the multilayer ceramic capacitor 30 has an electrode stacked portion 36, cover portions 17a, 17b, and side margin portions 15a, 15b, and is configured such that the dimension T in the Z-axis direction is larger than the dimension W in the Y-axis direction.

[0112] The internal electrodes 32a and 32b of the electrode stacked portion 36 are composed of a plurality of first peripheral internal electrodes 321, a plurality of second peripheral internal electrodes 322, and a plurality of central internal electrodes 323. The electrode stacking portion 36 is divided along the Z-axis direction into a first peripheral region 361 where the first peripheral internal electrode 321 is located, a central region 363 where the central internal electrode 323 is located, and a second peripheral region 362 where the second peripheral internal electrode 322 is located.

[0113] In this embodiment, the sinterability of the peripheral internal electrodes 321, 322 and the central internal electrode 323 is controlled by the thickness of each internal electrode 32a, 32b. By increasing the thickness of the internal electrodes 32a, 32b, the sintering of the internal electrodes 32a, 32b can be delayed. This makes the sintering behavior of the internal electrodes 32a, 32b closer to that of the cover portions 17a, 17b and the side margin portions 15a, 15b.

[0114] Figures 14A and 14B are enlarged views of the electrode stacked portion 36 shown in Figure 13. Figure 14A schematically shows a part of the first peripheral region 361, and Figure 14B schematically shows a part of the central region 363. The second peripheral region 362 is configured similarly to the first peripheral region 361 and is therefore not shown.

[0115] In this embodiment, each of the peripheral internal electrodes 321 and 322 is configured to be thicker in the Z-axis direction than each of the central internal electrodes 323. For example, referring to Figures 14A and 14B, the thickness D1 of the first peripheral internal electrode 321 in the Z-axis direction is thicker than the thickness D2 of the central internal electrode 323 in the Z-axis direction. This suppresses spheroidization and breakage of the peripheral internal electrodes 321 and 322. It also suppresses rapid shrinkage of the peripheral regions 361 and 362 during the firing process. These stress-relieving effects effectively suppress cracks that are particularly likely to occur in high-profile multilayer ceramic capacitors 10, near the boundaries between the peripheral regions 361 and 362 and the cover portions 17a and 17b, and near the boundaries between the peripheral regions 361 and 362 and the side margin portions 15a and 15b.

[0116] In this embodiment, the thickness of each internal electrode 32a, 32b can be measured by the method described in the first embodiment. Specifically, the thickness of each peripheral internal electrode 321, 322 is, for example, 0.2 μm or more and 1.5 μm or less. The thickness of each central internal electrode 323 is, for example, 0.1 μm or more and 1.0 μm or less. The ratio of the thickness of each peripheral internal electrode 321, 322 to the thickness of each central internal electrode 323 is, for example, 1.5 times or more and 3.0 times or less.

[0117] In this embodiment, the internal electrodes 32a and 32b may or may not contain ceramic particles. If the internal electrodes 32a and 32b contain ceramic particles, it is preferable that the proportion of ceramic particles in each peripheral internal electrode 321 and 322 is equal to or greater than the proportion of ceramic particles in each central internal electrode 323. In this case, it is also preferable that the average particle size of the ceramic particles in each peripheral internal electrode 321 and 322 is equal to or greater than the average particle size of the ceramic particles in each central internal electrode 323.

[0118] The method for manufacturing the ceramic capacitor of this embodiment may include steps similar to those of the first embodiment, but the method for forming the electrode layers E1 and E2 is different. In this embodiment, the second electrode layer E2 is formed to be thicker than the first electrode layer E1. For example, the thickness of the conductive paste applied to the second electrode layer E2 can be made thicker than the thickness of the conductive paste applied to the first electrode layer E1. Specifically, the coating thickness of each second electrode layer E2 is, for example, 0.25 μm or more and 2.0 μm or less. The coating thickness of each first electrode layer E1 is, for example, 0.12 μm or more and 1.5 μm or less. The ratio of the coating thickness of each second electrode layer E2 to the coating thickness of each first electrode layer E1 is, for example, 1.5 times or more and 3.0 times or less.

[0119] As a result, in the firing process of step S05, the sinterability of the second electrode layer E2 located on the peripheral side in the Z-axis direction can be kept lower than that of the first electrode layer E1 located on the central side in the Z-axis direction. Therefore, cracks in the ceramic body 31 can be effectively suppressed. Cut.

[0120] <Other Embodiments> Although embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above, and various modifications can be made without departing from the spirit of the invention. For example, embodiments of the present invention can be embodiments that combine the embodiments described above.

[0121] The means for controlling the sinterability of the peripheral internal electrode and the central internal electrode (second electrode layer) are not limited to the examples described above. For example, by having the central internal electrode (first electrode layer) contain more sintering aid than the peripheral internal electrode (second electrode layer), the sinterability of the peripheral internal electrode (second electrode layer) can be reduced compared to that of the central internal electrode. Known sintering aids can be used, such as manganese (Mn), magnesium (Mg), silicon (Si), etc.

[0122] Alternatively, the average particle size of the conductive powder contained in the second electrode layer may be larger than the average particle size of the conductive powder contained in the first electrode layer. By increasing the particle size of the conductive powder, the surface area per unit volume (or unit mass) of the conductive powder can be reduced. In other words, by increasing the particle size of the conductive powder, the conductive powder becomes less prone to burning, and its sinterability can be reduced.

[0123] Furthermore, in the manufacturing method of a multilayer ceramic capacitor, a part of the external electrode formation process in step S06 may be performed before the firing process in step S05. For example, the application of the conductive paste for forming the external electrodes in step S06 may be performed before step S05, and the sintering of the ceramic body 11 and the firing of the external electrodes may be performed simultaneously.

[0124] Furthermore, the present invention is applicable not only to multilayer ceramic capacitors but also to all multilayer ceramic electronic components having a laminate and a pair of side margins. Examples of multilayer ceramic electronic components to which the present invention can be applied, other than multilayer ceramic capacitors, include chip varistors, chip thermistors, and multilayer inductors. [Examples]

[0125] [Test Example 1] As Test Example 1, an embodiment of the first embodiment of the present invention will be described. In the following description, "parts" refers to "parts by mass".

[0126] First, several conductive pastes A to F with different compositions were prepared. Conductive pastes A to F contained conductive powder made of Ni and an organic vehicle such as an organic solvent, and further contained 0 to 25 parts by mass of ceramic powder per 100 parts by mass of conductive powder. The average particle size of the conductive powder was 150 nm. The ceramic powder mainly consisted of barium titanate, and its average particle size was 30 nm. Table 1 shows the proportion of ceramic powder in conductive pastes A to F.

[0127] [Table 1]

[0128] Each sample of the multilayer ceramic capacitor was fabricated according to the manufacturing method described above. First, we fabricated several ceramic green sheets with barium titanate as the main component. The average particle size of the ceramic powder in this ceramic green sheet was set to approximately 150 nm. For the central ceramic sheet, one of the conductive pastes A to F was printed onto the ceramic green sheet, and this printed film was used as the first electrode layer. Similarly, for the peripheral ceramic sheet, one of the conductive pastes A to F was printed onto the ceramic green sheet, and this printed film was used as the second electrode layer. For the cover ceramic sheet, a ceramic green sheet without conductive paste printing was prepared. The types of conductive paste used in each sample are shown in Table 2.

[0129] [Table 2]

[0130] Of samples 1-1 to 1-14, samples 1-2, 1-4, 1-5, 1-9, 1-11, 1-12, and 1-14, in which the proportion of ceramic powder in the second electrode layer is greater than the proportion of ceramic powder in the first electrode layer, correspond to the examples of this embodiment. The other samples correspond to comparative examples of this embodiment.

[0131] Next, a laminated sheet was fabricated by stacking a predetermined number of cover ceramic sheets, 130 layers of peripheral ceramic sheets, 390 layers of central ceramic sheets, 130 layers of peripheral ceramic sheets, and a predetermined number of cover ceramic sheets. Steps S03 to S06 were performed on this laminated sheet to produce a sample of a multilayer ceramic capacitor.

[0132] Each sample was fabricated with dimensions of 1.0 mm in the X-axis direction, 0.5 mm in the Y-axis direction, and 0.8 mm in the Z-axis direction. The average thickness of the ceramic layer and internal electrodes after firing was approximately 0.6 μm, and the thickness of the cover portion was 35 μm.

[0133] All six sides of each fabricated multilayer ceramic capacitor sample were visually inspected to evaluate the presence or absence of cracks. The results are shown in Table 2.

[0134] As shown in Table 2, cracks occurred in samples 1-1, 1-3, 1-6, 1-7, 1-8, 1-10, and 1-13, where the ceramic powder content in the second electrode layer was less than or equal to the ceramic powder content in the first electrode layer. In contrast, no cracks occurred in samples 1-2, 1-4, 1-5, 1-9, 1-11, 1-12, and 1-14, where the ceramic powder content in the second electrode layer was greater than that in the first electrode layer. This indicates that crack formation can be suppressed by increasing the ceramic powder content in the second electrode layer compared to that in the first electrode layer.

[0135] [Test Example 2] As Test Example 2, an embodiment of the second embodiment of the present invention will be described.

[0136] First, several conductive pastes C, G, and H with different compositions were prepared. Note that conductive paste C is the same as conductive paste C used in Test Example 1. Conductive pastes C, G, and H each contain a conductive powder made of Ni and an organic vehicle such as an organic solvent, and further contain 10 parts by mass of ceramic powder per 100 parts by mass of conductive powder. Conductive pastes C, G, and H contain ceramic powders with different average particle sizes. The average particle sizes of the conductive powder and ceramic powder in conductive pastes A to F are shown in Table 3.

[0137] [Table 3]

[0138] Each sample of the multilayer ceramic capacitor was prepared in the same manner as in Test Example 1. The type of conductive paste used in each sample is shown in Table 4. Of samples 2-1 to 2-7, samples 2-2, 2-3, and 2-5, in which the average particle size of the ceramic powder in the second electrode layer is larger than the average particle size of the ceramic powder in the first electrode layer, correspond to the examples of this embodiment. The other samples correspond to comparative examples of this embodiment.

[0139] [Table 4]

[0140] All six sides of each fabricated multilayer ceramic capacitor sample were visually inspected to evaluate the presence or absence of cracks. The results are shown in Table 4.

[0141] As shown in Table 4, cracks occurred in samples 2-1, 2-4, 2-6, and 2-7, where the average particle size of the ceramic powder in the second electrode layer was less than or equal to the average particle size of the ceramic powder in the first electrode layer. In contrast, no cracks occurred in samples 2-2, 2-3, and 2-5, where the average particle size of the ceramic powder in the second electrode layer was greater than the average particle size of the ceramic powder in the first electrode layer. This indicates that crack formation can be suppressed by making the average particle size of the ceramic powder in the second electrode layer greater than the average particle size of the ceramic powder in the first electrode layer.

[0142] [Test Example 3] As Test Example 3, an embodiment of the third embodiment of the present invention will be described.

[0143] The conductive paste C used in Test Examples 1 and 2 was prepared. Then, samples 3-1 to 3-5 of multilayer ceramic capacitors were manufactured in the same manner as in Test Example 1. However, in samples 3-1 to 3-5, the coating thickness of the conductive paste C in the first and second electrode layers was set as shown in Table 5. The number of layers of the first and second electrode layers in each sample was also set as shown in Table 5. Of samples 3-1 to 3-5, samples 3-1 and 3-2, in which the coating thickness of the second electrode layer is thicker than the coating thickness of the first electrode layer, correspond to the examples of this embodiment. The other samples correspond to comparative examples of this embodiment.

[0144] [Table 5]

[0145] All six sides of each fabricated multilayer ceramic capacitor sample were visually inspected to evaluate the presence or absence of cracks. The results are shown in Table 5.

[0146] As shown in Table 5, cracks occurred in samples 3-3, 3-4, and 3-5, where the thickness of the conductive paste applied to the second electrode layer was less than or equal to the thickness of the conductive paste applied to the first electrode layer. In contrast, no cracks occurred in samples 3-1 and 3-2, where the thickness of the conductive paste applied to the second electrode layer was greater than the thickness of the conductive paste applied to the first electrode layer. This indicates that crack formation can be suppressed by making the thickness of the conductive paste applied to the second electrode layer greater than the thickness of the conductive paste applied to the first electrode layer. [Explanation of symbols]

[0147] 10,30 Multilayer ceramic capacitors 11,31 Ceramic body 12a,12b,32a,32b Internal electrode 121,321 First peripheral internal electrode 122,322 Second peripheral internal electrode 123,323 Central internal electrode 13a,13b External electrode 15a, 15b Side margin section 16,36 Electrode stacked section 161,361 First Peripheral Region 162,362 Second peripheral region 163,363 central area 17a, 17b Cover section 18 Ceramic layer R ceramic particles

Claims

1. An electrode stacking portion comprising: a plurality of ceramic layers stacked in the first axial direction; and a plurality of internal electrodes disposed between the plurality of ceramic layers and alternately drawn out on both sides along a second axis perpendicular to the first axis; The electrode stacked portion is sandwiched between the first and second cover portions which face each other in the first axial direction, The electrode stacking portion is flanked by first and second side margin portions facing each other in a third axial direction perpendicular to the first and second axes, A ceramic body having, The first and second external electrodes are connected to the plurality of internal electrodes and face each other in the second axial direction with the ceramic body in between, It is equipped with, The dimension in the first axial direction is configured to be larger than the dimension in the third axial direction. The plurality of internal electrodes contain ceramic particles, A plurality of first peripheral internal electrodes are arranged together at the first axial peripheral edge on the first cover portion side, A plurality of second peripheral internal electrodes are arranged together at the first axial peripheral edge on the second cover portion side, It is composed of a plurality of central internal electrodes that are arranged together on the second axial side of the plurality of first and second peripheral internal electrodes, Each of the plurality of first and second peripheral internal electrodes has a larger average particle size of ceramic particles than each of the plurality of central internal electrodes. Multilayer ceramic electronic components.

2. A multilayer ceramic electronic component according to claim 1, The multiple internal electrodes are aligned such that the positions of their ends in the third axial direction are within a range of 0.5 μm in the third axial direction. Multilayer ceramic electronic components.

3. A multilayer ceramic electronic component according to claim 1 or 2, The electrode stacking portion is arranged along the first axial direction, The first peripheral region in which the plurality of first peripheral internal electrodes are arranged, The central region in which the plurality of central internal electrodes are arranged, The region is divided into a second peripheral region where the plurality of second peripheral internal electrodes are arranged, The dimensions of each of the first and second peripheral regions in the first axial direction are 10% to 30% of the dimensions of the electrode stack portion in the first axial direction. Multilayer ceramic electronic components.

4. Prepare a plurality of central ceramic sheets on which a first electrode layer is formed, a plurality of peripheral ceramic sheets on which a second electrode layer with lower sinterability than the first electrode layer is formed, and a plurality of cover ceramic sheets that do not contain internal electrodes. By stacking the plurality of central ceramic sheets in the first axial direction, stacking the plurality of peripheral ceramic sheets on both sides of the stacked plurality of central ceramic sheets in the first axial direction, and stacking the plurality of cover ceramic sheets on both sides of the stacked plurality of peripheral ceramic sheets in the first axial direction, a laminated chip is formed having first and second sides perpendicular to the second axis which is perpendicular to the first axis, with the ends of the first and second electrode layers exposed. First and second side margin portions are formed on the first and second sides of the stacked chip. By firing the unfired ceramic body having the laminated chip and the first and second side margin portions, a ceramic body is fired in which the dimension in the first axial direction is larger than the dimension in the second axial direction. The first and second electrode layers contain ceramic powder, The second electrode layer has a larger average particle size of the ceramic powder than the first electrode layer. A method for manufacturing multilayer ceramic electronic components.

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