Printed circuit board
The printed circuit board addresses peeling issues by using a conductor circuit with a dual trapezoidal metal seed layer and gaps filled with a second resin insulating layer, ensuring stability even with narrow conductor dimensions.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-11
- Publication Date
- 2026-03-24
AI Technical Summary
In printed wiring boards with small conductor circuit widths and thicknesses, the contact area between the conductor circuit and the resin insulating layer decreases, leading to potential peeling issues.
The printed circuit board design includes a conductor circuit with a seed layer composed of two trapezoidal layers of different metals, separated by gaps, which are filled with a second resin insulating layer, increasing the contact area and preventing peeling.
This design enhances the contact area between the conductor circuit and the resin insulating layer, preventing peeling even with small conductor widths and thicknesses, and serves as an anchor to maintain structural integrity.
Smart Images

Figure 2026052395000001_ABST
Abstract
Description
Technical Field
[0001] The technology disclosed by this specification relates to a printed wiring board.
Background Art
[0002] Patent Document 1 discloses a printed wiring board having a resin substrate, a resin insulating layer formed on the resin substrate, and a conductor circuit formed on the resin insulating layer. The conductor circuit is formed of an alloy layer on the resin insulating layer, an electroless plating film on the alloy layer, and an electrolytic plating film on the electroless plating film. The alloy layer and the electroless plating film are formed of different metals. The alloy layer and the electroless plating film formed on the resin insulating layer during the formation of the conductor circuit are simultaneously removed by etching.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
[0004] [Problems of Patent Document 1] In the printed wiring board of Patent Document 1, when the width and thickness of the conductor circuit become small, the contact area between the conductor circuit and the resin insulating layer covering the conductor circuit decreases. It is considered that peeling is likely to occur between the conductor circuit and the resin insulating layer covering the conductor circuit.
Means for Solving the Problems
[0005] The printed circuit board of the present invention comprises a first resin insulating layer, a conductor circuit formed on the first resin insulating layer, and a second resin insulating layer formed on the first resin insulating layer and the conductor circuit. The conductor circuit is formed of a seed layer formed on the first resin insulating layer and an electrolytic copper plating layer formed on the seed layer. The seed layer has a first layer formed on the first resin insulating layer and a second layer formed on the first layer. The first layer and the second layer are made of different metals. The cross-sectional shape of the first layer is substantially trapezoidal, and the lower base of the first layer is shorter than the upper base of the first layer. The cross-sectional shape of the second layer is substantially trapezoidal, and the lower base of the second layer is shorter than the upper base of the second layer. The upper base of the first layer is located at the interface between the first layer and the second layer. The lower base of the second layer is located at the interface between the first layer and the second layer. The lower base of the first layer is in contact with the first resin insulating layer. In cross-section, a first gap is formed between the first resin insulating layer and the legs of the first layer. In cross-section, a second gap is formed between the upper bottom of the first layer and the legs of the second layer. The second resin insulating layer fills the first gap and the second gap.
[0006] The conductor circuit of the printed circuit board in the embodiment of the present invention includes a seed layer consisting of a first layer and a second layer. The seed layer has a first gap and a second gap in cross-section. The second resin insulating layer fills the first gap and the second gap. The embodiment can increase the contact area between the conductor circuit and the second resin insulating layer covering the conductor circuit. The embodiment can prevent peeling between the conductor circuit and the second resin insulating layer covering the conductor circuit. [Brief explanation of the drawing]
[0007] [Figure 1] A schematic cross-sectional view showing a printed circuit board of the embodiment. [Figure 2A] A schematic cross-sectional view illustrating the manufacturing method of a printed circuit board according to this embodiment. [Figure 2B] A schematic cross-sectional view illustrating the manufacturing method of a printed circuit board according to this embodiment. [Figure 2C] A schematic cross-sectional view illustrating the manufacturing method of a printed circuit board according to this embodiment. [Figure 2D]A schematic cross-sectional view illustrating the manufacturing method of a printed circuit board according to this embodiment. [Figure 2E] A schematic cross-sectional view illustrating the manufacturing method of a printed circuit board according to this embodiment. [Modes for carrying out the invention]
[0008] [Embodiment] Figure 1 is a cross-sectional view showing a printed circuit board 2 of an embodiment. As shown in Figure 1, the printed circuit board 2 has a first resin insulating layer 4, a conductor circuit 10, and a second resin insulating layer 20.
[0009] The first resin insulating layer 4 is formed using a resin. An example of the resin is a thermosetting resin. The first resin insulating layer 4 may contain inorganic particles such as silica. The first resin insulating layer 4 may also contain reinforcing materials such as glass cloth. The first resin insulating layer 4 has a third surface 6 and a fourth surface 8 opposite to the third surface 6.
[0010] The conductive circuit 10 is formed on the third surface 6 of the first resin insulating layer 4. Although not shown in the figure, other conductive circuits are also formed on the third surface 6. The conductive circuit 10 is mainly made of copper. The conductive circuit 10 is formed of a seed layer 11 formed on the first resin insulating layer 4 and an electrolytic copper plating layer 16 formed on the seed layer 11. The seed layer 11 has a first layer 12 formed on the third surface 6 and a second layer 14 formed on the first layer 12. The first layer 12 and the second layer 14 are made of different metals. For example, the first layer 12 is made of titanium and the second layer 14 is made of copper. The first layer 12 and the second layer 14 are formed by sputtering. When the conductive circuit 10 is formed, the first layer 12 and the second layer 14 formed on the first resin insulating layer 4 are removed separately by etching.
[0011] The cross-sectional shapes of the first layer 12 and the second layer 14 are approximately trapezoidal. The lower base 12a of the first layer 12 is in contact with the third surface 6 of the first resin insulating layer 4. The upper base 12b of the first layer 12 is located at the interface between the first layer 12 and the second layer 14. The lower base 12a is shorter than the upper base 12b. The lower base 14a of the second layer 14 is located at the interface between the first layer 12 and the second layer 14. The upper base 14b of the second layer 14 is located at the interface between the second layer 14 and the electrolytic copper plating layer 16. The lower base 14a is shorter than the upper base 14b. In the cross-section, a first gap 52 is formed between the third surface 6 of the first resin insulating layer 4 and the leg 12c of the first layer 12. In the cross-section, a second gap 54 is formed between the upper base 12b of the first layer 12 and the leg 14c of the second layer 14.
[0012] The electrolytic copper plating layer 16 is made of copper. The electrolytic copper plating layer 16 is made of electrolytic copper plating.
[0013] The second resin insulating layer 20 is formed on the third surface 6 of the first resin insulating layer 4 and on the conductor circuit 10. The second resin insulating layer 20 has a first surface 22 and a second surface 24 opposite to the first surface 22. The second surface 24 of the second resin insulating layer 20 faces the third surface 6 and the conductor circuit 10. The second resin insulating layer 20 is formed of resin and numerous inorganic particles dispersed within the resin. The resin is an epoxy resin. Examples of resins are thermosetting resins and photocurable resins. Examples of inorganic particles are glass particles and alumina particles. The second resin insulating layer 20 fills the first gap 52 and the second gap 54.
[0014] [Manufacturing method of printed circuit board 2 according to the embodiment] Figures 2A to 2E show a manufacturing method for a printed circuit board 2 according to an embodiment. Figures 2A to 2E are cross-sectional views. As shown in Figure 2A, a first resin insulating layer 4 is prepared. A first layer 12 is formed on the third surface 6 of the first resin insulating layer 4 by sputtering. The first layer 12 is made of titanium. A second layer 14 is formed on the first layer 12 by sputtering. The second layer 14 is made of copper. As shown in Figure 2B, a seed layer 11 is formed on the third surface 6 of the first resin insulating layer 4. The seed layer 11 covers the entire third surface 6.
[0015] A plating resist is formed on the seed layer 11. The plating resist has openings for forming the conductive circuit 10. An electrolytic copper plating layer 16 is formed on the seed layer 11 exposed from the plating resist. The electrolytic copper plating layer 16 is made of copper. The electrolytic copper plating layer 16 fills the openings. The plating resist is removed. As shown in Figure 2C, the seed layer 11 is partially covered by the electrolytic copper plating layer 16.
[0016] As shown in Figure 2D, the second layer 14 exposed from the electrolytic copper plating layer 16 is selectively removed by etching. For example, etching is performed by spraying. An example of an etching solution is the MEC Bright QE series manufactured by MEC. For example, by adjusting the spray pressure and the concentration of the etching solution, the cross-sectional shape of the second layer 14 is formed to be approximately trapezoidal. The lower base 14a of the second layer 14 is located at the interface between the first layer 12 and the second layer 14. The upper base 14b of the second layer 14 is located at the interface between the second layer 14 and the electrolytic copper plating layer 16. The lower base 14a is shorter than the upper base 14b. A second gap 54 is formed between the legs 14c of the first layer 12 and the second layer 14.
[0017] As shown in Figure 2E, the electrolytic copper plating layer 16 and the first layer 12 exposed from the second layer 14 are selectively removed by etching. For example, etching is performed by spraying. An example of an etching solution is TI-101 manufactured by Kanto Chemical Co., Ltd. For example, by adjusting the spray pressure and the concentration of the etching solution, the cross-sectional shape of the first layer 12 is formed to be approximately trapezoidal. The lower base 12a of the first layer 12 is in contact with the third surface 6 of the first resin insulating layer 4. The upper base 12b of the first layer 12 is located at the interface between the first layer 12 and the second layer 14. The lower base 12a is shorter than the upper base 12b. A first gap 52 is formed between the third surface 6 and the legs 12c of the first layer 12. A conductive circuit 10 is formed. When the conductive circuit 10 is formed, the first layer 12 and the second layer 14 are removed individually. When the conductive circuit 10 is formed, a first gap 52 and a second gap 54 are formed.
[0018] A second resin insulating layer 20 is formed on the first resin insulating layer 4 and the conductor circuit 10. A second surface 24 of the second resin insulating layer 20 faces a third surface 6 of the conductor circuit 10 and the first resin insulating layer 4. The second resin insulating layer 20 fills the first gap 52 and the second gap 54. The printed wiring board 2 of the embodiment is obtained.
[0019] The conductor circuit 10 of the printed wiring board 2 of the embodiment includes a seed layer 11 composed of a first layer 12 and a second layer 14. The seed layer 11 has the first gap 52 and the second gap 54 in cross section. The second resin insulating layer 20 fills the first gap 52 and the second gap 54. The embodiment can increase the contact area between the conductor circuit 10 and the second resin insulating layer 20. The gaps 52 and 54 can serve as an anchor. The embodiment can prevent peeling between the conductor circuit 10 and the second resin insulating layer 20. Even when the width and thickness of the conductor circuit are small, the embodiment can prevent peeling between the conductor circuit 10 and the second resin insulating layer 20.
Description of Reference Numerals
[0020] 2: Printed wiring board 4: First resin insulating layer 10: Conductor circuit 11: Seed layer 12: First layer 12a: Lower bottom of the first layer 12b: Upper bottom of the first layer 12c: Leg of the first layer 14: Second layer 14a: Lower bottom of the second layer [[ID=3D]] 14b: Upper bottom of the second layer 14c: Leg of the second layer 16: Electrolytic copper plating layer 20: Second resin insulating layer 52: First gap 54: Second gap
Claims
1. First resin insulating layer, A conductor circuit formed on the first resin insulating layer, A printed wiring board having the first resin insulating layer and a second resin insulating layer formed on the conductor circuit, The conductor circuit is formed of a seed layer formed on the first resin insulating layer and an electrolytic copper plating layer formed on the seed layer. The seed layer has a first layer formed on the first resin insulating layer and a second layer formed on the first layer. The first layer and the second layer are made of different metals. The cross-sectional shape of the first layer is approximately trapezoidal, and the lower base of the first layer is shorter than the upper base of the first layer. The cross-sectional shape of the second layer is approximately trapezoidal, and the lower base of the second layer is shorter than the upper base of the second layer. The upper bottom of the first layer is located at the interface between the first layer and the second layer. The lower bottom of the second layer is located at the interface between the first layer and the second layer. The bottom of the first layer is in contact with the first resin insulating layer. In the cross-section, a first gap is formed between the first resin insulating layer and the legs of the first layer. In the cross-section, a second gap is formed between the upper bottom of the first layer and the legs of the second layer. The second resin insulating layer fills the first gap and the second gap.
2. A printed circuit board according to claim 1, wherein the first layer and the second layer, which are formed on the first resin insulating layer when the conductor circuit is formed, are removed separately by etching.
3. A printed circuit board according to claim 1, wherein the first layer is made of titanium and the second layer is made of copper.
4. A printed circuit board according to claim 1, wherein the first layer and the second layer are formed by sputtering.
Citation Information
Patent Citations
Printed wiring board
JP2000124602A