Vertical flip-chip light-emitting element and method for manufacturing a vertical flip-chip light-emitting element

Abstract

The present invention provides a vertical flip-chip type light-emitting element and a method for manufacturing a vertical flip-chip type light-emitting element. [Solution] A vertical flip-chip type light-emitting element comprising a die group including two dies and a first-type semiconductor connector connected between the first-type semiconductor layers of the two dies; two first pads, the first of which is provided below the first of the two dies and the second of which corresponds to but does not directly contact the second of the two dies; two second pads, the first of which is provided above the first of the two dies and the second of which is provided above the second of the two dies; and an electrical connection layer electrically connected to the two second pads and the second of the two first pads. This provides a self-compensating function, as current can still flow to a normal die even if a die is damaged.

Description

Technical Field

[0004] , ,

[0005] ,

[0001] The present invention relates to a light emitting element and a method for manufacturing a light emitting element, and particularly to a vertical flip chip type light emitting element and a method for manufacturing a vertical flip chip type light emitting element.

Background Art

[0002] With the development of technology, the size of light emitting diodes (LEDs) has been reduced, enabling applications to more products such as displays like Mini LEDs and Micro LEDs. Also, Chips on Board (COB) has become widely popular because the die can be directly attached to the circuit board or substrate.

Summary of the Invention

Problems to be Solved by the Invention

[0003] The flip chip type light emitting diode die can be directly connected to the substrate in a lead - free manner, making it an optimal option for COB. However, since there is no protection by the package layer, it is not easy to repair when the flip chip type light emitting diode die is damaged, and there is room for improvement.

Means for Solving the Problems

[0004] To solve the above problems, the present invention provides a vertical flip chip type light emitting element and a method for manufacturing a vertical flip chip type light emitting element, and by the structural arrangement of the vertical flip chip type light emitting element, a self - compensation function can be provided without the need for repair work.

[0005] According to an embodiment of the present invention, a die group includes two dies each containing a type first semiconductor layer, an active layer, and a type second semiconductor layer, and a type first semiconductor connection portion connected between the type first semiconductor layers of the two dies; two first pads, the first of which is provided below the first of the two dies or below the type first semiconductor connection portion, and the second of which corresponds to but does not directly contact the second of the two dies; and two second pads, the first of which is provided on the first of the two dies and the second of which is provided on the second of the two dies. A vertical flip-chip type light-emitting element is provided, comprising two second pads and an electrical connection layer electrically connected to the second of two first pads, wherein a first current branch flows through the first of the two first pads, the first of the two dies, the first of the two second pads, the electrical connection layer, and the second of the two first pads, and a second current branch flows through the first of the two first pads, the first type semiconductor connection, the second of the two dies, the second of the two second pads, the electrical connection layer, and the second of the two first pads.

[0006] This design allows the two dies to have a vertical light-emitting diode structure, and by electrically connecting them to two first pads via a first semiconductor connector and sharing the first pads, the functionality of easily soldering the flip-chip light-emitting diode can be further enhanced. Furthermore, if the first of the two dies is damaged, current can still flow to the normal die, allowing it to emit light, thus providing a self-compensating function and eliminating the need for separate repairs.

[0007] According to the vertical flip-chip light-emitting element of the embodiment, an insulating layer may further be provided directly beneath the second of the two dies. At least a portion of the second of the two first pads is located beneath the insulating layer.

[0008] The vertical flip-chip light-emitting element of the embodiment may further include a first protective layer covering two dies, each containing two openings corresponding to two second pads, and exposing the two second pads. An electrical connection layer is located on the first protective layer and is electrically connected to the two second pads exposed through the two openings.

[0009] According to the vertical flip-chip type light-emitting element of the embodiment, the second of the two first pads may include a metal top surface that is not shielded by an insulating layer, an extension of the first protective layer extends to the metal top surface via the outer sidewall of the second of the two dies, the outer sidewall separates from the first of the two dies, and the electrical connection layer is located outside the extension and extends to the metal top surface.

[0010] In the vertical flip-chip type light-emitting element of the embodiment, the metal upper surface is aligned with the insulating upper surface of the insulating layer, and the metal lower surface of the first of the two first pads may be aligned with the metal lower surface of the second of the two first pads.

[0011] The vertical flip-chip type light-emitting element of the embodiment may further include a second protective layer that covers the electrical connection layer.

[0012] According to another embodiment of the present invention, the process includes: an epitaxial structure formation step of forming an epitaxial structure on a raw substrate; a first pad formation step of forming a plurality of first pad groups on the epitaxial structure, each first pad group comprising two first pads and an insulating layer, wherein the first of the two first pads in each first pad group is connected to the proximal side of the insulating layer, the second of the two first pads in each first pad group covers the distal side of the insulating layer, and the first and second of the two first pads in each first pad group do not directly contact each other; a raw substrate removal step of attaching the plurality of first pads to a temporary substrate and removing the raw substrate; and etching the epitaxial structure to form a plurality of die groups, each die group comprising two dies and a type 1 semiconductor connection portion, each die comprising a type 1 semiconductor layer, an active layer, and a type 2 semiconductor layer, the type 1 semiconductor connection portion being connected between the type 1 semiconductor layers of the two dies, and each die group corresponding to each first pad group. However, the present invention provides a method for manufacturing a vertical flip-chip type light-emitting element, comprising: an etching step in which the first of two first pads of each first pad group is directly adhered to the first of two dies of each die group, and the insulating layer of each first pad group is directly adhered to the second of two dies of each die group; a second pad forming step in which a plurality of second pad groups are formed, each corresponding to the plurality of die groups, wherein each second pad group includes two second pads, the first of the two second pads of each second pad group is provided on the first of the two dies of each die group, and the second of the two second pads of each second pad group is provided on the second of the two dies of each die group; and an electrical connection layer forming step in which a plurality of electrical connection layers are formed, each corresponding to the plurality of die groups, wherein each electrical connection layer is electrically connected to the two second pads of each second pad group and the second of the two first pads of each first pad group.

[0013] The manufacturing method for a vertical flip-chip type light-emitting element of the embodiment further comprises a first protective layer forming step, in which a plurality of first protective layers are formed, each corresponding to a plurality of die groups, each first protective layer covers a plurality of die groups and includes two openings, the two openings of each first protective layer correspond to two second pads of each die group, exposing two second pads of each second pad group, each electrical connection layer is located on each first protective layer, and each electrical connection layer is electrically connected to the two second pads exposed from the two openings in each second pad group.

[0014] The method for manufacturing a vertical flip-chip type light-emitting element of the embodiment may further include a second protective layer formation step in which a plurality of second protective layers corresponding to the plurality of die groups are formed, and each second protective layer covers each electrical connection layer.

[0015] In the first protective layer formation step, each extension of the first protective layer extends through the outer sidewalls of the second of the two dies in each die group to the metal upper surface of the second of the two first pads in the corresponding first pad group. In the electrical connection layer formation step, each electrical connection layer is located outside the extension of each first protective layer and may extend to the metal upper surface of the second of the two first pads in the corresponding first pad group. [Brief explanation of the drawing]

[0016] [Figure 1] This is a schematic side view showing a vertical flip-chip type light-emitting element according to one embodiment of the present invention. [Figure 2] This is a process flow diagram showing a method for manufacturing a vertical flip-chip type light-emitting element according to another embodiment of the present invention. [Figure 3] Figure 2 is a schematic side view illustrating the manufacturing process of a vertical flip-chip type light-emitting element using the manufacturing method of the vertical flip-chip type light-emitting element described in the embodiment. [Figure 4] This is another schematic side view of the manufacturing process, showing how a vertical flip-chip type light-emitting element is manufactured using the manufacturing method of the vertical flip-chip type light-emitting element in the embodiment shown in Figure 2. [Figure 5]This is yet another schematic diagram illustrating the manufacturing process of a vertical flip-chip type light-emitting element using the manufacturing method of the vertical flip-chip type light-emitting element in the embodiment shown in Figure 2. [Figure 6] Figure 2 is a schematic bottom view showing the manufacturing process of a vertical flip-chip type light-emitting element using the manufacturing method of the vertical flip-chip type light-emitting element in the embodiment shown. [Figure 7] Figure 2 is a schematic top view showing the manufacturing process of a vertical flip-chip type light-emitting element using the manufacturing method of the vertical flip-chip type light-emitting element in the embodiment shown. [Modes for carrying out the invention]

[0017] Embodiments of the present invention will be described below with reference to the drawings, and many practical details will be described in the following description for clarity. However, the reader should understand that these practical details are not intended to limit the present invention. In other words, in some embodiments of the present invention, these practical details are not necessary. Also, in order to simplify the drawings, some conventional structures and elements are shown simply and schematically in the drawings, and repeated elements may be indicated by the same or similar reference numerals.

[0018] Furthermore, terms such as "first," "second," and "third" in this text are merely used to describe different elements or components and do not restrict the elements / components themselves; therefore, "first element / component" may be replaced with "second element / component." Moreover, the combinations of elements / components / mechanisms / modules in this text are not common or conventional combinations generally known in this art, and whether the combination relationship can be easily completed by a person skilled in the art should not be judged based on whether the elements / components / mechanisms / modules themselves are conventional. In addition, directions such as "up" and "down" in this text refer only to relative positional relationships and do not refer to the up and down directions during use.

[0019] Refer to FIG. 1. FIG. 1 is a schematic side view showing a vertical flip-chip type light-emitting device 1000 according to an embodiment of the present invention. The vertical flip-chip type light-emitting device 1000 includes a die group 1100, two first pads 1210 and 1220, two second pads 1310 and 1320, and an electrical connection layer 1400.

[0020] The die group 1100 includes two dies 1110 and 1120 and a first-type semiconductor connection portion 1130. Each of the dies 1110 and 1120 includes a first-type semiconductor layer 1111 and 1121, an active layer 1113 and 1123, and a second-type semiconductor layer 1112 and 1122. The first-type semiconductor connection portion 1130 is connected between the first-type semiconductor layers 1111 and 1121 of the two dies 1110 and 1120.

[0021] The first one of the two first pads 1210 and 1220 (i.e., the first pad 1210, hereinafter referred to as the first pad 1210) is provided under the first one of the two dies 1110 and 1120 (i.e., the die 1110, hereinafter referred to as the die 1110) or under the first-type semiconductor connection portion 1130. The second one of the two first pads 1210 and 1220 (i.e., the first pad 1220, hereinafter referred to as the first pad 1220) corresponds to the second one of the two dies 1110 and 1120 (i.e., the die 1120) but does not directly contact it. The first one of the two second pads 1310 and 1320 (i.e., the second pad 1310, hereinafter referred to as the second pad 1310) is provided on the die 1110. The second one of the two second pads 1310 and 1320 (i.e., the second pad 1320, hereinafter referred to as the second pad 1320) is provided on the die 1120. The electrical connection layer 1400 is electrically connected to the two second pads 1310 and 1320 and the first pad 1220.

[0022] The first shunt current I1 in the current flows through the first pad 1210, the die 1110, the second pad 1310, the electrical connection layer 1400, and the first pad 1220. The second shunt current I2 in the current flows through the first pad 1210, the first-type semiconductor connection portion 1130, the die 1120, the second pad 1320, the electrical connection layer 1400, and the first pad 1220.

[0023] In this way, the two dies 1110 and 1120 have a vertical light-emitting diode structure, and are electrically connected to the two first pads 1210 and 1220 through the first-type semiconductor connection part 1130 and share the two first pads 1210 and 1220, so that the soldering function of the flip-chip type light-emitting diode can be further achieved easily. Also, when the first one of the two dies 1110 and 1120 is damaged, the current can still flow to the normal dies 1110 and 1120 to emit light, so it has a self-compensation function and there is no need for separate repair.

[0024] In each die 1110 and 1120, the first-type semiconductor layers 1111 and 1121 are, for example, N-type nitride semiconductor laminates, such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), aluminum indium gallium nitride (AlInGaN), or indium gallium nitride (InGaN) doped with N-type impurities. The active layers 1113 and 1123 can use quantum wells, for example, multiple quantum wells. The second-type semiconductor layers 1112 and 1122 are, for example, P-type nitride semiconductor laminates, such as gallium nitride, aluminum gallium nitride, aluminum indium gallium nitride, or indium gallium nitride doped with P-type impurities. Examples of the materials used in the present invention are the same as the above, but are not limited thereto. The material of the first-type semiconductor connection part 1130 is the same as that of the first-type semiconductor layers 1111 and 1121, and may be formed simultaneously during manufacturing, and some materials can be removed by etching, but are not limited thereto.

[0025] The first pads 1210 and 1220 may be made of conductive metal. The vertical flip-chip type light-emitting element 1000 may further include an insulating layer 1230 provided directly beneath the die 1120, and at least a portion of the first pad 1220 is located beneath the insulating layer 1230. The first pad 1220 may also include a metal upper surface 1222a that is not shielded by the insulating layer 1230, and the metal upper surface 1222a may be aligned with the insulating upper surface 1231 of the insulating layer 1230. The metal lower surface 1211a of the first pad 1210 may be aligned with the metal lower surface 1221a of the first pad 1220.

[0026] Specifically, the insulating layer 1230 is located beneath the first type semiconductor layer 1121 of the die 1120, and its proximal side contacts the side edge of the first pad 1210. The first pad 1220 may include a welded portion 1221 and a protrusion 1222, where the welded portion 1221 is located beneath the insulating layer 1230 and does not contact the first pad 1210, and the protrusion 1222 is connected to the welded portion 1221 and is located distal to the insulating layer 1230. The metal upper surface 1222a refers to the surface of the protrusion 1222 closer to the die 1120 and may be at the same height as the insulating upper surface 1231. The metal lower surface 1211a of the first pad 1210 refers to the surface farther from the die 1120, and the metal lower surface 1221a of the first pad 1220 refers to the surface farther from the die 1120, and both are at the same height as each other. This can contribute to manufacturing and subsequent soldering applications.

[0027] The second pad 1310 may be provided on the die 1110, and the second pad 1320 may be provided on the die 1120, and both the second pad 1310 and the second pad 1320 are made of metal. The vertical flip-chip light-emitting element 1000 may further include a first protective layer 1500 that covers the two dies 1110 and 1120 and includes two openings (not shown) which each correspond to two second pads 1310 and 1320, exposing the two second pads 1310 and 1320. An electrical connection layer 1400 is located on the first protective layer 1500 and is electrically connected to the two second pads 1310 and 1320 exposed through the two openings. The extension 1510 of the first protective layer 1500 extends through the outer side wall of the die 1120 to the metal upper surface 1222a, the outer side wall separates from the die 1110, and the electrical connection layer 1400 is located outside the extension 1510 and extends to the metal upper surface 1222a.

[0028] Specifically, the first protective layer 1500 may further include an upper portion 1520 that covers the dies 1110, 1120 and the first type semiconductor connector 1130 to protect them, with an extension 1510 extending downward from the upper portion 1520 to cover the outer side wall of the die 1120. In this way, if the electrical connection layer 1400 extends from above to the metal upper surface 1222a and is connected to the first pad 1220, the extension 1510 can isolate the electrical connection layer 1400 from the die 1120. Furthermore, since the electrical connection layer 1400 needs to be electrically connected to the two second pads 1310 and 1320, two openings are provided in the upper part 1520 of the first protective layer 1500 in the portion corresponding to the two second pads 1310 and 1320, thereby exposing the two second pads 1310 and 1320 and facilitating the electrical connection layer 1400 to be electrically connected to the second pads 1310 and 1320.

[0029] As shown in Figure 1, the vertical flip-chip type light-emitting element 1000 may further include a second protective layer 1600 that covers the electrical connection layer 1400 and protects the outer side wall of the die 1110 (i.e., the exposed portion on the right side of Figure 1) and the portion located outside the extension 1510 of the electrical connection layer 1400. In this way, the electrical connection layer 1400 can be protected by the second protective layer 1600.

[0030] This allows the two first pads 1210 and 1220 to be soldered to the circuit board during application, enabling current to be supplied to the vertical flip-chip type light-emitting element 1000 via the two first pads 1210 and 1220. If both dies 1110 and 1120 are functioning correctly, the first current branch I1 can flow through the first pad 1210 to the first type semiconductor layer 1111, the active layer 1113, the second type semiconductor layer 1112 and the second pad 1310 of die 1110, and then flow back to the first pad 1220 along the electrical connection layer 1400. The second current branch I2 flows through the first pad 1210 to the first type semiconductor layer 1111 and the first type semiconductor connector 1130 of die 1110, the first type semiconductor layer 1121, the active layer 1123, the second type semiconductor layer 1122 and the second pad 1320 of die 1120, and then flows back to the first pad 1220 along the electrical connection layer 1400. Therefore, both dies 1110 and 1120 can emit light normally. If die 1110 is damaged, all the current flows along the path of the second current branch I2, causing die 1120 to emit light. Conversely, if die 1120 is damaged, all the current flows along the path of the first current branch I1, causing die 1110 to emit light. Therefore, if either die 1110 or die 1120 is damaged, the vertical flip-chip light-emitting element 1000 can still emit light, thus having a self-compensating function and not requiring separate repair. It should be noted that, in order to clearly show the structure of each layer, the thicknesses in Figure 1 are not drawn in actual proportions. For example, the thickness of the electrical connection layer 1400 is less than 100 nm, the thickness of the first protective layer 1500 is 40 μm to 50 μm, and the thickness of the second protective layer 1600 is 50 μm to 60 μm, and these are not limited to the figures shown.

[0031] Please refer to Figure 2. Figure 2 is a process flow diagram showing a method for manufacturing a vertical flip-chip type light-emitting element S2000 of another embodiment of the present invention. The method for manufacturing a vertical flip-chip type light-emitting element S2000 includes an epitaxial structure formation step S2100, a first pad formation step S2200, a raw substrate removal step S2300, an etching step S2400, a second pad formation step S2500, and an electrical connection layer formation step S2700.

[0032] Please refer to Figures 3, 4, and 5 in conjunction with Figure 2. Figure 3 is a schematic side view of the manufacturing process showing how a vertical flip-chip type light-emitting element 2000 is manufactured using the manufacturing method S2000 of the embodiment in Figure 2. Figure 4 is another schematic side view of the manufacturing process showing how a vertical flip-chip type light-emitting element 2000 is manufactured using the manufacturing method S2000 of the embodiment in Figure 2. Figure 5 is yet another schematic side view of the manufacturing process showing how a vertical flip-chip type light-emitting element 2000 is manufactured using the manufacturing method S2000 of the embodiment in Figure 2. The details of the manufacturing method S2000 of the vertical flip-chip type light-emitting element will be explained below, along with Figures 3, 4, and 5.

[0033] In the epitaxial structure formation step S2100, an epitaxial structure E1 is formed on the original substrate S1.

[0034] In the first pad formation step S2200, a plurality of first pad groups 2200 are formed on the epitaxial structure E1, each first pad group 2200 includes two first pads 2210 and 2220 and an insulating layer 2230, the first of the two first pads 2210 and 2220 of each first pad group 2200 (i.e., the first pad 2210, hereinafter referred to as the first pad 2210) is connected to the proximal side of the insulating layer 2230, the second of the two first pads 2210 and 2220 of each first pad group 2200 (i.e., the first pad 2220, hereinafter referred to as the first pad 2220) covers the distal side of the insulating layer 2230, and the first pads 2210 and 2220 of each first pad group 2200 do not come into direct contact.

[0035] In the raw substrate removal process S2300, multiple first pads 2210 and 2220 are attached to the temporary substrate T1 to remove the raw substrate S1.

[0036] In etching step S2400, the epitaxial structure E1 is etched to form a plurality of die groups 2100, each die group 2100 includes two dies 2110, 2120 and a type 1 semiconductor connection portion 2130, each die 2110, 2120 includes a type 1 semiconductor layer 2111, 2121, an active layer 2113, 2123 and a type 2 semiconductor layer 2112, 2122, and the type 1 semiconductor connection portion 2130 is connected between the type 1 semiconductor layers 2111, 2121 of the two dies 2110, 2120. The die group 2100 corresponds to each first pad group 2200, wherein the first pad 2210 of each first pad group 2200 is directly adhered to the first of the two dies 2110 and 2120 of each die group 2100 (i.e., die 2110, hereinafter referred to as die 2110), and the insulating layer 2230 of each first pad group 2200 is directly adhered to the second of the two dies 2110 and 2120 of each die group 2100 (i.e., die 2120, hereinafter referred to as die 2120).

[0037] In the second pad forming step S2500, a plurality of second pad groups 2300 are formed, each corresponding to the plurality of die groups 2100, wherein each second pad group 2300 includes two second pads 2310 and 2320, and the first of the two second pads 2310 and 2320 of each second pad group 2300 (i.e., the second pad 2310, hereinafter referred to as the second pad 2310) is provided on the die 2110, and the second of the two second pads 2310 and 2320 of each second pad group 2300 (i.e., the second pad 2320, hereinafter referred to as the second pad 2320) is provided on the die 2120 of each die group 2100.

[0038] In the electrical connection layer formation step S2700, a plurality of electrical connection layers 2400 are formed, each corresponding to one of the plurality of die groups 2100, wherein each electrical connection layer 2400 is electrically connected to two second pads 2310 and 2320 of each second pad group 2300 and to the first pad 2220 of each first pad group 2200.

[0039] The method for manufacturing a vertical flip-chip type light-emitting element, S2000, may further include a first protective layer forming step S2600 in which a plurality of first protective layers 2500 are formed, each corresponding to a plurality of die groups 2100, each first protective layer 2500 covers each die group 2100 and includes two openings 2501 and 2502, each of which the two openings 2501 and 2502 of the first protective layer 2500 corresponds to two second pads 2310 and 2320 of each second pad group 2300, exposing two second pads 2310 and 2320 of each second pad group 2300, each electrical connection layer 2400 is located on each first protective layer 2500, and each electrical connection layer 2400 is electrically connected to the two second pads 2310 and 2320 exposed from the two openings 2501 and 2502 in each second pad group 2300.

[0040] The method for manufacturing a vertical flip-chip type light-emitting element S2000 may further include a second protective layer forming step S2800 in which a plurality of second protective layers 2600 are formed, each corresponding to a plurality of die groups 2100, and each second protective layer 2600 covers each electrical connection layer 2400.

[0041] As shown in Figures 2 and 3, in the epitaxial structure formation step S2100, an epitaxial structure E1 can be formed using a conventional epitaxial growth method. This epitaxial structure E1 includes a type 2 semiconductor material, an active layer material, and a type 1 semiconductor material in order from the raw substrate S1 upwards. Subsequently, in the first pad formation step S2200, a plurality of first pad groups 2200 are formed on one side of the epitaxial structure E1. Furthermore, in order to form a second pad group 2300 on the other side of the epitaxial structure E1, in the raw substrate removal step S2300, the epitaxial structure E1 is first adhered to a temporary substrate T1, thereby allowing the raw substrate S1 to be removed and facilitating subsequent operations. It should be noted that the temporary substrate T1 may have a colloid T11 that is deformable when pressed, for adhesion to the first pad groups 2200. After the epitaxial structure E1 is adhered to the temporary substrate T1, the epitaxial structure E1 is turned upward and the etching process S2400 is performed again. In the etching process S2400, unnecessary parts are removed and the two dies 2110 and 2120 can be connected to form a die group 2100. In this case, of dies 2110 and 2120, only the first type semiconductor layer 2111 and the first type semiconductor layer 2121 are connected via the first type semiconductor connection part 2130, but the second type semiconductor layer 2112 and the second type semiconductor layer 2122 are not directly connected, nor are the active layer 2113 and the active layer 2123 directly connected.

[0042] As shown in Figures 2 and 4, the second pads 2310 and 2320 are formed in the second pad formation step S2500. Subsequently, the process moves to the first protective layer formation step S2600, where the extension portion 2510 of each first protective layer 2500 extends through the outer sidewall of the die 2120 of each die group 2100 to the metal upper surface of the first pad 2220 in the corresponding first pad group 2200. In other words, an upper portion 2520 that covers the two dies 2110 and 2120 of each die group 2100, and an extension portion 2510 that covers the outer sidewall of the die 2120 can be formed. After the upper portion 2520 covers the two dies 2110 and 2120 of each die group 2100, openings 2501 and 2502 are formed by etching to expose at least a portion of the surface of the second pads 2310 and 2320. Then, in the electrical connection layer formation step S2700, each electrical connection layer 2400 is positioned outside the extension portion 2510 of each first protective layer 2500 and extends to the metal upper surface of the first pad 2220 in the corresponding first pad group 2200, thereby completing the electrical connection of the second pad 2310, the second pad 2320, and the first pad 2220.

[0043] As shown in Figures 2 and 5, in the second protective layer formation step S2800, a second protective layer 2600 can be formed to complete multiple vertical flip-chip type light-emitting elements 2000. Furthermore, due to the process, the second protective layer 2600 can be connected to each vertical flip-chip type light-emitting element 2000, and then a portion of the second protective layer 2600 can be removed using a plasma bombardment method (without affecting colloid T11) to separate each vertical flip-chip type light-emitting element 2000.

[0044] Please also refer to Figure 6 in conjunction with Figure 5. Figure 6 is a schematic bottom view showing the manufacturing of a vertical flip-chip type light-emitting element 2000 by the manufacturing method S2000 of the embodiment in Figure 2. As shown in Figures 5 and 6, the separated vertical flip-chip type light-emitting element 2000 is transferred to the blue film B1 and the temporary substrate T1 is removed, making subsequent use easier.

[0045] Please also refer to Figure 7 in conjunction with Figures 5 and 6. Figure 7 is a schematic top view showing the manufacturing of a vertical flip-chip type light-emitting element 2000 by the manufacturing method S2000 of the embodiment in Figure 2. The vertical flip-chip type light-emitting element 2000 is joined to a circuit board P1 via solder pads and can emit light when current is supplied from the circuit board P1.

[0046] Although the present invention has been disclosed in the embodiments described above, these embodiments are not intended to limit the present invention, and any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention, and the scope of protection of the present invention should be based on the claims appended thereto. [Explanation of Symbols]

[0047] 1000, 2000: Vertical flip-chip type light-emitting element 1100, 2100: Die group 1110, 1120, 2110, 2120: Die 1111, 1121, 2111, 2121: Type 1 semiconductor layer 1112, 1122, 2112, 2122: Type 2 semiconductor layer 1113, 1123, 2113, 2123: Active layer 1130, 2130: Type 1 semiconductor connector 1210, 1220, 2210, 2220: First pad 1211a, 1221a: Metal bottom surface 1221: Welded part 1222: Convex part 1222a: Metal top surface 1230, 2230: Insulating layer 1231: Insulated top surface 1310, 1320, 2310, 2320: Second pad 1400, 2400: Electrical connection layer 1500, 2500: 1st protective layer 1510, 2510: Extension part 1520, 2520: Top 1600, 2600: 2nd protective layer 2200: First pad group 2300: Second pad group 2501, 2502: Opening B1: Blue film E1: Epitaxial structure I1: 1st branch I2: 2nd branch P1: Circuit board S1: Original substrate S2000: Method for manufacturing a vertical flip-chip type light-emitting element S2100: Epitaxial structure formation process S2200: First pad formation process S2300: Native substrate removal process S2400: Etching process S2500: Second pad formation process S2600: First protective layer formation step S2700: Electrical connection layer formation process S2800: Second protective layer formation process T1: Temporary board T11: Colloid (coating material)

Claims

1. A die group comprising two dies each containing a type 1 semiconductor layer, an active layer, and a type 2 semiconductor layer, and a type 1 semiconductor connector connected between the type 1 semiconductor layers of the two dies, The first of these is provided below the first of the two dies or below the first type semiconductor connector, and the second of these corresponds to the second of the two dies but does not directly contact the two first pads, Two second pads, the first of which is provided on the first of the two dies, and the second of which is provided on the second of the two dies, An electrical connection layer electrically connected to the two second pads and the two first pads, Equipped with, A vertical flip-chip type light-emitting element in which the first current flows through the first of the two first pads, the first of the two dies, the first of the two second pads, the electrical connection layer and the second of the two first pads, and the second current flows through the first of the two first pads, the first type semiconductor connection portion, the second of the two dies, the second of the two second pads, the electrical connection layer and the second of the two first pads.

2. The two dies further include an insulating layer provided directly beneath the second one, The vertical flip-chip light-emitting element according to claim 1, wherein at least a portion of the second of the two first pads is located beneath the insulating layer.

3. The first protective layer further comprises two openings, each corresponding to the two second pads, and covering the two dies to expose the two second pads. The vertical flip-chip light-emitting element according to claim 2, wherein the electrical connection layer is located on the first protective layer and is electrically connected to the two second pads exposed through the two openings.

4. The vertical flip-chip light-emitting element according to claim 3, wherein the second of the two first pads includes a metal upper surface not shielded by the insulating layer, an extension of the first protective layer extends to the metal upper surface via the outer sidewall of the second of the two dies, the outer sidewall separates from the first of the two dies, and the electrical connection layer is located outside the extension and extends to the metal upper surface.

5. The vertical flip-chip type light-emitting element according to claim 4, wherein the metal upper surface is aligned with the insulating upper surface of the insulating layer, and the metal lower surface of the first of the two first pads is aligned with the metal lower surface of the second of the two first pads.

6. The vertical flip-chip type light-emitting element according to claim 5, further comprising a second protective layer covering the electrical connection layer.

7. An epitaxial structure formation process for forming an epitaxial structure on a raw substrate, A first pad forming step comprising: forming a plurality of first pad groups in the epitaxial structure, each first pad group comprising two first pads and an insulating layer, the first of the two first pads in each first pad group being connected to the proximal side of the insulating layer, the second of the two first pads in each first pad group covering the distal side of the insulating layer, and the first and second of the two first pads in each first pad group not in direct contact; A raw substrate removal step involves attaching a plurality of the first pads to a temporary substrate and removing the raw substrate, The etching process involves etching the epitaxial structure to form a plurality of die groups, each die group comprising two dies and a first-type semiconductor connector, each die comprising a first-type semiconductor layer, an active layer, and a second-type semiconductor layer, the first-type semiconductor connector being connected between the first-type semiconductor layers of the two dies, each die group corresponding to each first pad group, wherein the first of the two first pads of each first pad group is directly adhered to the first of the two dies of each die group, and the insulating layer of each first pad group is directly adhered to the second of the two dies of each die group. A second pad forming step comprising: forming a plurality of second pad groups corresponding to the plurality of die groups, wherein each second pad group includes two second pads, the first of the two second pads of each second pad group is provided on the first of the two dies of each die group, and the second of the two second pads of each second pad group is provided on the second of the two dies of each die group; An electrical connection layer formation step is performed, wherein each of the electrical connection layers is electrically connected to the two second pads of each second pad group and to the second of the two first pads of each first pad group. A method for manufacturing a vertical flip-chip type light-emitting element.

8. A method for manufacturing a vertical flip-chip type light-emitting element according to claim 7, further comprising a first protective layer forming step, wherein each of the first protective layers covers each of the die groups and includes two openings, the two openings of each first protective layer correspond to the two second pads of each die group, exposing the two second pads of each second pad group, each of the electrical connection layers is located on each first protective layer, and each electrical connection layer is electrically connected to the two second pads exposed from the two openings in each second pad group.

9. The method for manufacturing a vertical flip-chip type light-emitting element according to claim 8, further comprising a second protective layer forming step, wherein a plurality of second protective layers corresponding to the plurality of die groups are formed, and each of the second protective layers covers each of the electrical connection layers.

10. A method for manufacturing a vertical flip-chip type light-emitting element according to claim 9, wherein in the first protective layer formation step, each extension of the first protective layer extends through the outer side walls of the second of the two dies of each die group to the metal upper surface of the second of the two first pads in the corresponding first pad group, and in the electrical connection layer formation step, each electrical connection layer is located outside the extension of each first protective layer and extends to the metal upper surface of the second of the two first pads in the corresponding first pad group.

Images