Switch circuit

Abstract

The present invention provides a switch circuit that can suppress the degradation of transmission characteristics in multiple signal paths with different numbers of switches. [Solution] The switch circuit 50 includes a switch 51 that switches the conduction and non-conductivity of signal path P1 connecting common terminal 500 and selection terminal 501, a switch 52 that switches the conduction and non-conductivity of signal path P2 connecting common terminal 500 and node N1, a switch 53 that switches the conduction and non-conductivity of signal path P3 connecting node N1 and selection terminal 502, a switch 54 that switches the conduction and non-conductivity of signal path P4 connecting common terminal 500 and node N2, a switch 55 that switches the conduction and non-conductivity of signal path P5 connecting node N2 and selection terminal 503, and an inductor 57 connected between nodes N1 and N2 and ground, wherein the number of switches on signal paths P2 and P3 and the number of switches on signal paths P4 and P5 are each greater than the number of switches on signal path P1.

Description

Technical Field

[0006] , , ,

[0001] The present invention relates to a switch circuit.

Background Art

[0002] Patent Document 1 discloses a switch circuit capable of selectively transmitting a high-frequency signal received by an antenna to a plurality of signal paths.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the above conventional technology, the number of switches varies depending on the signal path. For example, in FIG. 5 of Patent Document 1, the number of switches on the signal path passing through the multiplexer is larger than the number of switches on the signal path bypassing the multiplexer. If the number of switches on a plurality of signal paths is different in this way, the transmission characteristics of the plurality of signal paths may be deteriorated due to differences in parasitic capacitance caused by the off-capacitance of the switches.

[0005] Therefore, the present invention provides a switch circuit capable of suppressing deterioration of the transmission characteristics of a plurality of signal paths having different numbers of switches.

Means for Solving the Problems

[0006] A switch circuit according to one aspect of the present invention comprises a common terminal, a first selection terminal, a second selection terminal, and a third selection terminal; a first switch configured to switch the conduction and non-conductivity of a first signal path connecting the common terminal and the first selection terminal; a second switch configured to switch the conduction and non-conductivity of a second signal path connecting the common terminal and the first node; a third switch configured to switch the conduction and non-conductivity of a third signal path connecting the first node and the second selection terminal; a fourth switch configured to switch the conduction and non-conductivity of a fourth signal path connecting the common terminal and the second node; a fifth switch configured to switch the conduction and non-conductivity of a fifth signal path connecting the second node and the third selection terminal; and a first inductor connected between the first node and ground, and between the second node and ground, wherein the number of switches on the second and third signal paths and the number of switches on the fourth and fifth signal paths are each greater than the number of switches on the first signal path.

[0007] A switch circuit according to one aspect of the present invention comprises a common terminal, a first selection terminal, and a second selection terminal; a first switch configured to switch the conduction and non-conductivity of a first signal path connecting the common terminal and the first selection terminal; a second switch configured to switch the conduction and non-conductivity of a second signal path connecting the common terminal and a first node; a third switch configured to switch the conduction and non-conductivity of a third signal path connecting the first node and the second selection terminal; a fourth switch configured to switch the conduction and non-conductivity of a fourth signal path connecting the common terminal and the first node; and a first inductor connected between the first node and ground, wherein the number of switches on the second and third signal paths and the number of switches on the fourth and third signal paths are each greater than the number of switches on the first signal path.

[0008] A switch circuit according to one aspect of the present invention comprises a common terminal, a first selection terminal, a second selection terminal, and a third selection terminal; a first switch configured to switch the conduction and non-conductivity of a first signal path connecting the common terminal and the first selection terminal; a second switch configured to switch the conduction and non-conductivity of a second signal path connecting the common terminal and the first node; a third switch configured to switch the conduction and non-conductivity of a third signal path connecting the first node and the second selection terminal; a fourth switch configured to switch the conduction and non-conductivity of a fourth signal path connecting the first node and the third selection terminal; and a first inductor connected between the first node and ground, wherein the number of switches on the second and third signal paths and the number of switches on the second and fourth signal paths are each greater than the number of switches on the first signal path. [Effects of the Invention]

[0009] According to the present invention, it is possible to suppress the degradation of transmission characteristics of multiple signal paths with different numbers of switches. [Brief explanation of the drawing]

[0010] [Figure 1] Figure 1 is a circuit diagram of a communication device according to Embodiment 1. [Figure 2] Figure 2 is a Smith chart showing the input impedance and output impedance of the switch circuit according to Embodiment 1 and the comparative example. [Figure 3] Figure 3 is a graph showing the insertion loss of the switch circuit according to Embodiment 1 and the comparative example. [Figure 4] Figure 4 shows the first mode of the high-frequency circuit according to Embodiment 1. [Figure 5] Figure 5 shows the second mode of the high-frequency circuit according to Embodiment 1. [Figure 6] Figure 6 shows the third mode of the high-frequency circuit according to Embodiment 1. [Figure 7] Figure 7 shows the fourth mode of the high-frequency circuit according to Embodiment 1. [Figure 8]FIG. 8 is a circuit configuration diagram of a communication device according to a modification of Embodiment 1. [Figure 9] FIG. 9 is a circuit configuration diagram of a communication device according to Embodiment 2. [Figure 10] FIG. 10 is a diagram showing a first mode of the high-frequency circuit according to Embodiment 2. [Figure 11] FIG. 11 is a diagram showing a second mode of the high-frequency circuit according to Embodiment 2. [Figure 12] FIG. 12 is a circuit configuration diagram of a communication device according to a modification of Embodiment 2. [Figure 13] FIG. 13 is a circuit configuration diagram of a communication device according to Embodiment 3. [Figure 14] FIG. 14 is a diagram showing a first mode of the high-frequency circuit according to Embodiment 3. [Figure 15] FIG. 15 is a diagram showing a second mode of the high-frequency circuit according to Embodiment 3. [Figure 16] FIG. 16 is a circuit configuration diagram of a communication device according to a modification of Embodiment 3. [Figure 17] FIG. 17 is a circuit configuration diagram of a communication device according to Embodiment 4. Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that the embodiments described below are all examples showing comprehensive or specific examples. The numerical values, shapes, materials, components, arrangements of components, connection forms, etc. shown in the following embodiments are merely examples and are not intended to limit the present invention.

[0012] Each figure is a schematic diagram that has been appropriately emphasized, omitted, or adjusted in ratio to show the present invention, and is not necessarily drawn precisely, and may be different from the actual shape, positional relationship, and ratio. In each figure, the same reference numerals are given to substantially the same configurations, and duplicate explanations may be omitted or simplified.

[0013] In the following description, "connected" includes not only the case of being directly connected by connection terminals and / or wiring conductors but also the case of being electrically connected via other circuit elements. "C is connected between A and B" means that one end of C is connected to A and the other end of C is connected to B, and it means that C is arranged in series in the path connecting A and B. The "path connecting A and B" means a path composed of conductors that electrically connect A to B. "Directly connected" means being directly connected by connection terminals and / or wiring conductors without passing through other circuit elements.

[0014] "Terminal" means a point where a conductor in a circuit element ends. When the impedance of the conductor between circuit elements is sufficiently low, the terminal is interpreted not only as a single point but also as any point on the conductor between circuit elements or the entire conductor.

[0015] "Node" means a region between circuit elements. When the impedance of the conductor between circuit elements is sufficiently low, the node is interpreted not only as a single point but also as any point on the conductor between circuit elements or the entire conductor.

[0016] "The number of switches on a signal path" means the number of switches arranged in series on the signal path. The switches arranged in series conduct the signal path in the closed state and do not conduct the signal path in the open state.

[0017] Terms indicating the relationship between elements such as "parallel" and "perpendicular", terms indicating the shape of elements such as "straight line", and numerical ranges do not represent only a strict meaning but also mean substantially equivalent ranges, for example, including an error of about several percent.

[0018] (Embodiment 1) The circuit configurations of the communication device 5, the high-frequency circuit 1, and the switch circuit 50 according to Embodiment 1 will be described with reference to FIG. 1. FIG. 1 is a circuit configuration diagram of the communication device 5 according to the present embodiment. In FIG. 1, the dashed arrows represent signal paths.

[0019] Figure 1 is an illustrative circuit diagram, and the communication device 5, high-frequency circuit 1, and switch circuit 50 can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the following descriptions of the communication device 5, high-frequency circuit 1, and switch circuit 50 should not be interpreted restrictively.

[0020] [1.1. Circuit configuration of communication device 5] The communication device 5 according to this embodiment can be used to provide wireless connectivity. For example, the communication device 5 can be implemented in a UE in a cellular network such as a mobile phone, smartphone, tablet computer, or wearable device. In another example, by implementing the communication device 5, wireless connectivity can be provided to IoT (Internet of Things) sensor devices, medical / healthcare devices, cars, unmanned aerial vehicles (UAVs) (so-called drones), and automated guided vehicles (AGVs). In yet another example, by implementing the communication device 5, wireless connectivity can also be provided in a wireless access point or wireless hotspot.

[0021] The communication device 5 comprises a high-frequency circuit 1, an antenna 2, RFICs (Radio Frequency Integrated Circuits) 3a, 3b, and 3c, and BBICs (Baseband Integrated Circuits) 4a, 4b, and 4c.

[0022] The high-frequency circuit 1 is connected between the antenna 2 and the RFICs 3a, 3b, and 3c. The high-frequency circuit 1 can transmit high-frequency signals between the antenna 2 and the RFICs 3a, 3b, and 3c. Details of the circuit configuration of the high-frequency circuit 1 will be described later.

[0023] Antenna 2 is connected to the high-frequency circuit 1. Antenna 2 can receive high-frequency signals from the high-frequency circuit 1 and transmit them to the outside of the communication device 5. Furthermore, antenna 2 can receive high-frequency signals from outside the communication device 5 and supply them to the high-frequency circuit 1. Note that antenna 2 does not necessarily have to be included in the communication device 5. In addition, the communication device 5 may have one or more antennas in addition to antenna 2.

[0024] RFIC3a, 3b, and 3c are examples of signal processing circuits that process high-frequency signals. Specifically, RFIC3a, 3b, and 3c process high-frequency received signals input via the receiving path of high-frequency circuit 1 by down-conversion or the like, and output the resulting received signals to BBIC4a, 4b, and 4c, respectively. Furthermore, RFIC3a, 3b, and 3c may process transmitted signals input from BBIC4a, 4b, and 4c, respectively, by up-conversion or the like, and output the resulting high-frequency transmitted signals to high-frequency circuit 1. In addition, RFIC3a, 3b, and 3c may have control units that control switches and power amplifiers, etc., of high-frequency circuit 1. Note that some or all of the control unit functions of RFIC3a, 3b, and 3c may be included outside of RFIC3a, 3b, and 3c, for example, in BBIC4a, 4b, 4c or high-frequency circuit 1. Also, any combination of RFIC3a, 3b, and 3c may be integrated into one.

[0025] In this embodiment, RFICs 3a, 3b, and 3c are signal processing circuits for processing different system signals. For example, RFIC 3a may be a signal processing circuit for processing cellular network signals. For example, RFIC 3b may be a signal processing circuit for processing wireless local area network (WLAN) signals. For example, RFIC 3c may be a signal processing circuit for processing UWB (Ultra-Wide Band) signals.

[0026] BBIC4a, 4b, and 4c are baseband signal processing circuits that process signals using a frequency band lower than the high-frequency signal transmitted by the high-frequency circuit 1. Examples of signals processed by BBIC4a, 4b, and 4c include image signals for image display and / or voice signals for communication via a speaker. Note that some or all of BBIC4a, 4b, and 4c may not be included in the communication device 5. Furthermore, any combination of BBIC4a, 4b, and 4c may be integrated into a single unit. Additionally, RFIC3a, 3b, 3c and BBIC4a, 4b, and 4c may all be integrated into a single integrated circuit.

[0027] In this embodiment, BBIC4a, 4b, and 4c are signal processing circuits for processing different system signals. For example, BBIC4a may be a signal processing circuit for processing cellular network signals. Also, for example, BBIC4b may be a signal processing circuit for processing WLAN signals. Also, for example, BBIC4c may be a signal processing circuit for processing UWB signals.

[0028] [1.2. Circuit Configuration of High-Frequency Circuit 1] The high-frequency circuit 1 includes a low-noise amplifier 20, a filter 30, switch circuits 40 and 50, an antenna connection terminal 100, and high-frequency output terminals 111, 112, and 113.

[0029] The antenna connection terminal 100 is an external connection terminal of the high-frequency circuit 1. The antenna connection terminal 100 is connected to the antenna 2 outside the high-frequency circuit 1 and to the switch circuit 40 inside the high-frequency circuit 1.

[0030] The high-frequency output terminals 111, 112, and 113 are external connection terminals of the high-frequency circuit 1. The high-frequency output terminals 111, 112, and 113 are connected to RFICs 3a, 3b, and 3c outside the high-frequency circuit 1, and are connected to the switch circuit 50 inside the high-frequency circuit 1.

[0031] The low-noise amplifier 20 is connected between the filter 30 and the switch circuit 50. Specifically, the input terminal of the low-noise amplifier 20 is connected to the filter 30, and the output terminal of the low-noise amplifier 20 is connected to the common terminal 500 of the switch circuit 50. The low-noise amplifier 20 can amplify the received signal using power supplied from a power supply (not shown).

[0032] The low-noise amplifier 20 can be constructed using field-effect transistors (FETs) and can be manufactured using semiconductor materials. Examples of semiconductor materials include silicon single crystal (Si), gallium nitride (GaN), or silicon carbide (SiC). However, the amplification transistors of the low-noise amplifier 20 are not limited to FETs. For example, some or all of the amplification transistors of the low-noise amplifier 20 may be composed of bipolar transistors.

[0033] The filter 30 is a bandpass filter having a passband that includes the receiving band of a predetermined band. The filter 30 can pass received signals in the predetermined band and attenuate transmitted signals in the predetermined band and signals in other bands.

[0034] The designated band is a frequency band for communication systems built using Radio Access Technology (RAT), and is predefined by standardization bodies such as 3GPP® (3rd Generation Partnership Project) and IEEE (Institute of Electrical and Electronics Engineers). Examples of communication systems include 5GNR (5th Generation New Radio) systems, LTE (Long Term Evolution) systems, and WLAN (Wireless Local Area Network) systems.

[0035] The filter 30 is connected between the switch circuit 40 and the low-noise amplifier 20. Specifically, one end of the filter 30 is connected to the select terminal 401 of the switch circuit 40, and the other end of the filter 30 is connected to the input terminal of the low-noise amplifier 20.

[0036] The filter 30 may be a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, an LC filter, or a dielectric filter, or any combination thereof, and is not limited to these.

[0037] The switch circuit 40 is connected between the antenna connection terminal 100 and the filter 30. The switch circuit 40 includes a common terminal 400 and a select terminal 401. The common terminal 400 is connected to the antenna connection terminal 100. The select terminal 401 is connected to the filter 30.

[0038] In this connection configuration, the switch circuit 40 can switch between connecting and disconnecting the common terminal 400 and the selection terminal 401 based on control signals from, for example, RFIC 3a, 3b, or 3c.

[0039] The switch circuit 40 may further include one or more other common terminals and / or one or more other selectable terminals. In this case, one or more other common terminals may be connected to one or more other antenna connection terminals, and one or more other selectable terminals may be connected to one or more other filters.

[0040] [1.3. Circuit configuration of switch circuit 50] The switch circuit 50 is connected between the low-noise amplifier 20 and the high-frequency output terminals 111, 112, and 113. The switch circuit 50 includes a common terminal 500, selection terminals 501, 502, and 503, switches 51, 52, 53, 54, and 55, a distributor 56, and an inductor 57.

[0041] The common terminal 500 is an external connection terminal of the switch circuit 50. The common terminal 500 is connected to the output terminal of the low-noise amplifier 20 outside the switch circuit 50, and is connected to the distributor 56 and the switch 54 inside the switch circuit 50.

[0042] The selection terminal 501 is an example of a first selection terminal and is an external connection terminal of the switch circuit 50. The selection terminal 501 is connected to the high-frequency output terminal 111 outside the switch circuit 50 and to terminal 512 of the switch 51 inside the switch circuit 50.

[0043] The selection terminal 502 is an example of a second selection terminal and is an external connection terminal of the switch circuit 50. The selection terminal 502 is connected to the high-frequency output terminal 112 outside the switch circuit 50 and to terminal 532 of the switch 53 inside the switch circuit 50.

[0044] The selection terminal 503 is an example of a third selection terminal and is an external connection terminal of the switch circuit 50. The selection terminal 503 is connected to the high-frequency output terminal 113 outside the switch circuit 50 and to terminal 552 of the switch 55 inside the switch circuit 50.

[0045] Switch 51 is an example of a first switch and is connected between the common terminal 500 and the selection terminal 501. Specifically, switch 51 includes a terminal 511 connected to the output terminal 562 of the distributor 56 and a terminal 512 connected to the selection terminal 501.

[0046] In this configuration, the switch 51 can switch the conduction and non-conductivity of the signal path P1 connecting the common terminal 500 and the selection terminal 501 by switching the connection and non-connection between terminals 511 and 512 based on a control signal from RFIC 3a, for example.

[0047] Signal path P1 is an example of a first signal path, and is the path connecting the common terminal 500 and the selection terminal 501. Specifically, signal path P1 is the path from the common terminal 500 to the selection terminal 501, via the distributor 56 and the switch 51.

[0048] Switch 52 is an example of a second switch and is connected between the common terminal 500 and node N1. Specifically, switch 52 includes terminal 521 connected to output terminal 563 of distributor 56 and terminal 522 connected to node N1. In this embodiment, terminal 522 of switch 52 is directly connected to terminal 531 of switch 53.

[0049] In this configuration, the switch 52 can switch the conduction and non-conductivity of the signal path P2 by switching the connection and non-connection between terminals 521 and 522 based on control signals from RFIC 3b and / or 3c, for example.

[0050] Signal path P2 is an example of a second signal path, and is the path connecting the common terminal 500 and node N1. Specifically, signal path P2 is the path from the common terminal 500 to node N1 via the distributor 56 and switch 52.

[0051] Node N1 is an example of a first node, and is a region on the signal paths P2 and P3 to which the inductor 57 is connected. In other words, node N1 is a region on the path connecting switches 52 and 53.

[0052] Switch 53 is an example of a third switch and is connected between node N1 and selection terminal 502. Specifically, switch 53 includes terminal 531 connected to node N1 and terminal 532 connected to selection terminal 502. In this embodiment, terminal 531 of switch 53 is directly connected to terminal 522 of switch 52 and terminal 542 of switch 54.

[0053] In this configuration, the switch 53 can switch the conduction and non-conductivity of the signal path P3 by switching the connection and non-connection between terminals 531 and 532 based on a control signal from RFIC3b, for example.

[0054] Signal path P3 is an example of a third signal path, connecting node N1 and selection terminal 502. Specifically, signal path P3 is the path from node N1 to selection terminal 502 via switch 53.

[0055] Switch 54 is an example of a fourth switch and is connected between the common terminal 500 and node N2. Specifically, switch 54 includes terminal 541 connected to the common terminal 500 and terminal 542 connected to node N2. In this embodiment, terminal 542 of switch 54 is directly connected to terminal 551 of switch 55.

[0056] In this configuration, the switch 54 can switch the conduction and non-conductivity of the signal path P4 by switching the connection and non-connection between terminals 541 and 542 based on control signals from RFIC 3b and / or 3c, for example.

[0057] Signal path P4 is an example of a fourth signal path, connecting common terminal 500 and node N2. Specifically, signal path P4 is the path from common terminal 500, through switch 54, to node N2.

[0058] Node N2 is an example of a second node, and is a region on the signal paths P4 and P5 to which inductor 57 is connected. In other words, node N2 is a region on the path connecting switches 54 and 55.

[0059] Switch 55 is an example of a fifth switch and is connected between node N2 and selection terminal 503. Specifically, switch 55 includes terminal 551 connected to node N2 and terminal 552 connected to selection terminal 503. In this embodiment, terminal 551 of switch 55 is directly connected to terminal 542 of switch 54.

[0060] In this configuration, the switch 55 can switch the conduction and non-conductivity of the signal path P5 by switching the connection and non-connection between terminals 551 and 552 based on a control signal from RFIC3c, for example.

[0061] Signal path P5 is an example of a fifth signal path, connecting node N2 and selection terminal 503. Specifically, signal path P5 is the path from node N2 to selection terminal 503 via switch 55.

[0062] Each of switches 51 to 55 is composed of, for example, an SPST (Single-Pole Single-Throw) type switch circuit. For example, each of switches 51 to 55 includes multiple FETs connected in series. Alternatively, each of switches 51 to 55 may include only a single FET.

[0063] The distributor 56 includes an input terminal 561 and output terminals 562 and 563. The input terminal 561 is connected to a common terminal 500. Output terminal 562 is an example of a first output terminal and is connected to a selection terminal 501 via a switch 51. Output terminal 563 is an example of a second output terminal and is connected to nodes N1 and N2 via a switch 52. The distributor 56 can distribute the high-frequency signal supplied to the input terminal 561 to signal paths P1 and P2. The distributor 56 can be a Wilkinson divider or a diplexer, but is not limited to these. The distributor 56 does not necessarily have to be included in the switch circuit 50.

[0064] Inductor 57 is an example of a first inductor, and is connected between node N1 and ground, and between node N2 and ground. Specifically, one end of inductor 57 is connected to nodes N1 and N2, and the other end of inductor 57 is connected to ground.

[0065] In such a switch circuit 50, the number of switches on signal paths P2 and P3 (2 in this embodiment) and the number of switches on signal paths P4 and P5 (2 in this embodiment) are each greater than the number of switches on signal path P1 (1 in this embodiment). As a result, the parasitic capacitance generated when the switches on signal paths P2 and P3 are opened (hereinafter referred to as off capacitance) and the off capacitance of the switches on signal paths P4 and P5 are each greater than the off capacitance of the switches on signal path P1.

[0066] Furthermore, the number of switches on signal paths P2 and P3 (2 in this embodiment) is equal to the number of switches on signal paths P4 and P5 (2 in this embodiment). As a result, the off-capacitance of the switches on signal paths P2 and P3 is equal to the off-capacitance of the switches on signal paths P4 and P5.

[0067] The switch circuit 50 can be implemented in a single integrated circuit. That is, switches 51, 52, 53, 54, and 55, the distributor 56, and the inductor 57 may all be included in a single integrated circuit. However, the inductor 57 does not necessarily have to be included in the integrated circuit. In this case, the inductor 57 may be implemented by wiring on and / or within the board, or by a chip inductor (surface mount device (SMD)).

[0068] [1.4. Impedance of switch circuit 50] The impedance of the switch circuit 50 according to this embodiment, configured in this way, will be explained with reference to Figures 2 and 3, in comparison with the switch circuit according to the comparative example. The switch circuit according to the comparative example is the switch circuit 50 according to this embodiment, with the inductor 57 and the path connecting nodes N1 and N2 to ground removed.

[0069] Figure 2 is a Smith chart showing the input impedance Zin and output impedance Zout of the switch circuit 50 according to this embodiment and comparative example. Figure 3 is a graph showing the insertion loss of the switch circuit 50 according to this embodiment and comparative example.

[0070] Note that the input impedance Zin is the impedance when looking from the selection terminal 502 to the common terminal 500 with switches 52 and 53 closed, and switches 51, 54 and 55 closed. The output impedance Zout is the impedance when looking from the common terminal 500 to the selection terminal 502 with switches 52 and 53 closed, and switches 51, 54 and 55 closed.

[0071] As shown in Figure 2, in the switch circuit 50 according to this embodiment, the input impedance Zin and output impedance Zout can be brought closer to the reference impedance (e.g., 50 ohms) than the input impedance Zin and output impedance Zout of the switch circuit according to the comparative example. This is because the impedance that has shifted to the capacitive side due to the difference between the off capacitance of switch 51 on signal path P1 and the off capacitance of switches 54 and 55 on signal paths P4 and P5 can be shifted to the inductive side by the inductor 57.

[0072] As a result, the switch circuit 50 according to this embodiment can suppress losses due to impedance mismatch more effectively than the switch circuit according to the comparative example, and as shown in Figure 3, the insertion loss by the switch circuit 50 can be reduced.

[0073] [1.5. Multiple Communication Modes] Next, the various communication modes of the high-frequency circuit 1 will be explained with reference to Figures 4 to 7. In Figures 4 to 7, the dashed arrows represent the reception path of the high-frequency signal in the corresponding communication mode.

[0074] [1.5.1. Mode 1] First, the first mode, which is included in the multiple communication modes of the high-frequency circuit 1, will be explained with reference to Figure 4. Figure 4 is a diagram showing the first mode of the high-frequency circuit 1 according to this embodiment.

[0075] The first mode is a communication mode for receiving high-frequency signals processed by RFIC3a (e.g., cellular network signals) and high-frequency signals processed by RFIC3b (e.g., WLAN signals).

[0076] In this first mode, the switch circuit 40 connects the common terminal 400 to the selection terminal 401. Furthermore, the switch circuit 50 connects the common terminal 500 to the selection terminals 501 and 502, but not to the selection terminal 503. Specifically, the switch circuit 50 closes switches 51, 52 and 53 and opens switches 54 and 55.

[0077] As a result, the two received signals are transmitted from antenna 2 to RFICs 3a and 3b via antenna connection terminal 100, switch circuit 40, filter 30, low-noise amplifier 20, switch circuit 50, and high-frequency output terminals 111 and 112. Within switch circuit 50, one of the two received signals is transmitted from common terminal 500 to selection terminal 501 via distributor 56 and switch 51, while the other of the two received signals is transmitted from common terminal 500 to selection terminal 502 via distributor 56 and switches 52 and 53.

[0078] [1.5.2. Second Mode] Next, the second mode, which is included in the multiple communication modes of the high-frequency circuit 1, will be explained with reference to Figure 5. Figure 5 is a diagram showing the second mode of the high-frequency circuit 1 according to this embodiment.

[0079] The second mode is a communication mode for receiving high-frequency signals (e.g., UWB signals) that are processed by the RFIC3c.

[0080] In this second mode, the switch circuit 40 connects the common terminal 400 to the selection terminal 401. Furthermore, the switch circuit 50 connects the common terminal 500 to the selection terminal 503, and does not connect to the selection terminals 501 and 502. Specifically, the switch circuit 50 closes switches 54 and 55 and opens switches 51, 52 and 53.

[0081] As a result, the received signal is transmitted from antenna 2 to RFIC 3c via antenna connection terminal 100, switch circuit 40, filter 30, low-noise amplifier 20, switch circuit 50, and high-frequency output terminal 113. Within switch circuit 50, the received signal is transmitted from common terminal 500 to selection terminal 503 via switches 54 and 55.

[0082] [1.5.3. Third Mode] Next, the third mode, which is included in the multiple communication modes of the high-frequency circuit 1, will be described with reference to Figure 6. Figure 6 is a diagram showing the third mode of the high-frequency circuit 1 according to this embodiment.

[0083] The third mode is a communication mode for receiving high-frequency signals processed by RFIC3a (e.g., cellular network signals) and high-frequency signals processed by RFIC3c (e.g., UWB signals).

[0084] In this third mode, the switch circuit 40 connects the common terminal 400 to the selection terminal 401. Furthermore, the switch circuit 50 connects the common terminal 500 to the selection terminals 501 and 503, but not to the selection terminal 502. Specifically, the switch circuit 50 closes switches 51, 52 and 55 and opens switches 53 and 54.

[0085] As a result, the two received signals are transmitted from antenna 2 to RFICs 3a and 3c via antenna connection terminal 100, switch circuit 40, filter 30, low-noise amplifier 20, switch circuit 50, and high-frequency output terminals 111 and 113. Within switch circuit 50, one of the two received signals is transmitted from common terminal 500 to selection terminal 501 via distributor 56 and switch 51, while the other of the two received signals is transmitted from common terminal 500 to selection terminal 503 via distributor 56 and switches 52 and 55.

[0086] [1.5.4. Fourth Mode] Next, the fourth mode, which is included in the multiple communication modes of the high-frequency circuit 1, will be described with reference to Figure 7. Figure 7 is a diagram showing the fourth mode of the high-frequency circuit 1 according to this embodiment.

[0087] The fourth mode is a communication mode for receiving high-frequency signals (e.g., WLAN signals) that are processed by the RFIC3b.

[0088] In this fourth mode, the switch circuit 40 connects the common terminal 400 to the selection terminal 401. Furthermore, the switch circuit 50 connects the common terminal 500 to the selection terminal 502, but does not connect to the selection terminals 501 and 503. Specifically, the switch circuit 50 closes switches 53 and 54 and opens switches 51, 52 and 55.

[0089] As a result, the received signal is transmitted from antenna 2 to RFIC 3b via antenna connection terminal 100, switch circuit 40, filter 30, low-noise amplifier 20, switch circuit 50, and high-frequency output terminal 112. Within switch circuit 50, the received signal is transmitted from common terminal 500 to selection terminal 502 via switches 54 and 53.

[0090] Furthermore, the multiple communication modes of the high-frequency circuit 1 are not limited to the first to fourth modes. For example, the multiple communication modes of the high-frequency circuit 1 may include communication modes other than the first to fourth modes.

[0091] [1.6. Summary] As described above, the switch circuit 50 according to this embodiment includes a common terminal 500, selection terminals 501, 502 and 503, a switch 51 configured to switch the conduction and non-conductivity of the signal path P1 connecting the common terminal 500 and the selection terminal 501, a switch 52 configured to switch the conduction and non-conductivity of the signal path P2 connecting the common terminal 500 and node N1, a switch 53 configured to switch the conduction and non-conductivity of the signal path P3 connecting node N1 and the selection terminal 502, a switch 54 configured to switch the conduction and non-conductivity of the signal path P4 connecting the common terminal 500 and node N2, a switch 55 configured to switch the conduction and non-conductivity of the signal path P5 connecting node N2 and the selection terminal 503, and an inductor 57 connected between node N1 and ground and between node N2 and ground, wherein the number of switches on signal paths P2 and P3 and the number of switches on signal paths P4 and P5 are each greater than the number of switches on signal path P1.

[0092] According to this, since the inductor 57 is connected to the signal paths P2 and P3, which have a large number of switches, and to the signal paths P4 and P5, impedance mismatch due to the difference in off-capacitance with the signal path P1, which has a small number of switches, can be suppressed. In other words, the degradation of the transmission characteristics of multiple signal paths with different numbers of switches can be suppressed. Furthermore, since the inductor 57 is common to the signal paths P2 and P3 and to the signal paths P4 and P5, the number of inductors can be reduced compared to when individual inductors are connected to the signal paths P2 and P3 and to the signal paths P4 and P5. In other words, the switch circuit 50 can be made smaller.

[0093] For example, in the switch circuit 50 according to this embodiment, the number of switches on signal paths P2 and P3 may be equal to the number of switches on signal paths P4 and P5.

[0094] According to this, the difference between the off capacitance of the switches on signal paths P2 and P3 and the off capacitance of the switches on signal paths P4 and P5 can be reduced, and the impedance can be effectively adjusted by the inductor 57.

[0095] For example, in the switch circuit 50 according to this embodiment, switch 52 may be directly connected to switch 53, and switch 54 may be directly connected to switch 55.

[0096] According to this, the inductor 57 is connected between node N1 on the path directly connecting switch 52 to switch 53 and ground, and between node N2 on the path directly connecting switch 54 to switch 55 and ground. Therefore, impedance mismatch due to the off-capacitance of switches 52 and 53, and the off-capacitance of switches 54 and 55, can be effectively suppressed.

[0097] For example, in the switch circuit 50 according to this embodiment, in the first mode, switches 51, 52, and 53 may be closed and switches 54 and 55 may be open; in the second mode, switches 54 and 55 may be closed and switches 51, 52, and 53 may be open; in the third mode, switches 51, 52, and 55 may be closed and switches 53 and 54 may be open; and in the fourth mode, switches 53 and 54 may be open and switches 51, 52, and 55 may be closed.

[0098] According to this, in the first mode, the common terminal 500 can be connected to the select terminals 501 and 502; in the second mode, the common terminal 500 can be connected to the select terminal 503; in the third mode, the common terminal 500 can be connected to the select terminals 501 and 503; and in the fourth mode, the common terminal 500 can be connected to the select terminal 502. The inductor 57 can suppress impedance mismatches caused by the difference in the number of switches on the signal path in these first to fourth modes.

[0099] For example, the switch circuit 50 according to this embodiment may further include a distributor 56 which includes an input terminal 561 connected to a common terminal 500, an output terminal 562 connected to a selection terminal 501 via a switch 51, and an output terminal 563 connected to nodes N1 and N2 via a switch 52.

[0100] According to this, the input signal from the common terminal 500 can be distributed to two selectable terminals.

[0101] Furthermore, for example, in the switch circuit 50 according to this embodiment, switches 51, 52, 53, 54, and 55, as well as the inductor 57, may be included in a single integrated circuit.

[0102] According to this, the switch circuit 50 can be made smaller.

[0103] (Modified version of Embodiment 1) In the above embodiment 1, in the circuit configuration of the communication device 5, high-frequency circuit 1, and switch circuit 50, other circuit elements and wiring may be inserted between the paths connecting each circuit element and signal path disclosed in the drawings. For example, as shown in Figure 8, the switch circuit 50 according to a modified example of embodiment 1 may further include an inductor 58.

[0104] Inductor 58 is an example of a second inductor and is connected between the common terminal 500 and ground. Specifically, one end of inductor 58 is connected to the common terminal 500, and the other end of inductor 58 is connected to ground.

[0105] Thus, the switch circuit 50 according to this modified example further includes an inductor 58 connected between the common terminal 500 and ground.

[0106] According to this, the impedance in multiple signal paths with different numbers of switches can be further adjusted, and the degradation of transmission characteristics can be further suppressed.

[0107] (Embodiment 2) Next, Embodiment 2 will be described. This embodiment differs from Embodiment 1 in that the signal path P5 is not included in the switch circuit due to a difference in the number of high-frequency output terminals of the high-frequency circuit. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 1.

[0108] Figure 9 is a circuit diagram of the communication device 5A according to this embodiment. In Figure 9, dashed arrows represent signal paths.

[0109] Figure 9 is an illustrative circuit diagram, and the communication device 5A, high-frequency circuit 1A, and switch circuit 50A can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the descriptions of the communication device 5A, high-frequency circuit 1A, and switch circuit 50A provided below should not be interpreted restrictively.

[0110] [2.1. Circuit configuration of communication device 5A] The communication device 5A according to this embodiment can be used to provide a wireless connection, similar to the communication device 5 according to Embodiment 1. The communication device 5A comprises a high-frequency circuit 1A, an antenna 2, RFICs 3a and 3b, and BBICs 4a and 4b. In other words, the communication device 5A differs from the communication device 5 according to Embodiment 1 in that it includes a high-frequency circuit 1A instead of the high-frequency circuit 1, and does not include RFICs 3c and BBICs 4c.

[0111] [2.2. Circuit configuration of high-frequency circuit 1A] The high-frequency circuit 1A according to this embodiment includes a low-noise amplifier 20, a filter 30, switch circuits 40 and 50A, an antenna connection terminal 100, and high-frequency output terminals 111 and 112. In other words, the high-frequency circuit 1A differs from the high-frequency circuit 1 according to Embodiment 1 in that it includes a switch circuit 50A instead of a switch circuit 50, and does not include a high-frequency output terminal 113.

[0112] [2.3. Circuit configuration of the 50A switch circuit] The switch circuit 50A according to this embodiment is connected between the low-noise amplifier 20 and the high-frequency output terminals 111 and 112. The switch circuit 50A includes a common terminal 500, selection terminals 501 and 502, switches 51, 52, 53 and 54, a distributor 56, and an inductor 57.

[0113] The common terminal 500 is an external connection terminal of the switch circuit 50A. The common terminal 500 is connected to the output terminal of the low-noise amplifier 20 outside the switch circuit 50A, and is connected to the distributor 56 and the switch 54 inside the switch circuit 50A.

[0114] The selection terminal 501 is an example of a first selection terminal and is an external connection terminal of the switch circuit 50A. The selection terminal 501 is connected to the high-frequency output terminal 111 outside the switch circuit 50A and to terminal 512 of the switch 51 inside the switch circuit 50A.

[0115] The selection terminal 502 is an example of a second selection terminal and is an external connection terminal of the switch circuit 50A. The selection terminal 502 is connected to the high-frequency output terminal 112 outside the switch circuit 50A and to terminal 532 of the switch 53 inside the switch circuit 50A.

[0116] Switch 51 is an example of a first switch and is connected between the common terminal 500 and the selection terminal 501. Specifically, switch 51 includes a terminal 511 connected to the output terminal 562 of the distributor 56 and a terminal 512 connected to the selection terminal 501.

[0117] In this configuration, the switch 51 can switch the conduction and non-conductivity of the signal path P1 by switching the connection and non-connection between terminals 511 and 512 based on a control signal from RFIC 3a, for example.

[0118] Signal path P1 is an example of a first signal path, and is the path connecting the common terminal 500 and the selection terminal 501. Specifically, signal path P1 is the path from the common terminal 500 to the selection terminal 501, via the distributor 56 and the switch 51.

[0119] Switch 52 is an example of a second switch and is connected between the common terminal 500 and node N1. Specifically, switch 52 includes terminal 521 connected to output terminal 563 of distributor 56 and terminal 522 connected to node N1. In this embodiment, terminal 522 of switch 52 is directly connected to terminal 531 of switch 53.

[0120] In this configuration, the switch 52 can switch the conduction and non-conductivity of the signal path P2 by switching the connection and non-connection between terminals 521 and 522 based on a control signal from RFIC3b, for example.

[0121] Signal path P2 is an example of a second signal path, and is the path connecting the common terminal 500 and node N1. Specifically, signal path P2 is the path from the common terminal 500 to node N1 via the distributor 56 and switch 52.

[0122] Node N1 is an example of a first node, and is a region on the signal paths P2 and P3 to which the inductor 57 is connected. In other words, node N1 is a region on the path connecting switches 52 and 53.

[0123] Switch 53 is an example of a third switch and is connected between node N1 and selection terminal 502. Specifically, switch 53 includes terminal 531 connected to node N1 and terminal 532 connected to selection terminal 502. In this embodiment, terminal 531 of switch 53 is directly connected to terminal 522 of switch 52.

[0124] In this configuration, the switch 53 can switch the conduction and non-conductivity of the signal path P3 by switching the connection and non-connection between terminals 531 and 532 based on a control signal from RFIC3b, for example.

[0125] Signal path P3 is an example of a third signal path, connecting node N1 and selection terminal 502. Specifically, signal path P3 is the path from node N1 to selection terminal 502 via switch 53.

[0126] Switch 54 is an example of a fourth switch and is connected between the common terminal 500 and node N1. Specifically, switch 54 includes terminal 541 connected to the common terminal 500 and terminal 542 connected to node N1. In this embodiment, terminal 542 of switch 54 is directly connected to terminal 531 of switch 53.

[0127] In this configuration, the switch 54 can switch the conduction and non-conductivity of the signal path P4 by switching the connection and non-connection between terminals 541 and 542 based on a control signal from RFIC3b, for example.

[0128] Signal path P4 is an example of a fourth signal path, connecting common terminal 500 and node N1. Specifically, signal path P4 is the path from common terminal 500, through switch 54, to node N1.

[0129] Each of switches 51 to 54 is composed of, for example, an SPST (Single-Pole Single-Throw) type switch circuit. For example, each of switches 51 to 54 includes multiple FETs connected in series. Alternatively, each of switches 51 to 54 may include only a single FET.

[0130] The distributor 56 includes an input terminal 561 and output terminals 562 and 563. The input terminal 561 is connected to a common terminal 500. Output terminal 562 is an example of a first output terminal and is connected to a selection terminal 501 via a switch 51. Output terminal 563 is an example of a second output terminal and is connected to node N1 via a switch 52. The distributor 56 can distribute the high-frequency signal supplied to the input terminal 561 to signal paths P1 and P2. A Wilkinson divider or a diplexer can be used as the distributor 56, but the distributor 56 is not limited to these. Note that the distributor 56 does not necessarily have to be included in the switch circuit 50A.

[0131] Inductor 57 is an example of a first inductor and is connected between node N1 and ground. Specifically, one end of inductor 57 is connected to node N1, and the other end of inductor 57 is connected to ground.

[0132] In such a switch circuit 50A, the number of switches on signal paths P2 and P3 (2 in this embodiment) and the number of switches on signal paths P4 and P3 (2 in this embodiment) are each greater than the number of switches on signal path P1 (1 in this embodiment). As a result, the off-capacitance of the switches on signal paths P2 and P3 and the off-capacitance of the switches on signal paths P4 and P3 are each greater than the off-capacitance of the switches on signal path P1.

[0133] Furthermore, the number of switches on signal path P2 (1 in this embodiment) is equal to the number of switches on signal path P4 (1 in this embodiment). As a result, the off-capacitance of the switches on signal paths P2 and P3 is equal to the off-capacitance of the switches on signal paths P4 and P3.

[0134] [2.4. Multiple Communication Modes] Next, the various communication modes of the high-frequency circuit 1A will be explained with reference to Figures 10 and 11. In Figures 10 and 11, the dashed arrows represent the receiving paths of the high-frequency signals in the corresponding communication modes.

[0135] [2.4.1. First Mode] First, the first mode, which is included in the multiple communication modes of the high-frequency circuit 1A, will be explained with reference to Figure 10. Figure 10 is a diagram showing the first mode of the high-frequency circuit 1A according to this embodiment.

[0136] The first mode is a communication mode for receiving high-frequency signals processed by RFIC3a (e.g., cellular network signals) and high-frequency signals processed by RFIC3b (e.g., WLAN signals).

[0137] In this first mode, the switch circuit 40 connects the common terminal 400 to the selection terminal 401. Furthermore, the switch circuit 50A connects the common terminal 500 to the selection terminals 501 and 502. Specifically, the switch circuit 50A closes switches 51, 52 and 53 and opens switch 54.

[0138] As a result, the two received signals are transmitted from antenna 2 to RFICs 3a and 3b via antenna connection terminal 100, switch circuit 40, filter 30, low-noise amplifier 20, switch circuit 50A, and high-frequency output terminals 111 and 112. Within switch circuit 50A, one of the two received signals is transmitted from common terminal 500 to selection terminal 501 via distributor 56 and switch 51, and the other of the two received signals is transmitted from common terminal 500 to selection terminal 502 via distributor 56 and switches 52 and 53.

[0139] [2.4.2. Second Mode] Next, the second mode, which is included in the multiple communication modes of the high-frequency circuit 1A, will be described with reference to Figure 11. Figure 11 is a diagram showing the second mode of the high-frequency circuit 1A according to this embodiment.

[0140] The second mode is a communication mode for receiving high-frequency signals (e.g., WLAN signals) that are processed by the RFIC3b.

[0141] In this second mode, switch circuit 40 connects the common terminal 400 to the selection terminal 401. Furthermore, switch circuit 50A connects the common terminal 500 to the selection terminal 502, but does not connect to the selection terminal 501. Specifically, switch circuit 50A closes switches 53 and 54 and opens switches 51 and 52.

[0142] As a result, the received signal is transmitted from antenna 2 to RFIC 3b via antenna connection terminal 100, switch circuit 40, filter 30, low-noise amplifier 20, switch circuit 50A, and high-frequency output terminal 112. Within switch circuit 50A, the received signal is transmitted from common terminal 500 to selection terminal 502 via switches 54 and 53.

[0143] The multiple communication modes of the high-frequency circuit 1A are not limited to the first and second modes. For example, the multiple communication modes of the high-frequency circuit 1A may include communication modes other than the first and second modes.

[0144] [2.5. Summary] As described above, the switch circuit 50A according to this embodiment includes a common terminal 500, selection terminals 501 and 502, a switch 51 configured to switch the conduction and non-conductivity of the signal path P1 connecting the common terminal 500 and the selection terminal 501, a switch 52 configured to switch the conduction and non-conductivity of the signal path P2 connecting the common terminal 500 and node N1, a switch 53 configured to switch the conduction and non-conductivity of the signal path P3 connecting node N1 and the selection terminal 502, a switch 54 configured to switch the conduction and non-conductivity of the signal path P4 connecting the common terminal 500 and node N1, and an inductor 57 connected between node N1 and ground. The number of switches on signal paths P2 and P3 and the number of switches on signal paths P4 and P3 are each greater than the number of switches on signal path P1.

[0145] According to this, since the inductor 57 is connected to signal paths P2 and P3, which have a large number of switches, and to signal paths P3 and P4, impedance mismatch due to the difference in off-capacitance with signal path P1, which has a small number of switches, can be suppressed. In other words, the degradation of the transmission characteristics of multiple signal paths with different numbers of switches can be suppressed. Furthermore, since the inductor 57 is common to signal paths P2 and P3 and to signal paths P3 and P4, the number of inductors can be reduced compared to when individual inductors are connected to signal paths P2 and P3 and to signal paths P3 and P4. In other words, the switch circuit 50A can be made smaller.

[0146] For example, in the switch circuit 50A according to this embodiment, the number of switches on the signal path P2 may be equal to the number of switches on the signal path P4.

[0147] According to this, the difference between the off capacitance of the switches on signal paths P2 and P3 and the off capacitance of the switches on signal paths P3 and P4 can be reduced, and the impedance can be effectively adjusted by the inductor 57.

[0148] For example, in the switch circuit 50A according to this embodiment, switch 53 may be directly connected to switches 52 and 54.

[0149] According to this, the inductor 57 is connected between node N1 on the path that directly connects switch 53 to switches 52 and 54 and to ground, so that the off-capacitance of switches 52 and 53, and the impedance mismatch caused by the off-capacitance of switches 53 and 54 can be effectively suppressed.

[0150] For example, in the switch circuit 50A according to this embodiment, in the first mode, switches 51, 52, and 53 may be closed and switch 54 may be open, and in the second mode, switches 53 and 54 may be closed and switches 51 and 52 may be open.

[0151] According to this, in the first mode, the common terminal 500 can be connected to the select terminals 501 and 502, and in the second mode, the common terminal 500 can be connected to the select terminal 502. The inductor 57 can suppress impedance mismatch due to the difference in the number of switches on the signal path in these first and second modes.

[0152] For example, the switch circuit 50A according to this embodiment may further include a distributor 56 which includes an input terminal 561 connected to a common terminal 500, an output terminal 562 connected to a selection terminal 501 via a switch 51, and an output terminal 563 connected to node N1 via a switch 52.

[0153] According to this, the input signal from the common terminal 500 can be distributed to two selectable terminals and output.

[0154] Furthermore, for example, in the switch circuit 50A according to this embodiment, switches 51, 52, 53, and 54, as well as the inductor 57, may be included in a single integrated circuit.

[0155] According to this, the 50A switch circuit can be made smaller.

[0156] (Modified version of Embodiment 2) In the above embodiment 2, in the circuit configuration of the communication device 5A, high-frequency circuit 1A, and switch circuit 50A, other circuit elements and wiring may be inserted between the paths connecting each circuit element and signal path disclosed in the drawings. For example, as shown in Figure 12, the switch circuit 50A according to a modified example of embodiment 2 may further include an inductor 58.

[0157] Inductor 58 is an example of a second inductor and is connected between the common terminal 500 and ground. Specifically, one end of inductor 58 is connected to the common terminal 500, and the other end of inductor 58 is connected to ground.

[0158] Thus, the switch circuit 50A according to this modified example further includes an inductor 58 connected between the common terminal 500 and ground.

[0159] According to this, the impedance in multiple signal paths with different numbers of switches can be further adjusted, and the degradation of transmission characteristics can be further suppressed.

[0160] (Embodiment 3) Next, Embodiment 3 will be described. This embodiment differs from Embodiment 1 in that the signal path P4 is not included in the switch circuit. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 1.

[0161] Figure 13 is a circuit diagram of the communication device 5B according to this embodiment. In Figure 13, dashed arrows represent signal paths.

[0162] Figure 13 is an illustrative circuit diagram, and the communication device 5B, high-frequency circuit 1B, and switch circuit 50B can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the descriptions of the communication device 5B, high-frequency circuit 1B, and switch circuit 50B provided below should not be interpreted restrictively.

[0163] [3.1. Circuit configuration of communication device 5B] The communication device 5B according to this embodiment can be used to provide a wireless connection, similar to the communication device 5 according to Embodiment 1. The communication device 5B comprises a high-frequency circuit 1B, an antenna 2, RFICs 3a, 3b, and 3c, and BBICs 4a, 4b, and 4c. In other words, the communication device 5B differs from the communication device 5 according to Embodiment 1 in that it includes a high-frequency circuit 1B instead of the high-frequency circuit 1.

[0164] [3.2. Circuit Configuration of High-Frequency Circuit 1B] The high-frequency circuit 1B according to this embodiment includes a low-noise amplifier 20, a filter 30, switch circuits 40 and 50B, an antenna connection terminal 100, and high-frequency output terminals 111, 112, and 113. In other words, the high-frequency circuit 1B differs from the high-frequency circuit 1 according to Embodiment 1 in that it includes a switch circuit 50B instead of a switch circuit 50.

[0165] [3.3. Circuit configuration of switch circuit 50B] The switch circuit 50B according to this embodiment is connected between the low-noise amplifier 20 and the high-frequency output terminals 111, 112, and 113. The switch circuit 50B includes a common terminal 500, selection terminals 501, 502, and 503, switches 51, 52, 53, and 55, a distributor 56, and an inductor 57.

[0166] The common terminal 500 is an external connection terminal of the switch circuit 50B. The common terminal 500 is connected to the output terminal of the low-noise amplifier 20 outside the switch circuit 50B and to the distributor 56 inside the switch circuit 50B.

[0167] The selection terminal 501 is an example of a first selection terminal and is an external connection terminal of the switch circuit 50B. The selection terminal 501 is connected to the high-frequency output terminal 111 outside the switch circuit 50B and to terminal 512 of the switch 51 inside the switch circuit 50B.

[0168] The selection terminal 502 is an example of a second selection terminal and is an external connection terminal of the switch circuit 50B. The selection terminal 502 is connected to the high-frequency output terminal 112 outside the switch circuit 50B and to terminal 532 of the switch 53 inside the switch circuit 50B.

[0169] The selection terminal 503 is an example of a third selection terminal and is an external connection terminal of the switch circuit 50B. The selection terminal 503 is connected to the high-frequency output terminal 113 outside the switch circuit 50B and to terminal 552 of the switch 55 inside the switch circuit 50B.

[0170] Switch 51 is an example of a first switch and is connected between the common terminal 500 and the selection terminal 501. Specifically, switch 51 includes a terminal 511 connected to the output terminal 562 of the distributor 56 and a terminal 512 connected to the selection terminal 501.

[0171] In this configuration, the switch 51 can switch the conduction and non-conductivity of the signal path P1 by switching the connection and non-connection between terminals 511 and 512 based on a control signal from RFIC 3a, for example.

[0172] Signal path P1 is an example of a first signal path, and is the path connecting the common terminal 500 and the selection terminal 501. Specifically, signal path P1 is the path from the common terminal 500 to the selection terminal 501, via the distributor 56 and the switch 51.

[0173] Switch 52 is an example of a second switch and is connected between the common terminal 500 and node N1. Specifically, switch 52 includes terminal 521 connected to the output terminal 563 of the distributor 56 and terminal 522 connected to node N1. In this embodiment, terminal 522 of switch 52 is directly connected to terminal 531 of switch 53 and terminal 551 of switch 55.

[0174] In this configuration, the switch 52 can switch the conduction and non-conductivity of the signal path P2 by switching the connection and non-connection between terminals 521 and 522 based on control signals from RFIC 3b and / or 3c, for example.

[0175] Signal path P2 is an example of a second signal path, and is the path connecting the common terminal 500 and node N1. Specifically, signal path P2 is the path from the common terminal 500 to node N1 via the distributor 56 and switch 52.

[0176] Node N1 is an example of a first node, and is a region on the signal paths P2 and P3 to which the inductor 57 is connected. In other words, node N1 is a region on the path connecting switches 52 and 53.

[0177] Switch 53 is an example of a third switch and is connected between node N1 and selection terminal 502. Specifically, switch 53 includes terminal 531 connected to node N1 and terminal 532 connected to selection terminal 502. In this embodiment, terminal 531 of switch 53 is directly connected to terminal 522 of switch 52.

[0178] In this configuration, the switch 53 can switch the conduction and non-conductivity of the signal path P3 by switching the connection and non-connection between terminals 531 and 532 based on a control signal from RFIC3b, for example.

[0179] Signal path P3 is an example of a third signal path, connecting node N1 and selection terminal 502. Specifically, signal path P3 is the path from node N1 to selection terminal 502 via switch 53.

[0180] Switch 55 is an example of a fourth switch and is connected between node N1 and selection terminal 503. Specifically, switch 55 includes terminal 551 connected to node N1 and terminal 552 connected to selection terminal 503. In this embodiment, terminal 551 of switch 55 is directly connected to terminal 522 of switch 52.

[0181] In this configuration, the switch 55 can switch the conduction and non-conductivity of the signal path P5 by switching the connection and non-connection between terminals 551 and 552 based on a control signal from RFIC3c, for example.

[0182] Signal path P5 is an example of a fourth signal path, connecting node N1 and selection terminal 503. Specifically, signal path P5 is the path from node N1 to selection terminal 503 via switch 55.

[0183] Each of switches 51-53 and 55 is composed of, for example, an SPST type switch circuit. For example, each of switches 51-53 and 55 includes multiple FETs connected in series. Alternatively, each of switches 51-53 and 55 may include only a single FET.

[0184] The distributor 56 includes an input terminal 561 and output terminals 562 and 563. The input terminal 561 is connected to a common terminal 500. Output terminal 562 is an example of a first output terminal and is connected to a selection terminal 501 via a switch 51. Output terminal 563 is an example of a second output terminal and is connected to node N1 via a switch 52. The distributor 56 can distribute the high-frequency signal supplied to the input terminal 561 to signal paths P1 and P2. A Wilkinson divider or a diplexer can be used as the distributor 56, but the distributor 56 is not limited to these. Note that the distributor 56 does not necessarily have to be included in the switch circuit 50B.

[0185] Inductor 57 is an example of a first inductor and is connected between node N1 and ground. Specifically, one end of inductor 57 is connected to node N1, and the other end of inductor 57 is connected to ground.

[0186] In such a switch circuit 50B, the number of switches on signal paths P2 and P3 (2 in this embodiment) and the number of switches on signal paths P2 and P5 (2 in this embodiment) are each greater than the number of switches on signal path P1 (1 in this embodiment). As a result, the off-capacitance of the switches on signal paths P2 and P3 and the off-capacitance of the switches on signal paths P2 and P5 are each greater than the off-capacitance of the switches on signal path P1.

[0187] Furthermore, the number of switches on signal path P3 (1 in this embodiment) is equal to the number of switches on signal path P5 (1 in this embodiment). As a result, the off-capacitance of the switches on signal paths P2 and P3 is equal to the off-capacitance of the switches on signal paths P2 and P5.

[0188] [3.4. Multiple Communication Modes] Next, the various communication modes of the high-frequency circuit 1B will be explained with reference to Figures 14 and 15. In Figures 14 and 15, the dashed arrows represent the receiving paths of the high-frequency signals in the corresponding communication modes.

[0189] [3.4.1. First Mode] First, the first mode, which is included in the multiple communication modes of the high-frequency circuit 1B, will be explained with reference to Figure 14. Figure 14 is a diagram showing the first mode of the high-frequency circuit 1B according to this embodiment.

[0190] The first mode is a communication mode for receiving high-frequency signals processed by RFIC3a (e.g., cellular network signals) and high-frequency signals processed by RFIC3b (e.g., WLAN signals).

[0191] In this first mode, switch circuit 40 connects the common terminal 400 to the selection terminal 401. Furthermore, switch circuit 50B connects the common terminal 500 to selection terminals 501 and 502, but not to selection terminal 503. Specifically, switch circuit 50B closes switches 51, 52 and 53 and opens switch 55.

[0192] As a result, the two received signals are transmitted from antenna 2 to RFICs 3a and 3b via antenna connection terminal 100, switch circuit 40, filter 30, low-noise amplifier 20, switch circuit 50B, and high-frequency output terminals 111 and 112. Within switch circuit 50B, one of the two received signals is transmitted from common terminal 500 to selection terminal 501 via distributor 56 and switch 51, and the other of the two received signals is transmitted from common terminal 500 to selection terminal 502 via distributor 56 and switches 52 and 53.

[0193] [3.4.2. Second Mode] Next, the second mode, which is included in the multiple communication modes of the high-frequency circuit 1B, will be described with reference to Figure 15. Figure 15 is a diagram showing the second mode of the high-frequency circuit 1B according to this embodiment.

[0194] The second mode is a communication mode for receiving high-frequency signals processed by RFIC3a (e.g., cellular network signals) and high-frequency signals processed by RFIC3c (e.g., UWB signals).

[0195] In this second mode, switch circuit 40 connects the common terminal 400 to the selection terminal 401. Furthermore, switch circuit 50B connects the common terminal 500 to selection terminals 501 and 503, but not to selection terminal 502. Specifically, switch circuit 50B closes switches 51, 52 and 55 and opens switch 53.

[0196] As a result, the two received signals are transmitted from antenna 2 to RFICs 3a and 3c via antenna connection terminal 100, switch circuit 40, filter 30, low-noise amplifier 20, switch circuit 50B, and high-frequency output terminals 111 and 113. Within switch circuit 50B, one of the two received signals is transmitted from common terminal 500 to selection terminal 501 via distributor 56 and switch 51, while the other of the two received signals is transmitted from common terminal 500 to selection terminal 503 via distributor 56 and switches 52 and 55.

[0197] Furthermore, the multiple communication modes of the high-frequency circuit 1B are not limited to the first and second modes. For example, the multiple communication modes of the high-frequency circuit 1B may include communication modes other than the first and second modes.

[0198] [3.5. Summary] As described above, the switch circuit 50B according to this embodiment includes a common terminal 500, selection terminals 501, 502 and 503, a switch 51 configured to switch the conduction and non-conductivity of the signal path P1 connecting the common terminal 500 and the selection terminal 501, a switch 52 configured to switch the conduction and non-conductivity of the signal path P2 connecting the common terminal 500 and node N1, a switch 53 configured to switch the conduction and non-conductivity of the signal path P3 connecting node N1 and selection terminal 502, a switch 54 configured to switch the conduction and non-conductivity of the signal path P4 connecting node N1 and selection terminal 503, and an inductor 57 connected between node N1 and ground. The number of switches on signal paths P2 and P3 and the number of switches on signal paths P2 and P4 are each greater than the number of switches on signal path P1.

[0199] According to this, since the inductor 57 is connected to signal paths P2 and P3, which have a large number of switches, and to signal paths P2 and P5, impedance mismatch due to the difference in off-capacitance with signal path P1, which has a small number of switches, can be suppressed. In other words, the degradation of the transmission characteristics of multiple signal paths with different numbers of switches can be suppressed. Furthermore, since the common inductor 57 is connected to signal paths P2 and P3 and to signal paths P2 and P5, the number of inductors can be reduced compared to when individual inductors are connected to signal paths P2 and P3 and to signal paths P2 and P5. In other words, the switch circuit 50B can be made smaller.

[0200] For example, in the switch circuit 50B according to this embodiment, the number of switches on the signal path P3 may be equal to the number of switches on the signal path P5.

[0201] According to this, the difference between the off capacitance of the switches on signal paths P2 and P3 and the off capacitance of the switches on signal paths P2 and P5 can be reduced, and the impedance can be effectively adjusted by the inductor 57.

[0202] For example, in the switch circuit 50B according to this embodiment, switch 52 may be directly connected to switches 53 and 54.

[0203] According to this, the inductor 57 is connected between node N1 on the path that directly connects switch 52 to switches 53 and 55 and to ground, so that the off-capacitance of switches 52 and 53, as well as impedance mismatch caused by the off-capacitance of switches 52 and 55, can be effectively suppressed.

[0204] For example, in the switch circuit 50B according to this embodiment, in the first mode, switches 51, 52, and 53 may be closed and switch 54 may be open, and in the second mode, switches 51, 52, and 54 may be closed and switch 53 may be open.

[0205] According to this, in the first mode, the common terminal 500 can be connected to the select terminals 501 and 502, and in the second mode, the common terminal 500 can be connected to the select terminals 501 and 503. The inductor 57 can suppress impedance mismatch due to the difference in the number of switches on the signal path in these first and second modes.

[0206] For example, the switch circuit 50B according to this embodiment may further include a distributor 56 that includes an input terminal 561 connected to a common terminal 500, an output terminal 562 connected to a selection terminal 501 via a switch 51, and an output terminal 563 connected to node N1 via a switch 52.

[0207] According to this, the input signal from the common terminal 500 can be distributed to two selectable terminals and output.

[0208] (Modified example of Embodiment 3) In the above embodiment 3, in the circuit configuration of the communication device 5B, high-frequency circuit 1B, and switch circuit 50B, other circuit elements and wiring may be inserted between the paths connecting each circuit element and signal path disclosed in the drawings. For example, as shown in Figure 16, the switch circuit 50B according to a modified example of embodiment 3 may further include an inductor 58.

[0209] Inductor 58 is an example of a second inductor and is connected between the common terminal 500 and ground. Specifically, one end of inductor 58 is connected to the common terminal 500, and the other end of inductor 58 is connected to ground.

[0210] Thus, the switch circuit 50B according to this modified example further includes an inductor 58 connected between the common terminal 500 and ground.

[0211] According to this, the impedance in multiple signal paths with different numbers of switches can be further adjusted, and the degradation of transmission characteristics can be further suppressed.

[0212] (Embodiment 4) Next, Embodiment 4 will be described. This embodiment differs from Embodiment 1 in that an SPDT (Single-Pole Double-Throw) type switch is connected to the common terminal of the switch circuit, and a matching circuit is included in the switch circuit. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 1.

[0213] Figure 17 is a circuit diagram of the communication device 5C according to this embodiment. In Figure 17, dashed arrows represent signal paths.

[0214] Figure 17 is an illustrative circuit diagram, and the communication device 5C, high-frequency circuit 1C, and switch circuit 50C can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the following descriptions of the communication device 5C, high-frequency circuit 1C, and switch circuit 50C should not be interpreted restrictively.

[0215] [4.1. Circuit configuration of communication device 5C] The communication device 5C according to this embodiment can be used to provide a wireless connection, similar to the communication device 5 according to Embodiment 1. The communication device 5C comprises a high-frequency circuit 1C, an antenna 2, RFICs 3a, 3b, and 3c, and BBICs 4a, 4b, and 4c. In other words, the communication device 5C differs from the communication device 5 according to Embodiment 1 in that it comprises a high-frequency circuit 1C instead of a high-frequency circuit 1.

[0216] [4.2. Circuit configuration of high-frequency circuit 1C] The high-frequency circuit 1C according to this embodiment includes a low-noise amplifier 20, a filter 30, switch circuits 40 and 50C, an antenna connection terminal 100, and high-frequency output terminals 111, 112, and 113. In other words, the high-frequency circuit 1C differs from the high-frequency circuit 1 according to Embodiment 1 in that it includes a switch circuit 50C instead of a switch circuit 50.

[0217] [4.3. Circuit configuration of switch circuit 50C] The switch circuit 50C according to this embodiment is connected between the low-noise amplifier 20 and the high-frequency output terminals 111, 112, and 113. The switch circuit 50C includes a common terminal 500, selection terminals 501, 502, and 503, switches 51, 52, 53, 54, 55, 59, and 60, a distributor 56, an inductor 57, and a matching circuit (matching network) 61.

[0218] Switch 59 is an example of a sixth switch and is connected between the common terminal 500 and the input terminal 561 of the distributor 56. Specifically, switch 59 includes a terminal 591 connected to the common terminal 500 and a terminal 592 connected to the input terminal 561 of the distributor 56.

[0219] In this configuration, the switch 59 can switch between continuity and non-continuity between the common terminal 500 and the distributor 56 by switching the connection and disconnection between terminals 591 and 592 based on control signals from RFIC 3a and / or 3b, for example.

[0220] Switch 60 is an example of a seventh switch and is connected between the common terminal 500 and the matching circuit 61. Specifically, switch 60 includes a terminal 601 connected to the common terminal 500 and a terminal 602 connected to the matching circuit 61.

[0221] In this configuration, the switch 60 can switch between continuity and non-continuity between the common terminal 500 and the matching circuit 61 by switching the connection and disconnection between terminals 601 and 602 based on control signals from RFIC 3b and / or 3c, for example.

[0222] Such switches 59 and 60 can function as SPDT type switches. That is, switches 59 and 60 are controlled to be selectively closed, and not both can be closed at the same time. Specifically, when switch 59 is closed, switch 60 is opened, and when switch 60 is closed, switch 59 is opened.

[0223] The matching circuit 61 is connected between switch 60 and switch 54. The matching circuit 61 includes, for example, an inductor and / or a capacitor. The matching circuit 61 can achieve impedance matching in the signal circuit P4. Note that the matching circuit 61 does not necessarily have to be included in the switch circuit 50C.

[0224] The multiple communication modes of the high-frequency circuit 1C according to this embodiment may include the first to fourth modes (Figures 4 to 7), similar to the high-frequency circuit 1 according to Embodiment 1. In the first and third modes, switch 59 is closed and switch 60 is open. On the other hand, in the second and fourth modes, switch 59 is open and switch 60 is closed.

[0225] [4.3. Summary] As described above, the switch circuit 50C according to this embodiment may further include a switch 59 connected between the common terminal 500 and the input terminal 561 of the distributor 56, and a switch 60 connected between the common terminal 500 and the switch 54.

[0226] According to this, in communication modes (e.g., the second and fourth modes) in which a high-frequency signal is output only from selection terminal 502 or 503 among selection terminals 501 to 503, the variation in characteristics caused by the distributor 56 can be suppressed. Specifically, when the signal path P4 is used, the switch 59 is opened, which suppresses the variation in impedance when viewed from selection terminal 502 or 503 to selection terminal 501 caused by the distributor 56.

[0227] For example, the switch circuit 50C according to this embodiment may further include a matching circuit 61 connected between switch 60 and switch 54.

[0228] According to this, impedance matching can be achieved in the signal path P4.

[0229] (Other embodiments) The switch circuit, high-frequency circuit, and communication device according to the present invention have been described above based on embodiments and their modifications. However, the switch circuit, high-frequency circuit, and communication device according to the present invention are not limited to the above embodiments and their modifications. The present invention also includes other embodiments realized by combining any components in the above embodiments and their modifications, modifications obtained by applying various modifications to the above embodiments and their modifications that a person skilled in the art could conceive of without departing from the spirit of the present invention, and various devices incorporating the above switch circuit or high-frequency circuit.

[0230] For example, in the circuit configuration of the switch circuit or high-frequency circuit according to the above embodiment and its modified form, other circuit elements and wiring may be inserted between the paths connecting each circuit element and signal path disclosed in the drawings. For example, an impedance matching circuit may be connected between the select terminal 401 of the switch circuit 40 and the filter 30, and / or between the filter 30 and the low-noise amplifier 20. Also, for example, a coupler may be connected between the common terminal 400 of the switch circuit 40 and the antenna connection terminal 100. Also, for example, in the switch circuits 50, 50A, or 50B, a switch may be connected between the path connecting switch 51 and select terminal 501 and ground, and a switch may be connected between the path connecting switch 53 and select terminal 502 and ground. Also, in the switch circuit 50 or 50B, a switch may be connected between the path connecting switch 55 and select terminal 503 and ground.

[0231] In the above embodiments and their modifications, the inductor 57 was connected to node N1, but other circuit elements capable of canceling the switch's off capacitance may also be connected to node N1.

[0232] In the above embodiments and their modifications, the switch circuits 50, 50A, and 50B were used to switch the receiving path, but they may also be used to switch the transmitting path. In this case, the high-frequency circuits 1, 1A, and 1B may include a power amplifier instead of the low-noise amplifier 20, or in addition to the low-noise amplifier 20.

[0233] The following describes the features of the switch circuits described based on the above embodiments and their modified forms.

[0234] <1> Common terminal, first selection terminal, second selection terminal and third selection terminal, A first switch configured to switch between conduction and non-conductivity of a first signal path connecting the common terminal and the first selection terminal, A second switch configured to switch between conduction and non-conductivity of the second signal path connecting the common terminal and the first node, A third switch configured to switch the conduction and non-conductivity of a third signal path connecting the first node and the second selection terminal, A fourth switch configured to switch the conduction and non-conductivity of the fourth signal path connecting the common terminal and the second node, A fifth switch configured to switch the conduction and non-conductivity of a fifth signal path connecting the second node and the third selection terminal, The system comprises a first inductor connected between the first node and ground, and between the second node and ground, The number of switches on the second signal path and the third signal path, and the number of switches on the fourth signal path and the fifth signal path, are each greater than the number of switches on the first signal path. Switch circuit.

[0235] <2> The number of switches on the second signal path and the third signal path is equal to the number of switches on the fourth signal path and the fifth signal path. <1> The switch circuit described above.

[0236] <3> The aforementioned switch 2 is directly connected to the aforementioned switch 3. The aforementioned switch 4 is directly connected to the aforementioned switch 5. <1> or <2> The switch circuit described above.

[0237] <4> The switch circuit further includes a second inductor connected between the common terminal and ground. <1> ~ <3> A switch circuit as described in one of the following.

[0238] <5> In the first mode, the first switch, the second switch and the third switch are closed, and the fourth switch and the fifth switch are open. In the second mode, the fourth and fifth switches are closed, and the first, second, and third switches are open. In the third mode, the first switch, the second switch and the fifth switch are closed, and the third switch and the fourth switch are open. In the fourth mode, the third and fourth switches are opened, and the first, second, and fifth switches are closed. <1> ~ <4> A switch circuit as described in one of the following.

[0239] <6> The switch circuit further includes a distributor comprising an input terminal connected to the common terminal, a first output terminal connected to the first selection terminal via the first switch, and a second output terminal connected to the first node and the second node via the second switch. <1> ~ <5> A switch circuit as described in one of the following.

[0240] <7> The aforementioned switch circuit further, A sixth switch connected between the common terminal and the input terminal of the distributor, A seventh switch is connected between the common terminal and the fourth switch, <6> The switch circuit described above.

[0241] <8> The switch circuit further includes a matching circuit connected between the seventh switch and the fourth switch. <7> The switch circuit described above.

[0242] <9> The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the first inductor are included in a single integrated circuit. <1> ~ <8> A switch circuit as described in one of the following.

[0243] <10> Common terminal, first selection terminal and second selection terminal, A first switch configured to switch between conduction and non-conductivity of a first signal path connecting the common terminal and the first selection terminal, A second switch configured to switch between conduction and non-conductivity of the second signal path connecting the common terminal and the first node, A third switch configured to switch the conduction and non-conductivity of a third signal path connecting the first node and the second selection terminal, A fourth switch configured to switch the conduction and non-conductivity of the fourth signal path connecting the common terminal and the first node, The system comprises a first inductor connected between the first node and ground, The number of switches on the second signal path and the third signal path, and the number of switches on the fourth signal path and the third signal path, are each greater than the number of switches on the first signal path. Switch circuit.

[0244] <11> The number of switches on the second signal path is equal to the number of switches on the fourth signal path. <10> The switch circuit described above.

[0245] <12> The aforementioned second switch and the aforementioned fourth switch are directly connected to the aforementioned third switch. <10> or <11> The switch circuit described above.

[0246] <13> The switch circuit further includes a second inductor connected between the common terminal and ground. <10> ~ <12> A switch circuit as described in one of the following.

[0247] <14> In the first mode, the first switch, the second switch and the third switch are closed, and the fourth switch is open. In the second mode, the third and fourth switches are closed, and the first and second switches are opened. <10> ~ <13> A switch circuit as described in one of the following.

[0248] <15> The switch circuit further includes a distributor comprising an input terminal connected to the common terminal, a first output terminal connected to the first selection terminal via the first switch, and a second output terminal connected to the first node via the second switch. <10> ~ <14> A switch circuit as described in one of the following.

[0249] <16> The first switch, the second switch, the third switch, the fourth switch, and the first inductor are included in a single integrated circuit. <10> ~ <15> A switch circuit as described in one of the following.

[0250] <17> Common terminal, first selection terminal, second selection terminal and third selection terminal, A first switch configured to switch between conduction and non-conductivity of a first signal path connecting the common terminal and the first selection terminal, A second switch configured to switch between conduction and non-conductivity of the second signal path connecting the common terminal and the first node, A third switch configured to switch between conduction and non-conduction of a third signal path connecting the first node and the second selection terminal; A fourth switch configured to switch between conduction and non-conduction of a fourth signal path connecting the first node and the third selection terminal; A first inductor connected between the first node and ground, and comprising; The number of switches on the second signal path and the third signal path and the number of switches on the second signal path and the fourth signal path are each greater than the number of switches on the first signal path. Switch circuit.

[0251] <18> The number of switches on the third signal path is equal to the number of switches on the fourth signal path. The switch circuit according to <17>.

[0252] <19> The second switch is directly connected to the third switch and the fourth switch. The switch circuit according to <17> or <18>. <00009,13> <20> In the first mode, the first switch, the second switch, and the third switch are closed, and the fourth switch is open. In the second mode, the first switch, the second switch, and the fourth switch are closed, and the third switch is open. The switch circuit according to any one of <17> to <19>.

Industrial Applicability

[0254] The present invention can be widely used in communication devices such as mobile phones as a switch circuit disposed in the front-end portion.

Explanation of Signs

[0255] 1, 1A, 1B, 1C High-frequency circuit 2 Antenna 3a, 3b, 3c RFIC 4a, 4b, 4c BBIC 5, 5A, 5B, 5C communication equipment 20 Low-noise amplifier 30 filters 40, 50, 50A, 50B, 50C switch circuits 51, 52, 53, 54, 55, 59, 60 switches 56 Distributor 57, 58 Inductors 61 Matching circuit 100 Antenna connection terminal 111, 112, 113 High-frequency output terminals 400, 500 Common terminal 401, 501, 502, 503 Selectable terminals Terminals 511, 512, 521, 522, 531, 532, 541, 542, 551, 552 561 Input terminals 562, 563 Output terminals N1, N2 nodes P1, P2, P3, P4, P5 signal path Zin Input Impedance Zout output impedance

Claims

1. Common terminal, first selection terminal, second selection terminal and third selection terminal, A first switch configured to switch between conduction and non-conductivity of a first signal path connecting the common terminal and the first selection terminal, A second switch configured to switch between conduction and non-conductivity of the second signal path connecting the common terminal and the first node, A third switch configured to switch the conduction and non-conductivity of a third signal path connecting the first node and the second selection terminal, A fourth switch configured to switch between conduction and non-conductivity of the fourth signal path connecting the common terminal and the second node, A fifth switch configured to switch the conduction and non-conductivity of a fifth signal path connecting the second node and the third selection terminal, The system comprises a first inductor connected between the first node and ground, and between the second node and ground, The number of switches on the second signal path and the third signal path, and the number of switches on the fourth signal path and the fifth signal path, are each greater than the number of switches on the first signal path. Switch circuit.

2. The number of switches on the second signal path and the third signal path is equal to the number of switches on the fourth signal path and the fifth signal path. The switch circuit according to claim 1.

3. The aforementioned second switch is directly connected to the aforementioned third switch, The aforementioned fourth switch is directly connected to the aforementioned fifth switch. The switch circuit according to claim 1 or 2.

4. The switch circuit further includes a second inductor connected between the common terminal and ground. The switch circuit according to claim 1 or 2.

5. In the first mode, the first switch, the second switch and the third switch are closed, and the fourth switch and the fifth switch are open. In the second mode, the fourth and fifth switches are closed, and the first, second, and third switches are open. In the third mode, the first switch, the second switch and the fifth switch are closed, and the third switch and the fourth switch are open. In the fourth mode, the third and fourth switches are opened, and the first, second, and fifth switches are closed. The switch circuit according to claim 1 or 2.

6. The switch circuit further includes a distributor comprising an input terminal connected to the common terminal, a first output terminal connected to the first selection terminal via the first switch, and a second output terminal connected to the first node and the second node via the second switch. The switch circuit according to claim 1 or 2.

7. The aforementioned switch circuit further, A sixth switch connected between the common terminal and the input terminal of the distributor, A seventh switch is connected between the common terminal and the fourth switch, The switch circuit according to claim 6.

8. The switch circuit further includes a matching circuit connected between the seventh switch and the fourth switch. The switch circuit according to claim 7.

9. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the first inductor are included in a single integrated circuit. The switch circuit according to claim 1 or 2.

10. Common terminal, first selection terminal and second selection terminal, A first switch configured to switch between conduction and non-conductivity of a first signal path connecting the common terminal and the first selection terminal, A second switch configured to switch between conduction and non-conductivity of the second signal path connecting the common terminal and the first node, A third switch configured to switch the conduction and non-conductivity of a third signal path connecting the first node and the second selection terminal, A fourth switch configured to switch the conduction and non-conductivity of the fourth signal path connecting the common terminal and the first node, The system comprises a first inductor connected between the first node and ground, The number of switches on the second signal path and the third signal path, and the number of switches on the fourth signal path and the third signal path, are each greater than the number of switches on the first signal path. Switch circuit.

11. The number of switches on the second signal path is equal to the number of switches on the fourth signal path. The switch circuit according to claim 10.

12. The second and fourth switches are directly connected to the third switch. The switch circuit according to claim 10 or 11.

13. The switch circuit further includes a second inductor connected between the common terminal and ground. The switch circuit according to claim 10 or 11.

14. In the first mode, the first switch, the second switch and the third switch are closed, and the fourth switch is open. In the second mode, the third and fourth switches are closed, and the first and second switches are opened. The switch circuit according to claim 10 or 11.

15. The switch circuit further includes a distributor comprising an input terminal connected to the common terminal, a first output terminal connected to the first selection terminal via the first switch, and a second output terminal connected to the first node via the second switch. The switch circuit according to claim 10 or 11.

16. The first switch, the second switch, the third switch, the fourth switch, and the first inductor are included in a single integrated circuit. The switch circuit according to claim 10 or 11.

17. Common terminal, first selection terminal, second selection terminal and third selection terminal, A first switch configured to switch between conduction and non-conductivity of a first signal path connecting the common terminal and the first selection terminal, A second switch configured to switch between conduction and non-conductivity of the second signal path connecting the common terminal and the first node, A third switch configured to switch the conduction and non-conductivity of a third signal path connecting the first node and the second selection terminal, A fourth switch configured to switch the conduction and non-conductivity of a fourth signal path connecting the first node and the third selection terminal, The system comprises a first inductor connected between the first node and ground, The number of switches on the second signal path and the third signal path, and the number of switches on the second signal path and the fourth signal path, are each greater than the number of switches on the first signal path. Switch circuit.

18. The number of switches on the third signal path is equal to the number of switches on the fourth signal path. The switch circuit according to claim 17.

19. The second switch is directly connected to the third switch and the fourth switch. The switch circuit according to claim 17 or 18.

20. In the first mode, the first switch, the second switch and the third switch are closed, and the fourth switch is open. In the second mode, the first switch, the second switch and the fourth switch are closed, and the third switch is opened. The switch circuit according to claim 17 or 18.

Images