Method for manufacturing a semiconductor device and a semiconductor device.

Abstract

The objective is to provide semiconductor devices with improved quality. [Solution] The manufacturing method of the semiconductor device according to the embodiment comprises a groove formation step, a first bonding step, a grinding step, a first ashing step, and a metal film deposition step. The groove formation step is a step of forming a plurality of grooves in the substrate from the device surface side on which the element region is formed. The first bonding step is a step of bonding the device surface to a support substrate via an adhesive. The grinding step is a step of forming a back surface by grinding the substrate from the opposite side of the device surface. The grinding step is a step of separating the substrate into individual pieces by making the thickness of the substrate less than or equal to the depth of the grooves. The first ashing step is a step of ashing the adhesive inside the grooves from the back surface side. The metal film deposition step is a step of forming a metal film on the back surface.

Description

Technical Field

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[0001] Embodiments of the present invention relate to a method for manufacturing a semiconductor device and a semiconductor device.

Background Art

[0002] In the manufacturing process of a semiconductor device, a singulation process for separating a base material (wafer) into individual semiconductor chips is performed. The singulation process is a process that easily causes burrs or chips in the semiconductor device and may reduce the manufacturing yield of the semiconductor device.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The problem to be solved by the present invention is to provide a semiconductor device with improved quality.

Means for Solving the Problems

[0005] The method for manufacturing a semiconductor device according to an embodiment includes a groove forming step, a first bonding step, a grinding step, a first ashing step, and a metal film forming step. The groove forming step is a step of forming a plurality of grooves in a base material from the device surface side where an element region is formed. The first bonding step is a step of bonding the device surface to a support substrate via an adhesive. The grinding step is a step of grinding the base material from the opposite side of the device surface to form a back surface. The grinding step is a step of singulating the base material by making the thickness of the base material equal to or less than the depth of the groove. The first ashing step is a step of performing ashing of the adhesive inside the groove from the back surface side. The metal film forming step is a step of forming a metal film on the back surface. [[ID=**********]]

Brief Description of the Drawings

[0006] [Figure 1] A schematic diagram of the semiconductor device according to the first embodiment. [Figure 2] A schematic cross-sectional view of the semiconductor device of the first embodiment along the line II-II in Figure 1. [Figure 3] A flowchart illustrating the manufacturing method of the semiconductor device according to the first embodiment. [Figure 4] A schematic diagram showing the device surface formation process of the first embodiment. [Figure 5] A schematic diagram showing the first step of the groove formation process in the first embodiment. [Figure 6] A schematic diagram showing the second step of the groove formation process in the first embodiment. [Figure 7] A schematic diagram showing the first application step of the first embodiment. [Figure 8] A schematic diagram showing the grinding process of the first embodiment. [Figure 9] A schematic diagram showing the first ashing step of the first embodiment. [Figure 10] A schematic diagram showing the protective film deposition process of the first embodiment. [Figure 11] A schematic diagram showing the etching process of the first embodiment. [Figure 12] A schematic diagram showing the metal film deposition process of the first embodiment. [Figure 13] A schematic diagram showing the second ashing step of the first embodiment. [Figure 14] A schematic diagram showing the second application step of the first embodiment. [Figure 15] A schematic diagram showing the support substrate removal process of the first embodiment. [Figure 16] A schematic cross-sectional view of the semiconductor device according to the second embodiment. [Figure 17] A schematic diagram showing the groove formation process of the second embodiment. [Figure 18] A schematic diagram showing the grinding process of the second embodiment. [Figure 19] A schematic diagram showing the substrate after the first ashing step and the metal film deposition step of the second embodiment. [Figure 20] A schematic diagram of the substrate after the groove formation process of this modified example has been performed. [Figure 21] Schematic diagram showing the grinding process of this modified example. [Figure 22] Schematic diagram showing the substrate after performing the first assembling process and the metal film forming process of this modified example.

Embodiments for Carrying out the Invention

[0007] Hereinafter, a method for manufacturing a semiconductor device and a semiconductor device according to an embodiment will be described with reference to the drawings.

[0008] In this specification, in order to indicate the positional relationship of components and the like, the upward direction of the drawing is described as "up" and the downward direction of the drawing is described as "down". In this specification, the concepts of "up" and "down" are not necessarily terms indicating the relationship with the direction of gravity.

[0009] (First Embodiment) FIG. 1 is a schematic diagram of a semiconductor device 1 according to the first embodiment. FIG. 2 is a cross-sectional schematic diagram of the semiconductor device 1 according to the first embodiment taken along line II-II of FIG. 1.

[0010] The semiconductor device 1 of this embodiment is, for example, a MOSFET (Metal-Oxide-Semiconductor Field-effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor), etc. The semiconductor device 1 of this embodiment includes a rectangular plate-shaped semiconductor chip 10T and a metal film 20 provided on the surface of the semiconductor chip 10T.

[0011] The semiconductor chip 10T is made of a semiconductor material. In this specification, the semiconductor material is, for example, silicon (Si), silicon carbide (SiC), GaAs (gallium arsenide), or GaN (gallium nitride), etc., but is not limited thereto.

[0012] As shown in Figures 1 and 2, the semiconductor chip 10T has a device surface (first surface) 10a, a back surface (second surface) 10b located on the opposite side of the device surface 10a, and four side surfaces 10c connecting the device surface 10a and the back surface 10b. The number of side surfaces 10c is not limited to this embodiment. For example, if the device surface 10a and the back surface 10b are hexagonal in plan view, the semiconductor chip 10T has six side surfaces 10c.

[0013] An element region is formed on the device surface 10a. That is, for example, a MOSFET or an IGBT is formed on the device surface 10a. As shown in Figure 2, in the following description, the distance between the device surface 10a and the back surface 10b is referred to as the thickness H of the semiconductor chip 10T.

[0014] As shown in Figure 2, a stepped shape is provided on the side surface 10c of the semiconductor chip 10T. The side surface 10c has a first side surface portion 10d, a second side surface portion 10e, and a stepped surface portion 10f.

[0015] In this embodiment, both the first side portion 10d and the second side portion 10e extend along a plane perpendicular to the device surface 10a. Therefore, the first side portion 10d and the second side portion 10e in this embodiment are parallel to each other. Note that the first side portion 10d and the second side portion 10e may be inclined with respect to the direction perpendicular to the device surface 10a. The first side portion 10d connects to the device surface 10a. The second side portion 10e is located on the back surface 10b side of the first side portion 10d in the normal direction of the device surface 10a. The second side portion 10e connects to the back surface 10b. Furthermore, the second side portion 10e is positioned further away from the center of gravity G of the semiconductor chip 10T than the first side portion 10d in the normal direction of the first side portion 10d. That is, when the normal direction of the device surface 10a is the vertical direction, the second side portion 10e is located horizontally outward from the first side portion 10d.

[0016] The stepped surface portion 10f extends substantially parallel to the device surface 10a and the back surface 10b. The stepped surface portion 10f faces substantially the same direction as the device surface 10a. The stepped surface portion 10f connects the first side surface portion 10d and the second side surface portion 10e. As described above, the stepped surface portion 10f in this embodiment is parallel to the device surface 10a, but the stepped surface portion 10f may be inclined with respect to the device surface 10a.

[0017] The metal film 20 is provided on a portion of the surface of the semiconductor chip 10T. The metals constituting the metal film 20 are, for example, Cu (copper), Al (aluminum), Ni (nickel), Ti (titanium), Ag (silver), or Au (gold), but are not limited to these.

[0018] The metal film 20 may be composed of multiple layers made of different metallic materials. An example of a layer structure used for the metal film 20 is one having a first layer made of titanium (Ti) formed on the surface of the semiconductor chip 10T, and a second layer made of nickel (Ni) formed on the surface of the first layer.

[0019] The metal film 20 in this embodiment has a back surface covering portion (second surface covering portion) 21 and a side surface covering portion 22. In this embodiment, the back surface covering portion 21 and the side surface covering portion 22 are connected to each other.

[0020] The back surface coating portion 21 covers the entire back surface 10b of the semiconductor chip 10T. For example, if the semiconductor chip 10T is a MOSFET chip, the back surface coating portion 21 functions as the drain electrode of the MOSFET.

[0021] The side covering portion 22 covers at least a portion of the side surface 10c of the semiconductor chip 10T. The side covering portion 22 is provided in a certain area extending from the corner portion 10g between the side surface 10c and the back surface 10b toward the device surface 10a. In this embodiment, the side covering portion 22 covers the entire second side surface 10e. According to this embodiment, the metal film 20 can protect a portion of the side surface 10c by covering at least a portion of the side surface 10c with the metal film 20.

[0022] Figure 3 is a flowchart showing the manufacturing method of the semiconductor device 1 according to this embodiment. The manufacturing method of the semiconductor device 1 according to this embodiment includes a device surface formation step S10, a groove formation step S20, a first bonding step (bonding step) S30, a grinding step S40, a first ashing step (ashing step) S50, a protective film deposition step S60, an etching step S70, a metal film deposition step (deposition step) S80, a second ashing step S90, a second bonding step S100, a support substrate detachment step S110, and a pickup step S120. In this embodiment, the groove formation step S20 also includes a first step S21 and a second step S22.

[0023] Figure 4 is a schematic diagram showing the device surface formation process S10 of this embodiment. The device surface formation process S10 is a process in which an element region is formed on one side of a disc-shaped substrate 10 made of semiconductor material, and this side is designated as the device surface 10a. The element region is, for example, an element pattern for a MOSFET or IGBT device, or a circuit pattern for an analog circuit or integrated circuit. In the following description, the side opposite to the device surface 10a before the grinding process S40, which will be described later, is referred to as the initial back surface 10h. Although not shown in the figure, the device surface formation process S10 and the subsequent groove formation process S20 are performed with the substrate 10 supported on the initial back surface 10h.

[0024] Figure 5 is a schematic diagram showing the first step S21 of the groove formation process S20 in this embodiment. Figure 6 is a schematic diagram showing the second step S22 of the groove formation process S20 in this embodiment. The groove formation process S20 in this embodiment is a process of forming a plurality of grooves 11 on the device surface 10a.

[0025] In the groove formation step S20 of this embodiment, the base material 10 is machined using a first dicing blade 9a and a second dicing blade 9b to form a plurality of grooves 11. Multiple grooves 11 are formed on the disc-shaped base material 10 in directions perpendicular to each other. As a result, the device surface 10a of the base material 10 is divided into a plurality of rectangular areas. In addition, in the groove formation step S20 of this embodiment, after forming the first groove 11a, a second groove 11b is formed at the bottom 11c of the first groove 11a. That is, the groove 11 formed in the groove formation step S20 consists of a first groove 11a and a second groove 11b formed on the same straight line.

[0026] The first step S21 shown in Figure 5 is a step of forming a first groove 11a on the device surface 10a. The first step S21 is performed using a first dicing blade 9a having a first cutting width W1. The first groove 11a has a first groove width w1 that is approximately equal to the first cutting width W1.

[0027] The second step S22 shown in Figure 6 is a step of forming a second groove 11b in the widthwise center of the bottom 11c of the first groove 11a. The second step S22 is performed using a second dicing blade 9b having a second cutting width W2. The second groove 11b has a second groove width w2 that is approximately equal to the second cutting width W2. The second cutting width W2 is smaller than the first cutting width W1. Therefore, the second groove width w2 is smaller than the first groove width w1. The second groove 11b is machined by aligning the center of the cutting width direction of the second dicing blade 9b with the widthwise center of the bottom 11c of the first groove 11a.

[0028] The depth D of the groove 11 is the sum of the depth d1 of the first groove 11a and the depth d2 of the second groove 11b (d1+d2). The thickness H of the semiconductor chip 10T (see Figure 2) manufactured by the manufacturing method of this embodiment is smaller than the depth D of the groove 11 and larger than the depth d1 of the first groove 11a.

[0029] Figure 7 is a schematic diagram showing the first bonding step S30 of this embodiment. During the transition from the groove formation step S20 to the first bonding step S30, the substrate 10 is inverted. The first bonding step S30 is a step in which the downward-facing device surface 10a is attached to the support substrate 40 via adhesive 30. After going through the first bonding step S30, the substrate 10 is fixed to the support substrate 40.

[0030] In the first bonding step S30, the device surface 10a is first coated with uncured adhesive 30. This causes the uncured adhesive 30 to penetrate into the grooves 11 formed on the device surface 10a. Next, the device surface 10a and the support surface of the support substrate 40 are bonded together. Furthermore, the first bonding step S30 is completed when the adhesive 30 hardens.

[0031] As the adhesive 30, for example, an acrylic adhesive, an epoxy adhesive, or a silicone adhesive can be preferably used. The support substrate 40 is, for example, a plate-shaped member made of glass. In the following description, the portion of the cured adhesive 30 that is placed between the device surface 10a and the support substrate 40 will be called the adhesive layer 31, and the portion that is placed inside the groove 11 will be called the groove adhesive 32.

[0032] Although Figure 7 illustrates the case where the adhesive 30 is completely filled inside the groove 11, the state of the adhesive 30 filling is not limited to the state shown in Figure 7. For example, the adhesive 30 may be filled only partway into the groove 11, leaving a void near the bottom of the groove 11.

[0033] Figure 8 is a schematic diagram showing the grinding process S40 of this embodiment. The grinding process S40 is a process of grinding the initial back surface 10h of the base material 10 to form the back surface (second surface) 10b. In this embodiment, the grinding process S40 is performed with the base material 10 supported by the support substrate 40. Although not shown in the figure, the grinding process S40 is performed with protective tape attached to the back surface 40b of the substrate of the support substrate 40. The protective tape protects the back surface 40b of the substrate from chips generated in the grinding process S40. The protective tape is attached to the back surface 40b of the substrate before the grinding process S40 and removed after the grinding process S40.

[0034] In the grinding process S40, the substrate 10 is given a thickness H. The thickness H is smaller than the depth D of the groove 11. As a result of going through the grinding process S40, the groove 11 formed on the device surface 10a penetrates to the back surface 10b. This causes the substrate 10 to be fragmented, forming multiple semiconductor chips 10T. Also, the thickness H is larger than the depth d1 of the first groove 11a. As a result, a stepped portion 11d originating from the bottom 11c of the first groove 11a is formed on the side surface 10c of the fragmented semiconductor chips 10T.

[0035] As described above, the groove portion 11 of this embodiment is filled with adhesive 30. Therefore, in the grinding step S40, as the groove portion 11 penetrates the base material 10, the adhesive 32 inside the groove is exposed from the back surface 10b. In other words, the grinding step S40 is a step in which the adhesive 32 inside the groove is exposed from the back surface 10b side.

[0036] Figure 9 is a schematic diagram showing the first ashing step S50 of this embodiment. The first ashing step S50 is a step in which the adhesive 30 (i.e., groove adhesive 32) inside the groove 11 is ashing from the back surface 10b side. Before performing the first ashing step S50, the back surface 10b is a uniform flat surface because the groove 11 is filled with groove adhesive 32. After going through the first ashing step S50, the groove adhesive 32 is ashinged onto the back surface 10b and a recessed groove 11A is formed. The inner surface of the recessed groove 11A is composed of the side surface of the semiconductor chip 10T and the groove adhesive 32. That is, the bottom of the recessed groove 11A is composed of groove adhesive 32.

[0037] In this embodiment, the first ashing step S50 is, for example, a plasma ashing step. However, other ashing methods may be used for the first ashing step S50.

[0038] In the first ashing step S50, the amount of adhesive 30 ashing can be adjusted by adjusting processing conditions such as processing time, high-frequency output for exciting the plasma, and oxygen partial pressure. In other words, in the first ashing step S50, the depth J of the adhesive 32 removed from the groove can be adjusted.

[0039] In the first ashing step S50, if the adhesive 30 is removed to a depth greater than or equal to the thickness H of the semiconductor chip 10T, not only the groove adhesive 32 but also a portion of the adhesive layer 31 will be removed. In this case, the fixing of the semiconductor chip 10T and the support substrate 40 by the adhesive layer 31 may become unstable. Therefore, it is preferable that the depth J of the groove adhesive 32 removed in the first ashing step S50 be less than or equal to the thickness H of the semiconductor chip 10T.

[0040] As shown in Figure 9, the difference (H-d1) between the thickness H of the semiconductor chip 10T and the depth d1 of the first groove 11a is defined as the step distance d3. The step distance d3 is the distance between the back surface 10b and the step portion 11d in the thickness direction of the semiconductor chip 10T. The depth J of the groove adhesive 32 removed in the first ashing step S50 is greater than the step distance d3. Therefore, in the first ashing step S50, the step portion 11d can be exposed from the groove adhesive 32. According to the first ashing step S50 of this embodiment, a step shape appears on the inner surface of the recessed groove 11A, where the groove width widens as it moves from the back surface 10b toward the device surface 10a. This step shape is formed in the groove formation step S20.

[0041] Figure 10 is a schematic diagram showing the protective film formation process S60 of this embodiment. The protective film formation process S60 is performed for the purpose of protecting the adhesive 30 in the subsequent etching process S70. Therefore, if the etching process S70 is omitted, the protective film formation process S60 can also be omitted. Furthermore, even if the etching process S70 is performed, if there is no risk of damage to the adhesive 30 in the etching process S70, the protective film formation process S60 can be omitted.

[0042] In the protective film formation step S60, a protective film 39 is formed on the surface of the groove adhesive 32. In this embodiment, the protective film formation step S60 is a step in which diamond-like carbon, as the protective film 39, is formed on the surface of the groove adhesive 32, for example by an ion implantation method. In addition, in the protective film formation step S60, ions are also implanted into the back surface 10b of the substrate 10, and an ion implanted layer M is formed on the substrate 10. The ion implanted layer M is removed in the next step, the etching step S70.

[0043] Figure 11 is a schematic diagram showing the etching process S70 of this embodiment. The etching process S70 is a process of etching the back surface 10b of the semiconductor chip 10T to adjust the surface roughness of the back surface 10b. In this embodiment, the etching process S70 is, for example, a process of applying a mirror finish to the back surface 10b. Alternatively, the etching process S70 is, for example, a process of performing wet etching on the back surface 10b. In the etching process S70, the groove adhesive 32 is protected from the chemical solution by the protective film 39.

[0044] Furthermore, if the required surface properties of the back surface 10b of the semiconductor chip 10T can be sufficiently achieved by grinding, the etching process S70 and the protective film deposition process S60, which is performed in conjunction with the etching process S70, may be omitted. Also, the etching process S70 may be performed before the first ashing process S50.

[0045] Figure 12 is a schematic diagram showing the metal film deposition process S80 of this embodiment. The metal film deposition process S80 is a process of forming a metal film 20 on the back surface 10b of the substrate 10. In this embodiment, the metal film deposition process S80 is performed with the substrate 10 supported by the support substrate 40.

[0046] Prior to the metal film deposition process S80, impurities may be diffused into the interior of the substrate 10 from the back surface 10b side. In this case, for example, it is preferable to dope the substrate with impurities from the back surface 10b side by ion implantation and then perform laser annealing on the back surface 10b.

[0047] The metal film deposition step S80 of this embodiment is a step of forming a metal film 20 on the back surface 10b of the semiconductor chip 10T by CVD (Chemical Vapor Deposition) or PVD (Physical Vapor Deposition), etc. In the metal film deposition step S80, a metal film 20 consisting of multiple layers may be deposited.

[0048] As described above, a groove 11A is formed on the back surface 10b of the substrate 10. Therefore, a portion of the metal film 20 is also formed on a portion of the inner surface of the groove 11A. The metal film 20 includes a back surface coating portion 21 formed on the back surface 10b, a side surface coating portion 22 formed on the inner surface of the groove 11A, and an adhesive coating portion 23 formed on the bottom portion of the groove 11A and on the surface of the protective film 39.

[0049] A groove 11A is provided on the back surface 10b of the substrate 10. In the metal film deposition process S80, some of the metal particles penetrate into the groove 11A. On the inner surface of the groove 11A, the area close to the back surface 10b tends to accumulate a larger amount of metal particles. For this reason, the side coating portion 22 tends to become thicker in the area close to the back surface 10b.

[0050] Furthermore, a stepped portion 11d is provided on the inner surface of the groove 11A. According to this embodiment, since the stepped portion 11d of the groove 11A functions as a canopy, metal particles are less likely to accumulate directly below the stepped portion 11d. In other words, the side coating portion 22 is less likely to be formed directly below the stepped portion 11d. In addition, although some of the metal particles accumulate on the surface of the protective film 39 directly below the opening of the groove 11A, they are less likely to accumulate in the portion that overlaps with the stepped portion 11d when viewed from above or below. For this reason, the adhesive coating portion 23 is formed only in the center of the groove adhesive 32 in the width direction and is less likely to connect with the side coating portion 22.

[0051] Figure 13 is a schematic diagram showing the second ashing step S90 of this embodiment. The second ashing step S90 is a step in which a portion of the protective film 39 and groove adhesive 32 located between the semiconductor chips 10T are removed. The second ashing step S90 may be performed by a plasma ashing method, similar to the first ashing step S50, or by another ashing method. Note that if the adhesive 30 can be completely removed from the semiconductor chips 10T in the support substrate detachment step S110, which will be described later, the second ashing step S90 may be omitted.

[0052] Figure 13 shows that some of the adhesive coating 23, protective film 39, and groove adhesive 32 remain inside the groove 11A after the second ashing step S90. However, in the second ashing step S90, the groove adhesive 32 may be completely ashed, and the adhesive coating 23, protective film 39, and groove adhesive 32 may be completely removed from inside the groove 11A.

[0053] Figure 14 is a schematic diagram showing the second bonding step S100 of this embodiment. In the process of moving from the second ashing step S90 to the second bonding step S100, the substrate 10 is inverted. The second bonding step S100 is a step in which the substrate 10 is attached to the dicing tape 50 on the opposite side of the support substrate 40. In this embodiment, a metal film 20 is provided on the back surface 10b of the substrate 10, so the substrate 10 is attached to the dicing tape 50 via the metal film 20.

[0054] Figure 15 is a schematic diagram showing the support substrate detachment process S110 of this embodiment. The support substrate detachment process S110 is a process of detaching the support substrate 40 from the base material 10. In the support substrate detachment process S110 of this embodiment, the adhesive 30 may be dissolved with a solvent, or the adhesive strength may be weakened by irradiating a laser through the translucent support substrate 40. Furthermore, the support substrate detachment process S110 may be a process of detaching the support substrate 40 from the base material 10 by mechanical peeling, in which a sharp tool is inserted between the base material 10 and the support substrate 40 to peel off the adhesive 30.

[0055] Following the support substrate detachment process S110, a pickup process S120 (not shown in the diagram) is performed. The pickup process S120 is a process of individually removing the individual semiconductor devices 1 from the dicing tape 50. By going through the above steps, the semiconductor device 1 can be manufactured.

[0056] According to the manufacturing method of this embodiment, semiconductor chips 10T are separated into individual pieces by the stepped groove portion 11, so that a semiconductor device 1 with a stepped shape on its side surface 10c can be manufactured. As shown in Figure 15, the inner surface of the first groove 11a becomes the first side surface portion 10d of the semiconductor chip 10T. The bottom portion 11c of the first groove 11a becomes the stepped surface portion 10f of the semiconductor chip 10T. The inner surface of the second groove 11b becomes the second side surface portion 10e of the semiconductor chip 10T.

[0057] Next, the effects and advantages of this embodiment will be described. Conventional semiconductor device manufacturing methods involved forming a metal film and then cutting the substrate into individual pieces using a dicing blade. This method had the problem of chipping occurring easily at the boundary between the metal film and the substrate. Therefore, to suppress the occurrence of chipping in the substrate, some manufacturing methods employ a process in which the substrate is formed into individual pieces and semiconductor chips, and then the metal film is formed. In this case, however, the metal film may be formed in a way that connects the semiconductor chips, potentially leaving behind metal film burrs. These metal film burrs can hinder the smooth mounting process, such as obstructing the pickup of semiconductor chips.

[0058] The manufacturing method of the semiconductor device 1 of this embodiment, as shown in Figure 3, includes a groove formation step S20, a first bonding step S30, a grinding step S40, a first ashing step S50, and a metal film deposition step S80. The groove formation step S20 shown in Figures 5 and 6 is a step of forming a plurality of grooves 11 in the substrate 10 from the device surface 10a side on which the element region is formed. The first bonding step S30 shown in Figure 7 is a step of bonding the device surface 10a to the support substrate 40 via an adhesive 30. The grinding step S40 shown in Figure 8 is a step of grinding the substrate 10 from the opposite side of the device surface 10a to form a back surface 10b. The grinding step S40 is a step of separating the substrate 10 into individual pieces by making the thickness H of the substrate 10 less than or equal to the depth D of the grooves 11. The first ashing step S50 shown in Figure 9 is a step of ashing the adhesive 30 inside the grooves 11 from the back surface 10b side. The metal film deposition process S80 shown in Figure 12 is a process of forming a metal film on the back surface 10b.

[0059] According to the above configuration, grooves 11 are formed in the substrate 10, and the grooves 11 are penetrated by grinding the substrate 10 from the back surface 10b side, thereby separating the substrate 10 into multiple semiconductor chips 10T. Therefore, compared to cutting after grinding, the grooves 11 can be formed while the substrate 10 is thick, and the occurrence of chipping of the substrate 10 in the groove formation process S20 can be suppressed. Furthermore, according to the above configuration, a metal film 20 is deposited after the semiconductor chips 10T are formed. Therefore, the occurrence of chipping of the substrate 10 at the boundary between the metal film 20 and the substrate 10 in the substrate 10 piece-forming process can be suppressed. In addition, according to the above configuration, the adhesive 30 (groove adhesive 32) inside the grooves 11 is ashed from the back surface 10b side, and then the metal film 20 is deposited on the back surface 10b. As a result, recessed grooves 11A can be formed on the back surface 10b side of the substrate 10, at the boundary portion of the piece-formed semiconductor chips 10T, by ashing the adhesive 30. Therefore, in the metal film deposition process S80, the metal films 20 of adjacent semiconductor chips 10T separated by the groove 11A can be interrupted by the groove 11A. As a result, it is possible to suppress the connection between the metal films 20 deposited on adjacent semiconductor chips 10T and to suppress the generation of burrs on the metal films 20. In other words, according to the above configuration, a semiconductor device 1 with improved quality can be provided. Furthermore, according to the above configuration, the side surface 10c of the semiconductor chip 10T can be exposed in the first ashing process S50. This allows the metal film 20 to be deposited on a part of the side surface 10c of the semiconductor chip 10T in the metal film deposition process S80, and the side surface 10c of the semiconductor chip 10T can be protected by the metal film 20. In particular, according to this embodiment, as shown in Figure 2, a side surface covering portion 22 connected to the back surface covering portion 21 can be formed. Therefore, it is possible to suppress the peeling of the metal film 20 at the corner portion 10g of the semiconductor chip 10T. Furthermore, according to this embodiment, the range of the metal film 20 formed on the side surface 10c of the semiconductor chip 10T can be easily adjusted by adjusting the depth J of the groove adhesive ashing in the first ashing step S50 shown in Figure 9. This makes it possible to cover only the areas on the side surface 10c of the semiconductor chip 10T that require protection with the metal film 20.

[0060] In the manufacturing method of the semiconductor device 1 of this embodiment, the groove formation step S20 is a step of forming a groove 11 consisting of a first groove 11a and a second groove 11b. The groove formation step S20 also has a first step S21 and a second step S22. The first step S21 shown in Figure 5 is a step of forming the first groove 11a on the device surface 10a using a first dicing blade 9a. The second step S22 shown in Figure 6 is a step of forming the second groove 11b at the bottom 11c of the first groove 11a using a second dicing blade 9b which has a narrower blade width than the first dicing blade 9a. The grinding step S40 shown in Figure 8 is a step of grinding the substrate 10 from the opposite side of the device surface 10a until the thickness H of the substrate 10 is greater than the depth d1 of the first groove 11a and less than or equal to the depth D of the groove 11.

[0061] According to the above configuration, a stepped shape can be formed on the inner surface of the groove 11. This makes it easier to interrupt the metal films 20 of adjacent semiconductor chips 10T separated by the stepped portion 11d during the metal film deposition process S80 shown in Figure 12. As a result, it becomes easier to suppress the generation of burrs on the metal film 20.

[0062] In the manufacturing method of the semiconductor device 1 of this embodiment, the first ashing step S50 shown in Figure 9 is a step of removing the adhesive 30 inside the groove 11 from the back surface 10b side to a position beyond the bottom 11c of the first groove 11a.

[0063] According to the above configuration, in the first ashing step S50, the stepped portion 11d can be exposed on the inner surface of the groove 11A. This allows the stepped portion 11d to function as a canopy in the metal film deposition step S80, thereby more reliably suppressing the generation of burrs on the metal film 20.

[0064] As shown in Figure 2, the semiconductor device 1 of this embodiment comprises a plate-shaped semiconductor chip 10T and a metal film 20. The semiconductor chip 10T is made of a semiconductor material. The metal film 20 is provided on a part of the surface of the semiconductor chip 10T. The semiconductor chip 10T has a device surface 10a, a back surface 10b, and a plurality of side surfaces 10c. An element region is formed on the device surface 10a. The back surface 10b is located on the opposite side of the device surface 10a. The plurality of side surfaces 10c connect the device surface 10a and the back surface 10b. The side surfaces 10c have a first side surface portion 10d, a second side surface portion 10e, and a stepped surface portion 10f, which are arranged in a stepped manner. The first side surface portion 10d and the second side surface portion 10e extend along a plane perpendicular to the device surface 10a. The second side surface portion 10e is located on the back surface 10b side of the first side surface portion 10d in the direction normal to the device surface 10a. The second side portion 10e is located further away from the center of gravity G of the semiconductor chip 10T than the first side portion 10d in the direction normal to the first side portion 10d. The stepped surface portion 10f connects the first side portion 10d and the second side portion 10e. The metal film 20 has a back surface covering portion 21 and a side surface covering portion 22. The back surface covering portion 21 covers the back surface. The side surface covering portion 22 covers at least a portion of the side surface 10c.

[0065] According to the above configuration, the metal film 20 can be used as an electrode for the semiconductor device 1. Furthermore, since the metal film 20 has not only a back surface covering portion 21 but also a side surface covering portion 22, the sides of the semiconductor chip 10T can be protected. This makes it possible to suppress chipping of the side surface 10c of the semiconductor device 1 when the semiconductor device 1 is transported and mounted on the lead frame in the pickup process S120.

[0066] In the semiconductor device 1 of this embodiment, the side covering portion 22 covers the second side portion 10e. According to this embodiment, on the side 10c, the second side portion 10e is provided protruding to the outside of the semiconductor chip 10T. Therefore, by protecting the second side portion 10e with the metal film 20, chipping on the side 10c of the semiconductor device 1 can be effectively suppressed.

[0067] In the semiconductor device 1 of this embodiment, the back surface covering portion 21 and the side surface covering portion 22 are connected to each other.

[0068] According to the above configuration, a large bonding area between the metal film 20 and the semiconductor chip 10T can be secured, and peeling of the metal film 20 from the semiconductor chip 10T can be suppressed. Furthermore, the metal film 20 in this embodiment covers the corner portion 10g between the back surface 10b and the side surface 10c of the semiconductor chip 10T. This makes it easier to suppress peeling of the metal film 20 from the corner portion 10g of the semiconductor chip 10T. Moreover, if the metal film 20 has multiple layers, the back surface covering portion 21 and the side surface covering portion 22 are connected to each other, allowing the layer structure to be bent. This makes it easier to suppress interlayer delamination of the metal film 20 caused by differences in the thermal expansion coefficients of each layer constituting the metal film 20.

[0069] (Second Embodiment) A semiconductor device 101 and a method for manufacturing the same according to a second embodiment will be described. In the following description, the same reference numerals are used for components similar to those in the above-described embodiment, and their descriptions are omitted.

[0070] Figure 16 is a schematic cross-sectional view of the semiconductor device 101 of the second embodiment. Similar to the embodiment described above, the semiconductor device 101 of this embodiment comprises a semiconductor chip 110T and a metal film 120. The semiconductor chip 110T has a device surface (first surface) 110a, a back surface (second surface) 110b, and four side surfaces 110c.

[0071] The side surface 110c of the semiconductor chip 110T has a flat portion 110d extending in a direction perpendicular to the device surface 110a, and an inclined portion 110e that is inclined with respect to the flat portion 110d.

[0072] The flat portion 110d connects to the device surface 110a. The inclined portion 110e is located on the back surface 110b side of the flat portion 110d. The inclined portion 110e connects to the flat portion 110d and the back surface 110b, respectively. The inclined portion 110e tilts away from the center of gravity G of the semiconductor chip 110T as it moves from the device surface 110a towards the back surface 110b side.

[0073] The metal film 120 in this embodiment has a back surface covering portion (second surface covering portion) 121 and a side surface covering portion 122. The back surface covering portion 121 covers the entire back surface 110b of the semiconductor chip 110T.

[0074] The side covering portion 122 covers at least a portion of the side surface 110c of the semiconductor chip 110T. The side covering portion 122 is provided in a certain area extending from the corner portion 110g between the side surface 110c and the back surface 110b toward the device surface 110a. In this embodiment, the side covering portion 122 covers a portion of the inclined portion 110e of the side surface 110c but does not cover the flat portion 110d. According to this embodiment, the metal film 120 can protect a portion of the side surface 110c by covering at least a portion of the side surface 110c.

[0075] The manufacturing method for the semiconductor device 101 of this embodiment is similar to the manufacturing method for the semiconductor device 1 of the first embodiment (see Figure 3), and includes a device surface formation step S10, a groove formation step S20, a first attachment step S30, a grinding step S40, a first ashing step S50, a metal film deposition step S80, a second ashing step S90, a second attachment step S100, a support substrate detachment step S110, and a pickup step S120. In the manufacturing method of this embodiment, the protective film deposition step S60 and the etching step S70 described in the first embodiment are omitted. The characteristic steps in the manufacturing method for the semiconductor device 101 of this embodiment will be described below.

[0076] Figure 17 is a schematic diagram showing the groove formation process S20 of this embodiment. The groove formation process S20 of this embodiment is performed using a dicing blade 109 that narrows in width towards the tip. In the groove formation process S20, the base material 110 is processed by the dicing blade 109 to form a groove 111 on the device surface 110a. The groove 111 has a narrowing portion 111a that narrows in width towards the bottom.

[0077] In this embodiment, the groove formation step S20 describes the case in which a groove 111 having a constricted portion 111a is formed by using a dicing blade 109. However, the groove formation step S20 may also employ laser dicing or etching. Even when these methods are used to form the groove, a constricted portion can be formed in the groove in the same way as in this embodiment.

[0078] Figure 18 is a schematic diagram showing the grinding process S40 of this embodiment. Between the groove formation process S20 and the grinding process S40, the base material 110 is inverted vertically. The grinding process S40 is a process in which the initial back surface 110h of the base material 110 is ground to form the back surface (second surface) 110b. In this embodiment, the grinding process S40 is performed with the base material 110 supported by the support substrate 40. Therefore, similar to the first embodiment, the grinding process S40 is performed with the inside of the groove 111 of the base material 110 filled with adhesive 30.

[0079] In grinding step S40, the base material 110 is ground down to a thickness less than the depth of the groove 111. As a result, the groove 111 penetrates the base material 110, and the base material 110 is broken down into individual pieces to form multiple semiconductor chips 110T. In particular, in grinding step S40 of this embodiment, the base material 110 is ground down to partway up the narrowed portion 111a of the groove 111. Therefore, in grinding step S40, the narrowed portion 111a is not completely removed. As a result, the narrowed portion 111a is positioned at the opening of the groove 111 on the back surface 110b side.

[0080] Figure 19 is a schematic diagram showing the substrate 110 after the first ashing step S50 and the metal film deposition step S80 of this embodiment. The first ashing step S50 is a step in which the adhesive 32 in the grooves is removed from the back surface 110b side to the constricted portion 111a, or to a position beyond the constricted portion 111a. After the first ashing step S50, a recessed groove 111A is formed on the back surface 110b side of the substrate 110, at the boundary portion of the individualized semiconductor chip 110T, by ashing the adhesive 30. The width of the recessed groove 111A gradually widens from the opening on the back surface 110b toward the device surface 110a side.

[0081] The metal film deposition process S80 is a process of forming a metal film 120 on the back surface 110b of the substrate 110. The metal film 120 is formed not only on the back surface 110b, but also on the side surface of the semiconductor chip 110T and on the groove adhesive 32. That is, the metal film 120 includes a back surface coating portion 121 formed on the back surface 110b, a side surface coating portion 122 formed on the side surface of the semiconductor chip 110T, and an adhesive coating portion 123 formed on the groove adhesive 32. Because the opening portion of the recessed groove 111A functions as a canopy, the adhesive coating portion 123 is formed only in the center in the width direction of the groove adhesive 32.

[0082] Next, the effects and advantages of this embodiment will be described. In this embodiment, the groove forming step S20 is a step of forming a groove 111. The groove forming step S20 has a narrowing portion 111a that narrows the groove width towards the bottom. The grinding step S40 is a step of grinding the base material 110 from the opposite side of the device surface 110a up to partway up the narrowing portion 111a.

[0083] According to the above configuration, a canopy shape can be formed on the inner surface of the groove 111 by the narrowed portion 111a. This makes it possible to more reliably separate the metal films 120 of adjacent semiconductor chips 110T with the groove 111A in between during the metal film deposition process S80. Furthermore, this configuration allows for the individualization of the semiconductor chips 110T without dicing the metal film 120. As a result, the generation of burrs on the metal film 120 deposited on adjacent semiconductor chips 110T can be more reliably suppressed. Note that the groove formation process S20 in this embodiment is performed using a dicing blade 109 whose blade width narrows towards the tip. This makes it possible to easily form the groove 111 having the narrowed portion 111a.

[0084] In this embodiment, the first ashing step S50 is a step of removing the adhesive 30 inside the groove 111 from the back surface 110b side up to the middle of the constricted portion 111a, or to a position beyond the constricted portion 111a.

[0085] According to the above configuration, in the first ashing step S50, the narrowed portion 111a of the groove 111 can be exposed from the adhesive 30. This allows the narrowed portion 111a to function as a canopy in the metal film deposition step S80, thereby more reliably suppressing the generation of burrs on the metal film 120.

[0086] As shown in Figure 16, the semiconductor device 101 of this embodiment has a plate-shaped semiconductor chip 110T and a metal film 120. The semiconductor chip 110T is made of a semiconductor material. The metal film 120 is provided on a part of the surface of the semiconductor chip 110T. The semiconductor chip 110T has a device surface 110a, a back surface 110b, and a plurality of side surfaces 110c. An element region is formed on the device surface 110a. The back surface 110b is located on the opposite side of the device surface 110a. The plurality of side surfaces 110c connect the device surface 110a and the back surface 110b. The side surfaces 110c have inclined portions 110e that are inclined in a direction away from the center of gravity G of the semiconductor chip 110T as they move from the device surface 110a toward the back surface 110b. The metal film 120 has a back surface covering portion 121 and a side surface covering portion 122. The back surface covering portion 121 covers the back surface. The side covering portion 122 covers at least a part of the side surface 110c.

[0087] According to the above configuration, the metal film 120 can be used as an electrode for the semiconductor device 101. Furthermore, since the metal film 120 has not only a back surface covering portion 121 but also a side surface covering portion 122, the sides of the semiconductor chip 110T can be protected. This makes it possible to suppress chipping of the side surface 110c of the semiconductor device 101 when the semiconductor device 101 is transported and mounted on the lead frame in the pickup process S120. Moreover, in the semiconductor device 101 of this embodiment, the back surface covering portion 121 and the side surface covering portion 122 are connected to each other. Therefore, a large bonding area can be secured between the metal film 120 and the semiconductor chip 110T, and peeling of the metal film 120 can be suppressed. Furthermore, since the metal film 120 covers the corner portion 110g of the semiconductor chip 110T, peeling from the corner portion 110g of the metal film 120 is easily suppressed.

[0088] (Modified version of the second embodiment) A method for manufacturing a modified semiconductor device 201 of the second embodiment will now be described. In the following description, the same reference numerals are used for components similar to those in the above-described embodiment, and their descriptions are omitted.

[0089] Figure 20 is a schematic diagram of the substrate 210 after the groove formation process S20 of this modified example. The groove formation process S20 of this modified example is a process of forming grooves 211 by plasma dicing. In plasma dicing, the parts of the device surface 210a of the substrate 210 other than the part in which the grooves 211 are to be formed are masked, the grooves 211 are formed by plasma treatment, and then the mask is removed.

[0090] In this modified example, the groove formation step S20 illustrates the case where plasma dicing is performed three times. In plasma dicing, element grooves 211P with a circular cross-section are formed on the surface of the substrate 210 each time plasma treatment is performed. In the groove formation step S20 shown in Figure 20, element grooves 211P are formed in the depth direction by performing plasma dicing three times, thereby forming a groove 211 of sufficient depth.

[0091] The groove 211 formed in the groove formation step S20 of this modified example has a cross-sectional shape in which portions that widen and portions that narrow are alternately arranged along the depth direction. That is, the groove 211 of this modified example has first narrowing portions 211a and second narrowing portions 211b that are alternately arranged along the thickness direction of the base material 210. The groove width of the first narrowing portion 211a narrows as it moves away from the device surface 210a. The groove width of the second narrowing portion 211b narrows as it approaches the device surface 210a.

[0092] Figure 21 is a schematic diagram showing the grinding process S40 of this modified example. Between the groove formation process S20 and the grinding process S40, the base material 210 is inverted vertically. The grinding process S40 is a process in which the initial back surface 210h of the base material 210 is ground to form the back surface (second surface) 210b. In this modified example, the grinding process S40 is performed with the base material 210 supported by the support substrate 40. Therefore, similar to the first modified example, the grinding process S40 is performed with the inside of the groove 211 of the base material 210 filled with adhesive 30.

[0093] In grinding step S40, the base material 210 is ground down to a thickness less than the depth of the groove 211. As a result, the groove 211 penetrates the base material 210, and the base material 210 is broken down into individual pieces to form multiple semiconductor chips 210T. In particular, in grinding step S40 of this modified example, the base material 210 is ground down to the middle of one of the first constricted portions 211a. In grinding step S40 shown in Figure 21, grinding is performed down to the one of the multiple first constricted portions 211a that is furthest from the device surface 210a. As a result, the first constricted portion 211a is positioned at the opening of the groove 211 on the back surface 210b side. Note that in grinding step S40, grinding may be further extended to grind down to other first constricted portions 211a. In other words, the first constricted portion 211a positioned in the opening during the grinding process S40 may be any of the multiple first constricted portions 211a.

[0094] Figure 22 is a schematic diagram showing the substrate 210 after the first ashing step S50 and the metal film deposition step S80 of this modified example. The first ashing step S50 is a step in which the adhesive 32 in the groove is removed from the back surface 210b side to the first constricted portion 211a, or to a position beyond the first constricted portion 211a. Since the groove portion 211 has the first constricted portion 211a, its width widens as it moves from the back surface 210b towards the device surface 210a side.

[0095] The metal film deposition process S80 is a process of forming a metal film 220 on the back surface 210b of the substrate 210. Similar to the second embodiment, the metal film 220 includes a back surface coating portion 221 formed on the back surface 210b, a side surface coating portion 222 formed on the inner surface of the groove portion 211, and an adhesive coating portion 223 formed on the groove adhesive 32. Because the first constriction portion 211a functions as a canopy, the adhesive coating portion 223 is formed only in the widthwise center of the groove adhesive 32.

[0096] According to this modified version, similar to the second embodiment, the metal films 220 on the semiconductor chips 210T can be more reliably separated. As a result, the generation of burrs on the metal films 220 deposited on adjacent semiconductor chips 210T can be more reliably suppressed. According to this modified version, other effects similar to those of the second embodiment can also be obtained.

[0097] According to this modified example, in the groove formation process S20, the groove 211 is formed by plasma dicing, so the planar shape of the groove 211 can be freely designed by the shape of the mask used during plasma dicing. This makes it possible to form semiconductor chips 210T with optimized planar shapes, such as a semiconductor chip 210T with a hexagonal planar shape.

[0098] According to the manufacturing method of at least one embodiment described above, by having a first ashing step S50 for ashing the adhesive 30 and a metal film deposition step S80 performed after the first ashing step S50, the metal film can be interrupted by the grooves formed by ashing, and semiconductor devices 1, 101, and 201 with fewer burrs can be provided.

[0099] The semiconductor device manufacturing method and semiconductor device of the embodiment include the following appended embodiments. (Note 1) A groove formation step in which multiple grooves are formed in the substrate from the first surface side where the element region is formed, A bonding step of attaching the first surface to the support substrate via an adhesive, A grinding step to form a second surface by grinding the substrate from the opposite side of the first surface, thereby making the thickness of the substrate less than or equal to the depth of the groove, and to separate the substrate into individual pieces. an ashing step in which the adhesive inside the groove is ashing from the second surface side, The process includes a film formation step of forming a metal film on the second surface, A method for manufacturing a semiconductor device. (Note 2) The groove formation step is a step of forming the groove consisting of a first groove and a second groove, The groove formation step is, A first step of forming the first groove on the first surface using the first dicing blade, The process includes a second step of forming the second groove at the bottom of the first groove using a second dicing blade having a narrower blade width than the first dicing blade, The grinding step is a step of grinding the substrate from the opposite side of the first surface until the thickness of the substrate is greater than the depth of the first groove and less than or equal to the depth of the groove. A method for manufacturing a semiconductor device as described in Appendix 1. (Note 3) The ashing step is a step of removing the adhesive inside the groove from the second surface side to a position beyond the bottom. The method for manufacturing a semiconductor device as described in Appendix 2. (Note 4) The groove formation step is a step of forming a groove having a narrowing portion that narrows towards the bottom, The grinding step is a step of grinding the substrate from the opposite side of the first surface up to the middle of the constricted portion. A method for manufacturing a semiconductor device as described in Appendix 1. (Note 5) The ashing step is a step of removing the adhesive inside the groove from the second surface side up to the middle of the constricted portion, or beyond the constricted portion. The method for manufacturing a semiconductor device as described in Appendix 4. (Note 6) The grinding step is a step of exposing the adhesive inside the groove from the second surface side. A method for manufacturing a semiconductor device as described in any one of the appendices 1 to 5. (Note 7) A plate-shaped semiconductor chip made of semiconductor material, The semiconductor chip comprises a metal film provided on a part of the surface of the semiconductor chip, The aforementioned semiconductor chip is The first surface on which the element region is formed, The second surface is located on the opposite side of the first surface, It has a plurality of sides connecting the first surface and the second surface, The aforementioned side surface has a first side surface portion, a second side surface portion, and a stepped surface portion arranged in a stepped manner. The first side portion and the second side portion extend along a plane perpendicular to the first surface, The second side portion is located on the side closer to the second surface than the first side portion in the direction normal to the first surface, and on the side further away from the center of gravity of the semiconductor chip than the first side portion in the direction normal to the first side portion. The stepped surface connects the first side surface and the second side surface, The aforementioned metal film is A second surface covering portion that covers the second surface, Having a side covering portion that covers at least a part of the aforementioned side surface, Semiconductor equipment. (Note 8) The side covering portion covers the second side portion. Semiconductor device as described in Appendix 7. (Note 9) A plate-shaped semiconductor chip made of semiconductor material, The semiconductor chip comprises a metal film provided on a part of the surface of the semiconductor chip, The aforementioned semiconductor chip is The first surface on which the element region is formed, The second surface is located on the opposite side of the first surface, It has a plurality of sides connecting the first surface and the second surface, The aforementioned side surface has an inclined portion that slopes away from the center of gravity of the semiconductor chip as it moves from the first surface toward the second surface. The aforementioned metal film is A second surface covering portion that covers the second surface, Having a side covering portion that covers at least a part of the aforementioned side surface, Semiconductor equipment. (Note 10) The second surface covering portion and the side covering portion are connected to each other. A semiconductor device as described in any one of the appendices 7 to 9.

[0100] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of Symbols]

[0101] 1,101,201…Semiconductor equipment, 9a…First dicing blade, 9b…Second dicing blade, 10,110,210…Substrate, 10c,110c…Side, 10T,110T,210T…Semiconductor chip, 11,111,211…Groove, 11a…First groove, 11b…Second groove, 11c…Bottom, 20,120,220…Metal film, 22,122,222… Side covering portion, 30...adhesive, 40...support substrate, 110e...inclined portion, 111a...narrowed portion, D, d1, d2, J...depth, G...center of gravity, H...thickness, S40...grinding process, S20...groove formation process, S21...first process, S22...second process, S30...first bonding process (bonding process), S50...first ashing process (ashing process), S80...metal film deposition process (film deposition process)

Claims

1. A groove formation step in which multiple grooves are formed in the substrate from the first surface side in which the element region is formed, A bonding step of attaching the first surface to the support substrate via an adhesive, A grinding step to form a second surface by grinding the substrate from the opposite side of the first surface, thereby reducing the thickness of the substrate to less than or equal to the depth of the groove, and to separate the substrate into individual pieces. An ashing step in which the adhesive inside the groove is ashing from the second surface side, The process includes a film formation step of forming a metal film on the second surface, A method for manufacturing a semiconductor device.

2. The groove formation step is a step of forming the groove consisting of a first groove and a second groove, The groove formation step is, A first step of forming the first groove on the first surface using the first dicing blade, The process includes a second step of forming the second groove at the bottom of the first groove using a second dicing blade having a narrower blade width than the first dicing blade, The grinding step is a step of grinding the substrate from the opposite side of the first surface until the thickness of the substrate is greater than the depth of the first groove and less than or equal to the depth of the groove. A method for manufacturing a semiconductor device according to claim 1.

3. The ashing step is a step of removing the adhesive inside the groove from the second surface side to a position beyond the bottom. The method for manufacturing a semiconductor device according to claim 2.

4. The groove formation step is a step of forming a groove having a narrowing portion that narrows towards the bottom, The grinding step is a step of grinding the substrate from the opposite side of the first surface up to the middle of the constricted portion. A method for manufacturing a semiconductor device according to claim 1.

5. The ashing step is a step of removing the adhesive inside the groove from the second surface side up to the middle of the constricted portion, or beyond the constricted portion. The method for manufacturing a semiconductor device according to claim 4.

6. The grinding step is a step of exposing the adhesive inside the groove from the second surface side. A method for manufacturing a semiconductor device according to any one of claims 1 to 5.

7. A plate-shaped semiconductor chip made of semiconductor material, The semiconductor chip comprises a metal film provided on a part of the surface of the semiconductor chip, The aforementioned semiconductor chip is The first surface on which the element region is formed, The second surface located on the opposite side of the first surface, It has a plurality of sides connecting the first surface and the second surface, The aforementioned side surface has a first side surface portion, a second side surface portion, and a stepped surface portion arranged in a stepped manner. The first side portion and the second side portion extend along a plane perpendicular to the first surface, The second side portion is located on the side closer to the second surface than the first side portion in the direction normal to the first surface, and on the side further away from the center of gravity of the semiconductor chip than the first side portion in the direction normal to the first side portion. The stepped surface connects the first side surface and the second side surface, The aforementioned metal film is A second surface covering portion that covers the second surface, Having a side covering portion that covers at least a part of the aforementioned side surface, Semiconductor equipment.

8. The side covering portion covers the second side portion. The semiconductor device according to claim 7.

9. A plate-shaped semiconductor chip made of semiconductor material, The semiconductor chip comprises a metal film provided on a part of the surface of the semiconductor chip, The aforementioned semiconductor chip is The first surface on which the element region is formed, The second surface located on the opposite side of the first surface, It has a plurality of sides connecting the first surface and the second surface, The aforementioned side surface has an inclined portion that slopes away from the center of gravity of the semiconductor chip as it moves from the first surface toward the second surface. The aforementioned metal film is A second surface covering portion that covers the second surface, Having a side covering portion that covers at least a part of the aforementioned side surface, Semiconductor equipment.

10. The second surface covering portion and the side covering portion are connected to each other. A semiconductor device according to any one of claims 7 to 9.

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