Electronic components

Abstract

We provide electronic components that achieve desired characteristics while being miniaturized. [Solution] The electronic component comprises a first body 1 including first and second circuit portions 10 and 20, and a second body 2 mounted on the first body 1 and including first and second sub-circuit portions 41 and 42. The first body includes first to fourth electrode pads 121 to 124. The second body includes first to fourth terminals 2a to 2d. The first circuit portion is connected to the first and second electrode pads, the second circuit portion is connected to the third and fourth electrode pads, the first sub-circuit portion is connected to the first and second terminals 2a and 2d, and the second sub-circuit portion is connected to the third and fourth terminals 2c and 2d. The distance D1 between the centers of each pair of electrode pads is greater than the distance D2 between the centers of the two terminals, thereby suppressing unintended coupling and the generation of stray capacitance.

Description

Technical Field

[0001] The present invention relates to an electronic component including a main body and mounted components mounted on the main body.

Background Art

[0002] One of the electronic components used in a wireless communication system includes filters such as a low-pass filter, a high-pass filter, and a band-pass filter. These filters are configured using a plurality of resonators. As the resonators used in these filters, for example, an LC resonator configured using an inductor and a capacitor, and an elastic wave resonator configured using an elastic wave element are known. An elastic wave element is an element that utilizes an elastic wave. Elastic wave elements include surface acoustic wave elements that utilize surface acoustic waves and bulk acoustic wave elements that utilize bulk acoustic waves.

[0003] As filter devices, in addition to filter devices configured using only LC resonators or only elastic wave resonators, filter devices configured using LC resonators and elastic wave resonators are known. In such a filter device, for example, a second main body including an elastic wave resonator is mounted on a first main body including an LC resonator.

[0004] Patent Document 1 discloses a technique for mounting an electronic component including a surface acoustic wave element on a wiring board. In Patent Document 1, the terminals of the electronic component and the pad electrodes of the wiring board are electrically and mechanically connected by a bonding material such as solder.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] In recent years, there has been a market demand for miniaturization and space saving in small mobile communication devices, and there is also a demand for miniaturization of the demultiplexers used in these communication devices. In electronic components in which a second body is mounted on a first body, as disclosed in Patent Document 1, the multiple electrode pads of the first body and the multiple terminals of the second body are connected by a bonding material. When electronic components are miniaturized, not only the spacing between multiple elements of the electronic component but also the spacing between the multiple electrode pads of the first body and the spacing between the multiple terminals of the second body become smaller. As a result, unintended coupling and stray capacitance can occur, and the desired characteristics may not be obtained.

[0007] To suppress unintended coupling and stray capacitance, not only are the shapes and arrangements of multiple elements necessary, but some kind of ingenuity is also required regarding the multiple electrode pads and terminals. However, conventionally, the ingenuity regarding the multiple electrode pads and terminals has not been sufficiently considered.

[0008] The above problem applies not only when the second body includes an elastic wave resonator, but also when the second body includes elements other than an elastic wave resonator.

[0009] This invention has been made in view of the above problems, and its objective is to provide an electronic component comprising a main body and mounted components attached to the main body, which can achieve desired characteristics while miniaturizing the electronic component. [Means for solving the problem]

[0010] The electronic component of the present invention comprises a first body including a plurality of stacked dielectric layers and a circuit portion; a second body mounted on the first body and including a sub-circuit portion; and a first filter including at least one of the circuit portion and the sub-circuit portion, and selectively passing signals of a frequency within a first passband. The first body further has a first surface and a second surface located at both ends in the stacking direction of the plurality of dielectric layers, and includes a plurality of electrode pads provided on the first surface. The second body further includes a plurality of terminals provided on the outer surface of the second body. The plurality of electrode pads include a first electrode pad and a second electrode pad. The plurality of terminals include a first terminal connected to the first electrode pad and a second terminal connected to the second electrode pad. The circuit portion is connected to the first electrode pad, and the sub-circuit portion is connected to the second terminal. The distance between the centers of the first electrode pad and the second electrode pad is greater than the distance between the centers of the first terminal and the second terminal. [Effects of the Invention]

[0011] In the electronic component of the present invention, the distance between the centers of the first electrode pad and the second electrode pad is greater than the distance between the centers of the first terminal and the second terminal. As a result, according to the present invention, it is possible to achieve desired characteristics while miniaturizing the electronic component. [Brief explanation of the drawing]

[0012] [Figure 1] This is a diagram showing the configuration of an electronic component according to one embodiment of the present invention. [Figure 2] This is a perspective view showing an electronic component according to one embodiment of the present invention. [Figure 3] This is a perspective view showing the first body in one embodiment of the present invention. [Figure 4] This is a plan view showing the first body in one embodiment of the present invention. [Figure 5] This is a plan view showing a part of the interior of the first body in one embodiment of the present invention. [Figure 6]This is a perspective view showing a part of the interior of the first body in one embodiment of the present invention. [Figure 7] This is a plan view showing the first to fourth electrode pads and the first to fourth terminals in one embodiment of the present invention. [Figure 8] This is a circuit diagram showing the circuit configuration in the model of the embodiment used in the simulation. [Figure 9] This is a plan view showing the first to fourth electrode pads and the first to fourth terminals of the electronic component of the comparative example. [Figure 10] This is a characteristic diagram showing the frequency characteristics of the isolation of each model, as determined by simulation. [Figure 11] This is a plan view showing the first to fourth electrode pads and the first to fourth terminals in the first modified example. [Figure 12] This is a plan view showing the first to fourth electrode pads and the first to fourth terminals in the second modified example. [Modes for carrying out the invention]

[0013] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. First, with reference to Figure 1, the general configuration of an electronic component 100 according to one embodiment of the present invention will be described. Figure 1 is a block diagram showing the configuration of the electronic component 100.

[0014] The electronic component 100 according to this embodiment is a diplexer (triplexer) including a first filter 4, a second filter 5, and a third filter 6. The first filter 4 is configured to selectively pass a first signal having a frequency within a first passband. The second filter 5 is configured to selectively pass a second signal having a frequency within a second passband different from the first passband. The third filter 6 is configured to selectively pass a third signal having a frequency within a third passband different from each of the first passband and the second passband. In particular, in this embodiment, the second passband is a frequency band higher than the first passband, and the third passband is a frequency band lower than the first passband.

[0015] The first filter 4 includes a first circuit portion 10. The second filter 5 includes a second circuit portion 20. The third filter 6 includes a third circuit portion 30. The first circuit portion 10, the second circuit portion 20, and the third circuit portion 30 are each an LC circuit including at least one inductor and at least one capacitor.

[0016] The first filter 4 further includes a first sub-circuit portion 41. The second filter 5 further includes a second sub-circuit portion 42. The first circuit portion 10 is connected to the first sub-circuit portion 41. The second circuit portion 20 is connected to the second sub-circuit portion 42. The first and second sub-circuit portions 41 and 42 are electrically separated from each other. Also, the first and second sub-circuit portions 41 and 42 are each configured using at least one elastic wave element. The elastic wave element may be, for example, a bulk elastic wave element or a surface acoustic wave element. The first and second sub-circuit portions 41 and 42 may each be an elastic wave resonator.

[0017] The first circuit portion 10 and the first sub-circuit portion 41 constitute one filter circuit (the first filter 4). The second circuit portion 20 and the second sub-circuit portion 42 constitute another filter circuit (the second filter 5).

[0018] The electronic component 100 further includes a common terminal 1a, a first signal terminal 1b, a second signal terminal 1c, and a third signal terminal 1d. The first filter 4 is connected to the first signal terminal 1b and is also provided between the common terminal 1a and the first signal terminal 1b in the circuit configuration. The second filter 5 is connected to the second signal terminal 1c and is also provided between the common terminal 1a and the second signal terminal 1c in the circuit configuration. The third filter 6 is connected to the third signal terminal 1d and is also provided between the common terminal 1a and the third signal terminal 1d in the circuit configuration. In this application, the expression "in the circuit configuration" is used to refer to the arrangement on the circuit diagram, not the arrangement in the physical configuration.

[0019] Next, the configuration of the electronic component 100 will be described in detail with reference to Figures 1 to 3. Figure 2 is a perspective view showing the electronic component 100. Figure 3 is a perspective view showing the first body in this embodiment. As shown in Figure 2, the electronic component 100 comprises a first body 1, a second body 2 mounted on the first body 1, and a sealing part 3 that seals the first and second bodies 1 and 2. The sealing part 3 is made of, for example, resin.

[0020] The first body 1 includes the first circuit section 10, the second circuit section 20, and the third circuit section 30 shown in Figure 1. The first body 1 also includes a laminate 50. The laminate 50 includes a plurality of stacked dielectric layers, a plurality of conductor layers formed on these dielectric layers, and a plurality of through-holes. Each LC circuit of the first circuit section 10, the second circuit section 20, and the third circuit section 30 is constructed using a plurality of dielectric layers, a plurality of conductor layers, and a plurality of through-holes.

[0021] Each of the through-holes is formed by filling the through-hole with conductive paste. Each of the through-holes is connected to an electrode, a conductive layer, or another through-hole.

[0022] The laminate 50 has a first surface 50A and a second surface 50B located at both ends in the stacking direction of the multiple dielectric layers, and four side surfaces 50C to 50F connecting the first surface 50A and the second surface 50B. Side surfaces 50C and 50D face opposite each other, and side surfaces 50E and 50F also face opposite each other. Side surfaces 50C to 50F are perpendicular to the first surface 50A and the second surface 50B.

[0023] Here, as shown in Figures 2 and 3, we define the X, Y, and Z directions. The X, Y, and Z directions are orthogonal to each other. In this embodiment, the Z direction is defined as one direction parallel to the stacking direction. The Z direction is also one direction parallel to the direction in which the first body 1 and the second body 2 are aligned. Furthermore, the direction opposite to the X direction is defined as the -X direction, the direction opposite to the Y direction is defined as the -Y direction, and the direction opposite to the Z direction is defined as the -Z direction. In addition, the expression "when viewed from a predetermined direction (for example, the stacking direction)" means viewing the object from a position at a distance in the predetermined direction or one direction parallel to the predetermined direction.

[0024] As shown in Figure 3, the first surface 50A is located at the Z-direction end of the laminate 50. The first surface 50A is also part of the outer surface of the first body 1 on which the second body 2 is mounted, and is the top surface of the laminate 50. The second surface 50B is located at the -Z-direction end of the laminate 50. The second surface 50B is also the surface opposite to the first surface 50A, and is the bottom surface of the laminate 50. The side surface 50C is located at the -X-direction end of the laminate 50. The side surface 50D is located at the X-direction end of the laminate 50. The side surface 50E is located at the -Y-direction end of the laminate 50. The side surface 50F is located at the Y-direction end of the laminate 50.

[0025] The first body 1 further includes a plurality of electrodes 111, 112, 113, 114, 115, 116, 117, 118, and 119 provided on the second surface 50B of the laminate 50. Electrode 111 is positioned near a corner where the second surface 50B intersects with side surfaces 50C and 50E. Electrode 113 is positioned near a corner where the second surface 50B intersects with side surfaces 50D and 50E. Electrode 115 is positioned near a corner where the second surface 50B intersects with side surfaces 50D and 50F. Electrode 117 is positioned near a corner where the second surface 50B intersects with side surfaces 50C and 50F.

[0026] Electrode 112 is positioned between electrode 111 and electrode 113. Electrode 114 is positioned between electrode 113 and electrode 115. Electrode 116 is positioned between electrode 115 and electrode 117. Electrode 118 is positioned between electrode 111 and electrode 117. Electrode 119 is positioned in the center or near the center of the second surface 50B.

[0027] The first main body 1 further includes the common terminal 1a, the first signal terminal 1b, the second signal terminal 1c, and the third signal terminal 1d shown in Figure 1. Electrode 111 corresponds to the third signal terminal 1d, electrode 113 corresponds to the common terminal 1a, electrode 115 corresponds to the second signal terminal 1c, and electrode 117 corresponds to the first signal terminal 1b. Therefore, the common terminal 1a and the first to third signal terminals 1b to 1d are provided on the second surface 50B of the laminate 50. Electrodes 112, 114, 116, 118, and 119 are each connected to ground.

[0028] The first body 1 further includes a plurality of electrode pads provided on the first surface 50A of the laminate 50. In this embodiment, the plurality of electrode pads include a first electrode pad 121, a second electrode pad 122, a third electrode pad 123, and a fourth electrode pad 124. The first to fourth electrode pads 121 to 124 may be arranged near the center of the first surface 50A. The first and second electrode pads 121 and 122 are arranged in this order in the -Y direction. The third and fourth electrode pads 123 and 124 are arranged in this order in the Y direction at a position closer to the X direction than the first and second electrode pads 121 and 122.

[0029] The second body 2 includes the first and second sub-circuit sections 41 and 42. The second body 2 also has a third surface 2A and a fourth surface 2B located at both ends in a direction parallel to the Z direction, and four side surfaces 2C to 2F connecting the third surface 2A and the fourth surface 2B. Side surfaces 2C and 2D face opposite each other, and side surfaces 2E and 2F also face opposite each other. Side surfaces 2C to 2F are perpendicular to the third surface 2A and the fourth surface 2B.

[0030] As shown in Figure 2, the third face 2A is located at the Z-direction end of the second body 2. The third face 2A is also the top surface of the second body 2. The fourth face 2B is located at the -Z-direction end of the second body 2. The fourth face 2B is also the face facing the first body 1 and is also the bottom surface of the second body 2. The side surface 2C is located at the -X-direction end of the second body 2. The side surface 2D is located at the X-direction end of the second body 2. The side surface 2E is located at the -Y-direction end of the second body 2. The side surface 2F is located at the Y-direction end of the second body 2.

[0031] The second body 2 further includes a plurality of terminals located on the fourth surface 2B of the second body 2. In this embodiment, the plurality of terminals include a first terminal 2a, a second terminal 2b, a third terminal 2c, and a fourth terminal 2d. The first terminal 2a is located near the corner where the fourth surface 2B intersects with the side surfaces 2C and 2F. The second terminal 2b is located near the corner where the fourth surface 2B intersects with the side surfaces 2C and 2E. The third terminal 2c is located near the corner where the fourth surface 2B intersects with the side surfaces 2D and 2E. The fourth terminal 2d is located near the corner where the fourth surface 2B intersects with the side surfaces 2D and 2F.

[0032] The first sub-circuit section 41 is located between the first terminal 2a and the second terminal 2b in the circuit configuration and is connected to the first terminal 2a and the second terminal 2b. The second sub-circuit section 42 is located between the third terminal 2c and the fourth terminal 2d in the circuit configuration and is connected to the third terminal 2c and the fourth terminal 2d.

[0033] When the second body 2 is mounted on the first body 1, the first to fourth terminals 2a, 2b, 2c, and 2d of the second body 2 face the first to fourth electrode pads 121, 122, 123, and 124 of the first body 1, respectively. The first to fourth terminals 2a, 2b, 2c, and 2d are each connected to the first to fourth electrode pads 121, 122, 123, and 124 via a conductive bonding material. In this embodiment in particular, the first to fourth terminals 2a, 2b, 2c, and 2d are each electrically and physically connected to the first to fourth electrode pads 121, 122, 123, and 124 by, for example, solder bumps 7.

[0034] The first electrode pad 121, the second electrode pad 122, the first terminal 2a, and the second terminal 2b are connected to the first signal terminal 1b. The third electrode pad 123, the fourth electrode pad 124, the third terminal 2c, and the fourth terminal 2d are connected to the second signal terminal 1c.

[0035] Next, the first body 1 will be described in more detail with reference to Figures 4 to 6. Figure 4 is a plan view showing the first body 1. Figure 5 is a plan view showing a part of the interior of the first body 1. Figure 6 is a perspective view showing a part of the interior of the first body 1.

[0036] The first main body 1 further includes a first structure 8 and a second structure 9, both connected to ground. The second structure 9 is positioned between the first electrode pad 121 and the fourth electrode pad 124, and between the second electrode pad 122 and the third electrode pad 123, when viewed from the Z direction. The first and second electrode pads 121 and 122 are positioned ahead of the second structure 9 in the -X direction when viewed from the Z direction. The third and fourth electrode pads 123 and 124 are positioned ahead of the second structure 9 in the X direction when viewed from the Z direction. The first structure 8 is positioned between the second structure 9 and the side surface 50F.

[0037] Here, with reference to Figure 4, the three-dimensional region within the laminate 50 defined by the first and second structures 8, 9 and the interface P is described. The interface P is a virtual plane parallel to the XZ plane and is located between the first and second structures 8, 9 and the side surface 50E. The interface P may be located closer to the second structure 9 than to the side surface 50E.

[0038] The laminate 50 includes a first region R1, a second region R2, and a third region R3. The first region R1 is the region enclosed by the first and second structures 8,9, the sides 50C, 50F, and the boundary surface P. The second region R2 is the region enclosed by the first and second structures 8,9, the sides 50D, 50F, and the boundary surface P. The third region R3 is the region enclosed by the sides 50C, 50D, 50E, and the boundary surface P. In Figure 4, the region enclosed by the dashed line labeled R1 represents the first region R1, the region enclosed by the dashed line labeled R2 represents the second region R2, and the region enclosed by the dashed line labeled R3 represents the third region R3. The first and second structures 8 and 9 are used as partitions to separate the first region R1 and the second region R2.

[0039] The first region R1 is a region that includes at least a portion of the first circuit portion 10 but does not include the second circuit portion 20. The second region R2 is a region that includes at least a portion of the second circuit portion 20 but does not include the first circuit portion 10. The third region R3 is a region that includes the third circuit portion 30. The third region R3 may or may not include the other portion of the first circuit portion 10 and the other portion of the second circuit portion 20.

[0040] Next, the structures of the first and second structures 8 and 9 will be described with reference to Figures 5 and 6. The first structure 8 includes a plurality of first through-holes 71 and a plurality of first conductor layers 61 electrically connected to the plurality of first through-holes 71. Each of the plurality of first conductor layers 61 is positioned at a different location from each other in a direction parallel to the stacking direction, i.e., the Z direction. The second structure 9 includes a plurality of second through-holes 72 and a plurality of second conductor layers 62 electrically connected to the plurality of second through-holes 72. Each of the plurality of second conductor layers 62 is positioned at a different location from each other in a direction parallel to the stacking direction, i.e., the Z direction.

[0041] Each of the plurality of first conductor layers 61 and the plurality of second conductor layers 62 includes a portion that extends along the same direction, which is perpendicular to the lamination direction. In particular in this embodiment, each of the plurality of first conductor layers 61 and the plurality of second conductor layers 62 extends as a whole along a direction parallel to the Y direction.

[0042] Furthermore, the shapes of the multiple first conductor layers 61 are the same. The arrangement of the multiple first conductor layers 61 is the same, except for their position in the stacking direction. Two adjacent first conductor layers 61 spaced apart in the stacking direction are connected to each other by at least one first through-hole 71. In the example shown in Figures 5 and 6, the two first conductor layers 61 are connected to each other by three first through-holes 71.

[0043] Furthermore, the shapes of the multiple second conductor layers 62 are the same. The arrangement of the multiple second conductor layers 62 is the same, except for their position in the stacking direction. Two adjacent second conductor layers 62 spaced apart in the stacking direction are connected to each other by at least one second through-hole 72. In the example shown in Figures 5 and 6, the two second conductor layers 62 are connected to each other by three second through-holes 72.

[0044] The plurality of first conductor layers 61 include a specific first conductor layer 61. The specific first conductor layer 61 may be, for example, the conductor layer closest to the first surface 50A among the plurality of first conductor layers 61. Since the plurality of first conductor layers 61 are components of the first structure 8, it can also be said that the first structure 8 includes a specific first conductor layer 61. In Figure 5, reference numeral 61 indicates a specific first conductor layer 61.

[0045] The multiple second conductor layers 62 include a specific second conductor layer 62. The specific second conductor layer 62 may be, for example, the conductor layer closest to the first surface 50A among the multiple second conductor layers 62. Since the multiple second conductor layers 62 are components of the second structure 9, it can also be said that the second structure 9 includes a specific second conductor layer 62. In Figure 5, reference numeral 62 indicates a specific second conductor layer 62.

[0046] A specific first conductor layer 61 and a specific second conductor layer 62 are located between the first region R1 and the second region R2, and between the first circuit portion 10 and the second circuit portion 20, when viewed from the stacking direction (parallel to the Z direction). As shown in Figure 5, the specific first conductor layer 61 is not directly connected to the specific second conductor layer 62.

[0047] In this embodiment, the above description of a specific first conductor layer 61 also applies to first conductor layers 61 other than the specific first conductor layer 61. Similarly, the above description of a specific second conductor layer 62 also applies to second conductor layers 62 other than the specific second conductor layer 62. The first conductor layer 61 is not directly connected to a second conductor layer 62 located at the same position in the stacking direction.

[0048] Next, with reference to Figures 4 to 6, the features of the first and second structures 8, 9 and the first and second circuit portions 10, 20 will be described. Each of the first and second circuit portions 10, 20 includes at least one inductor and at least one capacitor. In this embodiment, the first circuit portion 10 includes inductors L1, L2 and a capacitor C1. The second circuit portion 20 includes inductors L3, L4 and a capacitor C2.

[0049] Inductors L1 and L2 are located in the first region R1. Inductor L2 is located between the second structure 9 and the side surface 50C. Inductor L1 is located between inductor L2 and the side surface 50F, as well as between the first structure 8 and the side surface 50C.

[0050] Inductors L3 and L4 are located in the second region R2. Inductor L3 is located between the second structure 9 and side surface 50D. Inductor L4 is located between inductor L3 and side surface 50F, as well as between the first structure 8 and side surface 50D.

[0051] The first structure 8 is positioned between inductors L1 and L4 when viewed from the Z direction. The second structure 9 is positioned between inductors L2 and L3 when viewed from the Z direction.

[0052] Capacitor C1 is located between inductor L1 and the second surface 50B. Capacitor C2 is located between inductor L4 and the second surface 50B.

[0053] The first body 1 further includes a ground conductor layer 91 connected to ground. The ground conductor layer 91 is electrically connected to at least one of the electrodes 112, 114, 116, 118, and 119 connected to ground.

[0054] The first and second structures 8 and 9 are connected to the ground conductor layer 91. In this embodiment in particular, at least one of the plurality of first through-holes 71 and at least one of the plurality of second through-holes 72 are connected to the ground conductor layer 91.

[0055] When viewed from the Z direction, the ground conductor layer 91 overlaps with at least a portion of at least one of the first circuit portion 10 and the second circuit portion 20. In particular, in this embodiment, when viewed from the Z direction, the ground conductor layer 91 overlaps with the entirety of each of the inductors L1 to L4.

[0056] The first body 1 further includes capacitor conductor layers 92 and 93 disposed within the laminate 50. Each of the capacitor conductor layers 92 and 93 faces the ground conductor layer 91 via at least one dielectric layer. Capacitor C1 is composed of the ground conductor layer 91 and the capacitor conductor layer 92, and at least one dielectric layer interposed between the ground conductor layer 91 and the capacitor conductor layer 92. Capacitor C2 is composed of the ground conductor layer 91 and the capacitor conductor layer 93, and at least one dielectric layer interposed between the ground conductor layer 91 and the capacitor conductor layer 93. The capacitor conductor layer 92 is disposed between the inductor L1 and the ground conductor layer 91. The capacitor conductor layer 93 is disposed between the inductor L4 and the ground conductor layer 91.

[0057] The first main body 1 may further include a third structure (not shown) that separates a part of the first circuit portion 10 from a part of the third circuit portion 30, and a fourth structure (not shown) that separates a part of the second circuit portion 20 from the other part of the third circuit portion 30. The third and fourth structures may be directly or indirectly connected to the ground conductor layer 91. The third and fourth structures may or may not be directly connected to each other.

[0058] Next, with reference to Figures 2 to 5, the features of the first and second structures 8 and 9 and the second body 2 will be described. As mentioned above, the first to fourth terminals 2a, 2b, 2c, and 2d of the second body 2 are connected to the first to fourth electrode pads 121, 122, 123, and 124 of the first body 1, respectively, via a conductive bonding material. The second structure 9 is positioned between the first electrode pad 121 and the fourth electrode pad 124, and between the second electrode pad 122 and the third electrode pad 123, when viewed from the Z direction. Therefore, the second structure 9 is positioned between the first terminal 2a and the fourth terminal 2d, and between the second terminal 2b and the third terminal 2c, when viewed from the Z direction.

[0059] Furthermore, the first and second electrode pads 121 and 122 are positioned ahead of the second structure 9 in the -X direction when viewed from the Z direction. Therefore, the first and second terminals 2a and 2b are positioned ahead of the second structure 9 in the -X direction when viewed from the Z direction.

[0060] Furthermore, the third and fourth electrode pads 123 and 124 are positioned ahead of the second structure 9 in the X direction. Therefore, when viewed from the Z direction, the third and fourth terminals 2c and 2d are positioned ahead of the second structure 9 in the X direction.

[0061] As mentioned above, the first sub-circuit portion 41 is located between the first terminal 2a and the second terminal 2b in terms of the circuit configuration. Although not shown in the diagram, at least a portion of the first sub-circuit portion 41 is positioned ahead of the second structure 9 in the -X direction when viewed from the Z direction.

[0062] Furthermore, as mentioned above, the second sub-circuit portion 42 is located between the third terminal 2c and the fourth terminal 2d in terms of the circuit configuration. Although not shown in the diagram, at least a portion of the second sub-circuit portion 42 is positioned ahead of the second structure 9 in the X direction when viewed from the Z direction.

[0063] In Figure 4, the rectangular region denoted by R20 indicates the region located between the first sub-circuit portion 41 and the second sub-circuit portion 42 in the second main body 2. Region R20 may be a three-dimensional region or a two-dimensional region. Region R20 may also be located between a part of the first sub-circuit portion 41 and a part of the second sub-circuit portion 42. A specific second conductor layer 62 of the second structure 9 overlaps with region R20 when viewed from the Z direction.

[0064] As shown in Figure 4, the second structure 9 may protrude outside the second body 2 when viewed from the Z direction, that is, on the Y direction side and the -Y direction side of the second body 2.

[0065] A specific first conductor layer 61 of the first structure 8 does not overlap with region R20 when viewed from the Z direction. As long as the requirement that the specific first conductor layer 61 does not overlap with region R20 is met, the first structure 8 may or may not overlap with the second body 2 when viewed from the Z direction. As shown in Figure 4, in this embodiment, a specific first conductor layer 61 of the first structure 8 does not overlap with the second body 2 when viewed from the Z direction.

[0066] Next, the characteristics of inductors L1 to L4 will be described with reference to Figures 5 and 6. Inductor L1 includes at least one inductor conductor layer wound around an axis extending in a direction parallel to the lamination direction, such that an opening surrounded by inductor L1 is formed. Hereinafter, the opening surrounded by inductor L1 or at least one inductor conductor layer of inductor L1 will be referred to as the opening of inductor L1. The opening of inductor L1 faces the first surface 50A of the laminate 50. Furthermore, the entire opening of inductor L1 is located in the first region R1. Hereinafter, for inductors other than inductor L1, the opening surrounded by that inductor or at least one inductor conductor layer of that inductor will be referred to as the opening of that inductor.

[0067] Similarly, each of the inductors L2, L3, and L4 includes at least one inductor conductor layer wound around an axis extending in a direction parallel to the lamination direction, such that an opening is formed surrounded by each of the inductors L2, L3, and L4. Each opening of the inductors L2, L3, and L4 faces the first surface 50A of the laminate 50. The entire opening of inductor L2 lies within the first region R1. The entire openings of inductors L3 and L4 lies within the second region R2.

[0068] The inductor L1 includes a plurality of inductor conductor layers 81, which are arranged at predetermined intervals in the stacking direction, as at least one inductor conductor layer. Each of the plurality of inductor conductor layers 81 is wound around an axis extending in a direction parallel to the stacking direction so as to surround the opening of the inductor L1. The first body 1 further includes a conductor layer 85 connected to the first specific inductor conductor layer 81 that is closest to the first surface 50A, and a through-hole T1 connecting the conductor layer 85 to the first electrode pad 121. In Figure 5, the boundary between the first specific inductor conductor layer 81 and the conductor layer 85 is shown by a dotted line.

[0069] The inductor L1 may or may not be connected to the capacitor C1. If the inductor L1 is connected to the capacitor C1, the first body 1 may further include through-holes (not shown) connecting a second specific inductor conductor layer 81, which is closest to the second surface 50B of the plurality of inductor conductor layers 81, to a capacitor conductor layer 92.

[0070] The inductor L2 includes a plurality of inductor conductor layers 82 arranged at predetermined intervals in the stacking direction, each serving as at least one inductor conductor layer. Each of the plurality of inductor conductor layers 82 is wound around an axis extending in a direction parallel to the stacking direction so as to surround the opening of the inductor L2. The first body 1 further includes a conductor layer 86 connected to a first specific inductor conductor layer 82 that is closest to the first surface 50A among the plurality of inductor conductor layers 82, and a through-hole T2 connecting the conductor layer 86 to the second electrode pad 122. In Figure 5, the boundary between the inductor conductor layers 82 and the conductor layer 86 is shown by a dotted line.

[0071] The inductor L2 may or may not be connected to ground. If the inductor L2 is connected to ground, the first body 1 may further include a number of through-holes (not shown) that connect a second specific inductor conductor layer 82, which is closest to the second surface 50B of the plurality of inductor conductor layers 82, to the ground conductor layer 91.

[0072] The inductor L3 includes a plurality of inductor conductor layers 83, which are arranged at predetermined intervals in the stacking direction, as at least one inductor conductor layer. Each of the plurality of inductor conductor layers 83 is wound around an axis extending in a direction parallel to the stacking direction so as to surround the opening of the inductor L3. The first body 1 further includes a conductor layer 87 connected to a first specific inductor conductor layer 83 that is closest to the first surface 50A among the plurality of inductor conductor layers 83, and a through-hole T3 connecting the conductor layer 87 to the third electrode pad 123. In Figure 5, the boundary between the inductor conductor layer 83 and the conductor layer 87 is shown by a dotted line.

[0073] The inductor L3 may or may not be connected to ground. If the inductor L3 is connected to ground, the first body 1 may further include a number of through-holes (not shown) connecting a second specific inductor conductor layer 83, which is closest to the second surface 50B of the plurality of inductor conductor layers 83, to the ground conductor layer 91.

[0074] The inductor L4 includes a plurality of inductor conductor layers 84, each arranged at a predetermined interval in the stacking direction, as at least one inductor conductor layer. Each of the plurality of inductor conductor layers 84 is wound around an axis extending in a direction parallel to the stacking direction so as to surround the opening of the inductor L4. The first body 1 further includes a conductor layer 88 connected to the first specific inductor conductor layer 84 closest to the first surface 50A, and a through-hole T4 connecting the conductor layer 88 to the fourth electrode pad 124. In Figure 5, the boundary between the inductor conductor layer 84 and the conductor layer 88 is shown by a dotted line.

[0075] The inductor L4 may or may not be connected to the capacitor C2. If the inductor L4 is connected to the capacitor C2, the first body 1 may further include through holes (not shown) connecting a second specific inductor conductor layer 84, which is closest to the second surface 50B of the plurality of inductor conductor layers 84, to a capacitor conductor layer 93.

[0076] Inductor L1 is connected to the first sub-circuit section 41 of the second body 2 via a conductor layer 85, a through-hole T1, a first electrode pad 121, and a first terminal 2a. Inductor L2 is connected to the first sub-circuit section 41 of the second body 2 via a conductor layer 86, a through-hole T2, a second electrode pad 122, and a second terminal 2b. Inductor L3 is connected to the second sub-circuit section 42 of the second body 2 via a conductor layer 87, a through-hole T3, a third electrode pad 123, and a third terminal 2c. Inductor L4 is connected to the second sub-circuit section 42 of the second body 2 via a conductor layer 88, a through-hole T4, a fourth electrode pad 124, and a fourth terminal 2d.

[0077] The multiple inductor conductor layers 81 of inductor L1, a specific first conductor layer 61, and the multiple inductor conductor layers 84 of inductor L4 are arranged in this order along a first direction perpendicular to the stacking direction. In this embodiment in particular, the multiple inductor conductor layers 81, the specific first conductor layer 61, and the multiple inductor conductor layers 84 are arranged in this order along the X direction. The dimensions of the specific first conductor layer 61 in a second direction (Y direction) perpendicular to each of the stacking direction and the first direction (X direction) may be larger than the dimensions in the second direction (Y direction) of the opening surrounded by each of the multiple inductor conductor layers 81 and the dimensions in the second direction (Y direction) of the opening surrounded by each of the multiple inductor conductor layers 84.

[0078] Furthermore, the multiple inductor conductor layers 82 of inductor L2, a specific second conductor layer 62, and the multiple inductor conductor layers 83 of inductor L3 may be arranged in this order along a first direction perpendicular to the stacking direction. In this embodiment in particular, the multiple inductor conductor layers 82, the specific second conductor layer 62, and the multiple inductor conductor layers 83 are arranged in this order along the X direction. The dimensions of the specific second conductor layer 62 in a second direction (Y direction) perpendicular to each of the stacking direction and the first direction (X direction) may be larger than the dimensions in the second direction (Y direction) of the opening surrounded by each of the multiple inductor conductor layers 82 and the dimensions in the second direction (Y direction) of the opening surrounded by each of the multiple inductor conductor layers 83.

[0079] Next, with reference to Figure 7, the features of the first to fourth electrode pads 121-124 of the first body 1 and the first to fourth terminals 2a-2d of the second body 2 will be described. Figure 7 is a plan view showing the first to fourth electrode pads 121-124 and the first to fourth terminals 2a-2d.

[0080] In Figure 7, the symbol C11 indicates the center of the shape of the first electrode pad 121 when viewed from the stacking direction (a direction parallel to the Z direction), i.e., the center of the planar shape of the first electrode pad 121. The center C11 of the planar shape of the first electrode pad 121 may be the circumcenter of the circumscribed circle of the planar shape of the first electrode pad 121, the incenter of the inscribed circle of the planar shape of the first electrode pad 121, or the centroid of the planar shape of the first electrode pad 121.

[0081] Hereafter, the center of the circumscribed circle of the planar shape of the first electrode pad 121 will be referred to as the center C11 of the planar shape of the first electrode pad 121. In the example shown in Figure 7, the planar shape of the first electrode pad 121 is circular. Therefore, the center C11 coincides with the center of the planar shape (center of the circle) of the first electrode pad 121. In the following explanation, for convenience, the center C11 will be referred to as the center of the first electrode pad 121. For the second to fourth electrode pads 122 to 124 and the first to fourth terminals 2a to 2d, similar to the first electrode pad 121, the center of the circumscribed circle of the shape when viewed from the stacking direction, i.e., the planar shape, will simply be referred to as the center.

[0082] The symbol C12 indicates the center of the second electrode pad 122, the symbol C13 indicates the center of the third electrode pad 123, and the symbol C14 indicates the center of the fourth electrode pad 124. Additionally, the symbol C21 indicates the center of the first terminal 2a, the symbol C22 indicates the center of the second terminal 2b, the symbol C23 indicates the center of the third terminal 2c, and the symbol C24 indicates the center of the fourth terminal 2d.

[0083] Furthermore, the distance between the centers of any two electrode pads from the first to fourth electrode pads 121 to 124 is represented by the symbol D1. In Figure 7, the symbol D1 is used to show the distance between center C11 and center C14, and the distance between center C12 and center C13. Figure 7 shows an example where the distance between center C11 and center C14 is equal to the distance between center C12 and center C13.

[0084] Furthermore, the distance between the centers of any two terminals among the first to fourth terminals 2a to 2d is represented by the symbol D2. In Figure 7, the symbol D2 is used to show the distance between center C21 and center C24, and the distance between center C22 and center C23. Figure 7 shows an example where the distance between center C21 and center C24 and the distance between center C22 and center C23 are equal.

[0085] Here, we focus on any two adjacent electrode pads from the first to fourth electrode pads 121 to 124 that are spaced apart, and two terminals from the first to fourth terminals 2a to 2d that are connected to each of the two electrode pads. The distance D1 between the centers of the two electrode pads is greater than the distance D2 between the centers of the two terminals.

[0086] As described above, the first electrode pad 121, the second electrode pad 122, the first terminal 2a, and the second terminal 2b are connected to the first signal terminal 1b. The third electrode pad 123, the fourth electrode pad 124, the third terminal 2c, and the fourth terminal 2d are connected to the second signal terminal 1c. The length of the path from the first signal terminal 1b to the second signal terminal 1c is greater than the length of the path when the distance between the centers of the two electrode pads D1 and the distance between the centers of the two terminals D2 are the same.

[0087] In this embodiment, in particular, all combinations of two electrodes from the first to fourth electrode pads 121 to 124 satisfy the requirement that the distance D1 between the centers of the two electrode pads is greater than the distance D2 between the centers of the two terminals connected to each of these two electrode pads. That is, the distance D1 between the center C11 of the first electrode pad 121 and the center C12 of the second electrode pad 122 is greater than the distance D2 between the center C21 of the first terminal 2a and the center C22 of the second terminal 2b. The distance D1 between the center C12 of the second electrode pad 122 and the center C13 of the third electrode pad 123 is greater than the distance D2 between the center C22 of the second terminal 2b and the center C23 of the third terminal 2c. The distance D1 between the center C13 of the third electrode pad 123 and the center C14 of the fourth electrode pad 124 is greater than the distance D2 between the center C23 of the third terminal 2c and the center C24 of the fourth terminal 2d. The distance D1 between the center C14 of the fourth electrode pad 124 and the center C11 of the first electrode pad 121 is greater than the distance D2 between the center C24 of the fourth terminal 2d and the center C21 of the first terminal 2a.

[0088] Furthermore, the distance D1 between the center C11 of the first electrode pad 121 and the center C13 of the third electrode pad 123 is greater than the distance D2 between the center C21 of the first terminal 2a and the center C23 of the third terminal 2c. The distance D1 between the center C12 of the second electrode pad 122 and the center C14 of the fourth electrode pad 124 is greater than the distance D2 between the center C22 of the second terminal 2b and the center C24 of the fourth terminal 2d.

[0089] The length of the path from the first signal terminal 1b to the second signal terminal 1c is greater than the length of the path when the distance D1 between the centers of the first electrode pad 121 and the second electrode pad 122 is the same as the distance D2 between the centers of the first terminal 2a and the second terminal 2b, and the distance D1 between the centers of the third electrode pad 123 and the fourth electrode pad 124 is the same as the distance D2 between the centers of the third terminal 2c and the fourth terminal 2d.

[0090] Next, with reference to Figure 7, the planar shapes (shapes when viewed from the stacking direction) of the first to fourth electrode pads 121 to 124 and the first to fourth terminals 2a to 2d will be described. The planar shape of each of the first to fourth electrode pads 121 to 124 may or may not be similar to the planar shape of each of the first to fourth terminals 2a to 2d. In this embodiment in particular, the shape of each of the first to fourth electrode pads 121 to 124 is different from the planar shape of each of the first to fourth terminals 2a to 2d. Specifically, the planar shapes of each of the first to fourth electrode pads 121 to 124 are circular, the planar shape of the first terminal 2a is polygonal (pentagonal in the example shown in Figure 7), and the planar shapes of each of the second to fourth terminals 2b to 2d are rectangular.

[0091] Furthermore, the planar shapes of the first to fourth terminals 2a to 2d may or may not be similar to each other. In this embodiment in particular, the planar shapes (rectangles) of the second to fourth terminals 2b to 2d are different from the planar shape (polygon) of the first terminal 2a. The first terminal 2a may also be used as a mark to confirm the orientation of the second body 2.

[0092] Next, the operation and effects of the electronic component 100 according to this embodiment will be described. The electronic component 100 according to this embodiment comprises a first body 1 including first and second circuit portions 10 and 20, and a second body 2 mounted on the first body 1 and including first and second sub-circuit portions 41 and 42. The first body 1 further includes first to fourth electrode pads 121 to 124. The second body 2 further includes first to fourth terminals 2a to 2d. The first circuit portion 10 is connected to the first and second electrode pads 121 and 122. The second circuit portion 20 is connected to the third and fourth electrode pads 123 and 124. The first sub-circuit portion 41 is connected to the first and second terminals 2a and 2b. The second sub-circuit portion 42 is connected to the third and fourth terminals 2c and 2d.

[0093] In this embodiment, as described above, the distance D1 between the centers of the two electrode pads is greater than the distance D2 between the centers of the two terminals connected to each of these two electrode pads. As a result, according to this embodiment, unintended coupling and the generation of stray capacitance can be suppressed, and as a result, desired characteristics can be achieved while miniaturizing the electronic component 100.

[0094] The effects of the electronic component 100 according to this embodiment will be described in more detail below. First, the first electrode pad 121, the second electrode pad 122, the first terminal 2a, and the second terminal 2b will be described. In this embodiment, the distance D1 between the center C11 of the first electrode pad 121 and the center C12 of the second electrode pad 122 is greater than the distance D2 between the center C21 of the first terminal 2a and the center C22 of the second terminal 2b. When comparing with the same distance D2 between centers C21 and C22, this embodiment allows for a larger gap between the through-hole T1 connected to the first electrode pad 121 and the through-hole T2 connected to the second electrode pad 122 compared to the case where the distance D1 between centers C11 and C12 and the distance D2 between centers C21 and C22 are the same. As a result, this embodiment can suppress the stray capacitance generated between the through-hole T1 and the through-hole T2.

[0095] In particular, when the first sub-circuit section 41 connected to the first and second terminals 2a and 2b is an elastic wave resonator, self-resonance occurs due to stray capacitance generated between through-hole T1 and through-hole T2. According to this embodiment, the occurrence of self-strong vibrations can be suppressed by suppressing stray capacitance as described above. As a result, according to this embodiment, the desired characteristics can be achieved.

[0096] Furthermore, when comparing with the same distance D2 between centers C21 and C22, this embodiment allows for a greater length of the path from the first signal terminal 1b to the second signal terminal 1c compared to the case where the distance D1 between centers C11 and C12 and the distance D2 between centers C21 and C22 are the same. As a result, this embodiment makes it possible to suppress deterioration of the isolation characteristics between the first filter 4 and the second filter 5.

[0097] The above description of the first electrode pad 121, the second electrode pad 122, the first terminal 2a, and the second terminal 2b also applies to the third electrode pad 123, the fourth electrode pad 124, the third terminal 2c, and the fourth terminal 2d. In other words, according to this embodiment, the distance between the through-hole T3 connected to the third electrode pad 123 and the through-hole T4 connected to the fourth electrode pad 124 can be increased. As a result, according to this embodiment, stray capacitance generated between the through-hole T3 and the through-hole T4 can be suppressed. Furthermore, according to this embodiment, the length of the path from the first signal terminal 1b to the second signal terminal 1c can be increased, thereby suppressing deterioration of the isolation characteristics between the first filter 4 and the second filter 5.

[0098] Next, the first electrode pad 121, the fourth electrode pad 124, the first terminal 2a, and the fourth terminal 2d will be described. In this embodiment, the distance D1 between the center C11 of the first electrode pad 121 and the center C14 of the fourth electrode pad 124 is greater than the distance D2 between the center C21 of the first terminal 2a and the center C24 of the fourth terminal 2d. When comparing with the same distance D2 between centers C21 and C24, this embodiment allows for a larger gap between the through-hole T1 connected to the first electrode pad 121 and the through-hole T4 connected to the fourth electrode pad 124 compared to the case where the distance D1 between centers C11 and C14 and the distance D2 between centers C21 and C24 are the same. As a result, this embodiment can suppress stray capacitance between through-hole T1 and through-hole T4, and can also suppress coupling between through-hole T1 and through-hole T4. As a result, according to this embodiment, coupling between the first subcircuit portion 41 and the second subcircuit portion 42 via through-holes T1, T4 or elements connected to through-holes T1, T4 can be suppressed. As a result, according to this embodiment, deterioration of the isolation characteristics between the first filter 4 and the second filter 5 can be suppressed.

[0099] The above description of the first electrode pad 121, the fourth electrode pad 124, the first terminal 2a, and the fourth terminal 2d also applies to the set of the second electrode pad 122, the third electrode pad 123, the second terminal 2b, and the third terminal 2c, the set of the first electrode pad 121, the third electrode pad 123, the first terminal 2a, and the third terminal 2c, and the set of the second electrode pad 122, the fourth electrode pad 124, the second terminal 2b, and the fourth terminal 2d. In other words, according to this embodiment, the distance between the through-hole T2 connected to the second electrode pad 122 and the through-hole T3 connected to the third electrode pad 123 can be increased. As a result, according to this embodiment, it is possible to suppress the stray capacitance generated between the through-hole T2 and the through-hole T3, and to suppress the coupling between the through-hole T2 and the through-hole T3. As a result, according to this embodiment, coupling between the first subcircuit portion 41 and the second subcircuit portion 42 via through-holes T2, T3 or elements connected to through-holes T2, T3 can be suppressed. Similarly, according to this embodiment, coupling between the first subcircuit portion 41 and the second subcircuit portion 42 via through-holes T1, T3 or elements connected to through-holes T1, T3, and coupling between the first subcircuit portion 41 and the second subcircuit portion 42 via through-holes T2, T4 or elements connected to through-holes T2, T4 can be suppressed. Therefore, according to this embodiment, deterioration of the isolation characteristics between the first filter 4 and the second filter 5 can be suppressed.

[0100] Next, the results of a simulation investigating the isolation characteristics of the electronic component 100 according to this embodiment will be described. First, the model of the embodiment used in the simulation will be described. The model of the embodiment is a model of the electronic component 100 according to this embodiment. In the simulation, the first circuit portion 10 and the first sub-circuit portion 41 of the first filter 4, the second circuit portion 20 and the second sub-circuit portion 42 of the second filter 5, and the third circuit portion 30 of the third filter 6 were designed so that the model of the embodiment would operate as a demultiplexer. In addition, in the simulation, the first to third filters 4 to 6 were designed so that the passband of the first filter 4 was 3.300 to 5.000 GHz, the passband of the second filter 5 was 5.150 to 7.125 GHz, and the passband of the third filter 6 was 0.698 to 2.690 GHz.

[0101] Figure 8 is a circuit diagram showing the circuit configuration of the embodiment model. The embodiment model includes an inductor L41 and a capacitor C41 in addition to the first to third filters 4 to 6. One end of the inductor L41 is connected to the common terminal 1a. One end each of the third filter 6 and the capacitor C41 is connected to the other end of the inductor L41. The other end of the third filter 6 is connected to the third signal terminal 1d.

[0102] One end of the first filter 4 and one end of the second filter 5 are connected to the other end of capacitor C41. The other end of the first filter 4 is connected to the first signal terminal 1b. The other end of the second filter 5 is connected to the second signal terminal 1c.

[0103] The third circuit section 30 of the third filter 6 includes inductors L31 and L32, and capacitors C31, C32, and C33. One end of inductor L31 is connected to the other end of inductor L41. One end of inductor L32 is connected to the other end of inductor L31. The other end of inductor L32 is connected to the third signal terminal 1d.

[0104] Capacitor C31 is connected in parallel with inductor L32. One end of capacitor C32 is connected to the connection point between inductor L31 and inductor L32. One end of capacitor C33 is connected to the other end of inductor L32. The other ends of capacitors C32 and C33 are connected to ground.

[0105] The first circuit portion 10 of the first filter 4 includes inductors L11, L12, L13, L14, L15, L16 and capacitors C11, C12, C13, C14. The first sub-circuit portion 41 of the first filter 4 includes four elastic wave elements 411, 412, 413, 414.

[0106] One end of inductor L11 is connected to the other end of capacitor C41. One end of inductor L12 is connected to the other end of inductor L11. One end of capacitor C11 is connected to the other end of inductor L12. The other end of capacitor C11 is connected to the first terminal 2a of the second body 2.

[0107] One end of inductor L13 is connected to the junction point of inductors L11 and L12. One end of capacitor C12 is connected to the other end of inductor L13. The other end of capacitor C12 is connected to ground.

[0108] One end of inductor L14 is connected to the other end of capacitor C11 and to the first terminal 2a of the second body 2. One end of capacitor C13 is connected to the other end of inductor L14. The other end of capacitor C13 is connected to ground.

[0109] One end of each elastic wave element 411 and 413 is connected to the first terminal 2a. One end of elastic wave element 412 is connected to the other end of elastic wave element 411. One end of elastic wave element 414 is connected to the other end of elastic wave element 413. The other ends of each elastic wave element 412 and 414 are connected to the second terminal 2b of the second body 2.

[0110] One end of inductors L15 and L16 is connected to the second terminal 2b. The other end of inductor L15 is connected to the first signal terminal 1b. The other end of inductor L16 is connected to ground.

[0111] One end of capacitor C14 is connected to one end of inductor L15. The other end of capacitor C14 is connected to ground.

[0112] The second circuit section 20 of the second filter 5 includes inductors L21, L22, L23 and capacitors C21, C22, C23, C24, C25, C26. The second sub-circuit section 42 of the second filter 5 includes four elastic wave elements 421, 422, 423, 424.

[0113] One end of capacitor C21 is connected to the other end of capacitor C41. The other end of capacitor C21 and one end of inductor L21 are connected to the third terminal 2c of the second body 2. One end of capacitor C22 is connected to the other end of inductor L21. The other end of capacitor C22 is connected to ground.

[0114] One end of each elastic wave element 421 and 423 is connected to the third terminal 2c. One end of elastic wave element 422 is connected to the other end of elastic wave element 421. One end of elastic wave element 424 is connected to the other end of elastic wave element 423. The other ends of each elastic wave element 422 and 424 are connected to the fourth terminal 2d of the second body 2.

[0115] One end each of capacitor C23 and inductor L23 is connected to the fourth terminal 2d. One end of inductor L22 is connected to the other end of capacitor C23. The other end of inductor L22 is connected to the second signal terminal 1c. Capacitor C24 is connected in parallel with inductor L22.

[0116] One end of capacitor C25 is connected to the other end of inductor L23. The other end of capacitor C25 is connected to ground.

[0117] One end of capacitor C26 is connected to the other end of inductor L22. The other end of capacitor C26 is connected to ground.

[0118] The multiple inductors and multiple capacitors shown in Figure 8 are constructed using multiple dielectric layers, multiple conductor layers, and multiple through-holes in the laminate 50.

[0119] Note that inductors L14 and L16 may correspond to "Inductor L1" and "Inductor L2" shown in Figures 5 and 6, respectively. In this case, capacitor C13 may correspond to "Capacitor C1" shown in Figures 5 and 6.

[0120] Furthermore, inductors L21 and L23 may correspond to "inductor L3" and "inductor L4" shown in Figures 5 and 6, respectively. In this case, capacitor C25 may correspond to "capacitor C2" shown in Figures 5 and 6.

[0121] Next, the comparative example model used in the simulation will be described. The comparative example model is a model of an electronic component of the comparative example. The circuit configuration of the comparative example electronic component model is the same as the circuit configuration of the embodiment model shown in Figure 8. In addition, the comparative example electronic component has a first body 101 instead of the first body 1 in this embodiment. The configuration of the first body 101 is basically the same as the configuration of the first body 1 in this embodiment. However, in the comparative example electronic component model, the arrangement of the first to fourth electrode pads 121 to 124 differs from that of the embodiment model.

[0122] Figure 9 is a plan view showing the first to fourth electrode pads 121 to 124 and the first to fourth terminals 2a to 2d in the comparative electronic component. In the comparative electronic component model, the distance D1 between the centers of any two spaced-apart adjacent electrode pads 121 to 124 is the same as the distance D2 between the centers of two terminals connected to two electrode pads of the first to fourth terminals 2a to 2d.

[0123] In the comparative example model, the multiple first conductor layers 61 of the first structure 8 are directly connected to the multiple second conductor layers 62 of the second structure 9.

[0124] Next, the simulation results will be explained. In the simulation, the frequency characteristics of the isolation between the first filter 4 and the second filter 5 were determined for both the example model and the comparative example model. The definition of isolation in the simulation is as follows: When a high-frequency signal with power P1 is input to the first signal terminal 1b, P2 is the power of the signal output from the second signal terminal 1c. Isolation I is defined by the following equation (1).

[0125] I = 10log(P2 / P1) …(1)

[0126] Figure 10 is a characteristic curve showing the frequency characteristics of isolation. In Figure 10, the horizontal axis represents frequency, and the vertical axis represents isolation. In Figure 10, the curve labeled 301 shows the frequency characteristics of isolation in the model of the embodiment. The curve labeled 302 shows the frequency characteristics of isolation in the model of the comparative example. As can be seen from the simulation results, the model of the embodiment (301) has sufficient isolation characteristics for practical use. Furthermore, as shown in Figure 10, the absolute value of isolation is larger in the model of the embodiment (301) compared to the model of the comparative example (302).

[0127] [Differentiation] Next, first and second modified examples of the electronic component 100 according to this embodiment will be described. First, the first modified example will be described with reference to Figure 11. Figure 11 is a plan view showing the first to fourth electrode pads 121 to 124 and the first to fourth terminals 2a to 2d in the first modified example. In the first modified example, the shape (planar shape) of each of the first to fourth electrode pads 121 to 124 when viewed from the stacking direction (direction parallel to the Z direction) is rectangular. In particular, in the first modified example, the planar shape of each of the second to fourth electrode pads 122 to 124 is similar to the planar shape of each of the second to fourth terminals 2b to 2d.

[0128] In the first modified example, a portion of the outer edge of the planar shape of the first terminal 2a may coincide with or approximately coincide with a portion of the outer edge of the planar shape of the first electrode pad 121 when viewed from the Z direction. Similarly, a portion of the outer edge of the planar shape of the second terminal 2b may coincide with or approximately coincide with a portion of the outer edge of the planar shape of the second electrode pad 122 when viewed from the Z direction. A portion of the outer edge of the planar shape of the third terminal 2c may coincide with or approximately coincide with a portion of the outer edge of the planar shape of the third electrode pad 123 when viewed from the Z direction. A portion of the outer edge of the planar shape of the fourth terminal 2d may coincide with or approximately coincide with a portion of the outer edge of the planar shape of the fourth electrode pad 124 when viewed from the Z direction.

[0129] In the example shown in Figure 11, the planar shape of the first electrode pad 121 is not similar to the planar shape of the first terminal 2a. However, the planar shape of the first electrode pad 121 may be similar to the planar shape of the first terminal 2a.

[0130] Next, a second modified example will be described with reference to Figure 12. Figure 12 is a plan view showing the first to fourth electrode pads 121 to 124 and the first to fourth terminals 2a to 2d in the second modified example. In the second modified example, the shape (planar shape) of each of the first to fourth terminals 2a to 2d, when viewed from the stacking direction (direction parallel to the Z direction), is circular. The planar shape of each of the first to fourth electrode pads 121 to 124 is similar to the planar shape of each of the first to fourth terminals 2a to 2d.

[0131] Note that, similar to the first modified example shown in Figure 11, the planar shape of the first electrode pad 121 does not have to be similar to the planar shape of the first terminal 2a.

[0132] It should be noted that the present invention is not limited to the embodiments described above, and various modifications are possible. For example, the electronic component of the present invention may be a diplexer equipped with two filters, or a bandpass filter equipped with multiple filters.

[0133] Furthermore, the requirement that the distance D1 between the centers of two electrode pads is greater than the distance D2 between the centers of the two terminals connected to each of these two electrode pads may be satisfied by some of all combinations of two electrodes from the first to fourth electrode pads 121 to 124. For example, only the combination of the first and second electrode pads 121, 122 or the combination of the third and fourth electrode pads 123, 124 may satisfy the above requirement. Alternatively, the combination of the first and second electrode pads 121, 122 and the combination of the third and fourth electrode pads 123, 124 may satisfy the above requirement, while other combinations may not. Alternatively, the combination of the first and fourth electrode pads 121, 124 and the combination of the second and third electrode pads 122, 123 may satisfy the above requirement, while other combinations may not.

[0134] Furthermore, if the planar shape of each of the first to fourth electrode pads 121 to 124 is the shape of the first modified example, the planar shape of each of the first to fourth terminals 2a to 2d may be the shape in the second modified example.

[0135] As described above, the electronic component of the present invention comprises a first body including a plurality of stacked dielectric layers and a circuit portion, a second body mounted on the first body and including a sub-circuit portion, and a first filter including at least one of the circuit portion and the sub-circuit portion, and selectively passing signals of frequencies within a first passband. The first body further has a first surface and a second surface located at both ends in the stacking direction of the plurality of dielectric layers, and includes a plurality of electrode pads provided on the first surface. The second body further includes a plurality of terminals provided on the outer surface of the second body. The plurality of electrode pads include a first electrode pad and a second electrode pad. The plurality of terminals include a first terminal connected to the first electrode pad and a second terminal connected to the second electrode pad. The circuit portion is connected to the first electrode pad, and the sub-circuit portion is connected to the second terminal. The distance between the centers of the first electrode pad and the second electrode pad is greater than the distance between the centers of the first terminal and the second terminal.

[0136] In the electronic component of the present invention, the first body may further include a first signal terminal and a second signal terminal. The plurality of electrode pads may further include a third electrode pad and a fourth electrode pad. The plurality of terminals may further include a third terminal connected to the third electrode pad and a fourth terminal connected to the fourth electrode pad. The first electrode pad, the second electrode pad, the first terminal and the second terminal may be connected to the first signal terminal. The third electrode pad, the fourth electrode pad, the third terminal and the fourth terminal may be connected to the second signal terminal.

[0137] Furthermore, in the electronic component of the present invention, the distance between the centers of any two adjacent electrode pads among the plurality of electrode pads, spaced apart, may be greater than the distance between the centers of the two terminals connected to any two electrode pads among the plurality of terminals.

[0138] Furthermore, the electronic component of the present invention may further include a second filter that selectively passes signals with frequencies within a second passband different from the first passband. The first filter may include a circuit portion and a sub-circuit portion. The first filter may be connected to a first signal terminal, and the second filter may be connected to a second signal terminal.

[0139] Furthermore, in the electronic component of the present invention, the length of the path from the first signal terminal to the second signal terminal may be greater than the length of the path when the distance between the centers of the first electrode pad and the second electrode pad is the same as the distance between the centers of the first terminal and the second terminal.

[0140] Furthermore, in the electronic component of the present invention, the shape of each of the multiple electrode pads when viewed from the stacking direction may be circular.

[0141] Furthermore, in the electronic component of the present invention, the shape of each of the multiple electrode pads when viewed from the stacking direction may be similar to the shape of each of the multiple terminals when viewed from the stacking direction.

[0142] Furthermore, in the electronic component of the present invention, the first body may further include a plurality of through-holes. Each of the plurality of through-holes may be connected to a plurality of electrode pads. [Explanation of symbols]

[0143] 1...First main body, 1a...Common terminal, 1b...First signal terminal, 1c...Second signal terminal, 1d...Third signal terminal, 2...Second main body, 2a...First terminal, 2b...Second terminal, 2c...Third terminal, 2d...Fourth terminal, 3...Sealing part, 4...First filter, 5...Second filter, 6...Third filter, 7...Solder bump, 8...First structure, 9...Second structure, 10...First circuit section, 20...Second circuit section, 30...Third circuit section, 41...First sub-circuit section, 42...Second Subcircuit section 2: 50...Laminate, 50A...First surface, 50B...Second surface, 50C~50F...Side, 61...First conductor layer, 62...Second conductor layer, 71...First through-hole, 72...Second through-hole, 81~84...Conductor layer for inductor, 91...Conductor layer for ground, 92,93...Conductor layer for capacitor, 100...Electronic component, 111~119...Electrodes, 121~124...Electrode pads, C1,C2...Capacitors, L1~L4...Inductors, T1~T4...Through-holes.

Claims

1. A first body including multiple stacked dielectric layers and a circuit portion, A second main body, which is mounted on the first main body and includes a sub-circuit section, The circuit comprises at least one of the circuit portion and the sub-circuit portion, and includes a first filter that selectively passes signals of a frequency within a first passband. The first body further has a first surface and a second surface located at both ends in the stacking direction of the plurality of dielectric layers, and includes a plurality of electrode pads provided on the first surface. The second body further includes a plurality of terminals provided on the outer surface of the second body, The plurality of electrode pads include a first electrode pad and a second electrode pad, The plurality of terminals include a first terminal connected to the first electrode pad and a second terminal connected to the second electrode pad. The circuit portion is connected to the first electrode pad, The aforementioned sub-circuit section is connected to the second terminal, An electronic component characterized in that the distance between the centers of the first electrode pad and the second electrode pad is greater than the distance between the centers of the first terminal and the second terminal.

2. The first main body further includes a first signal terminal and a second signal terminal, The plurality of electrode pads further include a third electrode pad and a fourth electrode pad. The plurality of terminals further include a third terminal connected to the third electrode pad and a fourth terminal connected to the fourth electrode pad. The first electrode pad, the second electrode pad, the first terminal, and the second terminal are connected to the first signal terminal. The electronic component according to claim 1, characterized in that the third electrode pad, the fourth electrode pad, the third terminal, and the fourth terminal are connected to the second signal terminal.

3. The electronic component according to claim 2, characterized in that the distance between the centers of any two adjacent electrode pads among the plurality of electrode pads, spaced apart, is greater than the distance between the centers of two terminals connected to each of the two electrode pads among the plurality of terminals.

4. Furthermore, it includes a second filter that selectively passes signals with frequencies within a second passband different from the first passband, The first filter includes the circuit portion and the sub-circuit portion, The first filter is connected to the first signal terminal, The electronic component according to claim 2, characterized in that the second filter is connected to the second signal terminal.

5. The electronic component according to claim 2, characterized in that the length of the path from the first signal terminal to the second signal terminal is greater than the length of the path when the distance between the centers of the first electrode pad and the second electrode pad is the same as the distance between the centers of the first terminal and the second terminal.

6. The electronic component according to claim 1, characterized in that the shape of each of the plurality of electrode pads when viewed from the stacking direction is circular.

7. The electronic component according to claim 1, characterized in that the shape of each of the plurality of electrode pads when viewed from the stacking direction is similar to the shape of each of the plurality of terminals when viewed from the stacking direction.

8. The first body further includes a plurality of through holes, The electronic component according to claim 1, characterized in that each of the plurality of through holes is connected to the plurality of electrode pads.

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