Substrate for mounting semiconductor devices

The substrate design with a multilayer insulating layer and copper or aluminum base material addresses the challenge of improving insulation and heat dissipation in semiconductor device mounting substrates, enhancing both properties simultaneously.

JP2026057804APending Publication Date: 2026-04-03NITERRA CO LTD
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Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-09-24
Publication Date
2026-04-03

AI Technical Summary

Technical Problem

Existing semiconductor device mounting substrates face challenges in improving insulation while maintaining effective heat dissipation.

Method used

A substrate design featuring a multilayer insulating layer with a first insulating film having a thermal conductivity of 50 W/m·K or more and a second insulating film with a volume resistivity of 1 × 10⁻⁶ Ω·cm or more, along with a base material made of copper or aluminum, to enhance insulation while maintaining heat dissipation.

Benefits of technology

The design improves insulation properties while ensuring efficient heat dissipation, as demonstrated by the evaluation tests, particularly in substrates for mounting semiconductor devices like LEDs and semiconductor lasers.

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Abstract

This invention provides a technology for semiconductor device mounting substrates that improves insulation while maintaining heat dissipation. [Solution] The substrate for mounting semiconductor elements comprises a base material, electrodes connected to the semiconductor elements, and an insulating layer disposed between the base material and the electrodes, the insulating layer having a first insulating film and a second insulating film, wherein the thermal conductivity of the first insulating film is 50 W / m·K or more, and the volume resistivity of the second insulating film is 1 × 10⁻⁶ 14 It is greater than or equal to Ω·cm.
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Description

[Technical Field]

[0001] This invention relates to a substrate for mounting semiconductor devices.

[0002] Conventionally, semiconductor element mounting substrates equipped with electrodes for connecting to semiconductor elements have been known (for example, Patent Document 1). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Patent No. 6660412 [Overview of the project] [Problems that the invention aims to solve]

[0004] However, even with prior art such as Patent Document 1, there was still room for improvement in techniques that improve insulation while maintaining heat dissipation.

[0005] The present invention aims to provide a technology for improving the insulation properties of a semiconductor device mounting substrate while maintaining heat dissipation. [Means for solving the problem]

[0006] The present invention has been made to solve at least some of the above-mentioned problems and can be realized in the following forms.

[0007] (1) According to one embodiment of the present invention, a substrate for mounting a semiconductor element is provided. This substrate for mounting a semiconductor element comprises a base material, electrodes connected to a semiconductor element, and an insulating layer disposed between the base material and the electrodes, the insulating layer having a first insulating film and a second insulating film, wherein the thermal conductivity of the first insulating film is 50 W / m·K or more, and the volume resistivity of the second insulating film is 1 × 10⁻⁶ 14 It is greater than or equal to Ω·cm.

[0008] In this configuration, the insulating layer placed between the substrate and the electrode consists of a first insulating film with a thermal conductivity of 50 W / m·K or more and a volume resistivity of 1 × 10⁻¹⁰ 14 It has a multilayer structure with a second insulating film of Ω·cm or greater. This makes it possible to improve insulation while maintaining heat dissipation in a substrate for mounting semiconductor devices.

[0009] (2) In the semiconductor element mounting substrate of the above configuration, the thickness of the insulating layer may be 0.5 μm or more and 10 μm or less. With this configuration, the insulating layer has coverage on the substrate by having a thickness of 0.5 μm or more, and thus the insulating properties can be improved. In addition, the insulating layer can have a certain degree of heat transfer by having a thickness of 10 μm or less. As a result, the insulating properties of the semiconductor element mounting substrate can be improved while maintaining heat dissipation.

[0010] (3) In the semiconductor element mounting substrate of the above configuration, the thickness of the first insulating film may be greater than the thickness of the second insulating film. With this configuration, the thickness of the first insulating film with a thermal conductivity of 50 W / m·K or more is such that the volume resistivity is 1 × 10 14 The thickness is greater than that of the second insulating film, which is Ω·cm or more. This makes it possible to further improve the insulation properties of a semiconductor device mounting substrate while maintaining heat dissipation.

[0011] (4) In the semiconductor element mounting substrate of the above configuration, the substrate may be made of a material mainly composed of copper or aluminum. With this configuration, the substrate is made of copper or aluminum, which have relatively high thermal conductivity. As a result, the heat generated in the semiconductor element connected to the electrode can be efficiently released through the substrate, thereby improving heat dissipation.

[0012] Furthermore, the present invention can be realized in various forms, for example, in the form of a substrate having an insulating layer, a product including a substrate for mounting semiconductor elements, a semiconductor package including a substrate for mounting semiconductor elements, a method for manufacturing the substrate for mounting semiconductor elements and the semiconductor package. [Brief explanation of the drawing]

[0013] [Figure 1] This is a schematic cross-sectional view of a semiconductor element mounting substrate according to the first embodiment. [Figure 2] This is a diagram illustrating the testing method for evaluation tests. [Figure 3] This is a diagram illustrating the results of the first evaluation test. [Figure 4] This is a diagram illustrating the second result of the evaluation test. [Figure 5] This is a schematic cross-sectional view of a semiconductor element mounting substrate according to the second embodiment. [Modes for carrying out the invention]

[0014] <First Embodiment> Figure 1 is a schematic cross-sectional view of a semiconductor element mounting substrate 1 according to the first embodiment. In this embodiment, the semiconductor element mounting substrate 1 supports optical semiconductors such as light-emitting diodes (LEDs) and semiconductor lasers (LDs) as semiconductor elements 5 via electrodes 40, and functions as a heat dissipation substrate that releases heat generated during light emission to the outside. The semiconductor element mounting substrate 1 comprises a base material 10, an adhesion layer 20, an insulating layer 30, and electrodes 40. Note that the thickness relationships of the base material 10, adhesion layer 20, insulating layer 30, and electrodes 40 in Figure 1 are shown differently from the actual thickness relationships for the sake of explanation.

[0015] The base material 10 is a member having a flat plate shape and serves as a base for the substrate 1 for mounting semiconductor elements. In the present embodiment, the thickness of the base material 10 is, for example, 1 mm. The base material 10 is made of metal. In the present embodiment, the base material 10 is made of copper (Cu). The base material 10 may be formed of a material mainly composed of copper, aluminum (Al), or a material mainly composed of aluminum. Here, the "main component" refers to a component having a mass percentage greater than 50% in the target material. The base material 10 may be made of an alloy of copper and aluminum. By forming the base material 10 of these metals, the heat generated in the semiconductor element 5 can be efficiently released to the outside through the base material 10.

[0016] The adhesion layer 20 is disposed between the base material 10 and the insulating layer 30. In the present embodiment, the adhesion layer 20 is made of titanium (Ti). The thickness of the adhesion layer 20 is, for example, 0.5 μm. The adhesion layer 20 adheres the base material 10 and the insulating layer 30 and suppresses the occurrence of cracks in the insulating layer 30 due to the difference in the coefficient of thermal expansion between the base material 10 and the insulating layer 30. The material forming the adhesion layer 20 is not limited to titanium, and may be chromium (Cr), molybdenum (Mo), copper, etc. having adhesiveness to the insulating layer. Note that it is desirable that the material forming the adhesion layer 20 has a value of the coefficient of thermal expansion between the value of the coefficient of thermal expansion of the material forming the base material 10 and the value of the coefficient of thermal expansion of the material forming the insulating layer 30.

[0017] The insulating layer 30 is disposed between the base material 10 and the electrode 40, and more specifically, between the adhesion layer 20 and the electrode 40. The insulating layer 30 has a first insulating film 31 and a second insulating film 32. The first insulating film 31 is formed of aluminum nitride (AlN), and the thermal conductivity of the first insulating film 31 is 50 W / m·K or more. The second insulating film 32 is formed of alumina (Al2O3), and the volume resistivity of the second insulating film 32 is 1×10 14It is above Ω·cm. In this embodiment, the first insulating film 31 and the second insulating film 32 are laminated, and the first insulating film 31 is disposed closer to the base material 10 side than the second insulating film 32. Note that the material forming the first insulating film 31 is not limited to aluminum nitride. The material forming the first insulating film 31 may be silicon carbide (SiC). Also, the material forming the second insulating film 32 is not limited to alumina. The material forming the second insulating film 32 may be aluminum nitride, silicon nitride (Si3N4), silicon oxide (SiO2), or the like.

[0018] In this embodiment, the thickness of the first insulating film 31 is 2 μm, and the thickness of the second insulating film 32 is 0.1 μm. That is, the thickness of the first insulating film 31 is greater than the thickness of the second insulating film 32. The thickness of the insulating layer 30 in this embodiment is 2.1 μm, which is 0.5 μm or more and 10 μm or less. The thickness of the insulating layer 30 is desirably such that it can cover the irregularities formed on the surface of the base material 10 in terms of maintaining the insulating property of the insulating layer 30. For example, when the surface roughness Rz of the base material 10 included in the substrate 1 for mounting a semiconductor element is at most about 0.3 μm, the thickness of the insulating layer 30 is desirably 0.5 μm or more. Also, the thickness of the insulating layer 30 is desirably such that the insulating layer 30 has a certain degree of heat conductivity. For example, when the insulating layer included in the substrate for mounting a semiconductor element is formed of aluminum nitride with a thickness of 0.4 mm, the thickness of the insulating layer 30 is desirably 10 μm or less such that its thermal resistance is 20.9 K / W or less, which is the thermal resistance of aluminum nitride with a thickness of 0.4 mm.

[0019] The electrode 40 is disposed on the surface of the insulating layer 30 opposite to the base material 10. The electrode 40 is connected to the semiconductor element 5. The electrode 40 is made of gold (Au). The thickness of the electrode 40 is, for example, 3.0 μm. The electrode 40 has a predetermined pattern shape so as to connect to a predetermined location of the mounted semiconductor element 5. Note that the material forming the electrode 40 is not limited to gold and may be made of copper.

[0020] Next, the manufacturing method of the semiconductor element mounting substrate 1 of this embodiment will be described. In the manufacturing of the semiconductor element mounting substrate 1, first, the material that will become the base material 10 is pre-treated. Specifically, a plate-shaped rolled copper is prepared. After the surface of the prepared rolled copper is mirror-polished, nickel or the like, which has resistance to gold etching solution, is plated onto the mirror-polished surface. As a result, the manufactured base material 10 becomes less susceptible to oxidation and its corrosion resistance is improved. An adhesion layer 20 made of titanium is formed on the surface of the manufactured base material 10. The adhesion layer 20 is formed by chemical vapor deposition (CVD) or physical vapor deposition (PVD). Note that chemical polishing may be used instead of mirror polishing for the surface treatment of the prepared rolled copper.

[0021] Next, an insulating layer 30 is formed on the adhesion layer 20. In this embodiment, the insulating layer 30 is formed by a vapor deposition method such as sputtering, vapor deposition, or CVD. It is desirable that the insulating layer 30 become crystalline by controlling the deposition conditions in the vapor deposition method. When forming the first insulating film 31 in this embodiment, the deposition energy can be increased relatively by setting the deposition temperature relatively high or the vacuum level during deposition relatively low, thereby promoting the crystallization of aluminum nitride. Furthermore, the crystallization of aluminum nitride can be promoted by controlling the flow rate of nitrogen in the mixed gas of argon and nitrogen. This makes it possible to increase the thermal conductivity of the first insulating film 31 formed of aluminum nitride. In the manufacturing method of the semiconductor element mounting substrate 1 of this embodiment, the insulating layer 30 is formed by sputtering. The first insulating film 31 is deposited on the surface of the adhesion layer 20 by flowing argon (Ar) and nitrogen (N2) under a vacuum of 0.1 to 0.8 Pa while maintaining the temperature of the substrate 10 at 100 to 300°C, for example, using AlN as the target. The second insulating film 32 is deposited on the first insulating film 31 by flowing argon under a vacuum of 0.1 to 0.8 Pa while maintaining the temperature of the substrate 10 at 100 to 300°C, using Al or Al2O3 as the target. The target when depositing the first insulating film 31 may also be Al.

[0022] Next, an electrode 40 is formed on the insulating layer 30. Specifically, first, an adhesion layer to improve adhesion with the insulating layer 30 and a seed layer to improve the bonding strength between the gold film that will become the electrode 40 and the adhesion layer are formed on the surface of the insulating layer 30 as a base for the electrode 40. In this embodiment, the adhesion layer is formed from titanium using sputtering, and the seed layer is formed from palladium (Pd) using sputtering. Next, a gold film that will become the electrode 40 is formed on the seed layer, for example, by electroplating. The gold film may also be formed by sputtering or vapor deposition. Next, after the gold film is formed on the seed layer, electrode patterning is performed. Specifically, for example, the gold film is coated with a resist by forming a dry film resist with a laminator, and a resist pattern is formed by exposure and development. Next, using the resist as a mask, the gold film, seed layer, and a part of the adhesion layer are removed by etching, and the resist is peeled off with a stripping solution to form the electrode 40. This process manufactures a semiconductor device mounting substrate 1. However, the manufacturing method of the semiconductor device mounting substrate 1 is not limited to these methods.

[0023] Next, an evaluation test for the semiconductor element mounting substrate 1 of this embodiment will be described. In this evaluation test, the change in insulation yield due to differences in the configuration of the insulating layer was evaluated. Specifically, samples for the evaluation test were prepared using a method similar to the manufacturing method of the semiconductor element mounting substrate 1 described above. In this evaluation test, six types of samples were prepared, each differing in either the configuration of the insulating layer or the size of the electrodes. For each of these six types of samples, the insulation yield was calculated, and the difference in insulation yield due to differences in the configuration of the insulating layer was evaluated. In addition, multiple electrodes were formed in one sample, and the sample was divided into individual pieces for each of the multiple electrodes. The electrical resistivity was measured for each of the individual pieces of the sample, and the insulation yield was calculated.

[0024] Figure 2 illustrates the test method for an evaluation test concerning the composition of the insulating layer. In this evaluation test, the electrical resistivity of the sample was measured using the two-terminal method. Figure 2 shows a cross-sectional view of a semiconductor device mounting substrate, which comprises a base material 10s, an adhesion layer 20s, an insulating layer 30s, and an electrode 40s, as an example of sample S. The insulating layer 30s of sample S has a first insulating film 31s and a second insulating film 32s. In this evaluation test, electrodes E1 and E2 were placed on the base material 10s and electrode 40s, respectively, and the voltage between electrodes E1 and E2 and the leakage current of the sample were measured. From the measured voltage, leakage current, and the size of the individualized sample, the electrical resistivity was determined, and the insulation yield for each sample was calculated.

[0025] Figure 3 illustrates the first results of an evaluation test regarding the composition of the insulating layer. Figure 3 shows the composition of the insulating layer and the insulation yield for sample A1 and sample A2, two of the six types of samples fabricated. The insulating layer of sample A1 is formed of aluminum nitride and has a film thickness of 2.0 μm. Sample A1 was deposited by sputtering with AlN as the target. On the other hand, the insulating layer of sample A2 has an insulating film made of aluminum nitride with a film thickness of 2.0 μm and an insulating film made of alumina with a film thickness of 0.1 μm. In other words, the insulating film made of aluminum nitride in sample A2 corresponds to the "first insulating film" of the semiconductor device mounting substrate 1, and the insulating film made of alumina corresponds to the "second insulating film" of the semiconductor device mounting substrate 1. Sample A2 was deposited by sputtering with AlN as the target to deposit the "first insulating film," and then by sputtering with Al2O3 as the target to deposit the "second insulating film."

[0026] Samples A1 and A2, shown in Figure 3, each have an electrode with a square shape, with sides of 1.5 mm. The thermal conductivity of Sample A1 and Sample A2 is 151.3 W / m·K. As shown in Figure 3, it was confirmed that Sample A2 has a higher insulation yield than Sample A1. The thermal conductivity of the insulating layer formed of alumina is 0.9 to 1.2 W / m·K.

[0027] Figure 4 illustrates the second result of the evaluation test regarding the composition of the insulating layer. Figure 4 shows the composition of the insulating layer and the insulation yield for each of the six fabricated samples: Sample B1, Sample B2, Sample C1, and Sample C2. Each of Samples B1, B2, C1, and C2 has an area of ​​2-8 μm². 2 It is equipped with electrodes.

[0028] The insulating layer of sample B1 shown in Figure 4 is formed of aluminum nitride and has a film thickness of 3.0 μm. Sample B1 was deposited by sputtering in a nitrogen atmosphere with Al as the target. On the other hand, the insulating layer of sample B2 has an insulating film made of aluminum nitride with a film thickness of 3.0 μm and an insulating film made of alumina with a film thickness of 0.5 μm. That is, in sample B2, the insulating film made of aluminum nitride corresponds to the "first insulating film" of the semiconductor device mounting substrate 1, and the insulating film made of alumina corresponds to the "second insulating film" of the semiconductor device mounting substrate 1. In sample B2, the "first insulating film" was deposited by sputtering in a nitrogen atmosphere with Al as the target, and then the "second insulating film" was deposited by sputtering in an oxygen-containing atmosphere with Al as the target. As shown in Figure 4, it was confirmed that sample B2 had a higher insulation yield than sample B1.

[0029] The evaluation test results for samples C1 and C2 shown in Figure 4 illustrate the effect of the presence or absence of an insulating film formed with alumina on the insulation yield of an insulating film formed from the same material. In Figure 4, the insulating film formed with silicon nitride (Si3N4) is conveniently referred to as the "first insulating film," and the insulating film formed with alumina is conveniently referred to as the "second insulating film." In both samples C1 and C2, the thickness of the insulating film formed with silicon nitride is 2.0 μm. Sample C1 was deposited by sputtering with a Si3N4 target. On the other hand, the insulating layer of sample C2 was first deposited with a 3.0 μm insulating film formed with silicon nitride by sputtering with a Si3N4 target, and then deposited with a 0.3 μm insulating film formed with alumina by sputtering with an Al2O3 target. As shown in Figure 4, it was confirmed that the presence of the insulating film formed with alumina improved the insulation yield of sample C2 compared to sample C1.

[0030] For example, substrates for mounting semiconductor devices that incorporate light-emitting diodes (LEDs) are made of aluminum nitride. Such substrates have a thermal conductivity of 50 W / m·K or higher in order to efficiently dissipate the heat generated by the LEDs. Therefore, when using a metal substrate with relatively high thermal conductivity instead of a semiconductor device substrate made of aluminum nitride, it is necessary to deposit an insulating layer on the metal substrate that has both a thermal conductivity of 50 W / m·K or higher and relatively high insulating properties.

[0031] As described above, according to the semiconductor element mounting substrate 1 of this embodiment, the insulating layer 30 disposed between the substrate 10 and the electrode 40 comprises a first insulating film 31 with a thermal conductivity of 50 W / m·K or more and a volume resistivity of 1 × 10 14It has a multilayer structure with a second insulating film 32 having a thermal conductivity of Ω·cm or more. As a result, the semiconductor device mounting substrate 1 can improve the insulation yield while having the thermal conductivity required for the insulating film as described above. Therefore, it is possible to improve insulation while maintaining heat dissipation.

[0032] Furthermore, according to the semiconductor element mounting substrate 1 of this embodiment, the insulating layer 30 has coverage over the substrate 10 by having a thickness of 0.5 μm or more, thereby improving insulation. Also, by having a thickness of 10 μm or less, the insulating layer 30 can have a certain degree of heat transfer. As a result, the semiconductor element mounting substrate 1 can improve insulation while maintaining heat dissipation.

[0033] Furthermore, according to the semiconductor element mounting substrate 1 of this embodiment, the thickness of the first insulating film 31 with a thermal conductivity of 50 W / m·K or more is such that the volume resistivity is 1 × 10 14 The thickness is greater than that of the second insulating film 32, which is Ω·cm or more. This makes it possible to further improve the insulation properties of the semiconductor device mounting substrate 1 while maintaining heat dissipation.

[0034] Furthermore, according to the semiconductor element mounting substrate 1 of this embodiment, the base material 10 is made of copper, which has relatively high thermal conductivity. As a result, the heat generated in the semiconductor element 5 connected to the electrode 40 can be efficiently released through the base material 10, thereby improving heat dissipation.

[0035] <Second Embodiment> Figure 5 is a cross-sectional view of the semiconductor element mounting substrate 2 of the second embodiment. The semiconductor element mounting substrate 2 of the second embodiment has a different insulating layer configuration compared to the semiconductor element mounting substrate 1 of the first embodiment (Figure 1).

[0036] The semiconductor element mounting substrate 2 of the second embodiment comprises a base material 10, an adhesion layer 20, an insulating layer 50, and an electrode 40. Note that the thickness relationships of the base material 10, adhesion layer 20, insulating layer 50, and electrode 40 in Figure 5 are illustrated differently from the actual thickness relationships for the sake of explanation.

[0037] The insulating layer 50 is positioned between the adhesion layer 20 and the electrode 40, which are formed on the substrate 10. The insulating layer 50 has a first insulating film 51 and a second insulating film 52. The thermal conductivity of the first insulating film 51 is 50 W / m·K or higher. In this embodiment, the first insulating film 51 is made of aluminum nitride and has a thickness of 2 μm. The volume resistivity of the second insulating film 52 is 1 × 10⁻¹⁶ 14 The resistance is Ω·cm or greater. In this embodiment, the second insulating film 52 is made of alumina and has a thickness of 0.1 μm. That is, the thickness of the insulating layer 50 is 0.5 μm or more and 10 μm or less, and the thickness of the first insulating film 51 is greater than the thickness of the second insulating film 52. In this embodiment, the second insulating film 52 is located closer to the substrate 10 than the first insulating film 51.

[0038] Next, the manufacturing method for the semiconductor element mounting substrate 2 of this embodiment will be described. The manufacturing method for the semiconductor element mounting substrate 2 is similar to the manufacturing method for the semiconductor element mounting substrate 1 of the first embodiment, but the method of forming the insulating layer is different. Here, we will explain the parts of the manufacturing method for the semiconductor element mounting substrate 2 that differ from the manufacturing method for the semiconductor element mounting substrate 1.

[0039] When depositing an insulating layer 50 on the adhesion layer 20 during the manufacturing of the semiconductor device mounting substrate 2, the target in sputtering is changed, similar to the manufacturing method of the semiconductor device mounting substrate 1. Specifically, when depositing the insulating layer 50 on the adhesion layer 20, first, the target is Al2O3 and argon is flowed to deposit a second insulating film 52. After depositing the second insulating film 52, the target is changed to AlN and argon and nitrogen are flowed to deposit a first insulating film 51. As a result, an insulating layer 50 consisting of the first insulating film 51 and the second insulating film 52 is deposited.

[0040] According to the substrate 2 for mounting a semiconductor element of the present embodiment described above, the insulating layer 50 disposed between the base material 10 and the electrode 40 has a multilayer structure including a first insulating film 51 having a thermal conductivity of 50 W / m·K or more and a second insulating film 52 having a volume resistivity of 1×10 14 Ω·cm or more. Thereby, for the substrate 2 for mounting a semiconductor element, insulation can be improved while maintaining heat dissipation performance.

[0041] <Modifications of the Present Embodiment> The present invention is not limited to the above-described embodiment, and can be implemented in various aspects without departing from the gist thereof. For example, the following modifications are possible.

[0042] [Modification 1] In the above-described embodiment, the thickness of the insulating layer is set to be 0.5 μm or more and 10 μm or less. The thickness of the insulating layer is not limited thereto, and may be less than 0.5 μm or may be greater than 10 μm. By setting the thickness of the insulating layer to be 0.5 μm or more, the irregularities formed on the surface of the base material can be covered, so that the insulation can be maintained. Further, by setting the thickness of the insulating layer to be 10 μm or less, the insulating layer can have a certain degree of heat transfer performance.

[0043] [Modification 2] In the above-described embodiment, in the insulating layer, the thickness of the first insulating film is set to be greater than the thickness of the second insulating film. The relationship between the thickness of the first insulating film and the thickness of the second insulating film is not limited thereto. The thickness of the second insulating film may be greater than the thickness of the first insulating film.

[0044] [Modification 3] In the above-described embodiment, the insulating layer was formed using reactive sputtering. However, the method for forming the insulating layer is not limited to this. For the first insulating film, which is relatively thick, the substrate and the component corresponding to the first insulating film may be fabricated separately, joined together, and then the component corresponding to the first insulating film may be polished. Alternatively, the substrate may be formed on the component corresponding to the first insulating film, and then the component corresponding to the first insulating film may be polished. Furthermore, the second insulating film may be formed by chemical vapor deposition (CVD) or vapor deposition. In addition, the second insulating film may be formed by insulating plating, or it may be fabricated by applying an insulating material to the substrate and then polishing it.

[0045] [Differentiation Example 4] In the above-described embodiment, the semiconductor element 5 mounted on the semiconductor element mounting substrate was described as a light-emitting diode or a semiconductor laser, but it is not limited to these. It may also be a power semiconductor or the like, which generates a relatively large amount of heat.

[0046] [Difference 5] In the above embodiment, the insulating layer comprises a first insulating film having a thermal conductivity of 50 W / m·K or more, and a volume resistivity of 1 × 10 14 The insulating layer is said to have a second insulating film having a thickness of Ω·cm or more. The configuration of the insulating layer is not limited to these. The insulating layer may have a film other than the first insulating film and the second insulating film. That is, the insulating layer may be formed by laminating three or more films, including the first insulating film and the second insulating film.

[0047] The embodiments of this specification have been described above based on the embodiments and modifications described above. The embodiments described above are for the purpose of facilitating understanding of this specification and do not limit it. This specification may be modified and improved without departing from its spirit and the scope of the claims, and equivalents thereof are included in this specification. Furthermore, any technical features that are not described as essential in this specification may be deleted as appropriate.

[0048] (Application Example 1) A substrate for mounting semiconductor devices, Substrate and semiconductor element cross-electrode, An insulating layer disposed between the substrate and the electrode, comprising an insulating layer having a first insulating film and a second insulating film, The thermal conductivity of the first insulating film is 50 W / m·K or higher. The volume resistivity of the second insulating film is 1 × 10⁻⁶ 14 Characterized by being Ω·cm or larger, A substrate for mounting semiconductor devices. (Application Example 2) A semiconductor element mounting substrate as described in Application Example 1, The thickness of the insulating layer is characterized by being 0.5 μm or more and 10 μm or less. A substrate for mounting semiconductor devices. (Application Example 3) A semiconductor element mounting substrate as described in Application Example 1 or Application Example 2, The thickness of the first insulating film is greater than the thickness of the second insulating film, A substrate for mounting semiconductor devices. (Application Example 4) A semiconductor element mounting substrate according to any one of Application Examples 1 to 3, The substrate is characterized by being formed from a material mainly composed of copper or aluminum. A substrate for mounting semiconductor devices. [Explanation of symbols]

[0049] 1,2…Substrate for mounting semiconductor devices 10...Base material 30, 50…insulating layer 40...electrode 31,51…First insulating film 32,52…Second insulating film

Claims

1. A substrate for mounting semiconductor devices, Substrate and semiconductor element cross-electrode, An insulating layer disposed between the substrate and the electrode, comprising an insulating layer having a first insulating film and a second insulating film, The thermal conductivity of the first insulating film is 50 W / m·K or higher. The volume resistivity of the second insulating film is 1 × 10⁻⁶ 14 Characterized by being Ω·cm or larger, A substrate for mounting semiconductor devices.

2. A semiconductor element mounting substrate according to claim 1, The thickness of the insulating layer is characterized by being 0.5 μm or more and 10 μm or less. A substrate for mounting semiconductor devices.

3. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The thickness of the first insulating film is greater than the thickness of the second insulating film, A substrate for mounting semiconductor devices.

4. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The substrate is characterized by being formed from a material mainly composed of copper or aluminum. A substrate for mounting semiconductor devices.

Citation Information

Patent Citations

  • Semiconductor Devices

    JP6660412B2