Power semiconductor devices and power converters

Abstract

This improves the reliability of power semiconductor devices in which the insulating substrate is exposed on the bottom surface of the resin housing. [Solution] The power semiconductor device comprises a power semiconductor element (8), an insulating substrate (10) having a first main surface on which a first metal foil (3) is provided and a second main surface on which a second metal foil (7) is provided, with the power semiconductor element (8) mounted on the second metal foil (7), and a resin housing (1) that seals the power semiconductor element (8) and the insulating substrate (10). At least a portion of the first metal foil (3) is exposed from the resin housing (1), and the first metal foil (3) has a stepped portion (9) at its outer edge that is lower than the upper surface of the first metal foil (3).

Description

Technical Field

[0001] The present disclosure relates to a power semiconductor device, and particularly to a resin-sealed power semiconductor device incorporating an insulating substrate.

Background Art

[0002] In a power semiconductor device, high heat dissipation is of great significance. A power semiconductor device is an aggregate of dissimilar material joints / adhesive parts, and since the plurality of power semiconductor elements incorporated therein generate heat, various thermal stresses occur inside the power semiconductor device. In particular, an insulating substrate formed by fixing metal foils on the front and back surfaces of a ceramic substrate is used as a structural material of a power semiconductor device for the purpose of enhancing heat dissipation. The ceramic substrate is an insulating material having a high thermal conductivity close to that of a metal, such as 70 to 190 W / mK. Therefore, the above-mentioned insulating substrate is an effective countermeasure against the problems of high heat dissipation and high insulation imposed on the power semiconductor device.

[0003] On the other hand, a resin-sealed power semiconductor device is applied to applications that require high reliability. A resin-sealed power semiconductor device has a resin housing that encloses an insulating substrate and a power semiconductor element mounted thereon, and the housing is formed by a method such as transfer molding or direct potting using an epoxy-based thermosetting resin. A resin-sealed power semiconductor device can relieve the thermal stress of the dissimilar material joint part enclosed in the housing, and thus can obtain high reliability.

[0004] For example, Patent Document 1 below discloses a power semiconductor device having a structure in which an insulating substrate provided with metal foils on the front and back surfaces of a ceramic substrate is exposed on the bottom surface of a resin housing. Further, Patent Document 2 discloses a structure in which a heat sink is soldered to the metal foil of an insulating substrate exposed on the bottom surface of a power semiconductor device.

Prior Art Documents

Patent Documents

[0005] [Patent Document 1] Japanese Patent Publication No. 2024-29105 [Patent Document 2] Japanese Patent Publication No. 2019-186457 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] Generally, insulating substrates have a small coefficient of thermal expansion (ceramic substrates have a coefficient of thermal expansion of 2-5 ppm / K). Therefore, in power semiconductor devices where the insulating substrate is exposed on the bottom surface of the resin housing, the thermal stress resulting from the difference between the coefficient of thermal expansion of the insulating substrate and the resin housing becomes large, making delamination between the insulating substrate and the resin housing likely. Furthermore, if the coefficient of thermal expansion of the resin housing is brought closer to that of the insulating substrate, when a heat sink is fixed to the power semiconductor device, the difference between the coefficient of thermal expansion of the resin housing and the heat sink becomes large, leading to a problem of reduced reliability of the solder joint of the heat sink.

[0007] This disclosure is made to solve the above-mentioned problems and aims to improve the reliability of power semiconductor devices in which the insulating substrate is exposed on the bottom surface of the resin housing. [Means for solving the problem]

[0008] The power semiconductor device according to this disclosure comprises a power semiconductor element, an insulating substrate having a first main surface on which a first metal foil is provided and a second main surface on which a second metal foil is provided, with the power semiconductor element mounted on the second metal foil, and a resin housing that seals the power semiconductor element and the insulating substrate, wherein at least a portion of the first metal foil is exposed from the resin housing, and the first metal foil has a stepped portion at its outer edge that is lower than the upper surface of the first metal foil. [Effects of the Invention]

[0009] The power semiconductor device described herein improves reliability because delamination between the insulating substrate and the resin housing can be suppressed. [Brief explanation of the drawing]

[0010] [Figure 1] This is a perspective view of a power semiconductor device according to Embodiment 1. [Figure 2] This is a cross-sectional view of a power semiconductor device according to Embodiment 1. [Figure 3] This is a perspective view of the insulating substrate included in the power semiconductor device according to Embodiment 1. [Figure 4] This figure shows the model used to analyze the stress generated at the edges of the insulating substrate of a conventional power semiconductor device. [Figure 5] This figure shows the model used to analyze the stress generated at the edge of the insulating substrate of the power semiconductor device according to Embodiment 1. [Figure 6] This figure shows the stress distribution at the edges of the insulating substrate of a conventional power semiconductor device. [Figure 7] This figure shows the stress distribution at the edge of the insulating substrate of the power semiconductor device according to Embodiment 1. [Figure 8] This diagram shows the principal stresses generated at the edges of the insulating substrate of a conventional power semiconductor device, represented as vectors. [Figure 9] This is a perspective view of a power semiconductor device according to Embodiment 2. [Figure 10] This is a cross-sectional view of a power semiconductor device according to Embodiment 2. [Figure 11] This is a perspective view of the insulating substrate included in the power semiconductor device according to Embodiment 2. [Figure 12] This is a plan view of the insulating substrate provided in the power semiconductor device according to Embodiment 2. [Figure 13] This is a plan view of the insulating substrate provided in the power semiconductor device according to Embodiment 2. [Figure 14] This is a cross-sectional view of a power semiconductor device according to Embodiment 3. [Figure 15] This is a cross-sectional view of the vicinity of the edge of the insulating substrate in a power semiconductor device according to Embodiment 4. [Figure 16] This is a cross-sectional view of a power semiconductor device according to Embodiment 5. [Figure 17] It is a block diagram showing the configuration of a power conversion system to which the power conversion device according to Embodiment 6 is applied.

Mode for Carrying Out the Invention

[0011] Embodiment 1. FIG. 1 is a perspective view of a power semiconductor device according to Embodiment 1. FIG. 2 is a cross-sectional view of the power semiconductor device according to Embodiment 1, corresponding to a cross-section along the dotted line shown in FIG. 1.

[0012] As shown in FIG. 1, the power semiconductor device according to Embodiment 1 includes a resin housing 1, a first metal foil 3 exposed from the resin housing 1 on the heat dissipation surface 2 of the power semiconductor device, and external terminals 4 (current terminals) and control terminals 5 protruding from the resin housing 1.

[0013] As can be seen from FIG. 2, the first metal foil 3 exposed on the heat dissipation surface 2 of the power semiconductor device is a part of the insulating substrate 10. The insulating substrate 10 is composed of a ceramic substrate 6 serving as a base material, a first metal foil 3 fixed to the first main surface of the ceramic substrate 6, and a second metal foil 7 fixed to the second main surface of the ceramic substrate 6. The ceramic substrate 6 ensures insulation between the inside of the power semiconductor device and the heat dissipation surface 2.

[0014] A power semiconductor element 8 is fixed to the second metal foil 7 of the insulating substrate 10. Although not shown, the power semiconductor element 8 has surface electrodes connected to the external terminals 4, control terminals 5, second metal foil 7, etc. A desired power circuit is formed by connecting the power semiconductor element 8, external terminals 4, control terminals 5, and second metal foil 7 to each other. For those connections, for example, wire bonding, solder connection, etc. are appropriately used.

[0015] The resin housing 1 encloses the power semiconductor element 8, the insulating substrate 10, the external terminals 4, and the control terminals 5. However, at least a portion of the first metal foil 3 is exposed from the resin housing 1 on the heat dissipation surface 2 of the power semiconductor device. In addition, portions of the external terminals 4 and the control terminals 5 are also exposed from the resin housing 1 for connection to the outside.

[0016] In the power semiconductor device according to Embodiment 1, as shown in Figure 2, the first metal foil 3 of the insulating substrate 10 has a stepped portion 9 at its outer edge that is lower than the upper surface of the first metal foil 3. The stepped portion 9 of the first metal foil 3 is covered by the resin housing 1. Figure 3 shows the external appearance of the insulating substrate 10. The stepped portion 9 is formed on the outer edge of the first metal foil 3 provided on the ceramic substrate 6.

[0017] The power semiconductor device according to Embodiment 1 has a structure in which a resin housing 1 is sealed to an insulating substrate 10. In this structure, the coefficient of linear expansion of the resin housing 1 and the coefficient of linear expansion of the second metal foil 7 are different from each other, and the thermosetting epoxy-based sealing resin commonly used as the material for the resin housing 1 has the characteristic that the coefficient of linear expansion changes significantly at the glass transition temperature (Tg). Therefore, when the temperature of the power semiconductor device rises above the glass transition temperature, the amount of warping of the resin housing 1 due to thermal stress increases, and delamination between the insulating substrate 10 and the resin housing 1 is likely to occur.

[0018] The adhesive interface between the insulating substrate 10 and the resin housing 1 cannot be re-bonded once it has delaminated. Furthermore, stress concentrates at the leading edge of the delamination due to the notch effect, so once delamination occurs, the stress concentration at the leading edge of the delamination further accelerates its progression. In addition, if delamination occurs between the insulating substrate 10 and the resin housing 1, the intrusion of moisture into the interior of the resin housing 1 accelerates.

[0019] Furthermore, if a gap is formed within the resin housing 1 due to changes in warping caused by temperature changes, when an electric field is applied in a direction that penetrates the gap, the resin housing 1 will become charged over time due to its insulating properties, increasing the electric field strength. When the charging voltage reaches the discharge voltage of Paschen's law, a small discharge occurs, and when the discharged electrons collide with the resin housing 1, that part burns slightly, further weakening the insulating properties of the resin housing 1, and ultimately leading to dielectric breakdown. Therefore, preventing the formation of gaps that generate high electric fields that cause discharge is crucial for reliable design. As described above, ensuring adhesion between the insulating substrate 10 and the resin housing 1, and suppressing delamination between the insulating substrate 10 and the resin housing 1 within the range where discharge according to Paschen's law does not occur, leads to improved reliability of power semiconductor devices.

[0020] The inventors of the technology disclosed herein analyzed the stress generated at the edges of the insulating substrate 10 of a power semiconductor device using the finite element method. This analysis was performed on a model of a conventional power semiconductor device with no stepped portion 9 on the first metal foil 3 (Figure 4) and a model of a power semiconductor device according to Embodiment 1 in which the first metal foil 3 has a stepped portion 9 (Figure 5).

[0021] Figures 6 and 7 show the analysis results. Figure 6 shows the stress distribution at the edges of the insulating substrate 10 of a conventional power semiconductor device. In Figure 6, it was observed that strong stress occurs in the resin housing 1 near the edges of the insulating substrate 10, and the stress at the corners of the edge face of the insulating substrate 10, which are most likely to be the starting point for delamination, was 40.6 MPa.

[0022] Figure 7 shows the stress distribution at the edge of the insulating substrate 10 of the power semiconductor device according to Embodiment 1. In Figure 7, it can be observed that the stress at the corner of the end face of the insulating substrate 10 (the portion of the stepped portion 9) is relatively small. The stress at that portion is 26.3 MPa, which is significantly smaller than that of the conventional structure. As a result of the analysis, it was observed that the maximum principal stress in the power semiconductor device according to Embodiment 1 is about 40% smaller compared to the conventional structure.

[0023] Figure 8 shows the principal stresses as vectors in the stress analysis results of a conventional power semiconductor device. As shown in Figure 8, it can be seen that near the end face of the insulating substrate 10, stress is generated in a direction that peels the resin housing 1 away from the insulating substrate 10 due to the shrinkage of the resin housing 1. In the power semiconductor device according to Embodiment 1, this stress in the direction that peels the resin housing 1 away from the insulating substrate 10 is suppressed. Therefore, according to the power semiconductor device according to Embodiment 1, delamination between the resin housing 1 and the insulating substrate 10 can be suppressed, and the reliability of the power semiconductor device can be improved.

[0024] In this embodiment, the power semiconductor element 8 was, for example, a rectangle with a size of about 3 mm to 15 mm and a thickness of about 50 μm to 400 μm. There are no restrictions on the type of power semiconductor element 8; for example, any type such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), IGBT (Insulated Gate Bipolar Transistor), Schottky barrier diode, or PN junction diode may be used. The material of the power semiconductor element 8 may be, for example, silicon, silicon carbide, or gallium nitride. Semiconductor devices formed using wide-bandgap semiconductors such as silicon carbide and gallium nitride perform better at high voltage, high current, and high temperature operation compared to semiconductor devices using silicon.

[0025] Multiple power semiconductor elements 8 are mounted on the insulating substrate 10. The size of the insulating substrate 10 is such that it can accommodate multiple power semiconductor elements 8, for example, 20 mm x 40 mm.

[0026] The material of the ceramic substrate 6 is, for example, AlN, Si3N4, or Al2O3. The thickness of the ceramic substrate 6 is approximately 0.3 mm to 1 mm.

[0027] The materials of the first metal foil 3 and the second metal foil 7 are preferably Cu or Al. While increasing the thickness of the first metal foil 3 and the second metal foil 7 improves heat dissipation, from an economic standpoint, a thickness of approximately 0.3 mm to 1 mm is preferred. Furthermore, the greater the thickness of the first metal foil 3 and the second metal foil 7, the closer the coefficient of thermal expansion of the entire insulating substrate 10 approaches the coefficient of thermal expansion of the first metal foil 3 and the second metal foil 7. In this embodiment, the ceramic substrate 6 is made of Si3N4 with a thickness of 0.32 mm, and the thickness of the first metal foil 3 and the second metal foil 7 is 0.8 mm.

[0028] Methods for fixing the power semiconductor element 8 to the second metal foil 7 include, for example, soldering or sintering techniques of Ag or Cu. The second metal foil 7 may be divided into patterns to realize a desired circuit configuration.

[0029] The resin housing 1 is made of thermosetting epoxy resin. In this embodiment, the resin housing 1 is shown formed by transfer molding technology, but the resin housing 1 may be formed by other sealing methods, such as direct potting. Even in the case of the resin housing 1 formed by direct potting, thermal stress occurs at the adhesive interface with the insulating substrate 10 due to the difference in coefficients of linear expansion, so the application of this embodiment is effective.

[0030] If the coefficient of thermal expansion of the resin housing 1 is far removed from that of the insulating substrate 10, thermal stress will increase. Therefore, the coefficient of thermal expansion of the resin housing 1 is adjusted, for example, by incorporating silica filler into the resin housing 1. The silica filler content of the resin housing 1 is generally 60% or more in typical resin-encapsulated power semiconductor devices, but in this embodiment, it is set to over 80% in order to bring the coefficient of thermal expansion of the resin housing 1 closer to that of the insulating substrate 10.

[0031] In this embodiment, the resin housing 1 was sized to have a thickness of 6 mm to 8 mm and be able to enclose the insulating substrate 10, specifically measuring 28 mm x 48 mm. It is important to note that if the size of the resin housing 1 is not several mm or more larger than the perimeter of the insulating substrate 10, the resin will not flow to the heat dissipation surface 2 of the insulating substrate 10, resulting in a defect. A thin resin housing 1 is desirable. This is because if the thickness of the resin housing 1 is large, the thermal stress between the insulating substrate 10 and the resin housing 1 will increase. This is due to the fact that the elastic modulus of the insulating substrate 10 is basically higher than that of the resin housing 1.

[0032] As can be seen from Figure 2, the first metal foil 3 and the second metal foil 7 are positioned with a gap between them and the edges of the insulating substrate 10. If the gap between the edges of the insulating substrate 10 and the first metal foil 3 and the second metal foil 7 (hereinafter referred to as "offset") is zero, it becomes difficult to separate the insulating substrate 10 into individual pieces. In the manufacturing of the insulating substrate 10, the first metal foil 3 and the second metal foil 7 constituting multiple insulating substrates 10 are fixed together to a large ceramic substrate 6, and then the large ceramic substrate 6 is cut to separate it into multiple insulating substrates 10, thereby separating the insulating substrate 10 into individual pieces. At this time, if the first metal foil 3 or the second metal foil 7 is present at the point where the ceramic substrate 6 is cut, the first metal foil 3 or the second metal foil 7 may plastically deform while remaining connected to the adjacent piece due to the mechanical stress of cutting, making it impossible to separate them. By providing an offset between the edge of the insulating substrate 10 and the first metal foil 3 and the second metal foil 7, the ceramic substrate 6 becomes easier to cut, and the insulating substrate 10 can be easily divided into individual pieces.

[0033] The offset between the edge of the insulating substrate 10 and the first metal foil 3 and the second metal foil 7 is also necessary as a design requirement to ensure the insulation distance between the first metal foil 3 and the second metal foil 7. The amount of offset depends on the specified voltage of the power semiconductor device, but it is good to ensure, for example, about 0.5 mm to 1 mm.

[0034] The depth of the stepped portion 9, that is, the height difference between the upper surface of the first metal foil 3 and the stepped portion 9, is most effective when it is about half the thickness of the first metal foil 3. However, in order for the resin to cover the stepped portion 9 during the molding of the resin housing 1, the stepped portion should be several times the size of the filler in the resin housing 1. For example, if the size of the filler is about 50 μm, a step depth of about 200 μm is sufficient. The stepped portion 9 does not need to be perfectly parallel to the insulating substrate 10; it can be tilted to achieve the same effect as described above.

[0035] Electrically conductive metal plates are used for the external terminals 4 and control terminals 5. Cu is particularly preferred as a material for the external terminals 4 and control terminals 5 in terms of electrical conductivity and cost. Alternatively, an iron-based material with a low coefficient of thermal expansion called 42 alloy can be used. In power semiconductor devices, where the current flowing is large, Cu or a Cu alloy is basically used for the external terminals 4. Wire bonds or solder connections are used as appropriate for the connection between the second metal foil 7 and the external terminals 4, and for the connection between the surface electrodes of the power semiconductor element 8 and the external terminals 4.

[0036] Embodiment 2. Figure 9 is a perspective view of the power semiconductor device according to Embodiment 2. Figure 10 is a cross-sectional view of the power semiconductor device according to Embodiment 2, corresponding to the cross-section along the dotted line in Figure 9. Figures 11 and 12 are perspective and plan views of the insulating substrate 10 provided in the power semiconductor device according to Embodiment 2.

[0037] In Embodiment 2, in a plan view, the inner corner of the stepped portion 9 provided on the first metal foil 3 of the insulating substrate 10 is chamfered. By chamfering the inner corner of the stepped portion 9, the width of the stepped portion 9 can be increased around that corner. In addition, the distance from the corner of the insulating substrate 10 (the corner of the ceramic substrate 6) to the end face of the first metal foil 3 (the inner side wall of the stepped portion 9) can be increased.

[0038] According to this embodiment, the stress near the corners of the insulating substrate 10, where the stress is highest, can be suppressed. Furthermore, by increasing the length of the area where the resin housing 1 and the insulating substrate 10 are bonded near the corners of the insulating substrate 10, the progression of delamination between the resin housing 1 and the insulating substrate 10 can be effectively suppressed.

[0039] In this embodiment, the inner corner of the stepped portion 9 of the first metal foil 3 is chamfered with an R (radius of chamfer). In this case, the larger the R (radius of chamfer), the greater the stress reduction effect. However, in order to ensure the function of dissipating the heat generated by the power semiconductor element 8, the chamfered corner must not be located directly beneath the power semiconductor element 8. Specifically, when the offset between the edge of the insulating substrate 10 and the first metal foil 3 is 1 mm and the width of the stepped portion 9 is 1 mm, a significant effect was observed in the range of R 3 mm or more. Furthermore, although increasing the offset between the edge of the insulating substrate 10 and the first metal foil 3 also increases stress reduction, there is a design constraint that the area of ​​the first metal foil 3 exposed on the heat dissipation surface 2 of the power semiconductor device becomes smaller.

[0040] In the above, the chamfering method for the inner corner of the stepped portion 9 of the first metal foil 3 may be a C-chamfer (a chamfering method that cuts the corner at a 45° angle), as shown in Figure 13. In this case, a significant effect was observed in the range where C (length of one side to be removed) is 3 mm or more. Furthermore, similar effects can be obtained by chamfering with a composite shape of straight and curved lines, rather than a complete R-chamfer or C-chamfer.

[0041] Embodiment 3. Figure 14 is a cross-sectional view of a power semiconductor device according to Embodiment 3. As shown in Figure 14, in the power semiconductor device according to Embodiment 3, the outer edge 11 of the upper surface of the first metal foil 3 on the inner circumference side of the stepped portion 9 provided on the first metal foil 3 of the insulating substrate 10 is covered by the resin housing 1. This configuration makes it possible to reduce the stress generated at the corners of the end faces of the insulating substrate 10, which are the most likely points of delamination. The thickness of the resin covering the outer edge 11 of the upper surface of the first metal foil 3 can be, for example, several tens of micrometers, and the effect of improving the adhesion between the resin housing 1 and the insulating substrate 10 is obtained.

[0042] One possible method for covering the outer edge 11 of the upper surface of the first metal foil 3 with the resin housing 1 is as follows. First, the insulating substrate 10 is given a curve such that the central part of the first metal foil 3 is convex. This curve can be achieved by adjusting the patterns and thicknesses of the first metal foil 3 and the second metal foil 7, respectively. Then, the insulating substrate 10, on which the power semiconductor element 8 etc. is mounted, is set in a mold and the resin housing 1 is molded. At this time, if the insulating substrate 10 is curved, a gap will be created between the mold and the outer edge 11 of the first metal foil 3 during the molding of the resin housing 1, so that the outer edge 11 of the first metal foil 3 is covered with the resin housing 1. If the part inside the outer edge 11 of the first metal foil 3 is also covered with the resin housing 1, the excess resin can be removed by laser ablation or by honing using shot blasting or beads.

[0043] Embodiment 4. Figure 15 is a diagram showing the configuration of a power semiconductor device according to Embodiment 4, and is an enlarged cross-sectional view of the vicinity of the edge of the insulating substrate 10.

[0044] As shown in Figure 15, in the power semiconductor device according to Embodiment 4, the stepped portion 9 provided on the first metal foil 3 of the insulating substrate 10 has a smooth shape in cross-section. That is, the corner between the end face 12a of the first metal foil 3 rising from the inner circumference side of the stepped portion 9 and the stepped portion 9, and the corner between the corner of the end face 12b of the first metal foil 3 descending from the outer circumference side of the stepped portion 9 and the stepped portion 9, have a rounded shape in cross-section. Such a rounded shape can be easily achieved by forming the stepped portion 9 provided on the first metal foil 3 by wet etching.

[0045] According to this embodiment, since it is possible to eliminate areas where thermal stress is concentrated locally, the adhesion between the resin housing 1 and the insulating substrate 10 can be further improved. In particular, a high effect was obtained when the size (radius) of the rounded shape on the inner circumference side of the stepped portion 9 was made to be about the same as the depth of the stepped portion 9 (the height difference between the upper surface of the first metal foil 3 and the stepped portion 9). In this embodiment, both the depth of the stepped portion 9 and the size of the rounded shape on the inner circumference side of the stepped portion 9 were set to 200 μm.

[0046] Embodiment 5. Figure 16 is a cross-sectional view of a power semiconductor device according to Embodiment 5. The power semiconductor device according to Embodiment 5 is a power semiconductor device according to any of Embodiments 1 to 4 to which a heat sink 13 is attached. The heat sink 13 is attached to the first metal foil 3 exposed on the heat dissipation surface 2 of the resin housing 1 with solder 14.

[0047] By joining the heat sink 13 and the first metal foil 3 with solder 14, heat generated from the power semiconductor element 8 can be efficiently transferred to the heat sink 13. Other joining methods include, for example, thermally joining the heat dissipation surface 2 of the first metal foil 3 and the heat sink 13 via materials such as thermal conductive grease, carbon sheets, or silicone-based heat dissipation sheets, but these methods have high thermal resistance and significantly impair heat dissipation.

[0048] Furthermore, there is a concern that the thermal stress between the insulating substrate 10 and the resin housing 1 may increase due to the thermal stress resulting from the joining of the heat sink 13 and the first metal foil 3 with solder 14. However, since the first metal foil 3 is provided with a stepped portion 9, this thermal stress can be efficiently suppressed.

[0049] The material of the heat sink 13 is, for example, Al or Cu. If the heat sink 13 is Al, plating is necessary on the soldering surface because Al is not easily wetted by solder. Cu plating or Ni plating are suitable materials for the plating. The thickness of the heat sink 13 needs to be several millimeters from the viewpoint of suppressing thermal resistance by horizontal heat transport. In Figure 16, the protrusions provided on the heat dissipation surface of the heat sink 13 are pin fins. For pin fins, for example, cylinders or rectangular prisms with a diameter of about 1 mm to 2 mm can be used. These shapes can be realized by forging press processing.

[0050] Furthermore, because the first metal foil 3 has a stepped portion 9 at its peripheral edge, it is possible to prevent damage to the adhesive interface between the resin housing 1 and the insulating substrate 10 due to thermal stress caused by the thermal history during molding and curing of the resin housing 1, as well as during subsequent use. In addition, it is possible to effectively suppress thermal stress even when used in conjunction with the heat sink 13, which can result in high thermal stress.

[0051] In particular, as in Embodiment 2, if the inner corner of the stepped portion 9 of the first metal foil 3 is chamfered, the thermal stress generated in the solder 14 can also be suppressed. This will be explained below.

[0052] Because the solder 14 experiences significant thermal stress due to the difference between the coefficient of thermal expansion of the heat sink 13 and the coefficient of thermal expansion of the entire resin housing 1, there is a concern that cracks may propagate from the corners of the solder 14 due to metal fatigue during long-term use.

[0053] For example, if the coefficient of thermal expansion of the resin housing 1 is set to about 12 ppm / °C, the difference in coefficients of thermal expansion between the resin housing 1 and the insulating substrate 10 becomes smaller, thus reducing the thermal stress between the insulating substrate 10 and the resin housing 1. Furthermore, if the coefficient of thermal expansion of the resin housing 1 is lowered to about 10 ppm / °C, the effect of the glass transition temperature (Tg) can be avoided, which has the advantage of reducing warping.

[0054] However, if the coefficient of thermal expansion of the resin housing 1 is reduced, the difference in the coefficient of thermal expansion between the heat sink 13 and the entire resin housing 1 increases, which leads to a problem in that the heat cycle resistance of the solder 14 decreases. In this case, the thermal stress of the solder 14 is maximum at the corners, so the longer the diagonal length of the solder 14, the greater the thermal stress generated.

[0055] As in Embodiment 2, if the inner corner of the stepped portion 9 of the first metal foil 3 is chamfered, the diagonal length of the solder 14 can be shortened, thereby reducing the thermal stress generated in the solder 14. This suppresses cracks in the solder 14 due to heat cycling and extends the guaranteed heat cycle life.

[0056] As described above, the power semiconductor device according to Embodiment 5 can suppress both the thermal stress between the resin housing 1 and the insulating substrate 10 and the thermal stress of the solder 14, thereby simultaneously improving both the short-term reliability characteristic of preventing delamination between the resin housing 1 and the insulating substrate 10 and the long-term reliability characteristic of preventing crack propagation to the solder 14.

[0057] Embodiment 6. This embodiment applies a semiconductor device according to any of the above-described embodiments 1 to 5 to a power converter. The application of the semiconductor devices according to embodiments 1 to 5 is not limited to a specific power converter, but below, as embodiment 6, we will describe the case in which a semiconductor device according to any of embodiments 1 to 5 is applied to a three-phase inverter.

[0058] Figure 17 is a block diagram showing the configuration of a power conversion system to which the power conversion device according to this embodiment is applied.

[0059] The power conversion system shown in Figure 17 consists of a power source 100, a power converter 200, and a load 300. The power source 100 is a DC power source and supplies DC power to the power converter 200. The power source 100 can be composed of various components, for example, a DC grid, a solar cell, or a battery, or it may be composed of a rectifier circuit or AC / DC converter connected to an AC grid. Alternatively, the power source 100 may be composed of a DC / DC converter that converts DC power output from a DC grid into a predetermined power.

[0060] The power converter 200 is a three-phase inverter connected between the power supply 100 and the load 300. It converts the DC power supplied from the power supply 100 into AC power and supplies the AC power to the load 300. As shown in Figure 17, the power converter 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 to control the main conversion circuit 201.

[0061] Load 300 is a three-phase electric motor driven by AC power supplied from power converter 200. Note that Load 300 is not limited to a specific application; it is an electric motor installed in various electrical devices, such as hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning equipment.

[0062] The details of the power converter 200 are described below. The main conversion circuit 201 is equipped with switching elements and freewheeling diodes (not shown), and by switching the switching elements, it converts the DC power supplied from the power supply 100 into AC power and supplies it to the load 300. There are various specific circuit configurations for the main conversion circuit 201, but the main conversion circuit 201 according to this embodiment is a two-level three-phase full-bridge circuit and can be composed of six switching elements and six freewheeling diodes antiparallel to each switching element. At least one of each switching element and each freewheeling diode of the main conversion circuit 201 is composed of a semiconductor module 202 corresponding to one of the embodiments 1 to 5 described above. The six switching elements are connected in series in pairs to form upper and lower arms, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0063] Furthermore, the main conversion circuit 201 includes a drive circuit (not shown) for driving each switching element. The drive circuit may be built into the semiconductor module 202, or it may be configured to be a separate drive circuit from the semiconductor module 202. The drive circuit generates a drive signal to drive the switching elements of the main conversion circuit 201 and supplies it to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, according to the control signal from the control circuit 203, which will be described later, it outputs a drive signal to turn on the switching element and a drive signal to turn off the switching element to the control electrodes of each switching element. When the switching element is kept in the ON state, the drive signal is a voltage signal (ON signal) that is greater than or equal to the threshold voltage of the switching element, and when the switching element is kept in the OFF state, the drive signal is a voltage signal (OFF signal) that is less than or equal to the threshold voltage of the switching element.

[0064] The control circuit 203 controls the switching elements of the main converter circuit 201 so that the desired power is supplied to the load 300. Specifically, it calculates the time (on time) that each switching element of the main converter circuit 201 should be in the ON state based on the power to be supplied to the load 300. For example, the main converter circuit 201 can be controlled by PWM control, which modulates the on time of the switching elements according to the voltage to be output. The control circuit then outputs a control command (control signal) to the drive circuit of the main converter circuit 201 so that an ON signal is output to the switching elements that should be in the ON state at each point in time, and an OFF signal is output to the switching elements that should be in the OFF state. The drive circuit outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element according to this control signal.

[0065] In the power conversion device according to this embodiment, a semiconductor module according to any of embodiments 1 to 5 is used as the switching element and freewheeling diode of the main conversion circuit 201, thereby improving reliability.

[0066] In this embodiment, an example of applying a semiconductor device according to any of Embodiments 1 to 5 to a two-level three-phase inverter has been described. However, the application of the semiconductor devices according to Embodiments 1 to 5 is not limited to this, and can be applied to various power conversion devices. In this embodiment, a two-level power conversion device is used, but a three-level or multi-level power conversion device may also be used. Furthermore, when supplying power to a single-phase load, a semiconductor device according to any of Embodiments 1 to 5 may be applied to a single-phase inverter. In addition, when supplying power to a DC load, it is also possible to apply a semiconductor device according to any of Embodiments 1 to 5 to a DC / DC converter or AC / DC converter.

[0067] Furthermore, a power conversion device using a semiconductor device according to any of Embodiments 1 to 5 is not limited to cases where the load is an electric motor, but can also be used, for example, as a power supply for an electrical discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system, and can even be used as a power conditioner for a solar power generation system or an energy storage system.

[0068] Furthermore, it is possible to freely combine each embodiment, or to modify or omit each embodiment as appropriate.

[0069] The various aspects of this disclosure are summarized below as an appendix.

[0070] (Note 1) Power semiconductor devices, An insulating substrate having a first main surface on which a first metal foil is provided and a second main surface on which a second metal foil is provided, wherein the power semiconductor element is mounted on the second metal foil, A resin housing that encloses the power semiconductor element and the insulating substrate, Equipped with, At least a portion of the first metal foil is exposed from the resin housing, The first metal foil has a stepped portion at its outer edge that is lower than the upper surface of the first metal foil. Power semiconductor equipment.

[0071] (Note 2) The stepped portion is covered by the resin housing. The power semiconductor device described in Appendix 1.

[0072] (Note 3) In a plan view, the inner corner of the stepped portion of the first metal foil has a chamfered shape. Power semiconductor equipment as described in Appendix 1 or Appendix 2.

[0073] (Note 4) The outer edge of the upper surface of the first metal foil on the inner circumference side of the stepped portion is covered by the resin housing. A power semiconductor device as described in any one of the appendices 1 through 3.

[0074] (Note 5) In a cross-sectional view, the corner between the end face of the first metal foil rising from the inner circumference of the stepped portion and the stepped portion, and the corner between the end face of the first metal foil descending from the outer circumference of the stepped portion and the stepped portion, are rounded in shape. A power semiconductor device as described in any one of the appendices 1 through 4.

[0075] (Note 6) The heat sink is further provided, which is soldered to the first metal foil exposed from the resin housing. A power semiconductor device as described in any one of the appendices 1 through 5.

[0076] (Note 7) A main conversion circuit having a semiconductor device described in any one of Appendix 1 to Appendix 6, which converts the input power and outputs it, A control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit, A power conversion device equipped with this device. [Explanation of Symbols]

[0077] 1 Resin housing, 2 Heat dissipation surface, 3 First metal foil, 4 External terminals, 5 Control terminals, 6 Ceramic substrate, 7 Second metal foil, 8 Power semiconductor element, 9 Stepped section, 10 Insulating substrate, 11 Outer edge, 12a, 12b End faces of the first metal foil, 13 Heat sink, 14 Solder, 100 Power supply, 200 Power converter, 201 Main conversion circuit, 202 Semiconductor module, 203 Control circuit, 300 Load.

Claims

1. Power semiconductor devices, An insulating substrate having a first main surface on which a first metal foil is provided and a second main surface on which a second metal foil is provided, wherein the power semiconductor element is mounted on the second metal foil, A resin housing that encloses the power semiconductor element and the insulating substrate, Equipped with, At least a portion of the first metal foil is exposed from the resin housing, The first metal foil has a stepped portion at its outer edge that is lower than the upper surface of the first metal foil. Power semiconductor equipment.

2. The stepped portion is covered by the resin housing. The power semiconductor device according to claim 1.

3. In a plan view, the inner corner of the stepped portion of the first metal foil has a chamfered shape. A power semiconductor device according to claim 1 or claim 2.

4. The outer edge of the upper surface of the first metal foil on the inner circumference side of the stepped portion is covered by the resin housing. A power semiconductor device according to claim 1 or claim 2.

5. In a cross-sectional view, the corner between the end face of the first metal foil rising from the inner circumference of the stepped portion and the stepped portion, and the corner between the end face of the first metal foil descending from the outer circumference of the stepped portion and the stepped portion, are rounded in shape. A power semiconductor device according to claim 1 or claim 2.

6. The heat sink is further provided, which is soldered to the first metal foil exposed from the resin housing. A power semiconductor device according to claim 1 or claim 2.

7. A semiconductor device according to either claim 1 or claim 2, comprising a main conversion circuit that converts and outputs input power, A control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit, A power conversion device equipped with this device.

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