Digital filters, filtering methods, and programs

Abstract

This invention provides a digital filter, a filtering method, and a program that reduce errors that occur when the filter coefficients of a transposed FIR filter are changed. [Solution] The digital filter comprises an overlap insertion unit that inserts the preceding input signal as an overlap into the input signal, a transposed FIR (Finite Impulse Response) filter that performs filtering on the input signal into which the overlap has been inserted, and an overlap removal unit that discards the output for the overlap from the output of the transposed FIR filter. The transposed FIR filter changes its filter coefficients in accordance with the timing of the overlap insertion.

Description

Technical Field

[0001] The present disclosure relates to a digital filter, a filtering method, and a program capable of changing filter coefficients.

Background Art

[0002] Patent Document 1 discloses a technique for switching filter coefficients of a digital filter according to a switching of an optical transmission line.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, there is a problem that an error occurs in the output signal of the FIR filter during a predetermined period after changing the filter coefficients of the transposed FIR (Finite Impulse Response) filter.

[0005] An object of the present invention is to provide a digital filter, a filtering method, and a program that reduce an error that occurs when changing the filter coefficients of a transposed FIR filter, in view of the above problems.

Means for Solving the Problems

[0006] To achieve the above object, the digital filter according to the present disclosure includes an overlap insertion unit that inserts the immediately preceding input signal as an overlap into the input signal, a transposed FIR (Finite Impulse Response) filter that performs a filtering process on the input signal into which the overlap is inserted, From the output of the inverted FIR filter, an overlap removal unit discards the output corresponding to the overlap. Equipped with, The inverted FIR filter changes its filter coefficients in accordance with the timing at which the overlap is inserted.

[0007] To achieve the above objectives, the filtering method relating to this disclosure is: The filter coefficients of the inverted FIR (Finite Impulse Response) filter are changed in accordance with the timing at which the immediately preceding input signal is inserted into the aforementioned input signal as an overlap. The inverted FIR filter performs filtering on the input signal into which the overlap has been inserted. The output for the overlap is discarded from the output of the inverted FIR filter. Includes.

[0008] To achieve the above objectives, the program relating to this disclosure is: On the computer, The process involves changing the filter coefficients of a transposed FIR (Finite Impulse Response) filter in accordance with the timing at which the immediately preceding input signal is inserted into the aforementioned input signal as an overlap. The inverted FIR filter performs filtering on the input signal into which the overlap has been inserted, From the output of the inverted FIR filter, a process is performed to discard the output for the overlap. Make it run. [Effects of the Invention]

[0009] According to the present invention, it is possible to provide a digital filter, a filtering method, and a program that reduce errors that occur when the filter coefficients of a transposed FIR filter are changed. [Brief explanation of the drawing]

[0010] [Figure 1] It is a block diagram showing an example of the configuration of a wireless communication device having a DPD function. [Figure 2] It is a block diagram showing an example of the configuration of a direct type FIR filter. [Figure 3] It is a block diagram showing an example of the configuration of a transposed type FIR filter. [Figure 4] It is a block diagram showing an example of the configuration of a FIR filter with changeable filter coefficients. [Figure 5] It is a block diagram showing an example of the configuration of a digital filter according to the present disclosure. [Figure 6] It is a diagram showing an example of insertion of overlap. [Figure 7] It is a block diagram showing an example of the configuration of a digital filter according to the present disclosure. [Figure 8] It is a diagram showing an example of insertion of overlap. [Figure 9] It is a block diagram showing an example of the configuration of a digital filter according to the present disclosure. [Figure 10] It is a block diagram showing an example of the configuration of a digital filter according to the present disclosure. [Figure 11] It is a block diagram showing an example of the configuration of a digital filter according to the present disclosure. [Figure 12] It is a flowchart exemplifying a filter method according to the present disclosure. [Figure 13] It is a block diagram exemplifying the hardware configuration of a digital filter according to the present disclosure.

Embodiments for Carrying Out the Invention

[0011] (Background Leading to the Embodiment) In the field of wireless communication, in order to transmit a high-power wireless signal from an antenna, it is common to amplify the wireless signal by a power amplifier. When the power amplifier is operated at the saturation region level, high power efficiency can be obtained, but there is a problem that waveform distortion occurs in the wireless signal and the communication quality deteriorates.

[0012] Therefore, a method is used in which distortion is added to the wireless signal using pre-distortion (PD) technology before amplification by the power amplifier, thereby canceling out the waveform distortion caused by the power amplifier. Pre-distortion is generally performed using digital signal processing and is called digital pre-distortion (DPD).

[0013] Figure 1 shows an example configuration of a wireless transmitter 100 that performs DPD processing on the wireless signal to be transmitted. The transmission signal generation unit 101 generates a wireless signal to be emitted into space from the antenna, and the pre-distortion unit 102 adds distortion to the wireless signal to cancel out the waveform distortion of the power amplifier 104. The DAC (Digital-to-Analog Converter) 103 converts the digital wireless signal into an analog signal, and the converted analog wireless signal is amplified by the power amplifier 104 before being emitted into space from the antenna 105. For simplicity, processing such as frequency conversion is omitted in Figure 1.

[0014] DPDs typically use FIR filters (Finite Impulse Response Filters) as their digital filter.

[0015] Figure 2 shows an example of the circuit configuration of a direct-type FIR filter. h1 to h4 are the filter coefficients of the FIR filter, and the number of filter coefficients is called the number of taps. In the example in Figure 2, the number of taps is 4, but generally it is an integer greater than or equal to 1. In a direct-type FIR filter, when an input signal is input to the circuit, the product of the input signal and the filter coefficient is calculated for each tap, including previously input signals, and the sum of these products is output.

[0016] On the other hand, Figure 3 shows an example of the circuit configuration of a transposed FIR filter. In a transposed FIR filter, when an input signal is input to the circuit, the product of the input signal and each filter coefficient is calculated. The product of the input signal and h1 is stored in delay unit 204-1. The product of the input signal and h2 is stored in delay unit 204-2 after the sum of the product with the value stored in delay unit 204-1 is calculated. The product of the input signal and h3 is stored in delay unit 204-3 after the sum of the product with the value stored in delay unit 204-2 is calculated. The product of the input signal and h4 is stored in delay unit 204-3 after the sum of the product with the value stored in delay unit 204-3 is calculated and output as the output signal. A transposed FIR filter has the advantage of being able to output the output signal with only one multiplication and one addition, making it easier to increase the drive frequency of the digital signal processing circuit. Therefore, transposed FIR filters are often used in digital filters that need to process signals with high communication rates.

[0017] The waveform distortion characteristics imparted by a power amplifier change depending on the operating temperature of the power amplifier; therefore, it is desirable to optimize the FIR filter coefficients for DPD accordingly. Furthermore, since the waveform distortion characteristics also change when the modulation method of the input signal changes, it is also desirable to optimize the filter coefficients according to the modulation method in wireless communication that uses adaptive modulation, which changes the modulation method depending on the conditions of the transmission line.

[0018] Figure 4 shows an example configuration of an FIR filter with adjustable filter coefficients. Memory 301-1 stores a set of filter coefficients 1, and memory 301-2 stores a set of filter coefficients 2.

[0019] The FIR filter 300 performs signal processing using either filter coefficient 1 or filter coefficient 2, according to the coefficient switching instruction signal.

[0020] When using a direct FIR filter, changing the filter coefficients does not cause any problems. On the other hand, when using a transposed FIR filter, changing the filter coefficients results in an error in the output signal from the time the filter coefficients are changed until the input signal for the number of taps has been input, because the result of multiplying the filter coefficients with the original filter coefficients is stored in the delay unit. Furthermore, to avoid the aforementioned error, it is necessary to interrupt communication. Therefore, this disclosure realizes a technology that changes the filter coefficients of a transposed FIR filter without causing errors or interrupting communication.

[0021] (First Embodiment) The first embodiment will be described in detail with reference to Figure 5. The digital filter in this embodiment consists of a transposed FIR filter 400, memories 401-1 to 402, an overlap insertion unit 402, an overlap removal unit 403, and a clock generation unit 404. Note that the one-way arrows shown in Figure 5 simply illustrate the flow of information (data or signals, etc.) and do not exclude the bidirectional nature of information.

[0022] The overlap insertion section 402 receives an input signal and a coefficient switching instruction signal. The coefficient switching instruction signal instructs the transposed FIR filter 400 to use either filter coefficient 1 stored in memory 401-1 or filter coefficient 2 stored in memory 402-2 for filtering.

[0023] First, before explaining how the filtering process works when using filter coefficient 1, let's describe the behavior before changing the filter coefficient.

[0024] If there is no instruction to change the filter coefficients from the coefficient switching instruction signal, the overlap insertion unit 402 sends the input signal to the transposed FIR filter 400 and stores the input signal in the memory inside the overlap insertion unit 402. The overlap insertion unit 402 stores signal values ​​from the most recently input signal up to (number of taps - 1) of the transposed FIR filter 400. If the input signal is x(t), the current time is t0, and the number of taps of the transposed FIR filter 400 is Nt, then input signals from at least x(t0-1) to x(t0-(Nt-1)) are stored. The above-mentioned input signals stored in the overlap insertion unit 402 are used when changing the filter coefficients, as will be described later. The overlap insertion unit 402 also instructs the transposed FIR filter 400 to use the filter coefficients for filtering based on the coefficient switching instruction signal.

[0025] The clock generation unit 404 generates the drive frequency necessary for the inverted FIR filter 400 to operate and supplies it to the inverted FIR filter 400. The value of the drive frequency is the same as the sampling rate of the input signal. For example, if the sampling rate of the input signal is 100 MSps (Sample per second), the drive frequency is 100 MHz.

[0026] The inverted FIR filter 400 performs filtering based on the input signal, filter coefficients, and drive frequency, and sends the filter output to the overlap removal unit 403. Furthermore, as described later, the inverted FIR filter 400 notifies the overlap removal unit 403 of the timing when the filter coefficients are changed.

[0027] The overlap removal unit 403 outputs the signal received from the inverted FIR filter 400 as an output signal.

[0028] Next, we will explain the operation when changing the filter coefficient from filter coefficient 1 to filter coefficient 2.

[0029] When the overlap insertion unit 402 receives an instruction from the coefficient switching instruction signal to change from filter coefficient 1 to filter coefficient 2, it inserts the input signal stored in its internal memory (hereinafter referred to as overlap) into the input signal and sends it to the inverted FIR filter 400, and also instructs the inverted FIR filter 400 to change the filter coefficient used for filtering from filter coefficient 1 to filter coefficient 2.

[0030] Figure 6 shows an input signal with an overlap inserted. The time at which the filter coefficients are changed is t0, the number of taps Nt of the transposed FIR filter 400 is 4, and the number of input signals (overlaps) stored by the overlap insertion unit 402 is 3.

[0031] Furthermore, the overlap insertion unit 402 notifies the clock generation unit 404 of the time when the overlap was inserted.

[0032] The clock generation unit 404 needs to increase the drive frequency of the transposed FIR filter 400 by the amount of overlap that has been inserted, so it increases the drive frequency for a predetermined period and supplies it to the transposed FIR filter 400. Since it is difficult to significantly increase the drive frequency in practice, it is necessary to allow a sufficiently long period for increasing the drive frequency, but further changes to the filter coefficients cannot be made during this period.

[0033] The inverted FIR filter 400 performs filtering on the overlap and subsequent input signals using filter coefficient 2 at the increased drive frequency, and sends its output to the overlap removal unit 403. The inverted FIR filter 400 also notifies the overlap removal unit 403 of the time when the filter coefficient was changed, i.e., the timing when the overlap was inserted.

[0034] The overlap removal unit 403 discards the output results when filtering was performed with overlap as input from the output results of the filter processing sent from the transposed FIR filter 400, and outputs everything else.

[0035] As described above, according to this embodiment, by performing overlap filtering using the modified filter coefficients and discarding the output of the overlap filtering process itself, it is possible to prevent errors that occur after the modification of the filter coefficients.

[0036] (Second Embodiment) The digital filter described in the first embodiment allows the filter coefficients to be changed at any time, except during the period when the drive frequency is increased by changing the filter coefficients. However, changing the drive frequency may be difficult in terms of circuit implementation.

[0037] In the second embodiment, a method is described in which the drive frequency of the transposed FIR filter is fixed in a pre-raised state by periodically inserting overlaps at predetermined time intervals, thereby eliminating the need to change the drive frequency.

[0038] Figure 7 is a block diagram showing an example of the configuration of the digital filter according to this disclosure, in which a signal splitting unit 505 and a switching control unit 506 are added compared to Figure 5.

[0039] The signal splitting unit 505 sends the input signal, which has been divided into predetermined time intervals, to the overlap insertion unit 502. Each of the divided signals is called a signal block.

[0040] The overlap insertion unit 502 inserts the signal at the end of the preceding signal block (overlap) into the beginning of the signal block and sends it to the transposed FIR filter 500. The number of overlaps is set to a number (Nt-1) that is at least one less than the number of taps Nt of the transposed FIR filter 400, as in the first embodiment.

[0041] Figure 8 shows an example of a signal block with an overlap inserted, where the signal block length L=10 and the number of overlaps No=3.

[0042] The switching control unit 506 instructs the transposed FIR filter 500 to use the filter coefficients for filtering based on the coefficient switching instruction signal. However, the timing for changing the filter coefficients is limited to the timing for processing the data at the beginning of the overlap described above.

[0043] The clock generation unit 504 supplies a fixed drive frequency f = S × (L + No) / L, calculated from the input signal sampling rate S, signal block length L, and number of overlaps No, to the transposed FIR filter 500.

[0044] The overlap removal unit 503 discards the output results when filtering was performed with overlap as input from the output results of the filter processing sent from the transposed FIR filter 500, and outputs everything else.

[0045] As described above, according to this embodiment, since overlap is inserted at predetermined time intervals, it is possible to change the filter coefficients each time overlap is inserted, while keeping the drive frequency of the transposed FIR filter at a fixed value.

[0046] (Third embodiment) In the first and second embodiments, the operation when fixed filter coefficients stored in memory are used was described. In this embodiment, a method for changing the filter coefficient calculation parameters in a digital filter that calculates filter coefficients using the input signal and filter coefficient calculation parameters each time an input signal is received is described.

[0047] Figure 9 is a block diagram showing an example of the configuration of the digital filter according to this disclosure, in which a filter coefficient calculation unit 607 is added to the configuration of Figure 7.

[0048] The filter coefficient calculation unit 607 uses the input signal and either filter coefficient calculation parameter 1 stored in memory 601-1 or filter coefficient calculation parameter 2 stored in memory 601-2 to calculate the filter coefficients for the transposed FIR filter 600 to perform filtering. The filter coefficient calculation parameter to be used is instructed by the switching control unit 606.

[0049] Examples of filter coefficient calculation units 607 include nonlinear waveform distortion compensation filters and neural network filters.

[0050] The operation of the signal splitting unit 605, the clock generation unit 604, and the overlap removal unit 603 is the same as that of the signal splitting unit 505, the clock generation unit 504, and the overlap removal unit 503 in the second embodiment, so a description will be omitted.

[0051] The overlap insertion unit 602 inserts the signal at the end of the preceding signal block (overlap) into the beginning of the signal block and sends it to the transposed FIR filter 600 and the filter coefficient calculation unit 607.

[0052] Based on the coefficient switching instruction signal, the switching control unit 606 instructs the filter coefficient calculation unit 607 to provide the filter coefficient calculation parameters to be used in calculating the filter coefficients.

[0053] As described above, according to this embodiment, the characteristics of the transposed FIR filter 600 can be changed by the switching control unit 606 changing the parameters for calculating the filter coefficients in accordance with the data at the beginning of the overlap described above, based on the coefficient switching instruction signal.

[0054] (Fourth embodiment) The fourth embodiment is applied to input signals having a sampling rate exceeding the upper limit of the drive frequency, which can be realized by hardware circuits such as ASICs (Application Specific Integrated Circuits) or FPGAs (Field Programmable Gate Arrays) that implement digital filters.

[0055] Figure 10 is a block diagram showing an example of the configuration of the digital filter according to this disclosure, in which a signal distribution unit 707 and a signal coupling unit 708 are added compared to the configuration in Figure 7. Also, it differs from the configuration in Figure 7 in that there are two digital filters, 709-1 and 709-2, that perform filtering.

[0056] The signal splitting unit 705, like the signal splitting unit 505, sends the input signal, which has been split at predetermined intervals, to the overlap insertion unit 702.

[0057] The overlap insertion unit 702, like the overlap insertion unit 502, adds an overlap to the beginning of the signal block and sends it to the signal distribution unit 707.

[0058] The signal distribution unit 707 distributes the input signal to digital filters 709-1 and 709-2 in signal block units. A round-robin method, which alternately distributes signal blocks arranged in the order of input time, is easily implemented.

[0059] The clock generation unit 704 supplies a fixed drive frequency f = S × (L + No) / L / Nf, calculated from the input signal sampling rate S, signal block length L, number of overlaps No, and number of digital filters Nf, to the transposed FIR filters 700-1 and 700-2.

[0060] In the configuration example shown in Figure 10, since the number of digital filters Nf is 2, the required drive frequency can be halved compared to the second embodiment. By increasing the number of digital filters, that is, by parallelizing the digital filters, it is possible to further reduce the drive frequency.

[0061] The switching control unit 706 instructs the transposed FIR filters 700-1 and 700-2 to use the filter coefficients for filtering based on the coefficient switching instruction signal. However, the timing for changing the filter coefficients is limited to the timing for processing the data at the beginning of the overlap.

[0062] The operation of the transposed FIR filters 700-1 to 700 is the same as that of the transposed FIR filter 500 in the second embodiment. However, by using a pipeline method in which the timing at which the transposed FIR filters 700-1 to 700 start filtering the data at the beginning of the overlap is shifted by half of the sum of the signal block length L and the number of overlaps No (L+No) / 2, there is an advantage in that the processing delay until the first output signal is output can be shortened.

[0063] The overlap removal unit 703 discards the output of the inverted FIR filters 700-1 to 700-2 after filtering for overlap, and sends it to the signal coupling unit 708.

[0064] The signal coupling unit 708 receives the outputs of the transposed FIR filters 700-1 to 700-2 from the overlap removal unit 703, rearranges them in the order in which the corresponding input signals were input to the signal splitting unit 705, and outputs them.

[0065] As described above, according to this embodiment, the disclosure can be applied even to input signals having a sampling rate that exceeds the upper limit of the drive frequency that can be realized by the hardware circuit.

[0066] (Fifth embodiment) Figure 11 is a block diagram showing an example configuration of a digital filter 800 according to this disclosure. The digital filter 800 comprises an overlap insertion unit 801, an inverted FIR filter 802, and an overlap removal unit 803. The overlap insertion unit 801, the inverted FIR filter 802, and the overlap removal unit 803 may be software or modules whose processing is performed by a processor executing a program stored in memory. Alternatively, the overlap insertion unit 801, the inverted FIR filter 802, and the overlap removal unit 803 may be hardware such as a circuit.

[0067] The overlap insertion unit 801 inserts the immediately preceding input signal as an overlap into the input signal. If the input signal is divided into signal blocks, the immediately preceding input signal may be data near the end of the immediately preceding signal block. The overlap insertion unit 801 corresponds to the overlap insertion units 402, 502, 602, and 702 described above.

[0068] The inverted FIR filter 802 performs filtering on an input signal with an overlap inserted. The inverted FIR filter 802 also updates its filter coefficients in accordance with the timing of the overlap insertion. Alternatively, the filter coefficients may be calculated in accordance with the timing of the overlap insertion, thus updating the filter coefficients accordingly. The inverted FIR filter 802 corresponds to the inverted FIR filters 400, 500, 600, and 700-1~2 described above.

[0069] The overlap removal unit 803 discards the output for overlap. The overlap removal unit 803 corresponds to the overlap removal units 403, 503, 603, and 703 described above.

[0070] Figure 12 is a flowchart showing an example of the flow of the filtering method according to this disclosure. First, the inverted FIR filter 802 updates its filter coefficients in accordance with the timing at which overlap is inserted into the input signal (S101). Next, the inverted FIR filter 802 performs filtering on the input signal into which overlap has been inserted (S103). Finally, the overlap removal unit 803 discards the output for overlap from the output of the inverted FIR filter 802.

[0071] Embodiment 5 can reduce the errors that occur when the filter coefficients of a transposed FIR filter are changed.

[0072] Figure 13 is a block diagram showing an example of the hardware configuration of the digital filter 800. Referring to Figure 13, the digital filter 800 includes a network interface 1001, a processor 1002, and memory 1003. The network interface 1001 is used to communicate with other network node devices that constitute the communication system. The network interface 1001 may also be used for wireless communication. For example, the network interface 1001 may be used for wireless LAN communication as defined in the IEEE 802.11 series, or for mobile communication as defined in 3GPP® (3rd Generation Partnership Project). Alternatively, the network interface 1001 may include, for example, a network interface card (NIC) compliant with the IEEE 802.3 series.

[0073] The processor 1002 reads and executes software (computer programs) from memory 1003, thereby performing the processes shown in steps S101 to S103 of Figure 12. The processor 1002 may be, for example, a microprocessor, an MPU, or a CPU. The processor 1002 may include multiple processors.

[0074] Memory 1003 is composed of a combination of volatile and non-volatile memory. Memory 1003 may also include storage located away from the processor 1002. In this case, the processor 1002 may access memory 1003 via an I / O (Input / Output) interface, which is not shown.

[0075] In the example shown in Figure 13, memory 1003 is used to store a group of software modules. The processor 1002 can perform the processing in steps S101 to S103 by reading these software modules from memory 1003 and executing them.

[0076] As explained with reference to Figure 13, each of the processors in the digital filter 800 in the above embodiment executes one or more programs that include a set of instructions for causing the computer to perform the algorithm described with reference to the drawings.

[0077] In the examples described above, the program includes a set of instructions (or software code) that, when loaded into a computer, cause the computer to perform one or more of the functions described in the embodiments. The program may be stored on a non-temporary computer-readable medium or a physical storage medium. Examples, but not limited to, include random-access memory (RAM), read-only memory (ROM), flash memory, solid-state drive (SSD) or other memory technologies, CD-ROM, digital versatile disc (DVD), Blu-ray® disc or other optical disc storage, magnetic cassette, magnetic tape, magnetic disk storage or other magnetic storage devices. The program may be transmitted over a temporary computer-readable medium or a communication medium. Examples, but not limited to, include temporary computer-readable medium or a communication medium that includes electrically, optically, acoustically or otherwise propagating signals.

[0078] Although the present disclosure has been described above with reference to embodiments, the present disclosure is not limited to the embodiments described above. Various modifications to the structure and details of the present disclosure can be made as can be understood by those skilled in the art within the scope of the present disclosure. Furthermore, each embodiment can be combined with other embodiments as appropriate.

[0079] Each drawing is merely illustrative to illustrate one or more embodiments. Each drawing may be associated with one or more other embodiments rather than with only one specific embodiment. As those skilled in the art will understand, various features or steps described with reference to any one drawing can be combined with features or steps shown in one or more other drawings, for example, to create embodiments not explicitly shown or described. Not all features or steps shown in any one drawing to illustrate an exemplary embodiment are necessarily required, and some features or steps may be omitted. The order of steps shown in any of the drawings may be changed as appropriate.

[0080] Some or all of the embodiments described above may also be described as follows, but are not limited to the following: Some or all of the elements (e.g., configurations and functions) described in Appendices 2 to 8 that are dependent on Appendice 1 may also be dependent on Appendices 9 and 10 in the same way as in Appendices 2 to 8. Some or all of the elements described in any appendice may be applied to various hardware, software, recording means, systems, and methods for recording software.

[0081] (Note 1) An overlap insertion unit that inserts the immediately preceding input signal as an overlap into the input signal, A transposed FIR (Finite Impulse Response) filter that performs filtering on the input signal into which the overlap is inserted, From the output of the inverted FIR filter, an overlap removal unit discards the output corresponding to the overlap. Equipped with, The inverted FIR filter changes the filter coefficients in accordance with the timing at which the overlap is inserted. Digital filter. (Note 2) A clock generation unit that increases the drive frequency of the transposed FIR filter for a predetermined period from the time of insertion of the overlap. A digital filter as described in Appendix 1, comprising the features described therein. (Note 3) A signal splitting unit divides the input signal into signal blocks of a predetermined length. Equipped with, The overlap insertion unit inserts the data near the end of the preceding signal block as the overlap into the beginning of the signal block. The digital filter described in Appendix 1. (Note 4) Filter coefficient calculation unit calculates the filter coefficients of the transposed FIR filter based on parameters for calculating filter coefficients. Equipped with, The filter coefficient calculation unit changes the filter coefficient calculation parameters in accordance with the timing at which the overlap is inserted. The digital filter described in Appendix 3. (Note 5) Multiple transposed FIR filters, A signal distribution unit that distributes the aforementioned signal blocks to each of the transposed FIR filters, Equipped with, The overlap removal unit discards the overlap filtering result from the filtering results of the multiple transposed FIR filters. A signal coupling unit arranges the outputs of the overlap removal unit in the same time order as the corresponding input signals were input to the signal splitting unit. A digital filter as described in Appendix 3 or 4, comprising the features described therein. (Note 6) The filter coefficient calculation unit includes a nonlinear waveform distortion compensation filter or a neural network. The digital filter described in Appendix 4. (Note 7) If Nt is the number of taps in the inverted FIR filter and t0 is the current time, then the overlap includes the input signal from t0-1 to t0-(Nt-1). A digital filter as described in any one of the items 1 to 4 in the appendix. (Note 8) The aforementioned inverted FIR filter performs DPD (Digital Pre-Distortion). A digital filter as described in any one of the items 1 to 4 in the appendix. (Note 9) The filter coefficients of the inverted FIR (Finite Impulse Response) filter are changed in accordance with the timing at which the immediately preceding input signal is inserted into the aforementioned input signal as an overlap. The inverted FIR filter performs filtering on the input signal into which the overlap has been inserted. The output for the overlap is discarded from the output of the inverted FIR filter. Filtering method. (Note 10) On the computer, The process involves changing the filter coefficients of a transposed FIR (Finite Impulse Response) filter in accordance with the timing at which the immediately preceding input signal is inserted into the aforementioned input signal as an overlap. The inverted FIR filter performs filtering on the input signal into which the overlap has been inserted, From the output of the inverted FIR filter, a process is performed to discard the output for the overlap. A program that executes the command. [Explanation of symbols]

[0082] 101 Transmission signal generation unit 102 Pre-distortion section 103 DAC 104 Power Amplifier 105 Antenna 200-1~3 Delay Element 201-1~4 Filter coefficients 202-1~4 Multiplier 203-1~4 Adder 204-1~3 Delay Element 205-1~4 Filter coefficients 206-1~4 Multiplier 300 FIR filter 400, 500, 600, 700-1~2, 802 Transposed FIR Filters 301-1~2, 401-1~2, 501-1~2, 601-1~2, 701-1~4, 1003 memory 402, 502, 602, 702, 801 Overlap insertion section 403, 503, 603, 703, 803 Overlap removal section 404, 504, 604, 704 Clock generation unit 505, 605, 705 signal splitting section 506, 606, 706 Switching Control Unit 607 Filter coefficient calculation unit 707 Signal distribution section 708 Signal coupling section 709-1~2, 800 Digital Filters 1001 Network Interface 1002 Processor

Claims

1. An overlap insertion unit that inserts the immediately preceding input signal as an overlap into the input signal, A transposed FIR (Finite Impulse Response) filter that performs filtering on the input signal into which the overlap is inserted, From the output of the inverted FIR filter, an overlap removal unit discards the output corresponding to the overlap. Equipped with, The inverted FIR filter changes the filter coefficients in accordance with the timing at which the overlap is inserted. Digital filter.

2. A clock generation unit that increases the drive frequency of the transposed FIR filter for a predetermined period from the time of insertion of the overlap. The digital filter according to claim 1, comprising:

3. A signal splitting unit divides the input signal into signal blocks of a predetermined length. Equipped with, The overlap insertion unit inserts the data near the end of the preceding signal block as the overlap into the beginning of the signal block. The digital filter according to claim 1.

4. Filter coefficient calculation unit calculates the filter coefficients of the transposed FIR filter based on parameters for calculating filter coefficients. Equipped with, The filter coefficient calculation unit changes the filter coefficient calculation parameters in accordance with the timing at which the overlap is inserted. The digital filter according to claim 3.

5. Multiple transposed FIR filters, A signal distribution unit that distributes the aforementioned signal blocks to each of the transposed FIR filters, Equipped with, The overlap removal unit discards the overlap filtering result from the filtering results of the multiple transposed FIR filters. A signal coupling unit arranges the outputs of the overlap removal unit in the same time order as the corresponding input signals were input to the signal splitting unit. The digital filter according to claim 3 or 4, comprising:

6. The filter coefficient calculation unit includes a nonlinear waveform distortion compensation filter or a neural network. The digital filter according to claim 4.

7. If Nt is the number of taps in the inverted FIR filter and t0 is the current time, then the overlap includes the input signal from t0-1 to t0-(Nt-1). A digital filter according to any one of claims 1 to 4.

8. The aforementioned inverted FIR filter performs DPD (Digital Pre-Distortion). A digital filter according to any one of claims 1 to 4.

9. The filter coefficients of the inverted FIR (Finite Impulse Response) filter are changed in accordance with the timing at which the immediately preceding input signal is inserted into the aforementioned input signal as an overlap. The inverted FIR filter performs filtering on the input signal into which the overlap has been inserted. The output for the overlap is discarded from the output of the inverted FIR filter. Filtering method.

10. On the computer, A process to change the filter coefficients of a transposed FIR (Finite Impulse Response) filter in accordance with the timing at which the immediately preceding input signal is inserted into the aforementioned input signal as an overlap, The inverted FIR filter performs filtering on the input signal into which the overlap has been inserted, From the output of the inverted FIR filter, a process is performed to discard the output for the overlap. A program that executes the command.

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