Method for dividing semiconductor package substrates

Abstract

This invention provides a method for steadily dividing a semiconductor package substrate, avoiding the problem of the cutting blade deviating from the planned dividing line and damaging the device package when distortion occurs in the semiconductor package substrate and the straightness of the planned dividing line is impaired. [Solution] The method includes a coordinate recording step of detecting and recording first to third alignment marks P1 to P3 formed on the edge of the semiconductor package substrate that follows the first planned division line; a distance calculation step of calculating the distance α between the first straight line connecting the first and second marks and the third coordinate; a determination step of determining whether the distance α exceeds the value obtained by subtracting the width w of the cutting blade from the width of the first planned division line; and, if it is determined that division is possible, a cutting step of positioning the first straight line in the cutting feed direction and cutting the first planned division line at least at the center in the longitudinal direction of the first planned division line such that the width α + w fits within the width of the planned division line.

Description

[Technical Field]

[0001] The present invention relates to a method for dividing a semiconductor package substrate, in which a plurality of device packages are demarcated by a first division line and a second division line perpendicular to the first division line, and the semiconductor package substrate is divided into individual device packages by a cutting blade. [Background technology]

[0002] A wafer, on which multiple devices such as ICs and LSIs are divided by planned division lines and formed on its surface, is then divided into individual device chips by a cutting device equipped with a rotatable cutting blade or a laser processing device that irradiates with a laser beam, and used in electrical equipment such as mobile phones, personal computers, and other electronic devices.

[0003] Furthermore, a technique has been proposed in which a device chip is sealed with an electrode plate and resin to produce a semiconductor package substrate, and then the planned division lines formed on the semiconductor package substrate are divided into individual device packages (see, for example, Patent Document 1). [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2020-057653 [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] However, since semiconductor package substrates are produced by sealing and sintering device chips with electrode plates and resin, overall distortion occurs, impairing the straightness of the planned division lines. This creates a problem where, if the cutting blade is used to cut along the planned division lines in a straight line, the cutting blade may deviate from the planned division lines, damaging the device package.

[0006] The present invention has been made in view of the above facts, and its main technical problem is to provide a method for dividing a semiconductor package substrate that can solve the problem of overall distortion occurring in the semiconductor package substrate, impairing the straightness of the planned division line, causing the cutting blade to deviate from the planned division line and damaging the device package. [Means for solving the problem]

[0007] To solve the above-mentioned main technical problems, the present invention provides a method for dividing a semiconductor package substrate into individual device packages using a cutting blade, wherein the semiconductor package substrate is demarcated by a first division line and a second division line perpendicular to the first division line, and comprises: a first coordinate recording step of detecting one alignment mark formed on a first edge following the first division line of the semiconductor package substrate and recording a first coordinate; a second coordinate recording step of detecting the other alignment mark formed on the first edge and recording a second coordinate; a third coordinate recording step of detecting the alignment mark in the center of the first coordinate and the second coordinate and recording a third coordinate; and a first straight line connecting the first coordinate and the second coordinate and the third A method for dividing a semiconductor package substrate is provided, which includes: a first distance calculation step of calculating a first distance (α) to a coordinate; a first determination step of determining that if the first distance (α) calculated in the first distance calculation step exceeds the value (Aw) obtained by subtracting the width (w) of the cutting blade from the width (A) of the first division line, division is not possible, and if it does not exceed this value (Aw), division is possible; and if the first determination step determines that division is possible, a first cutting step of cutting the first division line with a cutting blade, positioning the first straight line in a direction that coincides with the cutting feed direction and positioning the cutting blade such that the width (α+w) obtained by adding the width (w) of the cutting blade to the first distance (α) is within the width (A) of the first division line at least at the center of the longitudinal direction of the first division line.

[0008] A fourth coordinate recording step involves detecting one alignment mark formed on the second side following the second planned division line and recording the fourth coordinate; a fifth coordinate recording step involves detecting the other alignment mark formed on the second side and recording the fifth coordinate; a sixth coordinate recording step involves detecting the alignment mark in the center of the fourth and fifth coordinates and recording the sixth coordinate; a second distance calculation step involves calculating the second distance (β) between the second straight line connecting the fourth and fifth coordinates and the sixth coordinate; and the second distance (β) calculated in the second distance calculation step is calculated by subtracting the width (B) of the second planned division line from the width (B). Preferably, the process includes a second determination step in which, if the value (Bw) obtained by subtracting the width (w) of the cutting blade is exceeded, it is determined that division is not possible, and if the value (Bw) is not exceeded, it is determined that division is possible; and a second cutting step in which, if it is determined in the second determination step that division is possible, the second straight line is positioned in a direction that coincides with the cutting feed direction, and the width (β+w) obtained by adding the width (w) of the cutting blade to the second distance (β) is positioned such that it fits within the width (B) of the second division line at least at the center of the longitudinal direction of the second division line, and the second division line is cut with the cutting blade.

[0009] The system comprises a first design value recording unit in which the design values ​​of the width (A) of the first planned division line and the interval (AA) of adjacent first planned division lines are pre-registered, and a second design value recording unit in which the design values ​​of the width (B) of the second planned division line and the interval (BB) of adjacent second planned division lines are pre-registered, and a first correction value calculation step which calculates the actual interval of the first planned division lines adjacent to the first planned division line based on the distance between two points obtained by the fourth coordinate recording step and the fifth coordinate recording step to obtain a first correction value A' which corrects the design value interval (AA), and the first coordinate recording step and the second coordinate recording step The process includes a second correction value calculation step, which calculates the actual interval between the second planned division lines adjacent to the second planned division line based on the distance between the two points obtained, and obtains a second correction value (B') to correct the design value interval (BB). Preferably, in the first cutting step, the design value interval (AA) recorded in the first design value recording unit is corrected with the first correction value (A') to relatively index-feed the cutting blade, and in the second cutting step, the design value interval (BB) recorded in the second design value recording unit is corrected with the second correction value (B') to relatively index-feed the cutting blade.

[0010] In the first cutting step, it is preferable to relatively index-feed the cutting blade with respect to the first division line located in the center of a plurality of first division lines, and in the second cutting step, it is preferable to relatively index-feed the cutting blade with respect to the second division line located in the center of a plurality of second division lines. [Effects of the Invention]

[0011] The present invention provides a method for dividing a semiconductor package substrate, comprising: a first coordinate recording step of detecting one alignment mark formed on a first edge following a first division line of the semiconductor package substrate and recording a first coordinate; a second coordinate recording step of detecting the other alignment mark formed on the first edge and recording a second coordinate; a third coordinate recording step of detecting the alignment mark in the center of the first and second coordinates and recording a third coordinate; a first distance calculation step of calculating a first distance (α) between a first straight line connecting the first and second coordinates and the third coordinate; and determining that division is impossible if the first distance (α) calculated in the first distance calculation step exceeds the value (Aw) obtained by subtracting the width (w) of the cutting blade from the width (A) of the first division line, and if it exceeds this value (Aw) If not, the process includes a first determination step of determining that division is possible, and if the first determination step determines that division is possible, a first cutting step of positioning the first straight line in a direction that coincides with the cutting feed direction and cutting the first division line with the cutting blade, such that the width (α+w) obtained by adding the width of the cutting blade (w) to the first distance (α) is within the width (A) of the first division line at least at the center of the longitudinal direction of the first division line. As a result, if distortion occurs throughout the semiconductor package substrate and the straightness of the division line is impaired, the problem of the cutting blade coming off the division line and damaging the device package is reliably avoided, and the cutting blade can reliably divide the package into individual device packages. [Brief explanation of the drawing]

[0012] [Figure 1] (a) An overall perspective view of a cutting apparatus suitable for carrying out the semiconductor package substrate division method of this embodiment, and (b) An enlarged front view showing a part of the cutting means attached to the cutting apparatus shown in (a). [Figure 2] This is a plan view of the semiconductor package substrate, which is the workpiece. [Figure 3](a) A plan view showing a state in which a semiconductor package substrate shown in FIG. 2 is supported by a frame and a first side thereof is aligned in the X-axis direction; (b) A conceptual diagram showing a first distance between a first straight line connecting a first coordinate and a second coordinate of the semiconductor package substrate shown in (a) and a third coordinate. [Figure 4] It is a conceptual diagram showing a first division planned line, a first distance (α), a width (A) of the first division planned line, and a cutting groove G. [Figure 5] It is a plan view showing a state in which a second side of the semiconductor package substrate supported by the frame is aligned in the X-axis direction. [Figure 6] It is a plan view showing a state in which a cutting groove is formed along a first division planned line of a semiconductor package substrate. [Figure 7] It is a plan view showing a state in which a cutting groove is formed along a second division planned line of the semiconductor package substrate shown in FIG. 6. [Figure 8] It is a plan view showing an embodiment of performing a first cutting process based on a central first division planned line. [Figure 9] It is a plan view showing an embodiment of performing a second cutting process based on a central second division planned line.

Embodiments for Carrying Out the Invention

[0013] Hereinafter, embodiments of a method for dividing a semiconductor package substrate configured based on the present invention will be described in detail with reference to the accompanying drawings.

[0014] FIG. 1(a) shows a cutting device 1 suitable for implementing the method for dividing a semiconductor package substrate of the present embodiment.

[0015] The cutting device 1 includes at least a holding means 7 for holding the illustrated semiconductor package substrate 100, a cutting means 8 for performing a cutting process on the semiconductor package substrate 100 held by the holding means 7, an X-axis feeding means (not shown) for relatively feeding the holding means 7 and the cutting means 8 in the X-axis direction, a Y-axis feeding means (not shown) for relatively indexing and feeding the holding means 7 and the cutting means 8 in the Y-axis direction orthogonal to the X-axis direction, a display means 14, and a control means 20.

[0016] The cutting device 1 includes a housing 2 having a substantially rectangular parallelepiped shape, a cassette 3 placed on a liftable cassette table 3a of the housing 2, a loading / unloading means 4 for carrying out an unprocessed semiconductor package substrate 100 supported from the cassette 3 to a frame F via a protective tape T to a temporary placement table 5, a transfer means 6 having a swing arm for transferring the semiconductor package substrate 100 carried out to the temporary placement table 5 to a chuck table 7a of the holding means 7, an imaging means 10 for performing an alignment to detect an area to be cut by the cutting means 8 by imaging the semiconductor package substrate 100 held on the above-described chuck table 7a, and a cleaning transfer means 13 for transferring the semiconductor package substrate 100 after the cutting process from the loading / unloading position where the chuck table 7a is positioned in FIG. 1(a) to a cleaning device 12.

[0017] The chuck table 7a constituting the holding means 7 is rotationally driven by a rotation driving means (not shown), and a plurality (four in the illustrated embodiment) of clamps 7b for fixing the frame F supporting the above-described semiconductor package substrate 100 are arranged at equal intervals around the chuck table 7a.

[0018] In addition to the above-described X-axis feeding means and Y-axis feeding means, the cutting device 1 is provided with a Z-axis feeding means (not shown) for relatively feeding the holding means 7 and the cutting means 8 in the Z-axis direction (vertical direction) orthogonal to the X-axis direction and the Y-axis direction.

[0019] Figure 1(b) shows an enlarged front view of a part of the cutting means 8. As shown in the figure, the width (thickness) w of the cutting edge 81a of the cutting blade 81 in this embodiment is set to, for example, 80 to 100 μm, and the width of the cutting edge 81a in this embodiment is 100 μm.

[0020] The control means 20 is composed of a computer and includes a central processing unit (CPU) that performs calculations according to a control program, a read-only memory (ROM) for storing the control program and the like, a read-write random access memory (RAM) for temporarily storing calculation results and the like, an input interface, and an output interface (details are omitted from the illustration). In addition to the X-axis feed means, Y-axis feed means, Z-axis feed means, and rotational drive means for the chuck table 7a mentioned above (not shown in the illustration), the control means 20 is connected to at least a cutting means 8, an imaging means 10, etc., and is operated by a plurality of control programs stored in the control means 20. Information related to machining, including cutting conditions, is displayed on the display means 14. Note that in Figure 1, the control means 20 is shown outside the housing 2 for illustrative purposes, but in reality it is located inside the housing 2.

[0021] Figure 2 shows a semiconductor package substrate 100 processed by the semiconductor package substrate division method of this embodiment. The semiconductor package substrate 100 is produced by sealing and sintering a device chip with an electrode plate and resin, and is formed by dividing a plurality of device packages 102 with a plurality of first division lines 104 and a plurality of second division lines 106 that are orthogonal to the first division lines 104.

[0022] The first division line 104 is formed in a direction along the first direction (horizontal direction in the figure) D1 shown in Figure 2. The second division line 106 is formed in a direction along the second direction (vertical direction in the figure) D2, which is perpendicular to the first direction D1. In the illustrated embodiment, a total of 96 device packages 102 are formed by partitioning with a plurality of first division lines 104 and a plurality of second division lines 106, with 12 in the first direction D1 and 8 in the second direction D2. The first division lines 104 and the second division lines 106 are set not only in the area between two adjacent device packages 102, but also outside the outermost device package 102. Nine first division lines 104 are set along the first direction D1, including those set on the outermost periphery, and thirteen second division lines 106 are set along the second direction D2, including those set on the outermost periphery.

[0023] In this embodiment, the width A of the planned division line 104 and the width B of the planned division line 106 set on the semiconductor package substrate 100 are both set to 1 mm in design value. However, the widths A and B are not necessarily limited to being set to the same width, and may be set to different widths.

[0024] The semiconductor package substrate 100 shown in the figure has first edges 110, 110' that follow the first planned division line 104 and second edges 120, 120' that follow the second planned division line 106, surrounding the region S on which the device package 102 is formed.

[0025] The first side 110 has an alignment mark P1 formed on one side (the left end in the figure) in the first direction D1, an alignment mark P2 formed on the other side (the right end in the figure), and an alignment mark P3 formed in the center between alignment marks P1 and P2. Similarly, the other first side 110', which is the opposite side of the first side 110, also has an alignment mark P1' formed on one side (the left end in the figure) in the first direction D1, an alignment mark P2' formed on the other side (the right end in the figure), and an alignment mark P3' formed in the center between alignment marks P1' and P2'. The alignment marks P1 to P3 and P1' to P3' described above were applied to the semiconductor package substrate 100 before sintering, which can cause distortion, etc. At that time, the alignment marks P1, P2, P3 and P1', P2', P3' were each formed on a straight line along the first direction D1. Although the alignment marks in the figure are represented by "+", the present invention is not limited to this and other symbols may be used.

[0026] Alignment marks P1 and P1' are formed on a straight line passing through the center of the second division line 106, which is set on the left outermost edge of the region S where the device package 102 is formed. Alignment marks P2 and P2' are formed on a straight line passing through the center of the second division line 106, which is set on the right outermost edge of the region S where the device package 102 is formed. Furthermore, as described above, alignment marks P3 and P3' are formed at the centers of alignment marks P1 and P2 and the centers of alignment marks P1' and P2', respectively, and are formed on a straight line passing through the center of the second division line 106 located in the center in the first direction D1, among a plurality of second division lines 106 along the second direction D2.

[0027] The second side 120 has an alignment mark P4 formed on one side (the lower end in the figure) in the second direction D2, an alignment mark P5 formed on the other side (the upper end in the figure), and an alignment mark P6 formed in the center between alignment marks P4 and P5. Similarly, the other second side 120', which is opposite to the second side 120, also has an alignment mark P4' formed on one side (the lower end in the figure) in the second direction D2, an alignment mark P5' formed on the other side (the upper end in the figure), and an alignment mark P6' formed in the center between alignment marks P4' and P5'. The alignment marks P4-P6 and P4'-P6' described above were also applied to the semiconductor package substrate 100 before sintering, which can cause distortion, etc. At that time, the alignment marks P4, P5, P6 and P4', P5', P6' were each formed on a straight line along the second direction D2. The alignment marks in the figure are indicated by "+", but the present invention is not limited to this.

[0028] Alignment marks P4 and P4' are formed on a straight line passing through the center of a second division line 106, which is set on the lower outermost periphery of the region S where the device package 102 is formed. Alignment marks P5 and P5' are formed on a straight line passing through the center of a first division line 104, which is set on the upper outermost periphery of the region S where the device package 102 is formed. Furthermore, alignment marks P6 and P6' are formed in the center of alignment marks P4 and P5, and in the center of alignment marks P4' and P5', and are formed on a straight line passing through the center of a first division line 104 located in the center in the second direction D2, among a plurality of first division lines 104 along the first direction D1.

[0029] The device package 102 formed on the semiconductor package substrate 100 described above is formed as a square with sides of 9 mm, and as described above, the width A of the first division line 104 and the width B of the second division line 106 are set to 1 mm in the design values. Therefore, the design values ​​for the distance between the centers of adjacent first division lines 104 (AA) and the distance between the centers of adjacent second division lines 106 (BB) are both 10 mm. The design values ​​for the width (A) and the distance (AA) of the first division line 104 are registered in advance in the first design value recording unit 22 which constitutes the control means 20, and the design values ​​for the width (B) and the distance (BB) of the second division line 106 are registered in advance in the second design value recording unit 24 which constitutes the control means 20. Furthermore, the number of first division lines 104 (9 lines) and the number of second division lines 106 (13 lines) described above are also registered in an appropriate memory (not shown) of the control means 20.

[0030] When producing the semiconductor package substrate 100, alignment marks P1~P6 and P1'~P6' are formed in advance on the first edges 110, 110' and the second edges 120, 120' as described above, and then sintering is performed to complete the semiconductor package substrate 100. As a result, distortion occurs throughout the semiconductor package substrate 100, which may impair the straightness of the first division line 104 and the second division line 106. In some cases, when cutting is performed by the cutting blade 81 of the cutting means 8 to divide the substrate into individual device packages 102, the cutting blade 81 may come off the first division line 104 or the second division line 106, causing damage to the device package 102. To address such problems, this embodiment implements a method for dividing a semiconductor package substrate according to the present invention, as described below. The method for dividing a semiconductor package substrate described below is implemented by a control program stored in the control means 20.

[0031] In carrying out the semiconductor package substrate division method of this embodiment, as shown in Figure 3(a), an annular frame F having an opening Fa capable of accommodating the semiconductor package substrate 100 is prepared, and the semiconductor package substrate 100 is placed in the center of the opening Fa with the side on which the device package 102 is formed facing upward, and adhesive tape T is attached to the back side of the semiconductor package substrate 100 and the frame F to form a single unit. Then, the multiple semiconductor package substrates 100 supported by the frame F in this manner are placed in the cassette 3, transported to the cutting device 1, and placed on the cassette table 3a.

[0032] (First coordinate recording process) First, the loading / unloading means 4 described above is activated from the cassette 3 of the cutting device 1, as explained in Figure 1, to load the unprocessed semiconductor package substrate 100, supported by the frame F, onto the temporary storage table 5. Next, the transport means 6 is activated to suck the frame F and transport the semiconductor package substrate 100 to the chuck table 7a and place it there. The clamp 7b described above grips the frame F, and a suction means (not shown) is activated to hold it in place. Then, the chuck table 7a is rotated to position the first planned division line 104 along the X-axis direction, as shown in Figure 3(a).

[0033] Next, the X-axis feed mechanism described above is activated to position the semiconductor package substrate 100, which is held by suction on the chuck table 7a, directly below the imaging mechanism 10. The imaging mechanism 10 then images the semiconductor package substrate 100, captures one alignment mark P1 formed on the first edge 110 that follows the first division line 104, detects the first coordinates P1(x1,y1) which are the coordinates of the alignment mark P1, and performs a first coordinate recording step in which the first coordinates P1(x1,y1) are recorded in an appropriate memory of the control mechanism 20.

[0034] (Second coordinate recording process) Next, the other alignment mark P2 formed on the first side 110 is captured, the second coordinate P2(x2,y2), which is the coordinate of the alignment mark P2, is detected, and a second coordinate recording step is performed in which the second coordinate P2(x2,y2) is recorded in an appropriate memory of the control means 20.

[0035] (Third coordinate recording process) Then, an alignment mark P3 formed at the center of the first coordinate P1(x1,y1) and the second coordinate P2(x2,y2) is captured, and a third coordinate P3(x3,y3), which is the coordinate of the alignment mark P3, is detected and recorded in an appropriate memory of the control means 20 in a third coordinate recording step.

[0036] Furthermore, the first coordinate recording step, the second coordinate recording step, and the third coordinate recording step described above are not limited to being performed in the order described above, but may be performed in a different order.

[0037] (First distance calculation step) After performing the first, second, and third coordinate recording steps described above, a first distance calculation step is performed to calculate the first distance (α) between the first straight line L1 (shown as a dashed line) connecting the first coordinate P1(x1,y1) and the second coordinate P2(x2,y2) and the third coordinate P3(x3,y3), as outlined in Figure 3(b). Note that, before sintering the semiconductor package substrate 100, the alignment marks P1, P2, and P3 are formed on a straight line as described above, and the first distance (α) shown in the figure does not exist. However, during the process of producing the semiconductor package substrate 100, distortion occurs throughout the semiconductor package substrate 100, resulting in the first distance (α) shown in the figure (Note that, for explanatory purposes, Figure 3(b) does not show the actual dimensional ratio, but rather exaggerates the first distance (α)). The first distance (α) can be calculated, for example, by finding a linear function that passes through the first coordinate P1(x1,y1) and the second coordinate P2(x2,y2), and then calculating it using a well-known method based on this linear function and the third coordinate P3(x3,y3).

[0038] Furthermore, the coordinates (X1,Y1) of the midpoint between the first coordinate P1(x1,y1) and the second coordinate P2(x2,y2) are: X1 = (x1 + x2) / 2 Y1 = (y1 + y2) / 2 Since it can be calculated as follows, the above first distance (α) is based on the third coordinate P3(x3,y3) and the coordinates (X1,Y1) of the midpoint, α≈[(x3-X1) 2 +(y3-Y1) 2 ] -2 Alternatively, it may be calculated using the following method. Note that in this case, α is an approximate value.

[0039] (First judgment step) If the first distance calculation step is performed as described above, a first determination step is performed to check whether the first distance (α) calculated in the first distance calculation step exceeds the value (Aw) obtained by subtracting the width (w) of the cutting blade 81 from the width (A) of the first planned division line 104. If the first distance (α) exceeds this value (Aw), it is determined that division is not possible. If the first distance (α) does not exceed this value (Aw), it is determined that division is possible. This first determination step will be explained based on Figure 4, which shows the first planned division line 104 where the first distance (α) due to distortion exists, and the cutting groove G with width w formed by the cutting blade 81. Note that Figure 4 is not in line with the actual dimensional ratios. For explanatory purposes, the distance between one end Q1 and the other end Q2 of the first planned division line 104 has been shortened to exaggerate the first distance (α) indicating the distortion in the Y-axis direction (vertical direction in the figure) of the semiconductor package substrate 100, the width (A) of the first planned division line 104, and the cutting groove G cut by the cutting blade 81 of width w.

[0040] As described above, the semiconductor package substrate 100 may be distorted overall. In the example shown in Figure 4, at the longitudinal center point Q3, the substrate is distorted by a first distance (α) in one direction (upward) relative to the straight line (shown as a dashed line) connecting one end Q1 and the other end Q2 on the upper edge of the first planned division line 104. This is distortion of the entire semiconductor package substrate 100. If the value of the first distance (α) exceeds the value (Aw) obtained by subtracting the width (w) of the cutting blade 81 from the width (A) of the first planned division line 104, then even if the cutting blade 81 is positioned within the first planned division line 104 at one end Q1 and cutting is started along the X-axis direction, straightness cannot be ensured within the first planned division line 104. The cutting blade 81 will then deviate into the region S where the device package 102 is formed, damaging the device package 102. Therefore, in this first determination step, it is determined that the first planned division line 104 cannot be cut by the cutting means 8 (it is not possible to divide it). On the other hand, if the value of the first distance (α) does not exceed the value obtained by subtracting the width (w) of the cutting blade 81 from the width (A) of the first planned division line 104 (Aw), even if there is a distortion of the first distance (α) at ​​the central point Q3, as can be seen from Figure 4, the straightness of the cutting process by the cutting blade 81 is ensured along the first planned division line 104, and the cutting groove G stays within the first planned division line 104 without deviating from the region S where the device package 102 is formed, and cutting can be performed on the first planned division line 104 without damaging the device package 102. Therefore, in this first determination step, it is determined that the first planned division line 104 can be cut by the cutting means 8 (it is possible to divide it). This determination result is stored in an appropriate memory of the control means 20.

[0041] If the first judgment step described above determines that the material is "not separable," the first cutting step described later is not performed, and the cutting of the first planned division line 104 by the cutting blade 81 of the cutting device 1 is avoided. In that case, the semiconductor package substrate 100 is divided by another method. For example, the cutting blade 81 is replaced with a cutting blade that is thin enough in width (w) to be separable in the first judgment step described above, or the division is performed by a laser processing device that can perform curved laser processing. If the first judgment step described above determines that the material is "separable," the first cutting step described below is performed.

[0042] (First cutting process) If the first determination step determines that division is possible, the chuck table 7a is rotated so that the first straight line L1 connecting the first coordinates P1(x1,y1) and the second coordinates P2(x2,y2) described above coincides with the cutting feed direction (X-axis direction) of the cutting device 1. As shown in Figure 4, cutting is started along the first division line 104 from one end Q1 of the first division line 104. At least at the center point Q3 of the first division line 104 where the effect of distortion is greatest, the cutting blade 81 is positioned so that the width (α+w) obtained by adding the width of the cutting blade 81 to the first distance (α) fits within the width (A) of the first division line 104. Furthermore, the cutting blade 81 is positioned so that it fits within the first division line 104 over the entire area of ​​the first division line 104, and the cutting process is performed by cutting along the first division line 104 with the cutting blade 81. Then, the cutting means 8 is indexed and advanced in the Y-axis direction by the distance between adjacent first division lines 104, and cutting is performed on all first division lines 104 positioned along the X-axis direction. This makes it possible to perform cutting on all first division lines 104 positioned along the X-axis direction.

[0043] In the above description, an example was given in which cutting is performed on the first planned division line 104 in the method for dividing the semiconductor package substrate of this embodiment. However, as will be described below, cutting is also performed on the second planned division line 106 using the same procedure as the method for dividing the first planned division line 104 described above.

[0044] (Fourth coordinate recording process) First, in the cutting apparatus 1 described with reference to Figure 1, the chuck table 7a holding the semiconductor package substrate 100 is rotated to position it so that the second direction D2, where the second planned division line 106 is formed, is aligned with the X-axis direction, as shown in Figure 5.

[0045] Next, the X-axis feed mechanism described above is activated to position the semiconductor package substrate 100, which is held by suction on the chuck table 7a, directly below the imaging mechanism 10. The imaging mechanism 10 then images the semiconductor package substrate 100, captures one alignment mark P4 formed on the second side 120 that follows the second division line 106, detects the fourth coordinate P4(x4,y4), which is the coordinate of the alignment mark P4, as shown in Figure 5, and performs a fourth coordinate recording step in which the fourth coordinate P4(x4,y4) is recorded in an appropriate memory of the control mechanism 20.

[0046] (Fifth coordinate recording process) Next, the imaging means 10 captures the other alignment mark P5 formed on the second side 120, detects the fifth coordinate P5(x5,y5), which is the coordinate of the alignment mark P5, and performs a fifth coordinate recording step in which it is recorded in an appropriate memory of the control means 20.

[0047] (Sixth coordinate recording process) Then, the imaging means 10 captures the alignment mark P6 formed at the center of the fourth coordinate P4(x4,y4) and the fifth coordinate P5(x5,y5), detects the sixth coordinate P6(x6,y6), which is the coordinate of the alignment mark P6, and performs a sixth coordinate recording step in which it is recorded in an appropriate memory of the control means 20.

[0048] Furthermore, the fourth, fifth, and sixth coordinate recording steps described above are not limited to being performed in the order described above, but may be performed in a different order. Also, the fourth, fifth, and sixth coordinate recording steps may be performed at any time after performing the first, second, and third coordinate recording steps described above, and before performing the first cutting step described above.

[0049] (Second distance calculation step) As described above, once the fourth coordinate P4(x4,y4), the fifth coordinate P5(x5,y5), and the sixth coordinate P6(x6,y6) are detected and recorded in the control means 20, a second distance calculation step is performed to calculate the second distance (β) (not shown in the figure) between the second line connecting the fourth coordinate P4(x4,y4) and the fifth coordinate P5(x5,y5) and the sixth coordinate P6(x6,y6).

[0050] Similar to the alignment marks P1, P2, and P3 described above, in the stage before the semiconductor package substrate 100 is manufactured, the alignment marks P4, P5, and P6 are formed on a straight line, and the second distance (β) described above does not exist. However, during the process of manufacturing the semiconductor package substrate 100, distortion occurs throughout the semiconductor package substrate 100, and the second distance (β) described above occurs. The calculation of the second distance (β) is similar to that of the first distance (α) explained based on Figure 3(b). For example, a linear function passing through the two points P4(x4,y4) and P5(x5,y5) can be found, and the accurate second distance (β) can be determined by a well-known method based on this linear function and the sixth coordinate P6(x6,y6).

[0051] Furthermore, the coordinates (X2,Y2) of the midpoint between the fourth coordinate P4(x4,y4) and the fifth coordinate P5(x5,y5) are: X2=(x4+x5) / 2 Y2 = (y4 + y5) / 2 Since it can be calculated as follows, the second distance (β) is based on the sixth coordinate P6(x6,y6) and the coordinates of the midpoint (X2,Y2), β≈[(x6-X2)2 +(y6-Y2) 2 ] -2 It is also possible to calculate it using this formula. Note that the second distance (β) calculated by this formula is an approximation.

[0052] (Second judgment process) If the second distance (β) calculated in the second distance calculation step exceeds the value obtained by subtracting the width (w) of the cutting blade 81 from the width (B) of the second planned division line 106 (B) (Bw), it is determined that division is not possible. If it does not exceed this value (Bw), a second determination step is performed to determine that division is possible. This second determination step is performed in the same manner as the first determination step explained with reference to Figure 4, and can be explained as follows by substituting α for β, A for B, 104 for 106, and Q1 to Q3 for Q4 to Q6 in Figure 4.

[0053] As described above, the semiconductor package substrate 100 may be distorted overall, and at the midpoint Q6 in the longitudinal direction with respect to the straight line connecting one end Q4 and the other end Q5 of the second planned division line 106, it is distorted in one direction (upward) by a first distance (β). If the value of the first distance (β) exceeds the value obtained by subtracting the width (w) of the cutting blade 81 from the width (B) of the second planned division line 106 (Bw), then even if the cutting blade 81 is positioned within the second planned division line 106 at one end Q4 and cutting is started, it will not be possible to ensure straightness within the second planned division line 106 midway through, and the cutting blade 81 will deviate into the region S where the device package 102 is formed, damaging the device package 102. Therefore, in this second judgment step, it is determined that cutting by the cutting means 8 is not possible (cannot be divided). In contrast, if the value of the second distance (β) does not exceed the value obtained by subtracting the width (w) of the cutting blade 81 from the width (B) of the second planned division line 106 (B), then even if there is a distortion of the second distance (β) at the midpoint Q6, the straightness of the cutting process by the cutting blade 81 is ensured along the second planned division line 106, the cutting groove G will be contained within the second planned division line 106, and the cutting process can be performed without damaging the device package 102. Therefore, it is determined that the second planned division line 106 can be cut by the cutting means 8 (divisible). This determination result is stored in an appropriate memory of the control means 20.

[0054] If the second judgment step described above determines that the material is "not separable," the second cutting step described later is not performed, and the cutting of the second planned division line 106 by the cutting blade 81 of the cutting device 1 is avoided. In that case, the semiconductor package substrate 100 is divided by another method. For example, the cutting blade 81 is replaced with a cutting blade with a thinner width (w) that is determined to be separable in the second judgment step described above, or the division is performed by a laser processing device that can perform curved processing. If the second judgment step described above determines that the material is "separable," the second cutting step described below is performed.

[0055] (Second cutting process) If the second determination step determines that division is possible, the chuck table 7a is rotated so that the second straight line connecting the fourth coordinate P4(x4,y4) and the fifth coordinate P5(x5,y5) coincides with the cutting feed direction (X-axis direction) of the cutting device 1. Cutting is then started along the second division line 106 from one end Q4 side of the second division line 106. At least at the midpoint Q6 of the second division line 106 where the distortion effect is greatest, the cutting blade 81 is positioned so that the width (β+w) obtained by adding the width of the cutting blade 81 to the second distance (β) fits within the width (B) of the second division line 106. More specifically, the cutting blade 81 is positioned so that it fits within the second division line 106 over its entire length, and a second cutting step is performed in which cutting is carried out along the second division line 106 with the cutting blade 81. Then, the cutting means 8 is indexed and advanced in the Y-axis direction by the distance between adjacent second division lines 106, and cutting is performed on all second division lines 106 positioned along the X-axis direction. This makes it possible to perform cutting on all second division lines 106 positioned along the X-axis direction.

[0056] In the semiconductor package substrate division method of this embodiment, a first design value recording unit 22 and a second design value recording unit 24 are set in the control means 20. The design values ​​of the width (A) of the first division planned line 104 and the spacing (AA) between adjacent first division planned lines 104 are pre-registered in the first design value recording unit 22, and the design values ​​of the width (B) of the second division planned line and the spacing (BB) between adjacent second division planned lines are pre-registered in the second design value recording unit 24. As described above, in this embodiment, the design value of the width (A) of the first division planned line 104 is 1 mm, the design value of the spacing (AA) between adjacent first division planned lines 104 is 10 mm, the design value of the width (B) of the second division planned line 106 is 1 mm, and the design value of the spacing (BB) between adjacent second division planned lines 106 is 10 mm. The index feed when performing the first cutting process and the second cutting process described above is performed based on the information recorded in the first design value recording unit 22 and the second design value recording unit 24. Incidentally, when the semiconductor package substrate 100 is produced, the entire semiconductor package substrate 100 may be distorted by sintering, causing the spacing between adjacent first division lines 104 (AA) and adjacent second division lines 106 (BB) to change (generally increasing slightly). If the cutting means 8 is indexed in the Y-axis direction during the first and second cutting processes described above without considering this change, the position of the cutting blade 81 relative to the first division lines 104 and the second division lines 106 may shift, potentially making it impossible to perform cutting within the first and second division lines 104 and the second division lines 106.

[0057] Therefore, in this embodiment, based on the information obtained in the semiconductor package substrate division method described above, the first correction value calculation step and the second correction value calculation step described below are performed to correct the index feed amount in the first cutting step and the index feed amount in the second cutting step described above.

[0058] (First correction value calculation process) First, calculate the distance between the two points obtained by the above-described fourth coordinate recording step and fifth coordinate recording step, that is, the distance E1 between the fourth coordinate P4(x4, y4) and the fifth coordinate P5(x5, y5) shown in FIG. 5. Specifically, E1 = [(x4 - x5) 2 + (y4 - y5) 2 -2 is calculated by.

[0059] As understood from FIG. 5, the distance between the above-described fourth coordinate P4(x4, y4) and the fifth coordinate P5(x5, y5) is based on the actual width of eight device packages 102 and the actual width of (9 - 1) first planned division lines 104. The actual interval (A - A)' between adjacent first planned division lines 104 in the second direction D2 is (A - A)' = E1 / (9 - 1) is calculated by. And based on the fact that the designed value of the interval (A - A) between adjacent first planned division lines 104 is 10 mm, the difference A' between the designed value and the actual value of the interval (A - A) between adjacent first planned division lines 104 is A' = (A - A)' - 10 (mm) is calculated by.

[0060] That is, as shown in FIG. 6, it is calculated that the interval (A - A) between adjacent first planned division lines 104, which was 10 mm in the designed value, actually averages 10 mm + A'. In the above-described first cutting step, when forming the division groove 130 along the first direction D1 by cutting the first planned division line 104 while index-feeding the cutting means 8 in the Y-axis direction, it is necessary to correct the width of the index feed based on the above-described difference A'. The difference A' is stored in an appropriate memory of the control means 20 as the first correction value A', and the first correction value calculation step is completed.

[0061] ​As described above, by calculating the first correction value A' in the first correction value calculation step, when performing the first cutting step described above, the design value index feed amount (AA) = 10 mm is corrected by the first correction value A' while index feeding is performed to carry out the cutting process, and as shown in Figure 6, a cutting groove 130 is formed along the first division line 104. As a result, even if the semiconductor package substrate 100 is distorted when forming the semiconductor package substrate 100 and the spacing between adjacent first division lines 104 changes overall, it becomes possible to accurately position the cutting blade 81 on the adjacent first division line 104 when index feeding the cutting means 8 in the Y-axis direction during the first cutting step.

[0062] (Second correction value calculation process) Similar to the first correction value calculation step described above, a second correction value calculation step is performed to determine a second correction value B' that corrects the interval (BB) of the adjacent second division line 106. First, the distance between the two points obtained in the first coordinate recording step and the second coordinate recording step, that is, the distance E2 between the first coordinate P1(x1,y1) and the second coordinate P2(x2,y2) as explained based on Figure 3(a), is calculated. Specifically, E2 = [(x1 - x2)] 2 +(y1-y2) 2 ] -2 It is calculated by [method].

[0063] The distance E2 between the first coordinate P(x1,y1) and the second coordinate P2(x2,y2) described above is based on the actual width of 12 device packages 102 and the actual width of (13-1) second division lines 106, as can be understood from Figure 3(a), and the actual spacing (BB)' between adjacent second division lines 106 in the first direction D1 is, (BB)'=E2 / (13-1) It is calculated as follows. And, based on the design value of the interval (BB) of the adjacent second planned division line 106 being 10 mm, the difference B' between the design value and the actual value of the interval (BB) of the adjacent second planned division line 106 is, B' = (BB)' - 10 (mm) It is calculated as follows.

[0064] In other words, as shown in Figure 7, the interval (BB) between adjacent second division lines 106 is calculated to be 10 mm + B' on average. In the second cutting process described above, when the cutting means 8 is indexed in the Y-axis direction and the second division line 106 is cut to form a division groove 140 along the second direction D2, it is necessary to correct the width of the indexed feed based on the difference B' described above. This difference B' is stored as the second correction value B' in an appropriate memory of the control means 20, and the second correction value calculation process is completed.

[0065] As described above, by performing the second correction value calculation process and calculating the second correction value B', as shown in Figure 7, when performing the second cutting process described above, the design value index feed amount (BB) = 10 mm is corrected by the second correction value B' and index feed is performed in the Y-axis direction to form a cutting groove 140 along the second division line 106. As a result, even if the semiconductor package substrate 100 is distorted when forming the semiconductor package substrate 100 and the distance between adjacent second division lines 106 changes, it becomes possible to accurately position the cutting blade 81 of the cutting means 8 on the adjacent second division line 106 when index feed is performed in the Y-axis direction during the second cutting process.

[0066] When performing the first cutting process described above, if the cutting process is performed by index feeding while correcting the design value of the interval (AA) between adjacent first division lines 104 with the first correction value A' described above, as shown in Figure 8, the cutting blade 81 is index-feeded with respect to the first division line 104A located in the center in the second direction D2 in the figure, among the multiple first division lines 104, and the cutting process is performed. As shown in the figure, even if some distortion occurs during the process of generating the semiconductor package substrate 100, the position of the first division line 104A located in the center in the second direction D2 can be accurately detected by the alignment marks P6 and P6' detected by the imaging means 10, and the cutting blade 81 of the cutting means 8 can be accurately positioned at the position of the central first division line 104A using the coordinates of the alignment marks P6 and P6' as a reference (0 point).

[0067] Once the cutting blade 81 is positioned on the central first division line 104A, the semiconductor package substrate 100 is machined and cut in the X-axis direction to form a cutting groove 130. Then, using the central first division line 104A as a reference, the cutting blade 81 is indexed and fed in the direction indicated by R1 in the figure (upward) in the Y-axis direction, while applying a first correction value A' to the design value (10 mm) of the spacing (AA) between adjacent first division lines 104, and cutting is performed on the first division line 104 until the first division line 104 located on the uppermost outermost periphery is reached. Furthermore, using the first division line 104A located in the center as a reference, the cutting blade 81 is indexed in the direction indicated by R2 in the figure (downward) while applying the first correction value A' to the design value (10 mm) of the interval (AA) between adjacent first division lines 104, and cutting is performed on the first division lines 104. The first cutting process is carried out until the first division line 104 located on the outermost lower periphery is reached, forming cutting grooves 130 on all of the first division lines 104. As described above, by performing the first cutting process while indexing in the direction indicated by R1 and the direction indicated by R2 in the figure, using the first division line 104A located in the center as a reference, the accumulation of the first correction value A' is reduced, making it possible to more reliably position the cutting blade 81 within the first division lines 104.

[0068] Furthermore, when performing the second cutting process described above following the first cutting process, if the cutting process is performed by index feeding while correcting the design value (10 mm) of the spacing (BB) between adjacent second division lines 106 using the second correction value B' described above, as shown in Figure 9, the cutting blade 81 is index-feeded and the cutting process is performed using the second division line 106A, which is located in the center in the first direction D1 in the figure, as a reference. As shown in the figure, the position of the second division line 106A, which is located in the center in the first direction D1, can be accurately detected by the alignment marks P3 and P3' detected by the imaging means 10, even if some distortion occurs during the process of generating the semiconductor package substrate 100. Using the coordinates of the alignment marks P3 and P3' as a reference (0 point), the cutting blade 81 of the cutting means 8 can be accurately positioned at the position of the central second division line 106A.

[0069] As described above, once the cutting blade 81 is positioned on the second division line 106A located in the center, the semiconductor package substrate 100 is machined by feeding it in the X-axis direction to form a cutting groove 140 as shown in Figure 9. Then, using this second division line 106A located in the center as a reference, the cutting blade 81 is indexed and fed in the direction indicated by R3 in the figure (upward) in the Y-axis direction, while applying a second correction value B' to the design value (10 mm) of the spacing (BB) between adjacent second division lines 106, and cutting is performed on the second division line 106 until the second division line 106 located on the outermost upper periphery is reached. Furthermore, using the second division line 106A located in the center as a reference, the cutting blade 81 is indexed in the direction indicated by R4 in the figure (downward) while applying the second correction value B' to the design value (10 mm) of the interval (BB) between adjacent second division lines 106, and cutting is performed on the second division line 106. The second cutting process is carried out until the second division line 106 located on the outermost lower periphery is reached, forming cutting grooves 140 on all of the second division lines 106. As described above, by performing the second cutting process while indexing in the direction indicated by R3 and the direction indicated by R4 in the figure, using the second division line 106A located in the center as a reference, the accumulation of the second correction value B' is reduced, making it possible to more reliably position the cutting blade 81 within the second division line 106.

[0070] As described above, by performing cutting on all the first division lines 104 and all the second division lines 106 using the cutting means 8, the semiconductor package substrate 100 is divided into individual device packages 102.

[0071] According to the embodiment described above, even if the semiconductor package substrate 100 is distorted overall and the straightness of the first division line 104 and the second division line 106 is impaired, the problem of the cutting blade 81 coming off the first division line 104 or the second division line 106 and damaging the device package 102 is reliably avoided, and the cutting blade 81 can reliably divide the device package 102 into individual packages. [Explanation of Symbols]

[0072] 1:Cutting device 2: Housing 3: Cassette 3a: Cassette Table 4: Carrying in / out means 5: Temporary table 6: Conveying means 7: Holding means 7a: Chuck table 7b: Clamp 8:Cutting means 81: Cutting blade 81a: Cutting edge 10: Imaging means 12: Washing equipment 13: Washing and conveying means 14:Display means 20: Control means 22: First design value recording unit 24: Second design value recording unit 100: Semiconductor package substrate 102: Device Package 104: First planned division line 106: Second planned division line 110, 110': First side 120, 120': Second side D1: First direction D2: Second direction

Claims

1. A method for dividing a semiconductor package substrate, wherein multiple device packages are separated by a first division line and a second division line perpendicular to the first division line, and the semiconductor package substrate is divided into individual device packages by a cutting blade, A first coordinate recording step involves detecting one alignment mark formed on a first edge that follows a first planned division line of a semiconductor package substrate and recording the first coordinate, A second coordinate recording step involves detecting the other alignment mark formed on the first side and recording the second coordinate, A third coordinate recording step involves detecting the alignment mark at the center of the first and second coordinates and recording the third coordinate, A first distance calculation step for calculating the first distance (α) between the first line connecting the first coordinate and the second coordinate and the third coordinate, A first determination step in which, if the first distance (α) calculated in the first distance calculation step exceeds the value obtained by subtracting the width (w) of the cutting blade (A-w) from the width (A) of the first planned division line, it is determined that division is not possible, and if it does not exceed this value (A-w), it is determined that division is possible. A method for dividing a semiconductor package substrate, comprising: a first cutting step in which, if it is determined in the first determination step that division is possible, the first straight line is positioned in a direction that coincides with the cutting feed direction, and the width (α + w) obtained by adding the width of the cutting blade to the first distance (α) is positioned such that it fits within the width (A) of the first division line at least at the center of the longitudinal direction of the first division line, and the cutting blade is used to cut the first division line.

2. A fourth coordinate recording step involves detecting one alignment mark formed on a second side that follows the second planned division line and recording the fourth coordinate, A fifth coordinate recording step involves detecting the other alignment mark formed on the second side and recording the fifth coordinate, A sixth coordinate recording step involves detecting the alignment mark at the center of the fourth and fifth coordinates and recording the sixth coordinate, A second distance calculation step for calculating the second distance (β) between the second line connecting the fourth coordinate and the fifth coordinate and the sixth coordinate, A second determination step in which, if the second distance (β) calculated in the second distance calculation step exceeds the value obtained by subtracting the width (w) of the cutting blade (B-w) from the width (B) of the second planned division line, it is determined that division is not possible, and if it does not exceed this value (B-w), it is determined that division is possible. A method for dividing a semiconductor package substrate, comprising: a second cutting step in which, if it is determined in the second determination step that division is possible, the second straight line is positioned in a direction that coincides with the cutting feed direction, and the width (β + w) obtained by adding the width of the cutting blade to the second distance (β) is positioned such that it fits within the width (B) of the second division line at least at the center of the longitudinal direction of the second division line, and the second division line is cut with the cutting blade.

3. It comprises a first design value recording unit in which the design values ​​of the width (A) of the first planned division line and the distance (A-A) between adjacent first planned division lines are pre-registered, and a second design value recording unit in which the design values ​​of the width (B) of the second planned division line and the distance (B-B) between adjacent second planned division lines are pre-registered. A first correction value calculation step calculates the actual distance between the first planned division lines adjacent to the first planned division line based on the distance between two points obtained in the fourth coordinate recording step and the fifth coordinate recording step, and obtains a first correction value A' to correct the design value interval (A-A), A second correction value calculation step calculates the actual distance between the second planned division line adjacent to the second planned division line based on the distance between two points obtained by the first coordinate recording step and the second coordinate recording step, and obtains a second correction value (B') to correct the design value interval (B-B), Includes, In the first cutting process, the interval (A-A) of the design values ​​recorded in the first design value recording unit is corrected by the first correction value (A') to relatively index the cutting blade. A method for dividing a semiconductor package substrate according to claim 1 or 2, wherein in the second cutting step, the interval (B-B) of the design value recorded in the second design value recording unit is corrected by the second correction value (B') to relatively index-feed the cutting blade.

4. In the first cutting process, the cutting blade is indexed and fed relative to the central first division line among a plurality of first division lines, A method for dividing a semiconductor package substrate according to claim 3, wherein in the second cutting step, the cutting blade is relatively indexed with respect to the second division line located in the center of a plurality of second division lines.

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