Multilayer ceramic capacitor and method for manufacturing the same

Abstract

Recently, as its application has expanded to the automotive electronics industry, ensuring high reliability that demonstrates stable performance even under harsh operating conditions such as high voltage and high temperature has become essential. [Solution] A multilayer ceramic capacitor and a method for manufacturing the same are provided, comprising a capacitor body including a dielectric layer and an internal electrode layer, and an external electrode disposed on the outside of the capacitor body, wherein the dielectric layer comprises barium (Ba), titanium (Ti), and boron (B), and the dielectric layer comprises a plurality of dielectric crystal grains and grain boundaries disposed between the plurality of dielectric crystal grains, and the average thickness of the grain boundaries is 1 nm to 10 nm.

Description

Technical Field

[0001] The present disclosure relates to a multilayer ceramic capacitor and a method for manufacturing the same.

Background Art

[0002] As electronic components using ceramic materials, there are capacitors, inductors, piezoelectric elements, varistors, or thermistors, etc. Among such ceramic electronic components, multilayer ceramic capacitors (MLCCs) can be used in various electronic devices due to their advantages of being small in size, ensuring high capacitance, and being easy to mount.

[0003] For example, a multilayer ceramic capacitor (MLCC) can be used as a chip-shaped capacitor that is mounted on the substrates of various electronic products such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light emitting diodes (OLEDs) and other video devices, computers, personal mobile terminals, and smartphones, and plays a role in charging or discharging electricity.

[0004] Recently, as the range of use has expanded to the automotive electrical industry, it has become essential to ensure high reliability, which shows stable performance even under severe driving conditions such as high voltage and high temperature.

Summary of the Invention

Problems to be Solved by the Invention

[0005] One embodiment provides a multilayer ceramic capacitor with excellent reliability.

[0006] Another embodiment provides a method for manufacturing the multilayer ceramic capacitor.

Means for Solving the Problems

[0007] One embodiment provides a multilayer ceramic capacitor comprising a capacitor body including a dielectric layer and an internal electrode layer, and an external electrode disposed on the outside of the capacitor body, wherein the dielectric layer comprises barium (Ba), titanium (Ti), and boron (B), and the dielectric layer comprises a plurality of dielectric crystal grains and grain boundaries disposed between the plurality of dielectric crystal grains, and the average thickness of the grain boundaries is 1 nm to 10 nm.

[0008] The standard deviation of the grain boundary thickness may be 0.1 to 1.5, and this standard deviation is obtained by taking the square root of the mean of the squares of the deviations.

[0009] The capacitor body includes an active region in which the dielectric layer and the internal electrode layer are alternately stacked with respect to each other, a cover region in which the dielectric layer is arranged on the upper and lower surfaces of the active region in the stacking direction, and a side margin region in which the dielectric layer is arranged on both opposite ends of the active region in the direction perpendicular to the stacking direction, wherein the boron (B) may be included in at least one of the active region, the cover region, and the side margin region.

[0010] The boron (B) may be present in the dielectric layer in an amount of 0.01 to 5 atomic parts per 100 atomic parts of titanium (Ti).

[0011] The dielectric layer may further contain silicon (Si).

[0012] The silicon (Si) may be present in the dielectric layer in an amount of 0.1 to 5 atomic parts per 100 atomic parts of titanium (Ti).

[0013] The dielectric layer may further contain at least one rare earth element.

[0014] The dielectric layer may further contain dysprosium (Dy) and terbium (Tb).

[0015] The rare earth element may be present in the dielectric layer in an amount of 0.5 to 5 atomic parts per 100 atomic parts of titanium (Ti).

[0016] The aforementioned grain boundaries may contain one or more elements selected from boron (B) and silicon (Si).

[0017] The aforementioned grain boundaries may contain boron (B) and silicon (Si).

[0018] The aforementioned grain boundary may further contain at least one rare earth element.

[0019] The size of the dielectric crystal grains may be 100 nm to 500 nm.

[0020] Another embodiment provides a method for manufacturing a multilayer ceramic capacitor, comprising the steps of: mixing a barium titanate compound and a borosilicate glass to produce a dielectric slurry; producing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on the surface of the dielectric green sheet; stacking the dielectric green sheets on which the conductive paste layer is formed to produce a dielectric green sheet laminate; firing the dielectric green sheet laminate to produce a capacitor body including a dielectric layer and an internal electrode layer; and forming an external electrode on one surface of the capacitor body, wherein the dielectric layer comprises barium (Ba), titanium (Ti), and boron (B), and the dielectric layer comprises a plurality of dielectric grains and grain boundaries disposed between the plurality of dielectric grains, and the average thickness of the grain boundaries is 1 nm to 10 nm.

[0021] The borosilicate glass may contain silicon dioxide (SiO2) and boron oxide (B2O3).

[0022] The borosilicate glass can be mixed such that the boron (B) contained in the borosilicate glass is in an amount of 0.01 part by mole to 10 parts with respect to 100 parts by mole of titanium (Ti) contained in the barium titanate-based compound.

[0023] The dielectric slurry can be produced by further mixing at least one rare earth element-containing compound.

[0024] The rare earth element-containing compound may include a dysprosium (Dy)-containing compound and a terbium (Tb)-containing compound.

Advantages of the Invention

[0025] The multilayer ceramic capacitor according to one embodiment can improve reliability by having a dielectric layer that enables low-temperature firing, is excellent in density, and has a uniform fine structure and uniform grain boundaries.

Brief Description of the Drawings

[0026] [Figure 1] FIG. 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment. [Figure 2] FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor cut along the line I-I' of FIG. 1. [Figure 3] FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor cut along the line II-II' of FIG. 1. [Figure 4] FIG. 4 is a separated perspective view showing the laminated structure of the internal electrode layers in the capacitor body of FIG. 1. [Figure 5] FIG. 5 is a schematic view showing a dielectric layer according to one embodiment. [Figure 6a] FIGS. 6a to 6b are TEM-EDS (transmission electron microscope - energy dispersive spectroscopy) analysis images of the dielectric layer according to Example 2. [Figure 6b]Figures 6a and 6b show TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) analysis images of the dielectric layer according to Example 2. [Figure 7a] Figures 7a and 7b show TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) analysis images of the dielectric layer according to Example 4. [Figure 7b] Figures 7a and 7b show TEM-EDS (transmission electron microscope-energy dispersive spectroscopy) analysis images of the dielectric layer according to Example 4. [Modes for carrying out the invention]

[0027] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings so that they can be easily implemented by a person with ordinary skill in the art to which the present invention pertains. In the drawings, parts that are not necessary for the clear explanation of the present invention have been omitted, and the same or similar components are denoted by the same reference numerals throughout the specification. In addition, some components in the attached drawings are exaggerated, omitted, or shown schematically, and the size of each component does not fully reflect its actual size.

[0028] The accompanying drawings are provided solely to facilitate understanding of the embodiments disclosed herein, and should not be understood as limiting the technical ideas disclosed herein, and should be understood to include any modifications, equivalents, or substitutions that fall within the concept and scope of the invention.

[0029] Terms including ordinal numbers, such as "first," "second," etc., are used to describe various components, but these components are not limited by such terms. These terms are used solely for the purpose of distinguishing one component from others.

[0030] Furthermore, when we say that a layer, membrane, region, plate, or other part is "on top of" another part, this includes not only when it is "directly above" the other part, but also when the other part is in between. Conversely, when we say that one part is "directly above" another part, it means that there is no other part in between. Also, being "on top of" a reference part means being located above or below the reference part, and does not necessarily mean being located "above" in the opposite direction of gravity.

[0031] Throughout the specification, terms such as “includes” or “has” should be understood as indicating the presence of features, figures, steps, actions, components, parts, or combinations thereof described in the specification, without prejudice to the existence or possibility of adding one or more other features, figures, steps, actions, components, parts, or combinations thereof. Therefore, when a part “includes” a component, this does not exclude other components unless otherwise stated, and may further include other components.

[0032] Furthermore, throughout the specification, "on a plane" refers to the view of the part in question from above, and "on a cross-section" refers to the view of the cross-section of the part in question, obtained by cutting it perpendicularly, from the side.

[0033] Furthermore, throughout the specification, the term "connected" does not only mean that two or more components are directly connected, but may also mean that two or more components are indirectly connected through other components, that they are not only physically connected but also electrically connected, or that they are a single unit, even though they are referred to by different names depending on their location or function.

[0034] Furthermore, throughout the specification, when it says "included as a main component," this means that among the at least one component present in a given region, one component has the highest content relative to the total amount of components.

[0035] Hereinafter, a multilayer ceramic capacitor according to one embodiment will be described with reference to Figures 1 to 4.

[0036] Figure 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment; Figure 2 is a cross-sectional view of the multilayer ceramic capacitor cut along the line I-I' in Figure 1; Figure 3 is a cross-sectional view of the multilayer ceramic capacitor cut along the line II-II' in Figure 1; and Figure 4 is a separated perspective view showing the laminated structure of the internal electrode layers in the capacitor body of Figure 1.

[0037] The L-axis, W-axis, and T-axis shown in Figures 1 to 4 represent the length, width, and thickness directions of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) may be perpendicular to the broad surface (main surface) of the sheet-shaped component, and for example, it can be used as the same concept as the stacking direction in which the dielectric layers 111 are stacked. The length direction (L-axis direction) may be approximately perpendicular to the thickness direction (T-axis direction) in the direction extending alongside the broad surface (main surface) of the sheet-shaped component, and for example, it may be the direction in which the first external electrode 131 and the second external electrode 132 are located on both sides. The width direction (W-axis direction) may be approximately perpendicular to the thickness direction (T-axis direction) and the length direction (L-axis direction) in the direction extending alongside the broad surface (main surface) of the sheet-shaped component, and the length in the length direction (L-axis direction) of the sheet-shaped component may be even longer than the length in the width direction (W-axis direction).

[0038] Referring to Figures 1 to 4, a multilayer ceramic capacitor 100 according to one embodiment includes a capacitor body 110 and external electrodes 131 and 132 disposed on the outside of the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed at opposite ends of the capacitor body 110 in the longitudinal direction (L-axis direction).

[0039] The capacitor body 110 may, for example, be approximately hexahedral in shape.

[0040] For the convenience of explaining one embodiment, the two surfaces of the capacitor body 110 that face each other in the thickness direction (T-axis direction) are defined as the first and second surfaces, the two surfaces connected to the first and second surfaces and facing each other in the length direction (L-axis direction) are defined as the third and fourth surfaces, and the two surfaces connected to the first and second surfaces and connected to the third and fourth surfaces and facing each other in the width direction (W-axis direction) are defined as the fifth and sixth surfaces.

[0041] For example, the first surface, which is the bottom surface, may be the surface facing the mounting direction. Also, the first to sixth surfaces may be flat, but this is not the only embodiment. For example, the first to sixth surfaces may be curved surfaces with a convex central portion, and the corners that form the boundaries of each surface may be rounded.

[0042] The shape, size, and number of dielectric layers 111 of the capacitor body 110 are not limited to those shown in the drawings of this embodiment.

[0043] The capacitor body 110 includes a plurality of dielectric layers 111 and internal electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and first internal electrode layers 121 and second internal electrode layers 122 that are alternately arranged in the thickness direction (T-axis direction) with the dielectric layers 111 in between.

[0044] At this time, the boundaries between adjacent dielectric layers 111 of the capacitor body 110 may be so integrated that they are difficult to confirm without using a scanning electron microscope (SEM).

[0045] The capacitor body 110 may include an active region 120 and cover regions 112 and 113.

[0046] The active region 120 is a region in which the dielectric layer 111 and the internal electrode layers 121 and 122 are alternately stacked, and is a part that contributes to the formation of the capacitance of the multilayer ceramic capacitor 100. Specifically, the active region 120 may be a region in which the first internal electrode layer 121 or the second internal electrode layer 122 stacked along the thickness direction (T-axis direction) overlap.

[0047] The cover regions 112 and 113 are thickness-direction margins and can be located on the sides of the first and second surfaces of the active region in the thickness direction (T-axis direction), respectively. Such cover regions 112 and 113 may be formed by a single dielectric layer 111 or by two or more dielectric layers 111 being laminated on the upper and lower surfaces of the active region 120, respectively.

[0048] Furthermore, the capacitor body 110 may also include a side margin region.

[0049] The side margin region is a widthwise margin portion and can be located on both opposite ends of the active region 120 in the widthwise direction (W-axis direction), that is, on the sides of the fifth and sixth surfaces, respectively. The side margin region can be formed by applying a conductive paste layer for the internal electrode layer to the surface of the dielectric green sheet, applying the conductive paste layer only to a portion of the surface of the dielectric green sheet, and then stacking dielectric green sheets without the conductive paste layer on both sides of the surface of the dielectric green sheet, followed by firing, but is not limited to this formation method.

[0050] The cover regions 112, 113 and the side margin regions serve to prevent damage to the internal electrode layers 121, 122 due to physical or chemical stress.

[0051] Dielectric layer The dielectric layer 111 may contain barium (Ba), titanium (Ti), and boron (B).

[0052] The boron (B) contained in the dielectric layer can be present in any region of the capacitor body 110. In other words, boron (B) may be present in at least one of the active region, cover region, and side margin region of the capacitor body 110.

[0053] When the dielectric layer 111 contains barium (Ba), titanium (Ti), and boron (B), low-temperature firing is possible and it has excellent density, thereby ensuring a highly reliable multilayer ceramic capacitor.

[0054] The dielectric layer 111 may further contain silicon (Si).

[0055] Barium (Ba) and titanium (Ti) may be constituent elements of the barium titanate-based compound that forms the main component of the dielectric layer 111.

[0056] Barium titanate-based compounds are dielectric base materials that have a high dielectric constant and contribute to the formation of the dielectric constant of the multilayer ceramic capacitor 100.

[0057] Barium titanate compounds are compounds containing barium (Ba) and titanium (Ti), and may include, for example, BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Ca)O3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, (Ba,Sr)(Ti,Sn)O3, or combinations thereof.

[0058] Boron (B) and silicon (Si) can be derived from borosilicate glass used as a sintering aid during the formation of the dielectric layer 111, for example, as a liquid sintering aid. Borosilicate glass can contain, for example, silicon dioxide (SiO2) and boron oxide (B2O3).

[0059] Borosilicate glass has a low softening point, and as the boron (B) content in the borosilicate glass increases, the densification rate increases and the activation energy decreases. In other words, the low activation energy of borosilicate glass can be used to increase viscous flow and thus increase density. Therefore, when using borosilicate glass as a sintering aid to form a dielectric layer, the softening temperature can be lowered, and the sinterability and wettability with barium titanate-based compounds can be enhanced, thereby lowering the firing temperature and improving the density of the dielectric layer.

[0060] Furthermore, the dielectric layer 111 can be explained with reference to Figure 5.

[0061] Figure 5 is a schematic diagram showing a dielectric layer according to one embodiment.

[0062] Referring to Figure 5, the dielectric layer 111 may include a plurality of dielectric crystal grains 10 and grain boundaries 20 arranged between the plurality of dielectric crystal grains 10.

[0063] In one embodiment, the dielectric layer 111 has a uniform microstructure and uniform grain boundaries, which increases grain boundary resistance and ensures a highly reliable multilayer ceramic capacitor. A uniform microstructure means that the size of the crystal grains 10 is uniform throughout the region. Furthermore, uniform grain boundaries mean that there is no aggregation at the grain boundaries or the grain boundaries are broken, and the thickness of the grain boundaries 20 is uniformly constant.

[0064] When borosilicate glass is used in the formation of the dielectric layer, a high band gap relative to BaTiO3 ensures insulation. Therefore, when borosilicate glass is used as a sintering aid to form the dielectric layer, uniform insulation at the grain boundaries prevents degradation and improves reliability.

[0065] Specifically, the average thickness of the grain boundaries 20 may be 1 nm to 10 nm, for example, 2 nm to 9 nm, or 3 nm to 8 nm. When the average thickness of the grain boundaries 20 is within the above range, a uniform microstructure and uniform grain boundaries are achieved, thereby increasing grain boundary resistance and ensuring a highly reliable multilayer ceramic capacitor.

[0066] The standard deviation of the thickness of the grain boundary 20 may be between 0.1 and 1.5, for example, between 0.2 and 1.4, between 0.3 and 1.3, or between 0.4 and 1.2. When the standard deviation of the thickness of the grain boundary 20 is within the above range, a multilayer ceramic capacitor with high reliability can be ensured by having a uniform microstructure and uniform grain boundaries, thereby increasing the grain boundary resistance.

[0067] The standard deviation (σ) of the grain boundary thickness is obtained by squaring the thickness deviations, summing them up, dividing by the number of measurements, and finding the square root of the result; in other words, it is obtained as the square root of the average of the squares of the thickness deviations, as shown in Equation 1 below.

[0068]

number

[0069] The average thickness and standard deviation of the grain boundaries 20 can be obtained by TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis.

[0070] Specifically, after curing the multilayer ceramic capacitor 100 in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to half a depth in the L-axis direction. After fixing, the capacitor is maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect. Next, the cross-sectional sample can be measured using a transmission electron microscope (TEM) so that at least one dielectric layer and at least one internal electrode layer are visible in the active region. For example, when the active region of the cross-sectional sample is divided into three equal parts, upper, middle, and lower, the TEM can be measured so that at least one dielectric layer and at least one internal electrode layer are visible in each region. The TEM can be measured using a Xe-FIB (focused ion beam) at an acceleration voltage of 200 kV. Next, EDS (energy-dispersive spectroscopy) analysis of the dielectric layer can be performed on the TEM image of the measured cross-sectional sample to confirm the structure of the dielectric crystal grains 10 and grain boundaries 20, and to measure the average thickness and standard deviation of the grain boundaries 20.

[0071] Specifically, the shape of the grain boundaries 20 can be confirmed by mapping silicon (Si), which is easily detected by EDS, among the elements boron (B) and silicon (Si), and the average thickness and standard deviation of the grain boundaries 20 can be measured. For example, when the active region of a cross-sectional sample is divided into three equal parts, upper, middle, and lower, at least four points can be taken at the grain boundaries 20 within the dielectric layer in each region, and the average thickness of the grain boundaries can be obtained by taking the average value of the thickness at at least 12 points in total, and the standard deviation of the thickness at these at least 12 points can be determined.

[0072] Boron (B) may be present in the dielectric layer 111 in an amount of 0.01 to 5 parts per 100 parts of titanium (Ti), for example, 0.05 to 4.8 parts, 0.06 to 4.5 parts, or 0.1 to 4.0 parts. When boron (B) is present in the dielectric layer within the above content range, it is possible to perform low-temperature firing and achieve excellent density, as well as having a uniform microstructure and uniform grain boundaries, thereby increasing grain boundary resistance and improving the reliability of the multilayer ceramic capacitor.

[0073] Silicon (Si) may be present in the dielectric layer 111 in an amount of 0.1 to 5 parts per 100 parts of titanium (Ti), for example, 0.5 to 4.5 parts, or 1 to 4 parts. When silicon (Si) is present in the dielectric layer within the above content range, it is possible to perform low-temperature firing and achieve excellent density, as well as improve the reliability of the multilayer ceramic capacitor by having a uniform microstructure and uniform grain boundaries.

[0074] The dielectric layer 111 may further contain at least one rare earth element.

[0075] Rare earth elements may include, but are not limited to, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Y, etc., and may also include, for example, dysprosium (Dy) and terbium (Tb).

[0076] Rare earth elements may be present in the dielectric layer 111 in amounts of 0.5 to 5 parts per 100 parts of titanium (Ti), for example, in amounts of 1 to 4.8 parts, 1.5 to 4.5 parts, or 2 to 4 parts. When rare earth elements are present in the dielectric layer within these content ranges, the reliability of the multilayer ceramic capacitor can be improved.

[0077] Specifically, the grain boundaries 20 within the dielectric layer 111 may contain one or more elements selected from boron (B) and silicon (Si). For example, the grain boundaries 20 may contain boron (B) and silicon (Si). When one or more elements of boron (B) and silicon (Si) are present in the grain boundaries 20, not only is low-temperature firing possible and excellent density is achieved, but the reliability of the multilayer ceramic capacitor can be improved by having a uniform microstructure and uniform grain boundaries.

[0078] Furthermore, the grain boundary 20 may further contain at least one rare earth element. For example, it may contain, but is not limited to, dysprosium (Dy) and terbium (Tb).

[0079] The components present in the dielectric layer 111 and their content can be obtained by TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis or ICP-OES (inductively coupled plasma spectroscopy) analysis.

[0080] TEM-EDS analysis is performed in the same manner as described above. By analyzing the dielectric layer using EDS on the TEM image of the obtained cross-sectional sample, boron (B), silicon (Si), rare earth elements, etc., can be detected and their content confirmed. For example, the content of these elements can be obtained by dividing the active region of the cross-sectional sample into three equal parts: upper, middle, and lower. Three points are taken within the dielectric layer in each region, and the average value of these nine points can be obtained.

[0081] ICP-OES analysis can be performed by dissolving the dielectric layer of a multilayer ceramic capacitor in a mixed solution of hydrofluoric acid and nitric acid, then diluting the sample approximately 500-fold, and finally measuring it using an AVIO500 (Perkin Elmer) instrument under conditions such as a plasma gas flow of 12 L / min and a plasma RF power of 1400 W.

[0082] For example, boron (B) has atomic number 5, and it can be difficult to detect using EDS analysis, so its elemental content can be measured using ICP-OES analysis.

[0083] The size of the dielectric crystal grains 10 may be 100 nm to 500 nm, for example, 120 nm to 480 nm, 150 nm to 450 nm, 180 nm to 420 nm, or 200 nm to 400 nm. The size of the dielectric crystal grains may also be the average value of the major axis reference diameter and the minor axis reference diameter.

[0084] The size of the dielectric crystal grains 10 can be measured by SEM (scanning electron microscope) analysis.

[0085] Specifically, after curing the multilayer ceramic capacitor 100 in an epoxy mixture, the W-axis and T-axis planes (WT planes) of the capacitor body 110 are polished to half a depth in the L-axis direction. After fixing, the capacitor is maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer 111 and the internal electrode layers 121 and 122 intersect. Next, the cross-sectional sample can be measured using a scanning electron microscope (SEM) so that at least one dielectric layer and one internal electrode layer are visible in the active region. The SEM can be measured under an acceleration voltage of 2kV. The size of the crystal grains can be measured from the obtained SEM image. For example, when the active region of the cross-sectional sample is divided into three equal parts, upper, middle, and lower, the average size of the crystal grains in the dielectric layer can be obtained within an area of ​​5μm × 5μm (width × height) for each region. In this case, the size of a single crystal grain may be the average of the long axis reference diameter and the short axis reference diameter.

[0086] The average thickness (average length in the T-axis direction) of the dielectric layer 111 may be 0.1 μm to 8.0 μm, for example, 0.1 μm to 6.0 μm. When the average thickness of the dielectric layer 111 is within the above range, the reliability of the multilayer ceramic capacitor is excellent.

[0087] The average thickness of the dielectric layer 111 can be measured by ion milling and scanning electron microscope (SEM) analysis after the multilayer ceramic capacitor 100 has been cured in an epoxy mixture, polished, and then ion milled. For example, a Verios G4 product from Thermo Fisher Scientific can be used, with measurement conditions of 10kV and 0.2nA, and an analysis magnification of 100x. The measurement can be performed so that at least one, three, five, or ten dielectric layers 111 are visible. The SEM image may also be used to determine the arithmetic mean of the dielectric layer 111 thickness at 10 points separated by predetermined intervals from the reference point, with the reference point being the center point in the length direction (L-axis direction) or width direction (W-axis direction) of the dielectric layer 111. The spacing between the 10 points can be adjusted by the scale of the scanning electron microscope (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the dielectric layer 111. If none of the 10 points are located within the dielectric layer 111, the position of the reference point can be changed or the spacing between the 10 points can be adjusted.

[0088] internal electrode layer The internal electrode layers 121 and 122, that is, the first internal electrode layer 121 and the second internal electrode layer 122, are electrodes having different polarities, and are arranged alternately facing each other along the T-axis direction with the dielectric layer 111 in between, with one end of each potentially exposed through the third and fourth surfaces of the capacitor body 110.

[0089] The first internal electrode layer 121 and the second internal electrode layer 122 can be electrically insulated from each other by a dielectric layer 111 placed in between them.

[0090] The ends of the first internal electrode layer 121 and the second internal electrode layer 122, which are alternately exposed through the third and fourth surfaces of the capacitor body 110, can be electrically connected to the first external electrode 131 and the second external electrode 132, respectively.

[0091] The internal electrode layers 121 and 122 contain a conductive metal, and may include one or more metals and alloys thereof, such as Ni, Cu, Ag, Pd, and Au.

[0092] Furthermore, the internal electrode layers 121 and 122 may contain dielectric particles with the same composition as the ceramic material contained in the dielectric layer 111.

[0093] The internal electrode layers 121 and 122 may be formed using a conductive paste containing a conductive metal. The conductive paste can be printed using screen printing or gravure printing.

[0094] The average thickness of the internal electrode layers 121 and 122 may be 0.1 μm to 2 μm.

[0095] The average thickness of the internal electrode layers 121 and 122 can be measured by scanning electron microscopy (SEM) analysis. Specifically, using a scanning electron microscopy (SEM) image of a cross-sectional sample obtained in the same manner as the method for measuring the average thickness of the dielectric layer 111, the average thickness of the internal electrode layers 121 and 122 can be determined by using the arithmetic mean of the thicknesses of the internal electrode layers 121 and 122 at 10 points separated by a predetermined interval from the reference point, with the reference point being the central point in the length direction (L-axis direction) or width direction (W-axis direction) of the internal electrode layers 121 and 122. The interval between the 10 points can be adjusted by the scale of the scanning electron microscopy (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the internal electrode layers 121 and 122. If all 10 points are not located within the internal electrode layers 121 and 122, the position of the reference point can be changed or the interval between the 10 points can be adjusted.

[0096] The capacitor body 110 may be formed by firing a laminate in which multiple dielectric layers 111 and internal electrode layers 121 and 122 are stacked.

[0097] external electrode External electrodes 131 and 132, namely the first external electrode 131 and the second external electrode 132, are supplied with voltages of different polarities from each other and can be electrically coupled by connecting to the exposed portions of the first internal electrode layer 121 and the second internal electrode layer 122, respectively.

[0098] With the above configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge is accumulated between the first internal electrode layer 121 and the second internal electrode layer 122, which face each other. At this time, the capacitance of the multilayer ceramic capacitor 100 becomes proportional to the overlapping area of ​​the first internal electrode layer 121 and the second internal electrode layer 122, which overlap each other along the T-axis in the active region.

[0099] The first external electrode 131 and the second external electrode 132 are arranged on the third and fourth surfaces of the capacitor body 110, respectively, and may include first and second connecting portions that connect to the first internal electrode layer 121 and the second internal electrode layer 122, and first and second band portions that are arranged at the corners where the third and fourth surfaces of the capacitor body 110 meet the first and second surfaces or the fifth and sixth surfaces.

[0100] The first and second band portions can extend to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 at the first and second connection portions, respectively. The first and second band portions can serve to improve the adhesion strength of the first external electrode 131 and the second external electrode 132.

[0101] The external electrodes 131 and 132 may include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer positioned to cover the sintered metal layer, and a plating layer positioned to cover the conductive resin layer.

[0102] The sintered metal layer may also contain conductive metal and glass.

[0103] The conductive metal may include copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), alloys thereof, or combinations thereof. For example, copper (Cu) may include copper (Cu) alloys. If the conductive metal includes copper, other metals may be included in amounts of 5 moles or less per 100 moles of copper.

[0104] The glass may contain a composition of mixed oxides, for example, one or more selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal is selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni); the alkali metal is selected from the group consisting of lithium (Li), sodium (Na), and potassium (K); and the alkaline earth metal is one or more selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0105] Selectively, the conductive resin layer may be formed on a sintered metal layer, for example, in a manner that completely covers the sintered metal layer. On the other hand, the first external electrode 131 and the second external electrode 132 may not include a sintered metal layer, in which case the conductive resin layer may be in direct contact with the capacitor body 110.

[0106] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, and the length of the region (i.e., the band portion) in which the conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 may be longer than the length of the region (i.e., the band portion) in which the sintered metal layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. In other words, the conductive resin layer may be formed on the sintered metal layer and may be formed in a manner that completely covers the sintered metal layer.

[0107] The conductive resin layer contains a resin and a conductive metal.

[0108] The resin contained in the conductive resin layer is not particularly limited as long as it has bonding properties and shock absorption and is mixed with conductive metal powder to make a paste, and may include, for example, phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.

[0109] The conductive metal contained in the conductive resin layer serves to electrically connect with the internal electrode layers 121, 122, or the sintered metal layer.

[0110] The conductive metal contained in the conductive resin layer may be spherical, flake-shaped, or a combination thereof. In other words, the conductive metal may consist solely of flake-shaped metal, solely of spherical metal, or a mixture of flake-shaped and spherical metal.

[0111] Here, "spherical" may include forms that are not perfectly spherical, for example, forms in which the ratio of the length of the long axis to the short axis (long axis / short axis) is 1.45 or less. "Flake-shaped powder" means powder having a flat, elongated shape and is not particularly limited, but for example, the ratio of the length of the long axis to the short axis (long axis / short axis) may be 1.95 or more.

[0112] The external electrodes 131 and 132 may further include a plating layer located on the outside of the conductive resin layer.

[0113] The plating layer may consist of nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb), either alone or in alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or a nickel (Ni) plating layer and a tin (Sn) plating layer stacked sequentially, or a tin (Sn) plating layer, a nickel (Ni) plating layer, and a tin (Sn) plating layer stacked sequentially. The plating layer may also consist of multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers.

[0114] The plating layer can improve the mountability of the multilayer capacitor 100 on the substrate, structural reliability, durability against external elements, heat resistance, and equivalent series resistance (ESR).

[0115] Manufacturing method for multilayer ceramic capacitors The following describes a method for manufacturing a multilayer ceramic capacitor 100 according to one embodiment.

[0116] A multilayer ceramic capacitor 100 according to one embodiment can be manufactured by the following steps: mixing a barium titanate compound and a borosilicate glass to produce a dielectric slurry; producing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on the surface of the dielectric green sheet; laminating the dielectric green sheets on which the conductive paste layer is formed to produce a dielectric green sheet laminate; firing the dielectric green sheet laminate to produce a capacitor body including a dielectric layer and an internal electrode layer; and forming an external electrode on one surface of the capacitor body.

[0117] Barium titanate compounds are compounds containing barium (Ba) and titanium (Ti), and may include, for example, BaTiO3, Ba(Ti,Zr)O3, Ba(Ti,Sn)O3, (Ba,Ca)TiO3, (Ba,Ca)(Ti,Ca)O3, (Ba,Ca)(Ti,Zr)O3, (Ba,Ca)(Ti,Sn)O3, (Ba,Sr)TiO3, (Ba,Sr)(Ti,Zr)O3, (Ba,Sr)(Ti,Sn)O3, or combinations thereof.

[0118] Borosilicate glass can be used as a liquid sintering aid.

[0119] Borosilicate glass may contain silicon dioxide (SiO2) and boron oxide (B2O3). In other words, borosilicate glass may contain elements of silicon (Si) and boron (B).

[0120] By using borosilicate glass, the softening temperature can be lowered, and the sinterability and wettability with barium titanate-based compounds can be enhanced, thereby lowering the firing temperature and forming a dielectric layer with improved density.

[0121] Borosilicate glass can be mixed with a barium titanate compound in such a way that the boron (B) content in the borosilicate glass is 0.01 to 10 parts per 100 parts of titanium (Ti) contained in the barium titanate compound. For example, borosilicate glass can be mixed with a boron (B) content of 0.05 to 9 parts, or 0.1 to 8 parts per 100 parts of titanium (Ti). When borosilicate glass is mixed within the above content range, it is possible to perform low-temperature firing and achieve excellent density, as well as to form a dielectric layer with a uniform microstructure and uniform grain boundaries, thereby improving the reliability of multilayer ceramic capacitors.

[0122] The dielectric slurry can be produced by further mixing at least one rare earth element-containing compound.

[0123] The rare earth element-containing compound may be a compound containing rare earth elements such as La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, and Y, and may include, for example, dysprosium (Dy)-containing compounds and terbium (Tb)-containing compounds.

[0124] The rare earth element-containing compound may be mixed in an amount of 0.5 to 5 parts per 100 parts of the barium titanate-based compound, for example, 1 to 4 parts. When the rare earth element-containing compound is mixed within the above content range, a highly reliable multilayer ceramic capacitor can be obtained.

[0125] The rare earth element-containing compound may be an oxide, nitrate, or salt compound of a rare earth element, or a compound in sol form dispersed in an organic solvent.

[0126] Dielectric slurry can be manufactured by further mixing a solvent with additives such as dispersants, binders, plasticizers, lubricants, and antistatic agents.

[0127] The dispersant may include, for example, a phosphate ester-based dispersant, a polycarboxylic acid-based dispersant, or a combination thereof. The dispersant may be mixed in an amount of 0.1 to 5 parts by weight per 100 parts by weight of the barium titanate compound, for example, 0.3 to 3 parts by weight. When the dispersant is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0128] The binder may be, for example, an acrylic resin, a polyvinyl butyl resin, a polyvinyl acetal resin, or an ethyl cellulose resin. The binder may be added in an amount of 0.1 to 50 parts by weight per 100 parts by weight of the barium titanate compound, for example, 3 to 30 parts by weight. When the binder is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0129] The plasticizer may be, for example, phthalate compounds such as dioctyl phthalate, benzyl butyl phthalate, dibutyl phthalate, dihexyl phthalate, di(2-ethylhexyl) phthalate, and di(2-ethylbutyl) phthalate; adipic acid compounds such as dihexyl adipic acid and di(2-ethylhexyl) adipic acid; glycol compounds such as ethylene glycol, diethylene glycol, and triethylene glycol; or glycol ester compounds such as triethylene glycol dibutyrate, triethylene glycol di(2-ethylbutyrate), and triethylene glycol di(2-ethylhexanoate). The plasticizer may be added in an amount of 0.1 to 20 parts by weight per 100 parts by weight of the barium titanate compound, for example, 1 to 10 parts by weight. When the plasticizer is mixed within the above content range, the dispersibility of the dielectric slurry is excellent, and the amount of impurities contained in the manufactured dielectric layer can be reduced.

[0130] The solvent may be an aqueous solvent such as water; an alcohol solvent such as ethanol, methanol, benzyl alcohol, or methoxyethanol; a glycol solvent such as ethylene glycol or diethylene glycol; a ketone solvent such as acetone, methyl ethyl ketone, methyl isobutyl ketone, or cyclohexanone; an ester solvent such as butyl acetate, ethyl acetate, carbitol acetate, or butyl carbitol acetate; an ether solvent such as methyl cellosolve, ethyl cellosolve, butyl ether, or tetrahydrofuran; or an aromatic solvent such as benzene, toluene, or xylene. The solvent can be an alcohol or aromatic solvent, for example, considering the solubility and dispersibility of the various additives contained in the dielectric slurry. The solvent may be mixed in an amount of 50 to 1000 parts by weight per 100 parts by weight of the barium titanate compound, for example, 100 to 500 parts by weight. When the solvent is mixed within the above content range, the dielectric slurry components may be thoroughly mixed, and the solvent can be easily removed thereafter.

[0131] The aforementioned dielectric slurry can be mixed using a wet ball mill or a stirring mill. When using zirconia balls in a wet ball mill, a large number of zirconia balls with diameters of 0.1 mm to 10 mm can be used for wet mixing for 8 to 48 hours, or 10 to 24 hours.

[0132] The manufactured dielectric slurry is formed into the dielectric layer after firing.

[0133] Methods for forming the manufactured dielectric slurry into a sheet shape include tape molding methods such as the doctor blade method and the calender roll method, or, for example, an on-roll molding coater with a head discharge system. By drying the molded body thereafter, a dielectric green sheet can be obtained.

[0134] To form a conductive paste layer that will become the internal electrode layer after firing, a conductive paste can be manufactured by mixing conductive powder made of a conductive metal or an alloy thereof, a binder, and a solvent. Additionally, barium titanate powder may be mixed in as a co-material if necessary. The co-material can suppress the sintering of the conductive powder during the firing process. The conductive paste layer is then formed by applying the conductive paste in a predetermined pattern to the surface of a dielectric green sheet using various printing or transfer methods, such as screen printing.

[0135] The conductive powder may contain nickel (Ni) or a nickel (Ni) alloy.

[0136] Next, a dielectric green sheet laminate is manufactured by stacking multiple dielectric green sheets with internal electrode patterns formed on them, and then pressing them in the stacking direction. At this time, dielectric green sheets and internal electrode layer patterns can be stacked such that dielectric green sheets are positioned on the upper and lower surfaces of the dielectric green sheet laminate in the stacking direction.

[0137] The step of cutting the manufactured dielectric green sheet laminate to a predetermined size by dicing or other means can be selectively performed.

[0138] Furthermore, the dielectric green sheet laminate can be solidified and dried to remove plasticizers and other substances as needed, and after solidification and drying, it can be barrel polished using a horizontal centrifugal barrel polishing machine or the like. In barrel polishing, the dielectric green sheet laminate is placed in a barrel container along with media and polishing fluid, and unwanted parts such as burrs generated during cutting can be polished off by applying rotational motion or vibration to the barrel container. After barrel polishing, the dielectric green sheet laminate can be washed with a cleaning solution such as water and then dried.

[0139] Next, the dielectric green sheet laminate can be debindered (plasticized) and fired to manufacture a capacitor body.

[0140] The debinding treatment conditions can be appropriately adjusted depending on the composition of the dielectric layer and the internal electrode layer. For example, the heating rate during debinding may be 5°C / hour to 300°C / hour, the support temperature may be 180°C to 400°C, and the temperature maintenance time may be 0.5 hours to 24 hours. The atmosphere during debinding may be air or a reducing atmosphere.

[0141] The firing conditions can be appropriately adjusted depending on the main component composition of the dielectric layer and the internal electrode layer. For example, firing may be carried out at a temperature of 1100°C to 1400°C, or for example, at a temperature of 1200°C to 1350°C. Furthermore, firing may be carried out for 0.5 hours to 8 hours, for example, 1 hour to 3 hours. Also, firing may be carried out in a reducing atmosphere, for example, a humidified atmosphere of a mixed gas of nitrogen and hydrogen, or for example, under conditions of a hydrogen concentration of 1.0% or less. If the internal electrode layer contains nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere should be 1.0 × 10⁻⁶ -14 MPa or 1.0 × 10 -10 MPa is also acceptable.

[0142] After firing, annealing can be performed as needed. Annealing is a process to re-oxidize the dielectric layer, and it can be performed when firing is carried out in a reducing atmosphere. The conditions for the annealing process can also be appropriately adjusted depending on the composition of the dielectric layer. For example, the temperature during annealing may be 950°C to 1150°C, the time may be 0 to 20 hours, and the heating rate may be 50°C / hour to 500°C / hour. The annealing atmosphere may be a humidified nitrogen gas (N2) atmosphere, and the oxygen partial pressure may be 1.0 × 10⁻⁶ -9 MPa or 1.0 × 10 -5 MPa is also acceptable.

[0143] For humidifying nitrogen gas or mixed gases during debinding, calcination, or annealing, a wetter, for example, can be used, in which case the water temperature may be between 5°C and 75°C. Debinding, calcination, and annealing can be performed continuously or independently.

[0144] Selectively, the third and fourth surfaces of the manufactured capacitor body 110 can be subjected to surface treatments such as sandblasting, laser irradiation, and barrel polishing. By performing such surface treatments, the edges of the first and second internal electrode layers may be exposed on the outermost surfaces of the third and fourth surfaces, thereby improving the electrical connection between the first and second external electrodes and the first and second internal electrode layers, and potentially facilitating the formation of alloy parts.

[0145] Next, an external electrode is formed on one surface of the manufactured capacitor body 110.

[0146] For example, a sintered metal layer can be formed by applying a paste for forming a sintered metal layer with an external electrode and then sintering it.

[0147] The paste for forming a sintered metal layer may contain a conductive metal and glass. The explanation of the conductive metal and glass is the same as described above, so a repetition of the explanation will be omitted. The paste for forming a sintered metal layer may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. Binders can be, for example, ethyl cellulose, acrylic, butyral, etc., and solvents can be, for example, organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, or aqueous solvents.

[0148] Methods for applying the sintered metal layer-forming paste to the outer surface of the capacitor body 110 include various printing methods such as dipping and screen printing, application methods using dispensers, and spraying methods using sprayers. The sintered metal layer-forming paste may be applied to at least the third and fourth surfaces of the capacitor body 110, and may also be applied selectively to a portion of the first, second, fifth, or sixth surfaces where the band portions of the first and second external electrodes are formed.

[0149] Subsequently, the capacitor body 110 coated with the paste for forming a sintered metal layer is dried and then fired at a temperature of 700°C to 1000°C for 0.1 to 3 hours to form a sintered metal layer.

[0150] Selectively, a conductive resin layer-forming paste can be applied to the outer surface of the obtained capacitor body 110, and then cured to form a conductive resin layer.

[0151] The paste for forming a conductive resin layer may contain a resin and, selectively, a conductive metal or a non-conductive filler. The explanation of conductive metals and resins is the same as described above, so a repetition of the explanation will be omitted. The paste for forming a conductive resin layer may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. Binders can be, for example, ethyl cellulose, acrylic, butyral, etc., and solvents can be organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, toluene, or aqueous solvents.

[0152] As an example, the conductive resin layer can be formed by dipping the capacitor body 110 into a conductive resin layer forming paste and then curing it, printing the conductive resin layer forming paste onto the surface of the capacitor body 110 using a screen printing method or gravure printing method, or applying the conductive resin layer forming paste to the surface of the capacitor body 110 and then curing it.

[0153] Next, a plating layer is formed on the outside of the conductive resin layer.

[0154] For example, the plating layer may be formed by a plating method, or by sputtering or electroplating (electric deposition).

[0155] The implementation examples described above will be explained in more detail below through the examples provided. However, the following examples are for illustrative purposes only and do not limit the scope of rights.

[0156] (Manufacturing of multilayer ceramic capacitors) Examples 1 to 6 BaC O3 A BaTiO3 compound was prepared by mixing powder and TiO2 powder (Ba / Ti molar ratio 1.0067). A dielectric slurry was prepared by mixing the prepared BaTiO3 compound, borosilicate glass containing SiO2 and B2O3, and Dy2O3 and Tb4O7. At this time, the borosilicate glass was mixed so that the amount of B contained in the borosilicate glass was as shown in Table 1 below, per 100 moles of Ti. In addition, Dy2O3 and Tb4O7 were mixed in amounts of 1 mole and 0.05 moles, respectively, per 100 moles of the BaTiO3 compound.

[0157] The mixing during dielectric slurry manufacturing involves zirconia balls (ZrO -2 The process involved using balls as a dispersion medium, adding ethanol / toluene, a wetting dispersant, and polyvinyl butyral (PVB) resin as a binder, and then mechanically milling the mixture.

[0158] Dielectric green sheets were manufactured using a head-dispensing type on-roll molding coater with the manufactured dielectric slurry.

[0159] A dielectric green sheet laminate was manufactured by printing a conductive paste layer containing nickel (Ni) onto the surface of a dielectric green sheet, and then laminating and pressing the dielectric green sheets with the conductive paste layer formed on them.

[0160] The dielectric green sheet laminate was subjected to a plasticizing process at a temperature of 400°C or lower and in a nitrogen atmosphere, followed by firing at a firing temperature of 1300°C or lower and a hydrogen concentration of 1.0%H2 or lower.

[0161] Next, multilayer ceramic capacitors were manufactured through processes such as external electrode assembly and plating.

[0162] Comparative Example 1 A multilayer ceramic capacitor was manufactured in the same manner as in Example 1, except that borosilicate glass was not used.

[0163] In Table 1 below, the B content is shown based on 100 moles of Ti.

[0164] [Table 1]

[0165] Evaluation 1: Analysis of ICP-OES The dielectric layers of the multilayer ceramic capacitors manufactured in Examples 1 to 6 and Comparative Example 1 were subjected to ICP-OES (inductively coupled plasma spectroscopy) analysis using the method described below, and the content of the detected elements was measured. The results are shown in Table 2 below.

[0166] After dissolving the dielectric layer in a mixed solution of hydrofluoric acid and nitric acid, the sample was diluted approximately 500 times to obtain a sample. The sample was then measured using an AVIO500 (Perkin Elmer) under conditions of plasma gas flow of 12 L / min and plasma RF power of 1400 W.

[0167] In Table 2 below, the content of each element is shown based on 100 atomic parts of Ti.

[0168] [Table 2]

[0169] Table 2 shows that the dielectric layers of Examples 1 to 6, formed using borosilicate glass, contain elements Ba, Ti, and B, with element B present in an amount of 0.01 to 5 parts per 100 parts of Ti. In contrast, element B is not detected in the dielectric layer of Comparative Example 1, which was formed without using borosilicate glass.

[0170] Evaluation 2: TEM-EDS analysis The dielectric layers of the multilayer ceramic capacitors manufactured in Examples 2 and 4 were subjected to TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis using the method described below to measure the average thickness and standard deviation of the grain boundaries. The results are shown in Figures 6a to 6b and Table 3 below.

[0171] After curing each multilayer ceramic capacitor in an epoxy mixture, the W-axis and T-axis planes (WT planes) of the capacitor body were polished to half a depth in the L-axis direction. After fixing, the capacitors were maintained in a vacuum atmosphere chamber to obtain cross-sectional samples that allowed observation of the active region where the dielectric layer and the internal electrode layer intersected. Next, the active region of the cross-sectional sample was divided into three equal parts: upper, middle, and lower. In each region, TEM measurements were taken to ensure that at least one dielectric layer and one internal electrode layer were visible. TEM measurements were performed using a Xe-FIB (focused ion beam) under an acceleration voltage of 200 kV. Next, EDS (energy-dispersive spectroscopy) analysis was performed on the dielectric layer of the measured cross-sectional samples to confirm the structure of the dielectric grains and grain boundaries through silicon (Si) element mapping, and the average thickness of the grain boundaries was measured. The average thickness was calculated by dividing the active region of the cross-sectional sample into three equal parts: upper, middle, and lower. Four points were taken at the grain boundaries within the dielectric layer in each region, for a total of 12 points. The average thickness was then calculated, and the standard deviation of the thicknesses at these 12 points was determined. The standard deviation was calculated as the square root of the mean of the squares of the deviations.

[0172] Figures 6a to 6b show TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis images of the dielectric layer according to Example 2, and Figures 7a to 7b show TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis images of the dielectric layer according to Example 4.

[0173] Referring to Figures 6a to 7b, in Examples 2 and 4, the structure of dielectric grains and grain boundaries within the dielectric layer in the central part of the active region is shown through the mapping of Si elements, and four points are displayed for determining the average thickness of the grain boundaries.

[0174] [Table 3]

[0175] From Table 3 above, it can be confirmed that in Example 2, the average thickness of the grain boundaries is 3.58 nm and the standard deviation of the thickness is 1.04, and in Example 4, the average thickness of the grain boundaries is 6.58 nm and the standard deviation of the thickness is 0.54. From this, it can be seen that the dielectric layer according to one embodiment has grain boundaries of uniform thickness without being broken at predetermined thicknesses.

[0176] Evaluation 3: Sintered body properties The densification start temperature and sintering density were measured for the sintered body during the manufacturing of the multilayer ceramic capacitors according to Examples 1 to 6 and Comparative Example 1 using the method described below, and the results are shown in Table 4 below. The sintered body is a structure obtained after firing a dielectric green sheet laminate.

[0177] The densification start temperature was determined by measuring the density of the sintered body at its firing temperature, and it was defined as the firing start temperature at which density is achieved.

[0178] Sintering density indicates the density of the sintered body.

[0179] Table 4 below confirms that in Examples 1 to 6, the densification start temperature is lower and the sintering density is higher compared to Comparative Example 1.

[0180] Rating 4: Reliability The accelerated lifetime reliability (MTTF) was measured for the multilayer ceramic capacitors according to Examples 1 to 6 and Comparative Example 1 using the method described below, and the results are shown in Table 4.

[0181] The mean time to failure (MTTF) was measured by step IR measurement under the conditions of 150°C temperature, 50V voltage per 1 μm thickness of the dielectric layer, and 10 hours, and the mean time to failure (hr) was determined.

[0182] In Table 4 below, the MTTF values ​​are shown as ratios based on the results from Example 2.

[0183] Table 4 below confirms that Examples 1 to 6 exhibit superior reliability compared to Comparative Example 1. This demonstrates that the reliability of multilayer ceramic capacitors can be improved by having a dielectric layer that is capable of low-temperature firing and has excellent density, according to one embodiment.

[0184] [Table 4]

[0185] Although preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and can be implemented in various ways within the scope of the claims, description of the invention, and attached drawings, and these also naturally fall within the scope of the present invention. [Explanation of Symbols]

[0186] 10: Dielectric crystal grain 20: Grain boundary 100: Multilayer ceramic capacitor 110: Capacitor body 111: Dielectric layer 121: First internal electrode layer 122: Second internal electrode layer 131: 1st external electrode 132:Second external electrode

Claims

1. A capacitor body including a dielectric layer and an internal electrode layer, and Includes external electrodes positioned outside the capacitor body, The dielectric layer comprises barium (Ba), titanium (Ti), and boron (B). The dielectric layer includes a plurality of dielectric crystal grains and grain boundaries arranged between the plurality of dielectric crystal grains. A multilayer ceramic capacitor in which the average thickness of the aforementioned grain boundaries is 1 nm to 10 nm.

2. The standard deviation of the thickness of the aforementioned grain boundaries is 0.1 to 1.

5. The multilayer ceramic capacitor according to claim 1, wherein the standard deviation is obtained by taking the square root of the mean of the squares of the deviations.

3. The capacitor body is An active region in which the dielectric layer and the internal electrode layer are alternately stacked with respect to each other, The dielectric layer is arranged in a cover region on the upper and lower surfaces of the active region in the stacking direction, The dielectric layer includes side margin regions arranged at the mutually opposing ends of the active region in a direction perpendicular to the stacking direction, The multilayer ceramic capacitor according to claim 1, wherein the boron (B) is included in at least one of the active region, the cover region, and the side margin region.

4. The multilayer ceramic capacitor according to claim 1, wherein the boron (B) is contained in the dielectric layer in an amount of 0.01 to 5 atomic parts per 100 atomic parts of titanium (Ti).

5. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer further comprises silicon (Si).

6. The multilayer ceramic capacitor according to claim 5, wherein the silicon (Si) is contained in the dielectric layer in an amount of 0.1 to 5 atoms per 100 atoms of titanium (Ti).

7. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer further comprises at least one rare earth element.

8. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer further comprises dysprosium (Dy) and terbium (Tb).

9. The multilayer ceramic capacitor according to claim 7, wherein the rare earth element is contained in the dielectric layer in an amount of 0.5 to 5 atomic parts per 100 atomic parts of titanium (Ti).

10. The multilayer ceramic capacitor according to claim 1, wherein the grain boundaries include one or more elements selected from boron (B) and silicon (Si).

11. The multilayer ceramic capacitor according to claim 1, wherein the grain boundaries include boron (B) and silicon (Si).

12. The multilayer ceramic capacitor according to claim 10, wherein the grain boundary further comprises at least one rare earth element.

13. The multilayer ceramic capacitor according to claim 1, wherein the size of the dielectric crystal grains is 100 nm to 500 nm.

14. The steps include: preparing a dielectric slurry by mixing a barium titanate compound and a borosilicate glass; The steps include: manufacturing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on the surface of the dielectric green sheet; The steps include: manufacturing a dielectric green sheet laminate by stacking dielectric green sheets on which the conductive paste layer is formed; The steps include: firing the dielectric green sheet laminate to manufacture a capacitor body including a dielectric layer and an internal electrode layer; The step includes forming an external electrode on one surface of the capacitor body, The dielectric layer comprises barium (Ba), titanium (Ti), and boron (B). A method for manufacturing a multilayer ceramic capacitor, wherein the dielectric layer includes a plurality of dielectric crystal grains and grain boundaries arranged between the plurality of dielectric crystal grains, and the average thickness of the grain boundaries is 1 nm to 10 nm.

15. The borosilicate glass is made of silicon dioxide (SiO ２ ) and boron oxide (B2O ３ A method for manufacturing a multilayer ceramic capacitor according to claim 14, comprising )

16. The method for manufacturing a multilayer ceramic capacitor according to claim 14, wherein the borosilicate glass is mixed in such an amount that the boron (B) contained in the borosilicate glass is 0.01 moles to 10 moles per 100 moles of titanium (Ti) contained in the barium titanate compound.

17. The method for manufacturing a multilayer ceramic capacitor according to claim 14, wherein the dielectric slurry is further manufactured by mixing at least one rare earth element-containing compound.

18. The method for manufacturing a multilayer ceramic capacitor according to claim 17, wherein the rare earth element-containing compound includes a dysprosium (Dy)-containing compound and a terbium (Tb)-containing compound.

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