Printed circuit board

Abstract

To provide a printed circuit board that can realize circuits with fine line widths and spacing. [Solution] One embodiment of the present invention provides a printed circuit board comprising: a first insulating layer having a first surface and a second surface facing each other in the thickness direction; a conductive via disposed in a through hole formed in the thickness direction in the first insulating layer; and a first pad disposed on the first surface side of the first insulating layer and including a first conductor layer and a first conductor layer disposed on the first conductor layer and the conductive via, wherein the conductive via is configured to protrude further outward from the first surface of the first insulating layer than the first conductor layer.

Description

Technical Field

[0001] The present invention relates to a printed circuit board.

Background Art

[0002] Recently, in order to cope with the trend of weight reduction and miniaturization of mobile devices, there is an increasingly high need to achieve weight reduction and thinning in the printed circuit boards mounted on them. On the other hand, as mobile devices are made lighter and thinner, an undercut phenomenon occurs during the process of realizing fine circuits, which may cause defects in the fine circuits. In response to the technical requirements for this, research has continued to improve reliability while realizing circuits with fine line widths and intervals.

Summary of the Invention

Problems to be Solved by the Invention

[0003] One object of the present invention is to provide a printed circuit board capable of realizing a circuit with fine line width and interval.

Means for Solving the Problems

[0004] As a method for solving the above problems, through an example, a novel structure of a printed circuit board is proposed. Specifically, a first insulating layer having a first surface and a second surface facing each other in the thickness direction, a conductive via disposed in a through hole formed in the thickness direction in the first insulating layer, and a first pad disposed on the first surface side of the first insulating layer and including a first conductor layer and a second conductor layer disposed on the first conductor layer and on the conductive via, wherein the conductive via protrudes from the first surface outside the first insulating layer more than the first conductor layer.

[0005]

[0006] ​In one embodiment, the second conductor layer may have a shape in which the region corresponding to the conductive via protrudes.

[0007] In one embodiment, an internal conductor layer may be further included, disposed between the inner wall of the through-hole and the conductive via.

[0008] In one embodiment, the conductive via may be configured to protrude beyond the first surface to the outside of the first insulating layer, beyond the internal conductor layer.

[0009] In one embodiment, the internal conductor layer can form an interface with the first conductor layer and come into contact with it.

[0010] In one embodiment, the inner conductor layer can form an interface with the second conductor layer and come into contact with it.

[0011] In one embodiment, the side surface of the inner conductor layer can come into contact with the side surface of the first conductor layer.

[0012] In one embodiment, the upper surface of the inner conductor layer and the upper surface of the first conductor layer can be coplane.

[0013] In one embodiment, the upper surface of the inner conductor layer and the upper surface of the first conductor layer can come into contact with the lower surface of the second conductor layer.

[0014] In one embodiment, the internal conductor layer does not need to cover the upper surface of the first conductor layer.

[0015] In one embodiment, the internal conductor layer includes a first and a second internal conductor layer, and the first internal conductor layer can be positioned closer to the inner wall of the through hole than the second internal conductor layer.

[0016] In one embodiment, the conductive via may be configured to protrude further from the first surface to the outside of the first insulating layer than the first and second internal conductor layers.

[0017] In one embodiment, the thickness of the first conductor layer may be 0.5 μm or more and 2 μm or less.

[0018] In one embodiment, the distance by which the through-hole of the first insulating layer in the first pad protrudes in the lateral direction may be 25 μm or less. [Effect of the Invention]

[0019] In the case of a printed circuit board according to an example of the present invention, a circuit with a finely realized line width and interval can be provided. [Brief Description of the Drawings]

[0020] [Figure 1] It is a block diagram schematically showing an example of an electronic device system. [Figure 2] It is a perspective view schematically showing an example of an electronic device. [Figure 3] It is a cross-sectional view schematically showing an example of a printed circuit board. [Figure 4] It is an enlarged view showing a partial area (A) of FIG. 3. [Figure 5] It is a cross-sectional view schematically showing another example of a printed circuit board. <000P083> [Figure 6] An example of a method for manufacturing a printed circuit board is shown. [Figure 7] An example of a method for manufacturing a printed circuit board is shown. [Figure 8] An example of a method for manufacturing a printed circuit board is shown. [Figure 9] An example of a method for manufacturing a printed circuit board is shown. <000C092>An example of a method for manufacturing a printed circuit board is shown. [Figure 11] An example of a method for manufacturing a printed circuit board is shown. [Figure 12] An example of a method for manufacturing a printed circuit board is shown. [Figure 13] An example of a method for manufacturing a printed circuit board is shown. [Figure 14] An example of a method for manufacturing a printed circuit board is shown. [Modes for carrying out the invention]

[0021] Embodiments of the present invention will be described below with reference to specific embodiments and accompanying drawings. However, embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, embodiments of the present invention are provided to give a more complete explanation of the present invention to a person of ordinary skill. Accordingly, the shapes and sizes of elements in the drawings may be exaggerated for clearer explanation, and elements indicated by the same reference numerals in the drawings are the same elements.

[0022] electronic equipment Figure 1 is a block diagram illustrating an example of an electronic equipment system.

[0023] Referring to the drawing, the electronic device 1000 houses the main board 1010. The main board 1010 is physically and / or electrically connected to chip-related components 1020, network-related components 1030, and other components 1040, etc. These are also coupled with other electronic components, which will be described later, to form various signal lines 1090.

[0024] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPUs), graphics processors (e.g., GPUs), digital signal processors, cryptographic processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Furthermore, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may also be in the form of a package containing the aforementioned chips and electronic components.

[0025] The network-related component 1030 includes, but is not limited to, any other wireless and wired protocols designated as Wi-Fi (IEEE 802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth®, 3G, 4G, 5G, and later. It may also include any other diverse wireless or wired standards and protocols. Furthermore, the network-related component 1030 may be combined with the chip-related component 1020.

[0026] Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCCs (low-temperature co-firing ceramics), EMI (electromagnetic interference) filters, and MLCCs (multi-layer ceramic capacitors). However, they are not limited to these, and may also include passive elements in the form of chip components used for various other applications. Furthermore, other components 1040 may be combined with chip-related components 1020 and / or network-related components 1030.

[0027] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that are physically and / or electrically connected to the main board 1010 or not. Examples of other electronic components include, but are not limited to, audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), CDs (compact disks), DVDs (digital versatile disks), etc. In addition to these, depending on the type of electronic device 1000, other electronic components used for various purposes may also be included.

[0028] The electronic device 1000 may be a smartphone, personal digital assistant, digital video camera, digital still camera, network system, computer, monitor, tablet, laptop, netbook, television, video game, smartwatch, or automobile. However, it is not limited to these, and may also be any other electronic device that processes data.

[0029] Figure 2 is a schematic perspective view showing an example of an electronic device.

[0030] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. Inside the smartphone 1100 is a motherboard 1110, to which various components 1120 are physically and / or electrically connected. Other components, such as a camera module 1130 and / or a speaker 1140, may or may not be physically and / or electrically connected to the motherboard 1110. Some of the components 1120 may be the chip-related components described above, and may, for example, be a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components, including active and / or passive components, are mounted on the surface. Alternatively, the component package 1121 may be in the form of a printed circuit board with active and / or passive components built-in. On the other hand, the electronic device is not necessarily limited to a smartphone 1100, but may be other electronic devices as described above.

[0031] Printed circuit board Figure 3 is a schematic cross-sectional view showing an example of a printed circuit board, and Figure 4 is an enlarged view of a part of Figure 3. Referring to Figures 3 and 4, the printed circuit board 100 according to this embodiment includes a first insulating layer 101, a conductive via 130, a first conductor layer 111, and a first pad 110 including a second conductor layer 112. Here, the conductive via 130 protrudes outward from the first surface S1 of the first insulating layer 101 (upward, relative to the illustrated configuration) than the first conductor layer 111. When the conductive via 130 protrudes beyond the first conductor layer 111 and is connected to the second conductor layer 112, the electrical and physical contact between the conductive via 130 and the first pad 110 can be improved. Furthermore, such a structure is suitable for miniaturizing the conductive via 130, the first conductor layer 111, the second conductor layer 112, etc., and for reducing the pitch. The main components of the printed circuit board will be described in detail below.

[0032] The first insulating layer 101 may be a core insulating layer. The first insulating layer 101 may contain an insulating material. As the insulating material, insulating resins such as thermosetting resins such as epoxy resins or thermoplastic resins such as polyimide, or materials in which these resins are mixed with an inorganic filler such as silica, or resins impregnated with an inorganic filler into a core material such as glass fiber (glass cloth, glass fabric), for example, an insulating layer of CCL (copper-clad laminate) may be used, but is not limited thereto. The first insulating layer 101 has a first surface S1 and a second surface S2 that face each other in the thickness direction (up and down direction with respect to the illustrated form). The first insulating layer 101 also has through holes (H in Figure 7) formed in the thickness direction. The first insulating layer 101 may be thicker than the insulating layers 102 and 103 arranged on the first surface S1 and second surface S2 sides, respectively. In this case, the thickness of each layer can be measured using a scanning microscope or optical microscope, based on the polished or cut cross-section of the printed circuit board in the vertical direction. If the thickness is not constant, the relative thicknesses can be compared using the average value of the thickness of each object measured at any five points.

[0033] A second insulating layer 102 can be placed on the first surface S1 side of the first insulating layer 101, and a third insulating layer 103 can be placed on the second surface S2 side. In this case, the second and third insulating layers 102 and 103 may be build-up insulating layers. The second and third insulating layers 102 and 103 may each contain multiple build-up insulating layers, in which case the multiple build-up insulating layers may be integrated without boundaries or separated from each other. Examples of insulating materials that may be included in the second and third insulating layers 102 and 103 include insulating resins such as thermosetting resins like epoxy resins or thermoplastic resins like polyimides, or materials in which these resins are mixed with inorganic fillers such as silica, or resins impregnated with inorganic fillers into a core material such as glass fiber, such as ABF (Ajinomoto Build-up Film) or prepreg, but are not limited to these.

[0034] The conductive via 130 is placed in a through-hole formed in the thickness direction of the first insulating layer 101, and the first pad 110 and the second pad 120 can be connected to each other by the conductive via 130. An internal conductor layer 140 can be placed between the inner wall of the through-hole in the first insulating layer 101 and the conductive via 130, in which case the internal conductor layer 140 may include a plurality of conductor layers, for example, a first internal conductor layer 141 and a second internal conductor layer 142. Here, the first internal conductor layer 141 can be placed closer to the inner wall of the through-hole in the first insulating layer 101 than the second internal conductor layer 142.

[0035] The conductive via 130 can contain metals such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, and can perform various functions depending on the design. For example, the conductive via 130 can include ground patterns, power patterns, signal patterns, etc. In one example, after the internal conductor layer 140 is formed by plating, the conductive via 130 can be formed by filling the through-hole with a plug. The conductive via 130 can have a substantially circular or elliptical shape based on its planar shape viewed from above. In addition, from the viewpoint of ensuring adhesion by increasing the specific surface area, the conductive via 130 may have a polygonal shape on a plane, or a so-called flower shape in which multiple circles or ellipses overlap.

[0036] The first pad 110 is located on the first surface S1 side of the first insulating layer 101 and includes a first conductor layer 111 and a second conductor layer 112. Here, the second conductor layer 112 is located on the first conductor layer 111 and a conductive via 130. A second pad 120 can be located on the second surface S2 side of the first insulating layer 101, and the second pad 120 may include a third conductor layer 121 and a fourth conductor layer 122. The second pad 120 can be implemented in the same form as the first pad 110. The structure of the first pad 110 and conductive via 130 on the first surface S1 side of the first insulating layer 101 will be described below, but this description can also be applied to the second pad 120 and conductive via 130 located on the second surface S2 side of the first insulating layer 101.

[0037] In this embodiment, the conductive via 130 has a shape that protrudes from the first surface S1 to the outside of the first insulating layer 101 more than the first conductor layer 111. As a result, as can be seen in the enlarged view of Figure 4, the conductive via 130 is connected to the second conductor layer 112, and a structure is obtained in which the first conductor layer 111 surrounds the side surface of the conductive via 130. In this case, although Figures 3 and 4 show a flat upper surface of the second conductor layer 112, the upper surface of the second conductor layer 112 may have a protruding structure. That is, as shown in the modified example in Figure 5, the second conductor layer 112 may have a shape in which the region corresponding to the conductive via 130 protrudes.

[0038] Referring again to Figures 3 and 4, the embodiments of the first pad 110 and the conductive via 130 will be described in more detail. As described above, the internal conductor layer 140 can be provided as a plating layer on the inner wall of the through hole. In this case, as shown in the illustrated embodiment, the conductive via 130 may protrude further from the first surface S1 to the outside of the first insulating layer 101 than the internal conductor layer 140. The internal conductor layer 140 may include first and second internal conductor layers 141, 142, in which case the conductive via 130 may protrude further from the first surface S1 to the outside of the first insulating layer 101 than the first and second internal conductor layers 141, 142.

[0039] On the other hand, the internal conductor layer 140 can form an interface with and contact the first conductor layer 111. More specifically, the side surface of the internal conductor layer 140 can contact the side surface of the first conductor layer 111. The internal conductor layer 140 can form an interface with and contact the second conductor layer 112. Furthermore, as shown in the illustrated configuration, the upper surface of the internal conductor layer 140 and the upper surface of the first conductor layer 111 can form a coplane, and in this case, the upper surface of the internal conductor layer 140 and the upper surface of the first conductor layer 111 can also contact the lower surface of the second conductor layer 112. Such a coplane structure can be obtained by performing a process such as polishing the conductor layer placed on top of the first conductor layer 111 and the internal conductor layer 140, as will be described later. Also, the internal conductor layer 140 may contact the side surface of the first conductor layer 111, but it does not have to cover the upper surface of the first conductor layer 111.

[0040] Thus, in this embodiment, the internal conductor layer 140 is formed in a separate process, for example, a separate plating process, rather than being formed integrally with the first conductor layer 111 and the second conductor layer 112, thereby forming an interface with each other and enabling contact. If the internal conductor layer 140 and the second conductor layer 112 are plated at the same time to achieve an integral structure, it may become difficult to realize a miniaturized circuit in the subsequent etching process. In this embodiment, the internal conductor layer 140 is formed separately from the first conductor layer 111 and the second conductor layer 112, and even after etching, the first pad 110 can be formed to be thin and narrow, thereby allowing more conductive vias 130 to be placed in the same size space. Specifically, the thickness t of the first conductor layer 111 can be 0.5 μm or more and 2 μm or less, and the distance d protruding laterally from the through-hole of the first insulating layer 101 in the first pad 110 can be reduced to a level of 25 μm or less. This allows for a reduction in the size of the first pad 110, improving its alignment with the conductive vias 130. Furthermore, the spacing between the conductive vias 130 can also be miniaturized; for example, the spacing between adjacent conductive vias 130 can be reduced to 300 μm or less.

[0041] On the other hand, to describe the further configuration of the printed circuit board 100, conductor patterns 151 and 161 can be placed on the first pad 110 and the second pad 120, respectively, and conductor patterns can also be placed at the same level as the first pad 110 and the second pad 120. In this case, vias 152 and 162 can be provided to connect the first and second pads 110 and 120 to the conductor patterns 151 and 161, respectively.

[0042] An example of a method for manufacturing a printed circuit board will be described below with reference to Figures 6 to 14. First, referring to Figures 6 and 7, a first insulating layer 101 is provided, and through holes H are formed that penetrate it in the thickness direction. Here, conductor layers 111 and 121 can be arranged on the first surface S1 and the second surface S2 of the first insulating layer 101, respectively, and the conductor layers 111 and 121 can be made into a first conductor layer 111 and a third conductor layer 121 by subsequent processes. In addition, sacrificial layers 211 and 221 may be arranged to cover the conductor layers 111 and 121, respectively. For example, the conductor layers 111 and 121 may be copper foil, and the sacrificial layers 211 and 221 may be plated layers. The through holes H in the first insulating layer 101 can be formed by an appropriate processing method, for example, laser processing, and then a desmear process can be performed.

[0043] Next, as shown in Figure 8, an internal conductor layer 140 is formed in the through-hole H of the first insulating layer 101. The internal conductor layer 140 can also be formed on the first surface S1 and the second surface S2 of the first insulating layer 101, in addition to the through-hole H. The internal conductor layer 140 may include a first internal conductor layer 141 and a second internal conductor layer 142. In this case, the first internal conductor layer 141 can be formed by electroless plating, and the second internal conductor layer 142 can be formed by electrolytic plating. Then, referring to Figures 9 and 10, a conductive via 130 is formed by a process such as filling the through-hole H of the first insulating layer 101 with a plug. Other plating processes that can be used in the art can also be used. After that, if necessary, as shown in Figure 10, the portion of the conductive via 130 that protrudes outwards can be removed by a polishing process.

[0044] Next, as shown in Figure 11, the sacrificial layers 211 and 221 are removed, thereby removing at least a portion of the region of the internal conductor layer 140 that covers the first surface S1 and the second surface S2 of the first insulating layer 101. This process also exposes the side surface of the conductive via 130. The region protruding vertically from the conductive via 130 may be left as is, or, as shown in Figure 12, a portion may be removed to adjust the height of the protrusion. Referring to Figures 13 and 14, the conductor layers 112 and 122 are then formed, which correspond to the second conductor layer 112 and the fourth conductor layer 122 described above, respectively. As an example of the process, the conductor layers 112 and 122 may be formed by forming a mask layer 250 and then performing pattern plating on the open region. After that, the mask layer 250 is removed, and a portion of the conductor layers 111, 112, 121, and 122 is removed by an etching process to obtain the first pad 110 and the second pad 120 having the structure described above (Figure 14). Subsequently, a printed circuit board in the above-described form can be obtained through an appropriate build-up process.

[0045] In this invention, "on a cross-section" can mean the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is viewed from the side. Furthermore, "on a plane" can mean the shape when the object is cut horizontally, or the planar shape when the object is viewed from the top or bottom.

[0046] In this invention, terms such as "upper side," "upper part," and "upper surface" are used for convenience to mean the direction toward the surface on which electronic components can be mounted, based on the cross-section of the drawing, while terms such as "lower side," "lower part," and "lower surface" are used to mean the opposite direction. However, this is a definition of direction for the sake of explanation, and the scope of rights in the patent claims is not particularly limited by such descriptions of direction.

[0047] In this invention, "connected" is a concept that includes not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, "electrically connected" is a concept that includes both cases where they are physically connected and cases where they are not connected. In addition, expressions such as "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, within the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component.

[0048] The expression "example" as used in this invention does not mean that each embodiment is the same as another, but is provided to highlight and illustrate the unique and distinct features of each. However, the examples presented above do not preclude their realization in combination with features of other examples. For example, even if a matter described in a particular example is not described in another example, it can be understood as a description related to that other example, unless there is a description in the other example that contradicts or is contrary to that description.

[0049] The terms used in this invention are used merely to illustrate an example and are not intended to limit the invention. In this context, singular expressions include plural expressions unless the context clearly indicates otherwise. [Explanation of Symbols]

[0050] 1000 electronic equipment 1010 Mainboard 1020 Chip-related components 1030 Network-related components 1040 Other parts 1050 Camera 1060 Antenna 1070 Display 1080 Battery 1090 signal line 1100 Smartphone 1110 Motherboard 1120 parts 1121 Component Package 1130 Camera Module 1140 speakers 100 Printed Circuit Boards 101 First insulating layer 102 Second insulating layer 103 Third insulating layer 110, 120 pads 111, 112, 121, 122 Conductor layers 130 conductive vias 140 Inner Conductor Layer 141 First Inner Conductor Layer 142 Second inner conductor layer 151, 161 Conductor Patterns 152, 162 Beers 211, 221 layers of victims 250 mask layers S1 page 1 S2 side 2 d distance t thickness H through hole

Claims

1. A first insulating layer having a first surface and a second surface facing each other in the thickness direction, A conductive via is disposed in a through-hole formed in the thickness direction in the first insulating layer, The first pad is disposed on the first surface side of the first insulating layer and includes a first conductor layer, and a second conductor layer disposed on the first conductor layer and the conductive vias, A printed circuit board in which the conductive vias protrude from the first surface beyond the first insulating layer compared to the first conductor layer.

2. The conductive via is connected to the second conductor layer, The printed circuit board according to claim 1, wherein the first conductor layer surrounds the side surface of the conductive via.

3. The printed circuit board according to claim 2, wherein the second conductor layer has a shape in which the region corresponding to the conductive via protrudes.

4. The printed circuit board according to claim 1, further comprising an internal conductor layer disposed between the inner wall of the through hole and the conductive via.

5. The printed circuit board according to claim 4, wherein the conductive vias protrude from the first surface to the outside of the first insulating layer more than the internal conductor layer.

6. The printed circuit board according to claim 4, wherein the internal conductor layer forms an interface with and contacts the first conductor layer.

7. The printed circuit board according to claim 4, wherein the internal conductor layer forms an interface with and contacts the second conductor layer.

8. The printed circuit board according to claim 4, wherein the side surface of the internal conductor layer is in contact with the side surface of the first conductor layer.

9. The printed circuit board according to claim 8, wherein the upper surface of the internal conductor layer and the upper surface of the first conductor layer are coplane.

10. The printed circuit board according to claim 9, wherein the upper surface of the internal conductor layer and the upper surface of the first conductor layer are in contact with the lower surface of the second conductor layer.

11. The printed circuit board according to claim 8, wherein the internal conductor layer does not cover the upper surface of the first conductor layer.

12. The printed circuit board according to claim 4, wherein the internal conductor layer includes a first internal conductor layer and a second internal conductor layer, and the first internal conductor layer is positioned closer to the inner wall of the through hole than the second internal conductor layer.

13. The printed circuit board according to claim 12, wherein the conductive vias protrude outward from the first surface of the first insulating layer more than the first internal conductor layer and the second internal conductor layer.

14. The printed circuit board according to claim 1, wherein the thickness of the first conductor layer is 0.5 μm or more and 2 μm or less.

15. The printed circuit board according to claim 1, wherein the distance of the through-hole of the first insulating layer protruding laterally in the first pad is 25 μm or less.

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