Circuit simulation methods

Abstract

One embodiment aims to provide a circuit simulation method that can improve the accuracy of the simulation. [Solution] According to one embodiment, a circuit simulation method is provided. The circuit simulation method includes acquiring a plurality of device characteristics that have been measured in advance under operating terminal conditions. The circuit simulation method includes setting a plurality of model parameters corresponding to the measured plurality of device characteristics. The circuit simulation method includes finding a single objective function that includes the plurality of model parameters. The circuit simulation method includes minimizing the single objective function and optimizing the plurality of model parameters. The circuit simulation method includes outputting the optimized plurality of model parameters to a circuit simulator.

Description

[Technical Field]

[0001] This embodiment relates to a circuit simulation method. [Background technology]

[0002] In circuit simulation methods, the operation of a device is simulated using multiple model parameters that correspond to multiple device characteristics. Improving the accuracy of the simulation is desirable in circuit simulation methods. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2002-124666 [Patent Document 2] Japanese Patent Publication No. 2006-202966 [Patent Document 3] Japanese Patent Publication No. 2007-80062 [Patent Document 4] Japanese Patent Publication No. 2010-061190 [Patent Document 5] Japanese Patent Publication No. 2010-067830 [Overview of the project] [Problems that the invention aims to solve]

[0004] One embodiment aims to provide a circuit simulation method that can improve the accuracy of the simulation. [Means for solving the problem]

[0005] According to one embodiment, a circuit simulation method is provided. The circuit simulation method includes obtaining a plurality of device characteristics measured in advance under operating terminal conditions. The circuit simulation method includes setting a plurality of model parameters corresponding to the measured plurality of device characteristics. The circuit simulation method includes obtaining a single-objective function including the plurality of model parameters. The circuit simulation method includes minimizing the single-objective function and optimizing the plurality of model parameters. The circuit simulation method includes outputting the optimized plurality of model parameters to a circuit simulator.

Brief Description of Drawings

[0006] [Figure 1] A diagram showing the functional configuration of an information processing apparatus in which the circuit simulation method according to the embodiment is executed. [Figure 2] A diagram showing device characteristic data in an embodiment. [Figure 3] A diagram showing device characteristic data in an embodiment. [Figure 4] A data flow diagram showing the flow of information in the circuit simulation method according to the embodiment. [Figure 5] A diagram showing the hardware configuration of an information processing apparatus in which the circuit simulation method according to the embodiment is executed. [Figure 6] A flowchart showing an outline of the circuit simulation method according to the embodiment. [Figure 7] A flowchart showing details of the circuit simulation method according to the embodiment. [Figure 8] A flowchart showing the circuit simulation method according to the first modification of the embodiment. [Figure 9] A flowchart showing the circuit simulation method according to the second modification of the embodiment. [Figure 10] A flowchart showing the circuit simulation method according to the third modification of the embodiment.

Modes for Carrying Out the Invention

[0007] The circuit simulation method according to the embodiment will be described in detail below with reference to the attached drawings. However, the present invention is not limited to this embodiment.

[0008] (Embodiment) The circuit simulation method according to the embodiment simulates the operation of a device using multiple model parameters corresponding to multiple device characteristics, and measures are taken to improve the accuracy of the simulation.

[0009] The circuit simulation method may be performed using an information processing device 1 as shown in Figure 1. Figure 1 is a diagram showing the functional configuration of the information processing device 1 on which the circuit simulation method according to the embodiment is performed.

[0010] The information processing device 1 can be connected to the measuring device MD and the circuit simulator CS, respectively.

[0011] The measuring device MD has measuring terminals, and by connecting these terminals to the operating terminals of device DV, it is possible to measure the operating characteristics of device DV. Device DV is, for example, a transistor, including a MOSFET type transistor. The operating terminals include the gate terminal, source terminal, and drain terminal. The measuring device MD can measure multiple device characteristics of device DV under operating terminal conditions. The operating terminal conditions include the voltage or current applied to the operating terminals.

[0012] The information processing device 1 acquires multiple device characteristics under operating terminal conditions from the measuring device MD. Once multiple device characteristics are acquired, the information processing device 1 starts the model extraction program 96 and sets multiple model parameters corresponding to the multiple device characteristics according to the model extraction program 96.

[0013] The information processing device 1 obtains a single objective function containing multiple model parameters according to the model extraction program 96. The information processing device 1 calculates multiple device characteristics under operating terminal conditions using the multiple model parameters. The information processing device 1 generates an objective function using multiple differences between the acquired multiple device characteristics and the calculated multiple device characteristics.

[0014] For example, the information processing device 1 generates multiple scalarization functions using multiple differences and generates a single objective function containing multiple scalarization functions. The information processing device 1 may also generate the single objective function by taking the weighted mean square root of the multiple scalarization functions.

[0015] The information processing device 1 minimizes a single objective function and optimizes multiple model parameters according to the model extraction program 96. The information processing device 1 minimizes a single objective function and optimizes multiple model parameters using a probabilistic algorithm.

[0016] For example, the information processing device 1 may use a first probabilistic algorithm to search for initial values ​​of multiple model parameters that minimize a single objective function. The information processing device 1 may also use a second probabilistic algorithm to find multiple model parameters that minimize the single objective function with the searched initial values.

[0017] The information processing device 1 outputs the optimized model parameters to the circuit simulator CS.

[0018] The circuit simulator CS obtains multiple optimized model parameters from the information processing device 1. The circuit simulator CS has a circuit simulation program PG. The circuit simulator CS is a device capable of executing the circuit simulation program PG. The circuit simulation program PG includes a SPICE (Simulation Program with Integrated Circuit Emphasis) simulation program. The model parameters include SPICE parameters. The circuit simulator CS sets the multiple optimized model parameters in the circuit simulation program PG. This allows the circuit simulator CS to improve the accuracy of simulations using the circuit simulation program PG.

[0019] The information processing device 1 includes an acquisition unit 11, a setting unit 12, a calculation unit 13, a calculation unit 14, a generation unit 15, a search unit 16, a minimization unit 17, an output unit 18, and a storage unit 19. The calculation unit 13 includes a circuit simulator CSa. The circuit simulator CSa has the same functions and configuration as the circuit simulator CS. The circuit simulator CSa includes a circuit simulation program PGa and is capable of executing the circuit simulation program PGa. The circuit simulation program PGa has the same functions and configuration as the circuit simulation program PG.

[0020] The acquisition unit 11 is connectable to the measuring device MD. The measuring device MD generates multiple device characteristic data 191 as measurement results for multiple device characteristics. When connected to the measuring device MD, the acquisition unit 11 acquires the multiple device characteristic data 191. The acquisition unit 11 may acquire the multiple device characteristic data 191 in a form associated with operating terminal conditions.

[0021] The multiple device characteristic data 191 represent multiple device characteristics under operating terminal conditions, and their contents differ from one another. The operating terminal conditions include the gate voltage Vg, drain voltage Vd, substrate voltage Vb, source voltage Vs, etc., applied to device DV during measurement. Multiple device characteristics may include gate voltage-drain current characteristics (hereinafter, Vg-Id characteristics), drain voltage-drain current characteristics (hereinafter, Vd-Id characteristics), substrate voltage-threshold voltage characteristics (hereinafter, Vb-Vth characteristics), gate length-threshold voltage characteristics (hereinafter, Lg-Vth characteristics), gate width-threshold current characteristics (hereinafter, Wg-Vth characteristics), temperature-threshold current characteristics (hereinafter, T-Vth characteristics), substrate voltage-on-current characteristics (hereinafter, Vb-Ion characteristics), gate length-on-current characteristics (hereinafter, Lg-Ion characteristics), gate width-on-current characteristics (hereinafter, Wg-Ion characteristics), temperature-on-current characteristics (hereinafter, T-Ion characteristics), gate voltage-gate capacitance characteristics (hereinafter, Vg-Cgg characteristics), drain voltage-gate capacitance characteristics (hereinafter, Vd-Cgg characteristics), and substrate voltage-substrate capacitance characteristics (hereinafter, Vb-Csb characteristics).

[0022] Multiple device characteristic data sets 191 can be implemented as arrays containing data sequences, each consisting of current characteristics or capacitance characteristics when the applied voltage is varied. Given operating terminal conditions, the arrays return measured values ​​in the device characteristics.

[0023] For example, multiple device characteristic data 191 may include Vg-Id characteristic data 191_1 as shown by the solid line in Figure 2. In the Vg-Id characteristic data 191_1 shown in Figure 2, under the operating terminal conditions Vb=V_b1 and Vd=V1, the drain current Id changes nonlinearly with respect to the gate voltage Vg.

[0024] The Vg-Id characteristic data 191_1 can be implemented as an array containing a data sequence that shows the Vg-Id characteristics. Given a set of substrate voltage Vb, drain voltage Vd, and gate voltage Vg, the array returns the drain current Id value. In addition to the applied voltage, the array may also include instance parameters that define the MOSFET instance, such as temperature (hereinafter, T), gate width (hereinafter, Wg), gate length (hereinafter, Lg), distance from the gate edge to the edge of the diffusion layer region (hereinafter, SA, SB), drain-side contact resistance (hereinafter, RDC), source-side contact resistance (hereinafter, RSC), drain diffusion area (hereinafter, AD), and source diffusion area (hereinafter, AS).

[0025] Multiple device characteristic data 191 may include Vd-Id characteristic data 191_2, as shown by the solid line in Figure 3. In the Vd-Id characteristic data 191_2 shown in Figure 3, under the operating terminal conditions Vb=V_b1 and Vg=V2, the drain current Id changes nonlinearly with respect to the drain voltage Vd.

[0026] The Vd-Id characteristic data 191_2 can be implemented as an array containing a data sequence that shows the Vd-Id characteristics. Given a set of values ​​for the substrate voltage Vb, gate voltage Vg, and drain voltage Vd, the array returns the value of the drain current Id.

[0027] The acquisition unit 11 supplies multiple device characteristic data 191 to the calculation unit 14 and / or storage unit 19 in a manner associated with the operating terminal conditions. The storage unit 19 may store each of the multiple device characteristic data 191 in a manner associated with the operating terminal conditions.

[0028] The setting unit 12 sets multiple model parameters 192. The multiple model parameters 192 correspond to multiple device characteristics and have different content from one another. The multiple device characteristics may include Vg-Id characteristics, Vd-Id characteristics, Vb-Vth characteristics, Lg-Vth characteristics, Wg-Vth characteristics, T-Vth characteristics, Vb-Ion characteristics, Lg-Ion characteristics, Wg-Ion characteristics, T-Ion characteristics, Vg-Cgg characteristics, Vd-Cgg characteristics, and Vb-Csb characteristics. Each model parameter 192 may also be a coefficient in a mathematical formula that represents the device characteristic. Each model parameter 192 includes SPICE parameters as described above.

[0029] The setting unit 12 sets a predetermined value for each of the multiple model parameters 192. The setting unit 12 may also set a default value for each of the multiple model parameters 192. The setting unit 12 may obtain the current values ​​of the multiple model parameters 192 from the search unit 16 and set the current values ​​for each of the multiple model parameters 192.

[0030] The setting unit 12 stores multiple model parameters 192, each with a predetermined value, in the storage unit 19.

[0031] The calculation unit 13 reads out multiple model parameters 192 from the storage unit 19. The calculation unit 13 uses the multiple model parameters 192 to calculate multiple device characteristics under operating terminal conditions. At this time, the calculation unit 13 may use the circuit simulator CSa. The calculation unit 13 may set the multiple model parameters 192 in the circuit simulation program PGa and run the circuit simulation program PGa on the circuit simulator CSa to calculate multiple device characteristics under operating terminal conditions. The calculation unit 13 may apply the values ​​of each of the multiple model parameters 192 to a formula that shows the device characteristics to obtain multiple device characteristic data 192a.

[0032] For example, multiple device characteristic data 192a may include Vg-Id characteristic data 192a_1 as shown by the dotted line in Figure 2. In the Vg-Id characteristic data 192a_1 shown in Figure 2, under the operating terminal conditions Vb=0 and Vd=V1, the drain current Id changes nonlinearly with respect to the gate voltage Vg.

[0033] The Vg-Id characteristic data 192a_1 can be implemented as an array containing a data sequence that shows the Vg-Id characteristics. Given a set of substrate voltage Vb, drain voltage Vd, and gate voltage Vg, the array returns the drain current Id value. In addition to the applied voltage, the array may also include instance parameters that define the MOSFET instance, such as temperature (hereinafter, T), gate width (hereinafter, Wg), gate length (hereinafter, Lg), distance from the gate edge to the edge of the diffusion layer region (hereinafter, SA, SB), drain-side contact resistance (hereinafter, RDC), source-side contact resistance (hereinafter, RSC), drain diffusion area (hereinafter, AD), and source diffusion area (hereinafter, AS).

[0034] Multiple device characteristic data 192a may include Vd-Id characteristic data 192a_2 as shown by the dotted line in Figure 3. In the Vd-Id characteristic data 192a_2 shown in Figure 3, under the operating terminal conditions Vb=0 and Vg=V2, the drain current Id changes non-linearly with respect to the drain voltage Vd.

[0035] The Vd-Id characteristic data 192a_2 can be implemented as an array containing a data sequence that shows the Vd-Id characteristics. Given a set of values ​​for the substrate voltage Vb, gate voltage Vg, and drain voltage Vd, the array returns the value of the drain current Id.

[0036] The calculation unit 13 supplies multiple device characteristic data 192a to the calculation unit 14 in a manner associated with the operating terminal conditions.

[0037] The calculation unit 14 acquires multiple device characteristic data 191 from the calculation unit 13 or the storage unit 19 in a manner associated with the operating terminal conditions. The calculation unit 14 acquires multiple device characteristic data 192a from the calculation unit 13 in a manner associated with the operating terminal conditions. The calculation unit 14 identifies multiple pairs of device characteristic data 191 and device characteristic data 192a that correspond to the operating terminal conditions.

[0038] As shown in Figure 4, the calculation unit 14 calculates multiple differences for multiple sets of device characteristic data 191 and device characteristic data 192a, and generates multiple difference information 193. Figure 4 is a data flow diagram showing the flow of information in the circuit simulation method.

[0039] Each of the multiple differences corresponds to the error between the device characteristics measured by the measuring device MD and the device characteristics calculated by the calculation unit 13.

[0040] The difference calculated by the calculation unit 14 corresponds, for example, to the error between the Vg-Id characteristic shown by the solid line and the Vg-Id characteristic shown by the dotted line in Figure 2. Alternatively, it corresponds to the error between the Vd-Id characteristic shown by the solid line and the Vd-Id characteristic shown by the dotted line in Figure 3.

[0041] Multiple differences may include the current difference ΔIi(x) of the Vg-Id characteristic, the log difference ΔlogIi(x) of the Vg-Id characteristic, the differential difference Δgmi(x) of the Vg-Id characteristic, the current difference ΔIi(x) of the Vd-Id characteristic, the log difference ΔlogIi(x) of the Vd-Id characteristic, and the differential difference Δgdsi(x) of the Vd-Id characteristic.

[0042] The calculation unit 14 may determine the current difference ΔIi(x) of the Vg-Id characteristic using the following formula 1.

number

[0043] In equation 1, I i simindicates the value of the calculated drain current Id in the i-th device characteristic. I i meas indicates the measured value of the i-th drain current Id.

Number

Number

[0044] The calculation unit 14 may obtain the logarithmic difference ΔlogIi(x) of the Vg-Id characteristics by the following Equation 3.

Number

[0045] [[ID=3​​​​​​​​​​​​​This represents a coefficient for normalization, which can be freely selected, but you may also select the maximum current under the same bias conditions, as shown in the following equation 4.

number

[0046] Equation 4 shows the largest value among the measured drain current Id values ​​at the same temperature T, channel width W, channel length L, and drain voltage Vd as the j-th measured drain current Id.

[0047] The calculation unit 14 may also determine the differential difference Δgmi(x) of the Vg-Id characteristic using the following formula 5.

number

[0048] In equation 5, ∂I i sim / ∂Vg represents the derivative of the calculated drain current Id with respect to the gate voltage Vg in the i-th device characteristic. i meas / ∂Vg represents the derivative of the measured value of the i-th drain current Id with respect to the gate voltage Vg.

number

number

[0049] Equation 6 shows the largest value among the measured drain current Id values ​​at the same temperature T, channel width W, channel length L, and drain voltage Vd as the j-th measured drain current Id.

[0050] The calculation unit 14 may determine the current difference ΔIi(x) of the Vd-Id characteristic using equation 1. In this case, equation 7 may be used in place of equation 2 in the denominator of equation 1.

number

[0051] Equation 7 shows the largest value among the measured drain current Id at the same temperature T, channel width W, channel length L, and substrate voltage Vb as the j-th measured drain current Id. In Equation 7, Vbi represents the substrate voltage at the i-th measured value.

[0052] The calculation unit 14 may determine the log difference ΔlogIi(x) of the Vd-Id characteristics using equation 2. In this case, equation 8 may be used in place of equation 4 in the denominator of equation 2.

number

[0053] Equation 8 shows the largest value among the measured drain current Id values ​​at the same temperature T, channel width W, channel length L, and substrate voltage Vb as the j-th measured drain current Id.

[0054] The calculation unit 14 may also determine the differential difference Δgdsi(x) of the Vd-Id characteristic using the following formula 9.

number

[0055] In equation 9, ∂I i sim / ∂Vg represents the derivative of the calculated drain current Id with respect to the drain voltage Vd in the i-th device characteristic. i meas / ∂Vg represents the derivative of the measured value of the i-th drain current Id with respect to the drain voltage Vd.

number

number

[0056] Equation 10 shows the largest value among the measured drain current Id values ​​at the same temperature T, channel width W, channel length L, and substrate voltage Vb as the j-th measured drain current Id.

[0057] The calculation unit 14 supplies multiple differential information 193 to the generation unit 15 and / or the storage unit 19.

[0058] The generation unit 15 obtains multiple difference information 193 from the calculation unit 14 or the storage unit 19. Based on the multiple difference information 193, the generation unit 15 generates multiple scalarization function information 194 using weight information 21, as shown in Figure 4. The weight information 21 can be pre-set in the generation unit 15. The multiple scalarization function information 194 represent multiple scalarization functions using multiple differences.

[0059] The generation unit 15 may generate a scalar function by expressing the Vg-Id characteristic in terms of relative error, the logarithm of Id, and the derivatives of Vg and Id, and further expressing these as a single value using a scalar function. In this way, the generation unit 15 can generate a scalar function that corresponds to scalarizing the vector of multiple parameters in the Vg-Id characteristic.

[0060] The generation unit 15 may generate a scalar function by expressing the Vd-Id characteristic in terms of relative error, the logarithm of Id, and the derivatives of Vd and Id, and further expressing these as a single value using a scalar function. In this way, the generation unit 15 can generate a scalar function that corresponds to scalarizing the vector of multiple parameters in the Vd-Id characteristic.

[0061] For example, the generation unit 15 may generate the scalar function ΔIdVgi(x) shown in the following equation 11 by weighted summing the current difference ΔIi(x) of the Vg-Id characteristics, the log difference ΔlogIi(x) of the Vg-Id characteristics, and the differential difference Δgmi(x) of the Vg-Id characteristics.

number

[0062] In equation 11, A IdVg This is the weight for the current difference ΔIi(x) in the Vg-Id characteristic. logIdVg This is the weight for the log difference ΔlogIi(x) of the Vg-Id characteristic. gm This is the weight for the differential difference Δgmi(x) of the Vg-Id characteristic. IdVg , A logIdVg , A gm This information can be obtained experimentally in advance and set in the generation unit 15 as weight information 21 (see Figure 4).

[0063] The generation unit 15 may generate the scalar function ΔIdVdi(x) shown in the following equation 12 by weighted summing the current difference ΔIi(x) of the Vd-Id characteristics, the log difference ΔlogIi(x) of the Vd-Id characteristics, and the differential difference Δgdsi(x) of the Vd-Id characteristics.

number

[0064] In equation 12, A IdVd This is the weight for the current difference ΔIi(x) in the Vd-Id characteristic. logIdVd This is the weight for the log difference ΔlogIi(x) of the Vd-Id characteristic. gds This is the weight for the differential difference Δgdsi(x) of the Vd-Id characteristic. IdVd , A logIdVd , A gds This information can be obtained experimentally in advance and set in the generation unit 15 as weight information 21 (see Figure 4).

[0065] Alternatively, the generation unit 15 may generate the scalar function ΔIdVgi(x) shown in the following equation 13 by weighting the current difference ΔIi(x) of the Vg-Id characteristics, the log difference ΔlogIi(x) of the Vg-Id characteristics, and the differential difference Δgmi(x) of the Vg-Id characteristics and taking their maximum values.

number

[0066] Equation 13 is equivalent to finding the value of the Chebyshev function for the current difference ΔIi(x) of the Vg-Id characteristic, the log difference ΔlogIi(x) of the Vg-Id characteristic, and the differential difference Δgmi(x) of the Vg-Id characteristic.

[0067] The generation unit 15 may generate the scalar function ΔIdVdi(x) shown in the following equation 14 by weighting the current difference ΔIi(x) of the Vd-Id characteristics, the log difference ΔlogIi(x) of the Vd-Id characteristics, and the differential difference Δgdsi(x) of the Vd-Id characteristics and taking their maximum values.

number

[0068] Equation 14 is equivalent to finding the value of the Chebyshev function for the current difference ΔIi(x) of the Vd-Id characteristic, the log difference ΔlogIi(x) of the Vd-Id characteristic, and the differential difference Δgdsi(x) of the Vd-Id characteristic.

[0069] The generation unit 15 generates single objective function information 195 using weight information 22, as shown in Figure 4, in accordance with multiple scalarized function information 194. The weight information 22 can be pre-set in the generation unit 15. The single objective function information 195 represents a single objective function.

[0070] The generation unit 15 generates a single objective function f(x) that includes multiple scalarization functions. The generation unit 15 may also generate the single objective function f(x) by taking the weighted mean square root of the multiple scalarization functions. In this way, the generation unit 15 can generate a single objective function f(x) that is equivalent to reducing multiple objectives corresponding to multiple device characteristics into a single objective.

[0071] This is equivalent to describing the definition of the error between the device characteristics measured by the measuring device MD and the device characteristics calculated by the calculation unit 13 using a single function. This makes it possible to simplify complex transistor characteristics and enable parameter extraction using a wide range of optimization methods.

[0072] For example, the generator 15 may obtain a single objective function f(x) containing multiple scalarization functions using the following equation 15.

number

[0073] In equation 15, w i IdVg w represents the weight for the i-th scalarization function. j IdVd This indicates the weight for the j-th scalarization function.

[0074] Equation 15 shows that the single objective function f(x) is generated by taking the weighted mean square root of the scalarized functions ΔIdVgi(x) of the Vg-Id characteristic and ΔIdVdj(x) of the Vd-Id characteristic.

[0075] This is equivalent to taking a weighted average of multiple errors between the device characteristics measured by the measuring device MD and the device characteristics calculated by the calculation unit 13, using the weighted root mean square. In other words, the generation unit 15 can generate a single objective function f(x) that appropriately represents the multiple errors.

[0076] The generation unit 15 supplies single objective function information 195 to the search unit 16 and / or the storage unit 19.

[0077] The search unit 16 obtains single objective function information 195 from the generation unit 15 or the storage unit 19. Based on the single objective function information 195, the search unit 16 generates Lagrangian function information 196, as shown in Figure 4, using equality constraint information 23, inequality constraint information 24, and penalty parameters 25. The equality constraint information 23, inequality constraint information 24, and penalty parameters 25 can each be pre-set in the search unit 16. The Lagrangian function information 196 represents a Lagrangian function L(x,λ,μ) that includes the single objective function f(x).

[0078] For example, the search unit 16 may generate a Lagrangian function L(x,λ,μ) containing a single objective function f(x) according to the extended Lagrangian method using the following equation 16.

number

[0079] In equation 16, f(x) is the single objective function generated by the generator 15. ρ is the penalty parameter in the extended Lagrangian method. The penalty parameter can be pre-set in the search unit 16 as penalty parameter 25. m indicates the number of equality constraints. The equality constraints are those shown in equation 17 below.

number

[0080] In equation 16, hi(x) represents the i-th equality constraint. λi is the Lagrange multiplier of the i-th equality constraint. p represents the number of inequality constraints. Inequality constraints are those shown in equation 18 below.

number

[0081] In equation 16, gi(x) represents the i-th inequality constraint, and μi is the Lagrange multiplier of the i-th inequality constraint.

[0082] By generating the Lagrangian function L(x,λ,μ), it is possible to minimize the single objective function f(x) while considering multiple equality constraints and / or multiple inequality constraints.

[0083] Multiple equality constraints may include Vth equality constraints, Ion equality constraints, and Sfactor equality constraints.

[0084] The Vth equality constraint is shown by the following equation 19.

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[0085] In equation 19, Vth^ represents the threshold voltage obtained from the simulation. Vth represents the target threshold voltage.

[0086] The Ion equality constraint is shown by the following equation 20.

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[0087] In equation 20, Ion^ represents the on-current obtained from the simulation. Ion represents the target on-current. Note that multiple equality constraints may include an Ioff equality constraint instead of the Ion equality constraint. The Ioff equality constraint is obtained by replacing Ion^ with the off-current Ioff^ obtained from the simulation, and Ion with the target off-current Ioff.

[0088] The constraint of the Sfactor equality is shown by the following equation 21.

number

[0089] In Equation 21, S^ represents the S-factor obtained by simulation. S represents the target S-factor. The S-factor can be defined as the gate voltage Vg required to change the drain current Id by an order of magnitude, as shown in Equation 22 below.

number

[0090] Multiple inequality constraints may include the Vth inequality constraint, the Ion inequality constraint, the Gm inequality constraint, and the Sfactor inequality constraint.

[0091] The Vth inequality constraint is shown by the following equation 23.

number

[0092] In equation 23, Vth^ represents the threshold voltage obtained from the simulation. Vth represents the target threshold voltage. τ vth This indicates tolerance.

[0093] The Ion inequality constraint is shown by the following equation 24.

number

[0094] In equation 24, Ion^ represents the ON current obtained from the simulation. Ion represents the target ON current. τ vth This indicates tolerance. Note that multiple inequality constraints may include an Ioff equality constraint instead of an Ion equality constraint. The Ioff equality constraint is obtained by replacing Ion^ with the off-current Ioff^ obtained from the simulation, and replacing Ion with the target off-current Ioff.

[0095] The Gm inequality constraint is shown by the following equation 25.

number

[0096] In equation 25, Gm^ represents the negative resistance Gm obtained by simulation. Gm represents the target negative resistance Gm. Note that the multiple inequality constraints may include a Gds inequality constraint instead of the Gm inequality constraint. The Gds inequality constraint is obtained by replacing Gm^ with the negative resistance Gds^ obtained by simulation, and replacing Gm with the target negative resistance Gds.

[0097] The Sfactor inequality constraint is shown by the following equation 26.

number

[0098] In equation 26, S^ represents the S-factor obtained by the simulation. S represents the target S-factor. τ S This indicates tolerance.

[0099] The search unit 16 uses the Lagrangian function information 196 to search for the initial value of the single objective function f(x) using the first probabilistic algorithm 26, as shown in Figure 4, and generates a number of model parameters 197 after the search. The first probabilistic algorithm 26 includes the NPSA (Neighborhood Parallel Simulated Annealing) algorithm.

[0100] By applying a probabilistic algorithm to the Lagrangian function L(x,λ,μ), it becomes possible to extract highly accurate model parameters that well represent the observed data under multiple constraints.

[0101] The search unit 16 may search for an initial value of x for the single objective function by searching for x that minimizes the Lagrangian function L(x,λ,μ) using the first probabilistic algorithm 26.

[0102] For example, the search unit 16 applies simulated annealing to the current value of x in parallel to find the x that minimizes L. The search unit 16 updates the values ​​of λ and μ according to the amount by which the found x violates multiple equality constraints and / or multiple inequality constraints, and again finds the x that minimizes L. The same process is repeated until the found x satisfies multiple equality constraints and / or multiple inequality constraints, or until a predetermined number of times is reached.

[0103] Once the initial value search is complete, the search unit 16 supplies the Lagrangian function information 196 and the multiple model parameters 197 after the search to the minimization unit 17 and / or the storage unit 19.

[0104] The minimization unit 17 obtains Lagrangian function information 196 and a plurality of model parameters 197 after the search from the search unit 16 or the storage unit 19. In accordance with the Lagrangian function information 196 and the plurality of model parameters 197 after the search, the minimization unit 17 minimizes the single objective function f(x) using a second probabilistic algorithm 27, as shown in Figure 4, further optimizes the plurality of model parameters 197, and generates a plurality of optimized model parameters 198. The second probabilistic algorithm 26 includes the ADAM (ADAptive Moment estimation) algorithm.

[0105] By further applying a probabilistic algorithm to the Lagrangian function L(x,λ,μ), it becomes possible to extract even more accurate model parameters that better represent the observed data under multiple constraints.

[0106] The minimization unit 17 may also find the x that minimizes the single objective function f(x) by searching for the x that minimizes the Lagrangian function L(x,λ,μ) using the second probabilistic algorithm 27.

[0107] For example, the minimization unit 17 fixes the values ​​of λ and μ and sets the current value of x to L again as the initial value. The minimization unit 17 probabilistically changes x in the direction of the gradient, considering the mean square and mean of the gradient as the first and second moments. The minimization unit 17 updates the values ​​of λ and μ according to the amount by which the obtained x violates multiple equality constraints and / or multiple inequality constraints, sets the current value of x to L again as the initial value, and finds the x to minimize. The same process is repeated until the obtained x satisfies multiple equality constraints and / or multiple inequality constraints, or until a predetermined number of times is reached.

[0108] Once minimization is complete, the minimization unit 17 supplies the optimized model parameters 198 to the output unit 18 and / or storage unit 19.

[0109] The output unit 18 obtains the optimized model parameters 198 from the minimization unit 17 or the storage unit 19. The output unit 18 outputs the optimized model parameters 198 to the circuit simulator CS.

[0110] Next, the hardware configuration of the information processing device 1 will be explained using Figure 5. Figure 5 is a diagram showing the hardware configuration of the information processing device 1.

[0111] The information processing device 1 includes a control unit 91, a non-volatile storage unit 92, a volatile storage unit 93, a display unit 94, an input unit 95, and a communication unit 99. The control unit 91, the non-volatile storage unit 92, the volatile storage unit 93, the display unit 94, and the input unit 95 are connected to each other via a bus line 98 so that they can communicate with one another.

[0112] The control unit 91 comprehensively controls each part of the information processing device 1. The control unit 91 can be implemented as a CPU (Central Processing Unit) or the like.

[0113] The non-volatile storage unit 92 stores the model extraction program 96 in a non-volatile manner. The non-volatile storage unit 92 can be implemented using ROM (Read Only Memory), flash memory, or the like.

[0114] The control unit 91 reads the model extraction program 96 from the non-volatile storage unit 92 and starts it, and executes the circuit simulation method according to the model extraction program 96.

[0115] The volatile memory unit 93 temporarily stores information. The volatile memory unit 93 may also store a set of parameters 97 according to the model extraction program 96. The volatile memory unit 93 can be implemented using DRAM (Dynamic Random Access Memory) or the like.

[0116] The display unit 94 displays information under the control of the control unit 91. The display unit 94 can be implemented as a display such as a liquid crystal monitor.

[0117] The input unit 95 receives information from an external source and supplies the received information to the control unit 91. The control unit 91 may perform processing according to the information in accordance with the model extraction program 96.

[0118] The communication unit 99 can communicate with the outside world via a communication line. The communication line may be a wired communication line or a wireless communication line.

[0119] The acquisition unit 11 and output unit 18 shown in Figure 1 can be implemented by the input unit 95 or the communication unit 99. The storage unit 19 shown in Figure 1 can be implemented by the volatile storage unit 93.

[0120] The setting unit 12, calculation unit 13, calculation unit 14, generation unit 15, search unit 16, and minimization unit 17 shown in Figure 1 may all be implemented in software. In this case, the calculation unit 13, calculation unit 14, generation unit 15, search unit 16, and minimization unit 17 may each be implemented as functional modules that are deployed on the volatile storage unit 93 either all at once during compilation or sequentially as processing progresses, in response to the activation of the model extraction program 96 by the control unit 91.

[0121] Alternatively, the setting unit 12, calculation unit 13, calculation unit 14, generation unit 15, search unit 16, and minimization unit 17 shown in Figure 1 may all be implemented in hardware. In this case, the setting unit 12, calculation unit 13, calculation unit 14, generation unit 15, search unit 16, and minimization unit 17 can each be incorporated as circuits within the control unit 91.

[0122] Alternatively, the setting unit 12, calculation unit 13, calculation unit 14, generation unit 15, search unit 16, and minimization unit 17 shown in Figure 1 may be partially implemented in software and partially implemented in hardware.

[0123] Next, we will explain the general outline of the circuit simulation method using Figure 6. Figure 6 is a flowchart illustrating the general outline of the circuit simulation method.

[0124] The measuring device MD measures multiple device characteristics of device DV (S100) and generates multiple device characteristic data 191.

[0125] When multiple device characteristic data 191 are acquired from the measuring device MD, the information processing device 1 starts the model extraction program 96 and performs model extraction processing using the multiple device characteristic data 191 according to the model extraction program 96 (S200). Through the model extraction processing (S200), the information processing device 1 optimizes multiple model parameters and outputs the optimized multiple model parameters 198 to the circuit simulator CS.

[0126] Once the optimized model parameters 198 are obtained, the circuit simulator CS sets the optimized model parameters 198 into the circuit simulation program PG (S300).

[0127] Next, the details of the circuit simulation method will be explained using Figure 7. Figure 7 is a flowchart showing the details of the circuit simulation method, and shows the details of the model extraction process (S200).

[0128] When the information processing device 1 acquires multiple device characteristics (S1), it sets multiple model parameters corresponding to the multiple device characteristics (S2).

[0129] The information processing device 1 calculates multiple device characteristics using the multiple model parameters set in S2 (S3).

[0130] The information processing device 1 calculates multiple differences between the multiple device characteristics acquired in S1 and the multiple device characteristics calculated in S3 (S4).

[0131] The information processing device 1 generates multiple scalarization functions using multiple differences (S5), and generates a single objective function containing multiple scalarization functions (S6).

[0132] The information processing device 1 optimizes the single objective function using a first probabilistic algorithm and searches for initial values ​​for the single objective function (S7).

[0133] The information processing device 1 sets the initial values ​​obtained in S7 as a single objective function, optimizes the single objective function using a second probabilistic algorithm, and finds multiple model parameters that minimize the single objective function (S8).

[0134] The information processing device 1 performs a convergence determination (S9).

[0135] If multiple model parameters do not satisfy multiple equality constraints and / or multiple inequality constraints, the information processing device 1 determines that the model has not converged (No in S9), updates the multiple model parameters (S10), and then returns the process to S3.

[0136] The information processing device 1 determines that the model has converged (Yes in S9) if multiple model parameters satisfy multiple equality constraints and / or multiple inequality constraints, outputs the multiple model parameters to the circuit simulator CS (S11), and terminates the process.

[0137] As described above, in the embodiment, a single objective function including multiple model parameters is obtained in the circuit simulation method, the multiple model parameters are optimized by minimizing the single objective function, and the optimized multiple model parameters are output to the circuit simulator CS. As a result, when the optimized multiple model parameters are set in the circuit simulation program PG in the circuit simulator CS, the accuracy of the simulation using the circuit simulation program PG can be improved in the circuit simulator CS.

[0138] The information processing device 1 may also acquire multiple device measurement data 191 from the TCAD simulator TS instead of the measurement device MD. The TCAD simulator TS is capable of performing process simulations, and if the process simulation parameters have been pre-tuned to high accuracy using the measured values ​​of device DV, it can generate multiple device characteristic data that are close to the measured values.

[0139] Alternatively, the process of optimizing multiple model parameters in the model extraction process (S200) may be performed in a single step.

[0140] For example, as a first modification of the embodiment, as shown in Figure 8, the process of optimizing multiple model parameters may be performed in one step of the first probabilistic algorithm. Figure 8 is a flowchart of the circuit simulation method according to the first modification of the embodiment.

[0141] In S21, the information processing device 1 optimizes the single objective function using a first probabilistic algorithm and finds multiple model parameters that minimize the single objective function. For example, if the information processing device 1 wants to adjust a specific Vth / Ion, it can perform the model extraction process (S200) shown in Figure 8.

[0142] Alternatively, as a second modification of the embodiment, as shown in Figure 9, the process of optimizing multiple model parameters may be performed in one step of the second probabilistic algorithm. Figure 9 is a flowchart of the circuit simulation method according to the second modification of the embodiment.

[0143] In S31, the information processing device 1 optimizes the single objective function using a second probabilistic algorithm and finds multiple model parameters that minimize the single objective function. For example, if the information processing device 1 wants to fine-tune each of the multiple model parameters, it can perform the model extraction process (S200) shown in Figure 9.

[0144] Alternatively, as a third modification of the embodiment, as shown in Figure 10, the process of optimizing multiple model parameters in the model extraction process (S200) may be switched between one stage and two stages depending on the result of the convergence determination (S9). Figure 10 is a flowchart of the circuit simulation method according to the third modification of the embodiment.

[0145] In S41, the information processing device 1 determines which algorithm to use.

[0146] The information processing device 1, if it is the first time or if the result of the previous convergence determination (S9) indicates that significant optimization is needed before convergence, decides that both the first and second probabilistic algorithms should be used (indicated as "both" in S41), and proceeds to the convergence determination (S9) after sequentially performing S7 and S8.

[0147] If the information processing device 1 determines, based on the result of the previous convergence determination (S9), that it should use the first probabilistic algorithm (referred to as "the first probabilistic algorithm" in S41), it performs S21 and then proceeds to the convergence determination (S9).

[0148] Based on the results of the previous convergence determination (S9), if the information processing device 1 determines that minor optimizations are needed before convergence, it should use a second probabilistic algorithm (referred to as "second probabilistic algorithm" in S41), and after performing S31, proceeds to the convergence determination (S9).

[0149] This allows the model extraction process (S200) to be performed efficiently according to the result of the convergence determination (S9).

[0150] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of symbols]

[0151] 1. Information processing equipment, CS circuit simulator, MD measuring device.

Claims

1. To acquire multiple device characteristics under operating terminal conditions, Setting multiple model parameters corresponding to the aforementioned multiple device characteristics, To find a single objective function that includes the aforementioned multiple model parameters, Minimizing the aforementioned single objective function and optimizing the aforementioned multiple model parameters, Outputting the above-mentioned optimized model parameters to the circuit simulator, Circuit simulation methods including...

2. To find the aforementioned single objective function, Using the aforementioned multiple model parameters, calculate multiple device characteristics under the aforementioned operating terminal conditions, The single objective function is generated using the multiple differences between the multiple device characteristics obtained and the multiple device characteristics calculated. including The circuit simulation method according to claim 1.

3. The generation of the aforementioned single objective function is The process involves generating multiple scalarization functions using the aforementioned multiple differences, To generate the single objective function that includes the plurality of scalarization functions, including The circuit simulation method according to claim 1.

4. The generation of the aforementioned single objective function is The process involves generating multiple scalarization functions using the aforementioned multiple differences, The single objective function is generated by taking the weighted mean square root of the plurality of scalarization functions, including The circuit simulation method according to claim 3.

5. Optimizing the aforementioned multiple model parameters is This includes using a probabilistic algorithm to find the multiple model parameters that minimize the single objective function. The circuit simulation method according to claim 1.

6. Optimizing the aforementioned multiple model parameters is The first probabilistic algorithm is used to search for initial values ​​for the single objective function, Using a second probabilistic algorithm, find the multiple model parameters that minimize the single objective function with the searched initial values, including The circuit simulation method according to claim 5.

7. To obtain the above means, This includes performing measurements on the device under the aforementioned operating terminal conditions and obtaining the multiple device characteristics under those operating terminal conditions. The circuit simulation method according to claim 1.

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