MEMS and method for manufacturing the same

Abstract

To provide MEMS and a method for manufacturing the same that can reduce manufacturing costs. [Solution] By dry etching, the piezoelectric film 20 and the first conductive film 21 are removed, leaving the outer region S1 that encloses the two inner regions S21 and S22. At the same time, the second conductive film 22 (one of the second conductive films 221) and the piezoelectric film 20 are removed in the first pad region S01 that is enclosed in one of the two inner regions S21 and S22, the inner region S21.

Description

Technical Field

[0001] The present invention relates to MEMS and a manufacturing method thereof.

Background Art

[0002] As a device using a piezoelectric film, MEMS (Micro Electro Mechanical Systems) such as an optical deflector are known. MEMS has a structure in which a thermal oxide film (SiO2 film), a lower electrode, a piezoelectric film (for example, PZT film), and an upper electrode are sequentially laminated on a substrate (for example, an SOI substrate). The portion where the lower electrode, the piezoelectric film, and the upper electrode overlap functions as an actuator. Also, the piezoelectric film and the upper electrode are removed so that the lower electrode is exposed at the PAD portion. As a method for manufacturing the device, a method has been proposed in which a lower electrode, a piezoelectric film, and an upper electrode are sequentially formed on a substrate and processed into a desired shape by etching or the like (see, for example, Patent Documents 1 and 2).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] According to the method for manufacturing MEMS described in Patent Document 1, as shown in FIG. 10, first, in the pad region S0, the upper electrode Q22 and the piezoelectric film Q20 are etched until they reach the lower electrode Q21, and then the excess lower electrode Q21 is etched. As a result, the substrate Q1 (an oxide film Q12 is formed on the surface of the active layer Q10.) is exposed, so that the adhesion between the insulating protective film (for example, SiN film) formed in a subsequent process and the substrate Q1 is increased.

[0005] However, in the second etching, due to processing accuracy issues, it is not possible to precisely align the edges of the piezoelectric film Q20 and the lower electrode Q21 defined by the first etching, and an exposed portion of the lower electrode Q21 inevitably forms. As a result, as shown in Figure 10, the edge X of the lower electrode Q21 protrudes beyond the edge of the piezoelectric film Q20 and is exposed. In this situation, if the adhesion between the lower electrode Q21 and the substrate Q1 or oxide film Q12 directly beneath it is low, the stress applied during the cleaning process of the resist used for etching and the two-fluid cleaning process of debris may cause the lower electrode Q21 to peel off from the substrate Q1 starting from the edge X.

[0006] According to the MEMS manufacturing method described in Patent Document 2, in order to avoid exposure of the end of the lower electrode Q21 that protrudes from the edge of the piezoelectric film Q20, two etching processes are required: etching at the edge of the substrate Q1 using photoresist PR, as shown in Figure 11A, and etching up to the lower electrode Q21 in the pad region S0 using photoresist PR, as shown in Figure 11B. Since a portion of the piezoelectric film Q20 and the lower electrode Q21 are removed together in the first etching, the edges of the piezoelectric film Q20 and the lower electrode Q21 are aligned, as shown in Figure 11A. However, since the piezoelectric film Q20, which takes a particularly long time to etch, needs to be etched twice during the two etching processes, it leads to an increase in processing costs.

[0007] Therefore, the present invention aims to provide MEMS and a method for manufacturing the same that can reduce manufacturing costs. [Means for solving the problem]

[0008] The MEMS of the present invention circuit board and In the outer region, a first conductive film formed on the surface of the substrate, A piezoelectric film formed on the surface of the first conductive film, excluding the first pad region of the outer region, The device comprises a second conductive film formed on the surface of the piezoelectric film in an area encompassed by the outer region and the first pad region, excluding the first pad region from one of the inner regions that encompasses the first pad region, and in the other inner region that is spaced apart from the first inner region.

[0009] The method for manufacturing MEMS according to the present invention is A first film deposition step involves sequentially depositing a first conductive film, a piezoelectric film, and a second conductive film onto a substrate, After the first film formation step, a first etching step is performed in which the second conductive film is removed by dry etching, leaving two inner regions that are separated from each other. The method includes, after the first etching step, a second etching step in which the piezoelectric film and the first conductive film are removed by dry etching, leaving the outer region encompassing the two inner regions, and the second conductive film and the piezoelectric film are removed in the first pad region encompassed by one of the two inner regions.

[0010] According to the MEMS and its manufacturing method, the piezoelectric film and the first conductive film are removed by dry etching, leaving the outer region that encloses the two inner regions. Simultaneously, the second conductive film and the piezoelectric film are removed in the first pad region that is enclosed within one of the two inner regions. In other words, the removal of the piezoelectric film and the first conductive film in the region excluding the outer region, and the removal of the second conductive film and the piezoelectric film in the first pad region, proceed simultaneously in a single etching process.

[0011] Furthermore, if the first conductive film and the second conductive film are made of the same material and designed to the same thickness, the two removal processes can be completed at approximately the same time. In this way, a single etching process (the second etching process) aligns the outer edges of the piezoelectric film and the first conductive film, and exposes the first conductive film (lower electrode) in the first pad region. This reduces manufacturing costs accordingly. [Brief explanation of the drawing]

[0012] [Figure 1] Explanatory drawing of the configuration of a MEMS as one embodiment of the present invention. [Figure 2A] Explanatory drawing regarding manufacturing process 1 of a MEMS as one embodiment of the present invention. [Figure 2B] Explanatory drawing regarding manufacturing process 2 of a MEMS as one embodiment of the present invention. [Figure 2C] Explanatory drawing regarding manufacturing process 3 of a MEMS as one embodiment of the present invention. [Figure 2D] Explanatory drawing regarding manufacturing process 4 of a MEMS as one embodiment of the present invention. [Figure 3A] Explanatory drawing regarding manufacturing process 5 of a MEMS as one embodiment of the present invention. [Figure 3B] Explanatory drawing regarding manufacturing process 6 of a MEMS as one embodiment of the present invention. [Figure 3C] Explanatory drawing regarding manufacturing process 7 of a MEMS as one embodiment of the present invention. [Figure 4A] Explanatory drawing regarding manufacturing process 2 of a MEMS as the first modification example of the present invention. [Figure 4B] Explanatory drawing regarding manufacturing process 3 of a MEMS as the first modification example of the present invention. [Figure 4C] Explanatory drawing regarding manufacturing process 4 of a MEMS as the first modification example of the present invention. [Figure 5A] Explanatory drawing regarding manufacturing process 2 of a MEMS as the second modification example of the present invention. [Figure 5B] Explanatory drawing regarding manufacturing process 3 of a MEMS as the second modification example of the present invention. [Figure 5C] Explanatory drawing regarding manufacturing process 3-2 of a MEMS as the second modification example of the present invention. [Figure 5D] Explanatory drawing regarding manufacturing process 3 of a MEMS as the second modification example of the present invention. [Figure 6] Explanatory drawing of the configuration of an optical deflector as a MEMS. [Figure 7] Cross-sectional view of a MEMS along the line VII-VII of FIG. 6. [Figure 8] Explanatory drawing of the configuration of a sound emitter as a MEMS. [Figure 9] Cross-sectional view of the MEMS along the line IX-IX in Figure 8. [Figure 10] A diagram illustrating the manufacturing process of MEMS using the conventional method 1. [Figure 11A] An explanatory diagram of the manufacturing process 1 of MEMS using the conventional method 2. [Figure 11B] Diagram illustrating the manufacturing process 2 of MEMS using the conventional method 2. [Modes for carrying out the invention]

[0013] (composition) The MEMS shown in Figure 1, as one embodiment of the present invention, is a cantilever actuator comprising a substrate 1 and a piezoelectric element 2. The upper part of Figure 1 shows a plan view of the MEMS, and the lower part of Figure 1 shows a schematic cross-sectional view of the MEMS. The MEMS may have different configurations, such as an optical deflector (MEMS mirror), but the structure of the main parts is substantially the same as in this embodiment.

[0014] As shown in the lower part of Figure 1, the substrate 1 is made of an SOI wafer and has a five-layer structure in which the first oxide film 12, active layer 10, second oxide film 14, support layer 16, and third oxide film 18 are stacked in that order from top to bottom.

[0015] The active layer 10 is composed of a silicon single crystal of an SOI wafer. The first oxide film 42 is, for example, an SiO2 film and is formed on one main surface (upper surface) of the active layer 10. The second oxide film 14 is, for example, a BOx film and is formed on the other main surface (lower surface) of the active layer 10. The support layer 16 is a handle silicon layer and is formed on the surface (lower surface) of the second oxide film 14. The third oxide film 18 is, for example, an SiO2 film and is formed on the surface (lower surface) of the support layer 16. As shown in the lower part of Figure 1, the support layer 16 and the third oxide film 18 are removed in a portion of the substrate 1 to ensure flexibility in that portion.

[0016] As shown in the lower part of Figure 1, the piezoelectric element 2 comprises an active layer 10, a piezoelectric film 20, a first conductive film 21, a second conductive film 22, and a protective film 24.

[0017] The first conductive film 21 is made of a metal such as Pt. The first conductive film 21 is formed on the surface of the substrate 1 (more precisely, the first oxide film 12) as shown in the lower part of Figure 1, in the substantially rectangular outer region S1 shown in the upper part of Figure 1.

[0018] The piezoelectric film 20 is made of a piezoelectric material such as PZT (lead zirconate titanate). The piezoelectric film 20 is formed on the surface of the first conductive film 21, as shown in the lower part of Figure 1, in the region of the outer region S1 shown in the upper part of Figure 1, excluding the substantially rectangular first pad region S01 that is enclosed by the outer region S1.

[0019] The second conductive film 22 is made of a metal such as Pt. The first conductive film 21 and the second conductive film 22 may be made of the same material and designed to have the same thickness. The second conductive film 22 is made up of one second conductive film 221 and the other second conductive film 222 that are spaced apart from each other. The first second conductive film 221 is enclosed in the outer region S1 shown in the upper part of Figure 1 and is formed on the surface of the piezoelectric film 20 as shown in the lower part of Figure 1 in the region of one substantially rectangular inner region S21 that encloses the first pad region S01, excluding the first pad region S01. The other second conductive film 222 (lower electrode) is formed on the surface of the piezoelectric film 20 as shown in the lower part of Figure 1 in the other substantially rectangular inner region S22 that is spaced apart from the one inner region S21 shown in the upper part of Figure 1.

[0020] The protective film 24 is made of an insulator such as SiN. The protective film 24 completely encloses the first conductive film 21, the piezoelectric film 20, and the second conductive film 22, except for the first pad region S01 shown in Figure 1 and the substantially rectangular second pad region S02 which is enclosed within the other inner region S22. As shown in Figure 1, a portion of the first conductive film 21 (lower electrode) is exposed in the first pad region S01, and a portion of the other second conductive film 222 (upper electrode) is exposed in the second pad region S02. The protective film 24 may be omitted.

[0021] (Method of manufacturing MEMS) The manufacturing method for the MEMS with the above configuration will be explained using Figures 2A to 2D and Figures 3A to 3C. In each of Figures 2A to 2D and Figures 3A to 3C, the upper part shows a plan view of the MEMS or its intermediate during the manufacturing process, and the lower part shows a schematic cross-sectional view of the MEMS or its intermediate during the manufacturing process.

[0022] In the first film deposition process, as shown in the lower part of Figure 2A, a first conductive film 21, a piezoelectric film 20, and a second conductive film 22 are sequentially deposited on the surface of the SOI wafer constituting the substrate 1.

[0023] Next, in the first etching step, a photosensitive agent is dropped onto the front side of the SOI wafer on which the first conductive film 21, piezoelectric film 20, and second conductive film 22 are formed. The SOI wafer is then rotated around a rotation axis perpendicular to the surface, thereby forming a resist film 3 with a thickness of 5 to 10 μm on the surface of the second conductive film 22. AZ6130 (viscosity: 70 cSt) was used as the photosensitive agent, and the rotation speed of the SOI wafer was controlled within the range of 500 to 1000 rpm. Furthermore, the surface of the SOI wafer on which the resist film 3 is formed is covered with a photomask, and ultraviolet light is transmitted through the photomask, exposing the resist film 3 to ultraviolet light in the area excluding two roughly rectangular inner regions S21 and S22 that are spaced apart from each other (see upper part of Figure 1). The exposed portion of the resist film 3 is removed by a development process. Then, by a dry etching process, the second conductive film 22 is partially removed, leaving the two inner regions S21 and S22, as shown in Figure 2B. As a result, one second conductive film 221 and the other second conductive film 222, which constitutes the lower electrode, are formed on the surface of the piezoelectric film 20.

[0024] Next, in the second etching process, a resist film 3 is formed on the front side of the SOI wafer, similar to the first etching process. Through a photomask, the resist film 3 is exposed to ultraviolet light in the area outside the roughly rectangular outer region S1 that encloses the two inner regions S21 and S22, and in the first pad region S01 that is enclosed within one of the inner regions S21 of the outer region S1. The exposed portion of the resist film 3 is removed by a development process. As a result, as shown in Figure 2C, the area of ​​the roughly rectangular outer region S1, excluding the first pad region S01, is covered by the resist film 3.

[0025] Then, as shown in Figure 2D, the piezoelectric film 20 and the first conductive film 21 are partially removed by dry etching, leaving the outer region S1, and one of the second conductive film 221 and the piezoelectric film 20 are partially removed in the first pad region S01.

[0026] Next, in the second film deposition process, as shown in Figure 3A, a protective film 24 is deposited on the front side of the SOI wafer, completely enclosing the first conductive film 21, the piezoelectric film 20, and the second conductive film 22 (one second conductive film 221 and the other second conductive film 222). The protective film 24 is also formed on the surface of the SOI wafer or substrate 1, at least in the region surrounding the outer region S1 (see upper part of Figure 1).

[0027] Next, in the third etching step, a resist film 3 is formed on the surface of the SOI wafer, similar to the first etching step, and the resist film 3 is exposed to ultraviolet light through a photomask in the first pad region S01 and the second pad region S02 which is enclosed in the other inner region S22 (see upper part of Figure 1). The exposed portion of the resist film 3 is removed by a development process. Then, by dry etching, as shown in Figure 3B, the protective film 24 is removed in the region inside the contour line of the first pad region S01 and also removed in the second pad region S02. As a result, as shown in Figure 3B, in the first pad region S01, the inner surface defined by one of the second conductive films 221 and the piezoelectric film 20 is also covered with the protective film 24.

[0028] Furthermore, similar to the first to third etching steps, the etching process partially removes the support layer 46 and the third oxide film 18 on the back side of the SOI wafer or substrate 1, as shown in the lower part of Figure 3C. These steps result in the production of a MEMS having the configuration shown in Figure 1.

[0029] (effect) According to the MEMS and its manufacturing method, the piezoelectric film 20 and the first conductive film 21 are removed by dry etching, leaving the outer region S1 that encloses the two inner regions S21 and S22 (see Figure 2C). Simultaneously, the second conductive film 22 (one of the second conductive films 221) and the piezoelectric film 20 are removed in the first pad region S01 that is enclosed in one of the two inner regions S21 and S22 (see Figure 2C). In other words, the removal of the piezoelectric film 20 and the first conductive film 21 in the region excluding the outer region S1 (the region surrounding the outer region S1) and the removal of one of the second conductive films 221 and the piezoelectric film 20 in the first pad region S01 proceed simultaneously in a single etching process.

[0030] Furthermore, if the first conductive film 21 and the second conductive film 22 are made of the same material and designed to the same thickness, the two removal processes can be completed at approximately the same time. In this way, the outer edges of the piezoelectric film 20 and the first conductive film 21 are aligned by a single etching process (second etching process), and the first conductive film 21 (lower electrode) is exposed in the first pad region S01. Therefore, manufacturing costs are reduced accordingly.

[0031] (Method for manufacturing MEMS (first modified example)) According to the first modified method for manufacturing MEMS, in the first etching step, the second conductive film 22 is partially removed by dry etching, leaving two inner regions S21 and S22, as shown in Figure 4A (corresponding to Figure 2B), and a portion of the piezoelectric film 20 is removed in the region other than the two inner regions S21 and S22. As a result, one second conductive film 221 and the other second conductive film 222 constituting the lower electrode are formed on the surface of the piezoelectric film 20.

[0032] In the second etching process, a resist film 3 is formed on the front side of the SOI wafer, similar to the first etching process. Through a photomask, the resist film 3 is exposed to ultraviolet light in the area outside the roughly rectangular outer region S1 that encloses the two inner regions S21 and S22, and in the first pad region S01 that is enclosed within one of the inner regions S21 of the outer region S1. The exposed portion of the resist film 3 is removed by a development process. As a result, as shown in Figure 4B (corresponding to Figure 2C), the area of ​​the roughly rectangular outer region S1, excluding the first pad region S01, is covered by the resist film 3.

[0033] Then, through dry etching, as shown in Figure 4C (corresponding to Figure 2D), the piezoelectric film 20 and the first conductive film 21 are partially removed, leaving the outer region S1, and one of the second conductive films 221 and the piezoelectric film 20 are partially removed in the first pad region S01. As a result, as shown in Figure 4C, a portion (upper part) of the piezoelectric film 20 is removed in regions other than the two inner regions S21 and S22.

[0034] Other steps are the same as those in the above embodiment, and therefore will not be described.

[0035] (Method for manufacturing MEMS (second modified example)) According to the second modified method for manufacturing MEMS, in the first etching step, the second conductive film 22 is partially removed by dry etching, leaving two inner regions S21 and S22, as shown in Figure 5A (corresponding to Figure 2B). As a result, one second conductive film 221 and the other second conductive film 222 constituting the lower electrode are formed on the surface of the piezoelectric film 20.

[0036] In the second etching process, a resist film 3 is formed on the front side of the SOI wafer, similar to the first etching process. Through a photomask, the resist film 3 is exposed to ultraviolet light in the area outside the roughly rectangular outer region S1 that encloses the two inner regions S21 and S22, and in the first pad region S01 that is enclosed within one of the inner regions S21 of the outer region S1. The exposed portion of the resist film 3 is removed by a development process. As a result, as shown in Figure 5B (corresponding to Figure 2C), the area of ​​the roughly rectangular outer region S1, excluding the first pad region S01, is covered by the resist film 3.

[0037] Furthermore, as shown in Figure 5C, the dry etching process partially removes the piezoelectric film 20 and the first conductive film 21, leaving the outer region S1, and partially removes one of the second conductive films 221 in the first pad region S01, while partially removing the piezoelectric film 20, leaving the lower part. Then, as shown in Figure 5D (corresponding to Figure 2D), the dry etching process removes the lower part of the piezoelectric film 20 in the first pad region S01.

[0038] Other steps are the same as those in the above embodiment, and therefore will not be described.

[0039] (Other embodiments of MEMS) Figure 6 shows a front view (viewed from the front) of an optical deflector 40 as a MEMS in another embodiment of the present invention. The optical deflector 40 comprises, as its main elements, a mirror section 41, torsion bars 421 and 422, internal piezoelectric actuators 431 and 432, a movable frame section 44, external piezoelectric actuators 451 and 452, and a fixed frame section 46. A drive voltage supply section 200 is provided in the fixed frame section 46. For convenience of explanation, a three-axis Cartesian coordinate system consisting of the X, Y, and Z axes is defined. The X and Y axes are the lateral and vertical directions in a front view of the optical deflector 40. The Z axis is the thickness direction of the optical deflector 40.

[0040] Figure 6 shows only a single first pad region S01 and a single second pad region S02. In practice, for example, two first pad regions S01 and six second pad regions S02 may be provided on the fixed frame portion 46 (see, for example, paragraphs 0050 to 0055 and Figure 1 of Japanese Patent Application Publication No. 2022-185637).

[0041] In the first pad region S01, a portion of the first conductive film 21 connected to the first conductive film 21 (lower electrode) of the first inner piezoelectric actuator 431 and the first conductive film 21 (lower electrode) of the first outer piezoelectric actuator 451 is exposed. In the second pad region S01, a portion of the first conductive film 21 connected to the first conductive film 21 (lower electrode) of the second inner piezoelectric actuator 432 and the first conductive film 21 (lower electrode) of the second outer piezoelectric actuator 452 is exposed.

[0042] In the first second pad region S02, a portion of the second conductive film 22 connected to the second conductive film 22 (upper electrode) of the first inner piezoelectric actuator 431 is exposed. In the second second pad region S02, a portion of the second conductive film 22 connected to the second conductive film 22 (upper electrode) of the second inner piezoelectric actuator 432 is exposed. In the third second pad region S02, a portion of the second conductive film 22 connected to the second conductive film 22 (upper electrode) of each of the odd-numbered cantilevers 48 in the X-direction among the multiple cantilevers 48 of the first outer piezoelectric actuator 451 is exposed. In the fourth second pad region S02, a portion of the second conductive film 22 connected to each of the even-numbered cantilevers 48 in the X-direction among the multiple cantilevers 48 of the first outer piezoelectric actuator 451 is exposed. In the fifth second pad region S02, a portion of the second conductive film 22 connected to each of the second conductive film 22 (upper electrode) of the odd-numbered cantilevers 48 in the X-direction among the multiple cantilevers 48 of the second outer piezoelectric actuator 452 is exposed. In the sixth second pad region S02, a portion of the second conductive film 22 connected to each of the second conductive film 22 (upper electrode) of the even-numbered cantilevers 48 in the X-direction among the multiple cantilevers 48 of the second outer piezoelectric actuator 452 is exposed.

[0043] Although only a single drive voltage supply unit 200 is shown in Figure 6, multiple drive voltage supply units 200, each containing one or more pad regions from the two first pad regions S01 and the six second pad regions S02, may be provided in the fixed frame 46. One drive voltage supply unit 200 containing one first pad region S01 and one or more (e.g., two to five) second pad regions S02, and other drive voltage supply units 200 containing other first pad regions S01 and one or more (e.g., two to five) second pad regions S02 may be provided in the fixed frame 46.

[0044] The mirror portion 41 is capable of reciprocating rotation around rotation axes rot_x and rot_y that are perpendicular to the center O of the circular mirror portion 41. When the mirror portion 41 is facing directly forward, the rotation axes rot_x and rot_y are parallel to the X-axis and Y-axis, respectively.

[0045] A pair of torsion bars 421 and 422 extend from both sides of the mirror section 41 along the rotation axis rot_y. A pair of internal piezoelectric actuators 431 and 432 are coupled to each other in the X-axis direction, forming an overall elongated, roughly elliptical shape. This roughly elliptical shape surrounds the mirror section 41 and the torsion bars 42.

[0046] The movable frame 44 has the shape of an ellipse larger than the ellipse formed by the pair of internal piezoelectric actuators 431 and 432. This ellipse surrounds the ellipse of the pair of internal piezoelectric actuators 431 and 432. Each internal piezoelectric actuator 43 is coupled to the inner circumference of the movable frame 44 on a straight line in the X-axis direction passing through the center O.

[0047] Each external piezoelectric actuator 45 is interposed between the movable frame portion 44 and the fixed frame portion 46. Each external piezoelectric actuator 45 is equipped with a plurality of cantilevers 48 whose vertical direction is aligned with the Y-axis. Adjacent cantilevers 48 in the X-axis direction are coupled to each other at either one or the other end in the Y-axis direction. Depending on the arrangement order of the cantilevers 48 in the X-axis direction, the coupling points alternate between one and the other end in the Y-axis direction. In this way, the entirety of the plurality of cantilevers 48 in each external piezoelectric actuator 45 constitutes a meander pattern assembly.

[0048] The external piezoelectric actuator 45 is driven by a drive voltage from the drive voltage supply unit, causing the movable frame 44 to reciprocate at a non-resonant frequency around a rotation axis in the X-axis direction (≠ rotation axis rot_x) passing through the center O. As a result, the mirror 41 reciprocates at a non-resonant frequency around the rotation axis rot_x.

[0049] The internal piezoelectric actuator 43 is driven by another drive voltage from the drive voltage supply unit, causing the torsion bar 42 to twist and vibrate around the rotation axis rot_y at the resonant frequency. As a result, the mirror section 41 reciprocates around the rotation axis rot_y at the resonant frequency.

[0050] Figure 7 shows a cross-sectional view of the optical deflector 40 along the line VII-VII in Figure 6. In Figure 7, for simplification, the multiple cantilevers 48 of the first outer piezoelectric actuator 451 are shown collectively as the first outer piezoelectric actuator 451. Similarly, in Figure 7, for simplification, the multiple cantilevers 48 of the third outer piezoelectric actuator 452 are shown collectively as the second outer piezoelectric actuator 452. The substrate 1 is made of an SOI wafer and has a five-layer structure in which a third oxide film 18, a support layer 16, a second oxide film 14, an active layer 10, and a first oxide film 12 are stacked in that order from bottom to top (see bottom of Figure 1). The piezoelectric element 2 has a layer structure in which an active layer 10, a piezoelectric film 20, a first conductive film 21, and a second conductive film 22 are stacked in that order from bottom to top (see bottom of Figure 1). The piezoelectric element 2 may also have a protective film 24.

[0051] The mirror portion 41 has a metal layer 410 that covers the surface of the first oxide film 12. The surface of the metal layer 410 is a reflective surface for light incident on the mirror portion 41 from a light source (not shown). The active layer 10 forms a common substrate layer for the mirror portion 41, the inner piezoelectric actuator 43, and the outer piezoelectric actuator 45.

[0052] (Even more embodiments of MEMS) Figure 8 shows a front view (viewed from the front) of a piezoelectric sound generator 60 as a MEMS according to yet another embodiment of the present invention. The piezoelectric sound generator 60 comprises, as its main elements, a vibrating diaphragm 26, a fixed frame 61, a vibration generating section 610, a right support frame 611 and a left support frame 612, and a first electrode region 621 and a second electrode region 622. For convenience of explanation, a three-axis Cartesian coordinate system consisting of the X, Y, and Z axes is defined. The X and Y axes are the lateral and vertical directions in a front view of the piezoelectric sound generator 60. The Z axis is the thickness direction of the piezoelectric sound generator 40.

[0053] As shown in Figure 8, the fixed frame portion 61 is formed in a substantially rectangular shape so as to surround a substantially rectangular area, and has an upper frame portion and a lower frame portion extending parallel to each other in the x direction, and a left frame portion and a right frame portion extending parallel to each other in the y direction. The vibration generating portion 610 is formed in a substantially rectangular shape and is arranged so as to be surrounded by the fixed frame portion 61. The right support frame 611 extends inward from the substantially center of the right frame portion of the fixed frame portion 61 and parallel to the Y direction, and is connected to the right side of the vibration generating portion 610. The left support frame 612 extends inward from the substantially center of the left frame portion of the fixed frame portion 61 and parallel to the Y direction, and is connected to the left side of the vibration generating portion 610. The vibrating membrane 26 is formed in a substantially rectangular shape from resin or the like, and its peripheral edge is attached to the inner peripheral edge of the fixed frame portion 61, and its central part is attached to the vibration generating portion 610.

[0054] As shown in Figure 8, the first electrode region 621 is located approximately in the center of the right frame portion of the fixed frame 61. One of the second conductive films 221 is placed in the first electrode region 621. In the first pad region S01 of the first electrode region 621, which is enclosed by the one of the second conductive films 221, a portion of the first conductive film 21 (lower electrode) is exposed. As shown in Figure 8, the second electrode region 622 is located approximately in the center of the left frame portion of the fixed frame 61. The other second conductive film 222 is placed in the second electrode region 622. In the second pad region S02 of the second electrode region 622, which is enclosed by the other second conductive film 222, a portion of the other second conductive film 222 (upper electrode) is exposed.

[0055] When a driving voltage is applied between the first conductive film 21 (lower electrode) exposed in the first electrode region 621 and the other second conductive film 222 (upper electrode) exposed in the second electrode region 622, the vibration generating unit 610 vibrates, causing the vibrating membrane 26 to vibrate and generate sound.

[0056] Figure 9 shows a cross-sectional view of the piezoelectric generator 60 along the line IX-IX in Figure 8. The substrate 1 is made of an SOI wafer and has a five-layer structure in which a third oxide film 18, a support layer 16, a second oxide film 14, an active layer 10, and a first oxide film 12 are stacked in that order from bottom to top (see bottom of Figure 1). The piezoelectric element 2 has a layer structure in which an active layer 10, a piezoelectric film 20, a first conductive film 21, and a second conductive film 22 are stacked in that order from bottom to top (see bottom of Figure 1). The piezoelectric element 2 may also be provided with a protective film 24.

[0057] As shown in Figure 9, in the vibration generating section 610, the third oxide film 18, the support layer 16, and the second oxide film 14 of the substrate 1 are omitted. As described above, in the first pad region S01 of the first electrode region 621, which is enclosed by one of the second conductive films 221, a part of the first conductive film 21 (lower electrode) is exposed. In the second pad region S02 of the second electrode region 622, which is enclosed by the other second conductive film 222, a part of the other second conductive film 222 (upper electrode) is exposed. [Explanation of symbols]

[0058] 1... Circuit board 10‥Active layer 12. First oxide film 14. Second oxide film 16‥Support layer 18. Third oxide film 2. Piezoelectric element 20. Piezoelectric film 21. First conductive film (lower electrode) 22...Second conductive film 221... The second conductive film 222... The other second conductive film (upper electrode) 24‥Protective film S01...First pad area S02...Second pad area S1‥Outer area S21...One inner region S22... The other inner region

Claims

1. circuit board and In the outer region, a first conductive film formed on the surface of the substrate, A piezoelectric film formed on the surface of the first conductive film, excluding the first pad region of the outer region, The piezoelectric film comprises a second conductive film formed on the surface of the piezoelectric film in the area encompassed by the outer region and the area of ​​one inner region that encompasses the first pad region, excluding the first pad region, and the other inner region that is spaced apart from the first inner region. MEMS.

2. In the MEMS described in claim 1, The first conductive film and the second conductive film are formed from the same material and have the same thickness. MEMS.

3. In the MEMS according to claim 1 or 2, The protective film encompasses the first conductive film, the piezoelectric film, and the second conductive film, excluding the first pad region and the second pad region which is enclosed within the other inner region. MEMS.

4. A first film deposition step involves sequentially depositing a first conductive film, a piezoelectric film, and a second conductive film onto a substrate, After the first film formation step, a first etching step is performed in which the second conductive film is removed by dry etching, leaving two inner regions that are separated from each other. The process includes, after the first etching step, a second etching step in which the piezoelectric film and the first conductive film are removed by dry etching, leaving the outer region encompassing the two inner regions, and the second conductive film and the piezoelectric film are removed in the first pad region encompassed by one of the two inner regions. A method for manufacturing MEMS.

5. In the method for manufacturing MEMS according to claim 4, In the first film formation step, the first conductive film and the second conductive film are formed using the same material and having the same thickness. A method for manufacturing MEMS.

6. In the method for manufacturing MEMS according to claim 4 or 5, After the second etching step, a second film formation step is performed to form a protective film that completely encloses the first conductive film, the piezoelectric film, and the second conductive film. The process includes, after the second film formation step, a third etching step in which the protective film is removed in the first pad region by etching, and the protective film is removed in the second pad region which is enclosed within the other inner region of the two inner regions. A method for manufacturing MEMS.

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