Three-layer vertical shunt resistor, power semiconductor, and method for manufacturing a three-layer vertical shunt resistor.

Abstract

The present invention provides a three-layer vertical shunt resistor, a power semiconductor, and a method for manufacturing a three-layer vertical shunt resistor that are free from defects, non-uniformity, and voids at the junction between the resistive material and the electrode material. [Solution] A three-layer vertical shunt resistor may include: a first resistor containing a resistive material; a second resistor coupled to the upper part of the first resistor and made of a resistive material having better electrical conductivity than the resistive material of the first resistor; a first terminal coupled to the lower part of the first resistor and made of a metal material having better electrical conductivity than the resistive material of the first resistor; and a second terminal coupled to the lower part of the first resistor, positioned apart from the first terminal, and made of a metal material having better electrical conductivity than the resistive material of the first resistor.

Description

Technical Field

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[0001] The present invention relates to a three-layer vertical shunt resistor, a power semiconductor, and a method for manufacturing a three-layer vertical shunt resistor, and more particularly, to a vertical shunt resistor having a three-layer structure, a power semiconductor, and a method for manufacturing a vertical shunt resistor.

Background Art

[0002] A shunt resistor is a low-value precision resistor used as a current measurement element in a high current circuit. The shunt resistor may be inserted into a circuit to be monitored and used as a current sensor. Since the shunt resistor measures the voltage drop generated at both ends of the shunt resistor inserted into the circuit to be monitored and can infer the current amount of the circuit according to Ohm's law (I = V / R), it can be used as a current sensor.

[0003] The shunt resistor, which is a current sensor, is required to have high precision and miniaturization for accurate current measurement, protection of electronic circuits from overvoltage, and equal charge and discharge of batteries in the inverter, battery management system, and charging system of xEV electric vehicles, and solar inverters. As the next-generation power semiconductors such as SiC and GaN are rapidly increasing, the demand for shunt resistors is greatly increasing.

[0004] In recent years, in the cooling method of power semiconductors for electric vehicles, compared with the conventional single-sided cooling type power module, the demand for a double-sided cooling method, which has excellent cooling performance and can make the size of the power module more compact, has been greatly increasing, and a shunt resistor is built in the power module. However, since the existing shunt resistor has a long electrode length, there is a problem that miniaturization and integration of the power module packaging are impossible.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

[0006] The problem that the present invention aims to solve is to provide a three-layer vertical shunt resistor, a power semiconductor, and a method for manufacturing a three-layer vertical shunt resistor that is free from defects, non-uniformity, and voids at the junction between the resistive material and the electrode material.

[0007] Another problem that the present invention aims to solve is to provide a three-layer vertical shunt resistor, a power semiconductor, and a method for manufacturing a three-layer vertical shunt resistor that can be manufactured in an ultra-compact size while providing high power capacity.

[0008] Another problem that the present invention aims to solve is to provide a three-layer vertical shunt resistor, a power semiconductor, and a method for manufacturing a three-layer vertical shunt resistor, which can be manufactured such that the terminals of the shunt resistor are formed in the same layer and direction. [Means for solving the problem]

[0009] The three-layer vertical shunt resistor according to the present invention may include: a first resistor containing a resistive material; a second resistor coupled to the upper part of the first resistor and formed of a resistive material having better electrical conductivity than the resistive material of the first resistor; a first terminal coupled to the lower part of the first resistor and formed of a metal material having better electrical conductivity than the resistive material of the first resistor; and a second terminal coupled to the lower part of the first resistor, positioned apart from the first terminal, and formed of a metal material having better electrical conductivity than the resistive material of the first resistor.

[0010] The resistive material of the first resistor may include at least one of the following: Cu-Mn alloy, Cu-Ni alloy, Ni-Cr alloy, Cu-Mn-Ni alloy, and Fe-Cr alloy.

[0011] The metal material of the second resistor may be formed from a single material.

[0012] The metal material of the second resistor may be one of Cu, Ni, and Cr.

[0013] The thickness of the first resistor may be 0.15 mm to 1.0 mm.

[0014] The thickness of the second resistor may be 0.02 mm to 0.7 mm.

[0015] The thickness of the first terminal or the second terminal may be 0.1 mm to 0.8 mm.

[0016] The second resistor and the first terminal may be diffusely joined by the current applied to the upper and lower surfaces of the first resistor.

[0017] The power semiconductor according to the present invention may include a three-layer vertical shunt resistor according to the present invention.

[0018] A method for manufacturing a three-layer vertical shunt resistor according to the present invention may include the steps of: preparing a first resistor containing a resistive material; preparing a second resistor made of a resistive material having better electrical conductivity than the resistive material of the first resistor; preparing first and second terminals made of a metal material having better electrical conductivity than the resistive material of the first resistor; forming a laminate by stacking the first resistor between the second resistor and the first terminal, the second resistor and the second terminal, and the first and second terminals spaced apart; and applying current to the laminate to diffuse bond the first terminal, the second terminal, the first resistor, and the second resistor. [Effects of the Invention]

[0019] According to the three-layer vertical shunt resistor, power semiconductor, and method for manufacturing the three-layer vertical shunt resistor of the present invention, by applying a current and using a diffusion bonding method, a first terminal and a second terminal formed of an electrode material, a first resistor formed of a resistor material, and a second resistor formed of a resistor material are joined, thereby providing a three-layer vertical shunt resistor without defects, non-uniformities, and voids at the joining sites.

[0020] Also, according to the present invention, since the electrode material and the resistor material are arranged vertically, a shunt resistor of the same capacitance can be manufactured with a shorter length, so that a high power capacitance is provided and a super-small three-layer vertical shunt resistor can be provided.

[0021] Also, according to the present invention, since a plurality of terminals can be formed at the lower part of the first resistor, a three-layer vertical shunt resistor having a plurality of electrodes in the same layer and the same direction can be provided.

Brief Description of the Drawings

[0022] [Figure 1] It is a diagram showing the overall form of a three-layer vertical shunt resistor according to a preferred embodiment of the present invention. [Figure 2] It is a plan view of a three-layer vertical shunt resistor according to a preferred embodiment of the present invention. [Figure 3] It is a bottom view of a three-layer vertical shunt resistor according to a preferred embodiment of the present invention. [Figure 4] It is a cross-sectional view of a three-layer vertical shunt resistor according to a preferred embodiment of the present invention. [Figure 5] It is a diagram showing the shunt circuit of the three-layer vertical shunt resistor of FIG. 1. [Figure 6] It is a diagram for explaining the resistance value of a three-layer vertical shunt resistor according to a preferred embodiment of the present invention. [Figure 7] It is a diagram showing a semiconductor package according to a preferred embodiment of the present invention. [Figure 8]This is a flowchart showing the execution process of a preferred embodiment of a method for manufacturing a three-layer vertical shunt resistor according to the present invention. [Figure 9] This is a process diagram showing the execution process of a preferred embodiment of a method for manufacturing a three-layer vertical shunt resistor according to the present invention. [Figure 10] This is a diagram illustrating the diffusion bonding process. [Figure 11] This is a photograph of the junction portion of a three-layer vertical shunt resistor according to a preferred embodiment of the present invention. [Modes for carrying out the invention]

[0023] The three-layer vertical shunt resistor, power semiconductor, and method for manufacturing the three-layer vertical shunt resistor according to the present invention will be described in detail below with reference to the attached drawings. The configuration and operation of the present invention shown and described herein are described as at least one embodiment, and this does not limit the technical idea of ​​the present invention, its core configuration, and operation.

[0024] The terminology used in this invention has been selected, as far as possible, to be widely used and general terms, taking into consideration the function of the invention. However, this may change depending on the intentions or practices of the articulators in the field or the emergence of new technologies. In certain cases, the applicant may have arbitrarily selected some terms, in which case their meanings will be described in detail in the relevant section of the invention description. Therefore, it should be made clear that the terminology used in this invention should be defined not simply as names of terms, but based on the meaning of the terms and the overall content of the invention.

[0025] Figure 1 is a diagram showing the overall configuration of a three-layer vertical shunt resistor according to a preferred embodiment of the present invention; Figure 2 is a plan view of the three-layer vertical shunt resistor according to a preferred embodiment of the present invention; Figure 3 is a bottom view of the three-layer vertical shunt resistor according to a preferred embodiment of the present invention; and Figure 4 is a cross-sectional view of the three-layer vertical shunt resistor according to a preferred embodiment of the present invention.

[0026] Referring to Figures 1 to 4, the three-layer vertical shunt resistor 100 according to the present invention may include a first resistor 120, a second resistor 110, a first terminal 130, and a second terminal 140. The second resistor 110 may be diffuse-bonded by a current applied to the upper surface of the first resistor 120, and the first terminal 130 and the second terminal 140 may be diffuse-bonded by a current applied to the lower surface of the first resistor 120.

[0027] The second resistor 110 is bonded to the top of the first resistor 120 and may be formed of a resistive material having better electrical conductivity than the resistive material of the first resistor 120. The second resistor 110 may be formed of a single material. The resistive material of the second resistor 110 may be copper (Cu), nickel (Ni), or chromium (Cr). The thickness of the second resistor 110 may be less than the width and length of the first resistor 120. The thickness of the second resistor 110 may be 0.02 mm to 0.7 mm.

[0028] The first resistor 120 may contain a resistive material. The first resistor 120 may be formed from an alloy material. The resistive material of the first resistor 120 may contain at least one of the following: Cu-Mn alloy, Cu-Mn-Ni alloy, Cu-Ni alloy, Ni-Cr alloy, and Fe-Cr alloy. The thickness of the first resistor 120 may be 0.15 mm to 1.0 mm.

[0029] The first terminal 130 is coupled to the lower part of the first resistor 120 and may be formed of a metal material having better electrical conductivity than the resistive material of the first resistor 120. The metal material may be copper. The thickness of the first terminal 130 may be less than the horizontal and vertical lengths of the first resistor 120. The first terminal 130 may be an electrode or terminal of the three-layer vertical shunt resistor 100. The thickness of the first terminal 130 may be 0.1 mm to 0.8 mm.

[0030] The second terminal 140 is coupled to the lower part of the first resistor 120, positioned apart from the first terminal 130, and may be made of a metal material having better electrical conductivity than the resistive material of the first resistor 120. The metal material may be copper. The thickness of the second terminal 140 may be less than the horizontal and vertical lengths of the first resistor 120. The second terminal 140 may be an electrode or terminal of the three-layer vertical shunt resistor 100. The thickness of the second terminal 140 may be 0.1 mm to 0.8 mm.

[0031] The cross-sectional area of ​​the second terminal 140 and the cross-sectional area of ​​the first terminal 130 may be the same or different. The thickness of the second terminal 140 and the thickness of the first terminal 130 may be the same or different.

[0032] The area of ​​the contact surface between the first resistor 120 and the second resistor 110 may be larger than the area of ​​the front and side surfaces of the first resistor 120, respectively. The horizontal and vertical lengths of the first resistor 120 may each be longer than the thickness of the first resistor 120. The horizontal and vertical lengths of the contact surface between the first resistor 120 and the second resistor 110 may each be longer than the thickness of the first resistor 120.

[0033] The thickness of the three-layer vertical shunt resistor 100 may be less than the width and length of the first resistor 120.

[0034] Figure 5 is a diagram illustrating the shunt circuit of the three-layer vertical shunt resistor shown in Figure 1.

[0035] Referring to Figure 5, the first terminal 130 may form the first electrode 11 of the three-layer vertical shunt resistor 100, and the second terminal 140 may form the second electrode 16 of the vertical shunt resistor 100. The resistance values ​​of the first resistor 120 and the second resistor 110 can become the resistance value R of the three-layer vertical shunt resistor 100. Furthermore, the first terminal 130 and the second terminal 140 may be used as terminals of the three-layer vertical shunt resistor 100.

[0036] Figure 6 is a diagram illustrating the resistance value of a three-layer vertical shunt resistor according to a preferred embodiment of the present invention.

[0037] Referring to Figure 6, the resistance value R of the shunt resistor can be calculated using the following formula 1.

[0038] [Formula 1] R = ρ(h / s)

[0039] Here, in this invention, h corresponds to the thickness of the first resistor 120 and the second resistor 110, S is the area of ​​the three-layer vertical shunt resistor 100, and in this invention, it is the area of ​​the first resistor 120, which can be expressed as the product of the width and length of the first resistor 120, and ρ is a constant value for determining R. h corresponds to the sum of the heights of the first resistor 120 and the second resistor 110, and the sum of the h value and the height of the first terminal 130 (or the second terminal 140) can be the height of the three-layer vertical shunt resistor 100, and the height of the three-layer vertical shunt resistor 100 can be the length L of the three-layer vertical shunt resistor 100.

[0040] To realize a three-layer vertical shunt resistor 100 having a resistance of 1 mΩ, the area S of the first resistor 120 is required to be 0.1936 mm², and the thickness L of the first resistor 120 is required to be 0.4 mm. Thus, the width, length, and thickness of the first resistor 120 may be 0.44 mm, 0.44 mm, and 0.4 mm, respectively.

[0041] To realize a three-layer vertical shunt resistor 100 with a resistance value of 4 mΩ, the thickness L of the first resistor 120 in the three-layer vertical shunt resistor 100 with a resistance value of 1 mΩ can be kept at 0.4 mm, and the horizontal and vertical lengths of the first resistor 120 can each be reduced by half. In other words, the three-layer vertical shunt resistor 100 according to the present invention can increase the resistance value without increasing the length L, so a shunt resistor with a large resistance value can be realized in a small size, thereby improving the integration density of the power module.

[0042] Figure 7 shows a semiconductor package according to a preferred embodiment of the present invention.

[0043] Referring to Figure 7, the semiconductor package 10 according to the present invention may include a lower plate 20, a three-layer vertical shunt resistor 30, a circuit board 40, a semiconductor chip 50, a spacer 60, and an upper plate 70. The semiconductor package 10 according to the present invention may include a power semiconductor.

[0044] The circuit board 40 may be bonded to the upper part of the lower plate 20. Circuits may be formed on the circuit board 40, and the circuit board 40 may be a printed circuit board (PCB) or a DBC (Direct Bonded Copper) board.

[0045] The three-layer vertical shunt resistor 30 may have its upper surface separated from the upper plate 70 and its lower surface coupled to the circuit board 40. In other words, a space may be formed between the three-layer vertical shunt resistor 30 and the upper plate 70. This allows the semiconductor package 10 according to the present invention to be manufactured with a smaller height and width, thereby improving the integration density.

[0046] The electrodes of the three-layer vertical shunt resistor 30 may be connected to the circuit of the circuit board 40 so that they can be grounded to the circuit of the circuit board 40 and energized. Here, the three-layer vertical shunt resistor 30 may include the three-layer vertical shunt resistor 100 according to the present invention described above. The first terminal 130 and the second terminal 140 of the three-layer vertical shunt resistor 30 may each be connected to the circuit of the circuit board 40.

[0047] The semiconductor chip 50 may include a high-frequency semiconductor device or a high-power semiconductor device. The semiconductor chip 50 may also be a power element, such as a SiC Power MOSFET. The semiconductor chip 50 may be mounted on the circuit board 40.

[0048] The spacer 60 is connected to the semiconductor chip 50 at its lower end and to the upper plate 70 at its upper end, allowing the semiconductor chip 50 to dissipate heat. The spacer 60 may be connected to the shoulder portions of the semiconductor chip 50 and the upper plate 70, respectively, with solder paste.

[0049] The semiconductor package 10 according to the present invention can be manufactured in an ultra-compact size by using the three-layer vertical shunt resistor 30 according to the present invention, and the first terminal 130 and the second terminal 140 are arranged in the same layer and direction, allowing for even more ultra-compact manufacturing.

[0050] Figure 8 is a flowchart showing the execution process of a preferred embodiment of the method for manufacturing a three-layer vertical shunt resistor according to the present invention, and Figure 9 is a process diagram showing the execution process of a preferred embodiment of the method for manufacturing a three-layer vertical shunt resistor according to the present invention.

[0051] Referring to Figures 8 and 9, a first resistor 120 containing the resistive material 3 is prepared (S10). The resistive material 3 may contain at least one of the following: Cu-Mn alloy, Cu-Mn-Ni alloy, Cu-Ni alloy, Ni-Cr alloy, and Fe-Cr alloy.

[0052] A second resistor 110 is prepared, which is made of a resistive material 2 having better electrical conductivity than the resistive material 3 of the first resistor 120 (S20). The resistive material 2 may be copper (Cu), nickel (Ni), or chromium (Cr). The surface area of ​​the second resistor 110 may correspond to the surface area of ​​the first resistor 120.

[0053] First terminals 130 and second terminals 140 are prepared, which are made of a metal material 4 having better electrical conductivity than the resistive material 3 of the first resistor 120 (S30). The metal material 4 may be copper. Here, the sum of the surface areas of the first terminals 130 and second terminals 140 may be less than the sum of the surface areas of the first resistor 120.

[0054] The first terminal 130 and the second terminal 140 are placed below the first resistor 120, and the second resistor 110 is stacked on top of the first resistor 120 to form a laminate 1 (S40). Here, the first terminal 130 and the second terminal 140 may be spaced apart from each other. In step S40, the laminate may be stacked such that the first resistor 120 is placed between the first terminal 130 and the second resistor 110, and the first resistor 120 is placed between the second terminal 140 and the second resistor 110.

[0055] A current is applied to the laminate 1 to diffuse bond the first terminal 130, the second terminal 140, the first resistor 120, and the second resistor 110 to produce a three-layer vertical shunt resistor 30 (S50). The diffusion bonding step (S50) may include steps of applying pressure and temperature to cause a reaction between the first terminal 130 and the first resistor 120, applying pressure and temperature to cause a reaction between the second terminal 140 and the first resistor 120, and applying pressure and temperature to cause a reaction between the second resistor 110 and the first resistor 120. The diffusion bonding step (S50) can be carried out in a temperature range of 550°C or less and a pressure range of 1 MPa or more. The diffusion bonding step S50 may be carried out by a diffusion bonding method. In some embodiments, sintering can be performed by spark plasma sintering (SPS) in step S50.

[0056] Diffusion bonding is a method of joining base materials by applying pressure to the base materials, which are in close contact with each other at a temperature below the melting point of the base materials to prevent plastic deformation, and using the diffusion of atoms that occurs between the joining surfaces to join the base materials. Compared to other joining processes such as hot pressing, diffusion bonding allows the second resistor 110, the first resistor 120, the first terminal 130, and the second terminal 140 to be joined at a lower temperature, minimizes deformation of the three-layer vertical shunt resistor 100 due to heating, and reduces process costs.

[0057] Furthermore, since the diffusion bonding method uses simple pressurization and heating, the amount of diffusion is easy to control, which is advantageous for bonding dissimilar metals. However, in actual bonding layer formation, if the bonding layer is heated to a high temperature to complete it, excessive diffusion can cause a compound layer to grow between the metals, significantly reducing mechanical performance. In this invention, the first resistor 120 is formed of a resistive material, and generally the melting point of the resistive material is lower than the melting point of copper (1083°C) that forms the second resistor 110, the first terminal 130, and the second terminal 140, so diffusion bonding can be performed at a low temperature. Preferably, in step S50, diffusion bonding may be performed in a temperature range of 550°C or less and a pressure range of 1 MPa or more.

[0058] Figure 10 is a diagram illustrating the diffusion bonding process.

[0059] Referring to Figure 10, in step S50, the laminate 1 may be diffusion-bonded in the press machine 600. That is, the laminate 1 is placed between the upper press 610 and the lower press 620 of the press machine 600, and current is passed from the upper press 610 to the lower press 620, bringing the upper press 610 and the lower press 620 into close contact so that the second resistor 110, the first resistor 120, the first terminal 130, and the second terminal 140 of the laminate 1 can be bonded together. The laminate 1 that has passed through the press machine 600 may have the shape shown in Figure 1.

[0060] Figure 11 is a photograph of the junction portion of a three-layer vertical shunt resistor according to a preferred embodiment of the present invention.

[0061] Referring to Figure 11, the three-layer vertical shunt resistor 100 according to the present invention is diffusely bonded by the applied current, so that there are no defects, non-uniformity, or voids at the bonded portion 5.

[0062] Although preferred embodiments of the present invention have been illustrated and described above, the present invention is not limited to the specific preferred embodiments described above, and of course, any person with ordinary skill in the art to which the invention belongs can carry out various modifications without departing from the spirit of the invention claimed in the claims, and such modifications are included within the scope of the claims. [Explanation of symbols]

[0063] 100 3-layer vertical shunt resistor 110 Second resistor 120 First resistor 130 1st terminal 140 2nd terminal 10 Semiconductor Packages

Claims

1. A first resistor containing a resistive material, A second resistor is bonded to the upper part of the first resistor and is made of a resistive material having better electrical conductivity than the resistive material of the first resistor, A first terminal is coupled to the lower part of the first resistor and is made of a metal material having better electrical conductivity than the resistive material of the first resistor, A three-layer vertical shunt resistor characterized by comprising: a second terminal coupled to the lower part of the first resistor, positioned apart from the first terminal, and made of a metal material having better electrical conductivity than the resistive material of the first resistor.

2. The resistive material of the first resistor is A three-layer vertical shunt resistor according to claim 1, characterized by comprising at least one of a Cu-Mn alloy, a Cu-Ni alloy, a Ni-Cr alloy, a Cu-Mn-Ni alloy, and a Fe-Cr alloy.

3. The three-layer vertical shunt resistor according to claim 1, characterized in that the thickness of the first resistor is 0.15 mm to 1.0 mm.

4. The three-layer vertical shunt resistor according to claim 1, characterized in that the thickness of the second resistor is 0.02 mm to 0.7 mm.

5. The three-layer vertical shunt resistor according to claim 1, characterized in that the thickness of the first terminal or the thickness of the second terminal is 0.1 mm to 0.8 mm.

6. The three-layer vertical shunt resistor according to claim 1, characterized in that the metal material of the second resistor is formed from a single material.

7. A power semiconductor comprising a three-layer vertical shunt resistor according to any one of claims 1 to 6.

8. A step of preparing a first resistor containing a resistive material, A step of preparing a second resistor made of a resistive material having better electrical conductivity than the resistive material of the first resistor, A step of preparing first and second terminals formed of a metal material having better electrical conductivity than the resistive material of the first resistor, A step of forming a laminate by stacking a first resistor between the second resistor and the first terminal, and a first resistor between the second resistor and the second terminal, with the first terminal and the second terminal spaced apart. A method for manufacturing a three-layer vertical shunt resistor, characterized by comprising the step of applying an electric current to the laminate to diffuse bond the first terminal, the second terminal, the first resistor, and the second resistor.

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