Electronic circuits, semiconductor modules

Abstract

To provide an electronic circuit with improved durability. [Solution] The electronic circuit comprises a first switching element having a first control electrode, a first power supply side electrode to which an inductive load is connected, and a first ground side electrode; a second switching element having a second control electrode connected to the first control electrode, a second power supply side electrode connected to the first power supply side electrode, and a second ground side electrode connected to the first ground side electrode; a first diode provided in antiparallel to the first switching element; a second diode provided in antiparallel to the second switching element; a third diode having a cathode connected to the first power supply side electrode; and a fourth diode having a cathode connected to the first control electrode, wherein the anodes of the third diode and the fourth diode are connected.

Description

Technical Field

[0001] The present invention relates to an electronic circuit and a semiconductor module.

Background Art

[0002] When a plurality (for example, two) of switching elements provided in parallel are off, a high voltage may be applied to the plurality of switching elements from, for example, an inductive load (for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, for example, if the breakdown voltages of two switching elements are different due to manufacturing variations, avalanche breakdown may occur in the diode with the lower breakdown voltage during the reverse recovery time of the diodes connected in reverse parallel to each of the two switching elements. Further, when avalanche breakdown occurs, the current flowing through the switching element substantially flows through the diode of the switching element with the lower breakdown voltage. Therefore, for example, even if two switching elements are provided, during the reverse recovery time, substantially, a reverse recovery current flows through one diode, and the switching element may be destroyed.

[0005] The present invention has been made in view of the above conventional problems, and an object thereof is to provide an electronic circuit with improved withstand capacity.

Means for Solving the Problems

[0006] A first aspect of the electronic circuit according to the present invention, which solves the aforementioned problems, is an electronic circuit comprising: a first switching element having a first control electrode, a first power supply side electrode to which an inductive load is connected, and a first ground side electrode; a second switching element having a second control electrode connected to the first control electrode, a second power supply side electrode connected to the first power supply side electrode, and a second ground side electrode connected to the first ground side electrode; a first diode provided in antiparallel to the first switching element; a second diode provided in antiparallel to the second switching element; a third diode having a cathode connected to the first power supply side electrode; and a fourth diode having a cathode connected to the first control electrode, wherein the anodes of the third diode and the fourth diode are connected. That is the case.

[0007] A second aspect of the electronic circuit according to the present invention, which solves the aforementioned problems, is an electronic circuit comprising: a first switching element having a first control electrode, a first power supply side electrode to which an inductive load is connected, and a first ground side electrode; a second switching element having a second control electrode connected to the first control electrode, a second power supply side electrode connected to the first power supply side electrode, and a second ground side electrode connected to the first ground side electrode; a first diode provided in antiparallel to the first switching element; a second diode provided in antiparallel to the second switching element; a third diode having an anode connected to the first power supply side electrode; and a fourth diode having an anode connected to the first control electrode, wherein the cathodes of the third diode and the fourth diode are connected.

[0008] A first embodiment of the semiconductor module according to the present invention that solves the aforementioned problems is a semiconductor module comprising: a first semiconductor chip provided with a first switching element having a first control terminal, a first power supply terminal to which an inductive load is connected, and a first ground terminal; a second semiconductor chip provided with a second switching element having a second control terminal, a second power supply terminal, and a second ground terminal; a first diode provided in antiparallel to the first switching element; a second diode provided in antiparallel to the second switching element; a third diode provided outside the first and second semiconductor chips and having an anode connected to the first power supply terminal; and a fourth diode provided outside the first and second semiconductor chips and having an anode connected to the first control terminal, wherein the cathodes of the third diode and the fourth diode are connected, and the first and second control terminals, the first and second power supply terminals, and the first and second ground terminals are connected, respectively.

[0009] A second aspect of the semiconductor module according to the present invention, which solves the aforementioned problems, is a semiconductor module comprising: a first semiconductor chip provided with a first switching element having a first control terminal, a first power supply terminal to which an inductive load is connected, and a first ground terminal; a second semiconductor chip provided with a second switching element having a second control terminal, a second power supply terminal, and a second ground terminal; a first diode provided in antiparallel to the first switching element; a second diode provided in antiparallel to the second switching element; a third diode provided outside the first and second semiconductor chips and having a cathode connected to the first power supply terminal; and a fourth diode provided outside the first and second semiconductor chips and having a cathode connected to the first control terminal, wherein the anodes of the third diode and the fourth diode are connected, and the first and second control terminals, the first and second power supply terminals, and the first and second ground terminals are connected, respectively. [Effects of the Invention]

[0010] According to the present invention, it is possible to provide an electronic circuit with improved durability. [Brief explanation of the drawing]

[0011] [Figure 1] This figure shows an example of the configuration of a typical electronic circuit 7 and a test circuit 1 for electronic circuit 7. [Figure 2] This figure shows an example of the operation of test circuit 1 and electronic circuit 7. [Figure 3] This figure shows an example of the current flowing through electronic circuit 7. [Figure 4] This figure shows an example of the current flowing through electronic circuit 7. [Figure 5] This figure shows an example of the configuration of test circuit 1 and electronic circuit 10a. [Figure 6] This figure shows an example of the operation of test circuit 1 and electronic circuit 10a. [Figure 7] This is a diagram showing an example of the configuration of a semiconductor module 11. [Figure 8] This figure shows an example of the configuration of test circuit 1 and electronic circuit 10b. [Modes for carrying out the invention]

[0012] The following matters become clear from this specification and the accompanying drawings:

[0013] In the following, identical or equivalent components, parts, etc., shown in each drawing will be denoted by the same reference numeral, and redundant explanations may be omitted as appropriate.

[0014] Furthermore, in this embodiment, "connection" refers to a state in which two components are electrically connected unless otherwise specified. Therefore, "connection" includes not only cases where two components are connected not only by wiring, but also, for example, by a resistor.

[0015] ==Common Electronic Circuit Configuration 7== FIG. 1 is a diagram showing an example of the configuration of an electronic circuit 7 and a test circuit 1 for the electronic circuit 7. The test circuit 1 is a circuit for testing the electronic circuit 7. The test circuit 1 includes a pulse circuit 2, an NMOS transistor 3, a diode 4, a power supply 5 for supplying a power supply voltage Vdd, a capacitor 6, and a coil L.

[0016] The pulse circuit 2 is a circuit for turning on and off the NMOS transistor 3. When the pulse circuit 2 outputs a signal Vp of a high level (hereinafter referred to as "H" level), the NMOS transistor 3 turns on, and when the pulse circuit 2 outputs a signal Vp of a low level (hereinafter referred to as "L" level), the NMOS transistor 3 turns off.

[0017] The diode 4 is a parasitic diode of the NMOS transistor 3.

[0018] The power supply 5 supplies the voltage Vdd, and when the NMOS transistor 3 turns on, applies the voltage Vdd to the terminal D of the electronic circuit 7 (described later).

[0019] The capacitor 6 is an element for stabilizing the voltage Vdd of the power supply 5.

[0020] The coil L is an inductive load provided between the terminal D of the electronic circuit 7 and the ground (that is, the terminal S of the electronic circuit 7). Also, when using the test circuit 1, the terminal G and the terminal S of the electronic circuit 7 are connected so that the NMOS transistors Ma and Mb (described later) do not turn on completely. Although details will be described later, this causes a current to flow through the parasitic diodes of the NMOS transistors Ma and Mb when the NMOS transistor 3 turns off.

[0021] ==Configuration of Electronic Circuit 7== The electronic circuit 7 is composed of NMOS transistors Ma and Mb, diodes Dia and Dib, and terminals G, D, and S.

[0022] The NMOS transistor Ma has a gate electrode Ga, a drain electrode Da, and a source electrode Sa, with a coil L connected to the drain electrode Da. Diode Dia is a parasitic diode included in the NMOS transistor Ma and is connected in antiparallel to the NMOS transistor Ma.

[0023] The NMOS transistor Mb has a gate electrode Gb connected to the gate electrode Ga, a drain electrode Db connected to the drain electrode Da, and a source electrode Sb connected to the source electrode Sa. Diode Dib is a parasitic diode included in the NMOS transistor Mb and is provided in antiparallel to the NMOS transistor Mb.

[0024] Furthermore, the gate electrodes Ga and Gb are connected to terminal G, the drain electrodes Da and Db are connected to terminal D, and the source electrodes Sa and Sb are connected to terminal S.

[0025] ==Operation of Test Circuit 1 and Electronic Circuit 7== Figure 2 shows an example of the operation of the electronic circuit 7. It is assumed that before time t0, the pulse circuit 2 outputs a signal Vp at the "H" level. In this case, as shown in Figure 3, the current from the power supply 5 flows towards ground in the order of NMOS transistor 3 and coil L, as indicated by the dotted arrows. Furthermore, a positive value is defined as when current Ia flows through diode Dia in the direction shown in Figure 1, and similarly, when current Ib flows through diode Dib in the direction shown in Figure 1. Also, the breakdown voltage of NMOS transistor Mb is assumed to be lower than that of NMOS transistor Ma.

[0026] At time t0, when pulse circuit 2 outputs a signal Vp at the "L" level, NMOS transistor 3 turns off. When NMOS transistor 3 turns off, current flows through coil L in the same direction as shown in Figure 3, as indicated by the dashed-dotted arrow in Figure 4, and flows from terminal D to coil L. The current from coil L then flows as currents Ia and Ib through diodes Dia and Dib, respectively.

[0027] At time t1, when pulse circuit 2 outputs a high-level signal Vp, NMOS transistor 3 turns on. When NMOS transistor 3 turns on, a voltage Vdd is applied in the reverse direction to diodes Dia and Dib, causing currents Ia and Ib to begin to decrease.

[0028] At time t2, when NMOS transistor 3 is turned on, a voltage Vdd is applied to coil L, generating an induced electromotive force in coil L, and the voltage Vd at terminal D rises. Since diode Dib has a lower breakdown voltage than NMOS transistor Ma, a reverse recovery current Ib flows. On the other hand, because a large current flows through diode Dib, almost no reverse recovery current Ia flows through NMOS transistor Ma. Subsequently, the voltage Vd is clamped by the breakdown voltage of NMOS transistor Mb.

[0029] Then, once the transient operation is complete, the reverse recovery current Ib flowing through diode Dib decreases.

[0030] At time t3, when the induced electromotive force in coil L disappears, diodes Dia and Dib stop supplying the reverse recovery currents Ia and Ib. Note that the operation from time t4 onwards is the same as the operation from time t0 onwards.

[0031] In the case of electronic circuit 7, when an induced electromotive force is generated in coil L and a high voltage is applied to terminal D, a reverse current concentrates and flows through the diode with the lower voltage rating (for example, diode Dib) among the two diodes Dia and Dib. In this case, the current that can flow through electronic circuit 7 is limited by the voltage rating of diode Dib.

[0032] =====Execution===== Figure 5 shows an example of the configuration of test circuit 1 and electronic circuit 10a. Test circuit 1 has the same configuration as in Figure 1, and electronic circuit 10a has a Zener diode ZD and a diode Di between terminals D and G of electronic circuit 7. The NMOS transistor Ma corresponds to the "first switching element," and the diode Dia corresponds to the "first diode." The gate electrode Ga corresponds to the "first control electrode," the drain electrode Da corresponds to the "first power supply side electrode," and the source electrode Sa corresponds to the "first ground side electrode." The NMOS transistor Mb corresponds to the "second switching element," and the diode Dib corresponds to the "second diode." The gate electrode Gb corresponds to the "second control electrode," the drain electrode Db corresponds to the "second power supply side electrode," and the source electrode Sb corresponds to the "second ground side electrode."

[0033] A Zener diode ZD is an element that clamps the voltage applied from a coil L to the drain electrode Da, and has an anode connected to the gate electrode Ga and a cathode connected to the drain electrode Da.

[0034] A diode Di is an element that prevents current from flowing from the gate electrode Ga to the drain electrode Da, and has a cathode connected to the gate electrode Ga and an anode connected to the drain electrode Da.

[0035] Furthermore, the Zener diode ZD and the diode Di are connected in series. In this embodiment, the anodes of the Zener diode ZD and the diode Di are connected. Note that the Zener diode ZD corresponds to the "third diode," and the diode Di corresponds to the "fourth diode."

[0036] ==Operation of Test Circuit 1 and Electronic Circuit 10a== Figure 6 shows an example of the operation of the electronic circuit 10a. It is assumed that before time t10, the pulse circuit 2 outputs a signal Vp at the "H" level. In this case, as shown in Figure 3, the current from the power supply 5 flows towards ground in the order of NMOS transistor 3 and coil L, as indicated by the dotted arrows. Furthermore, a positive value is defined as when current Ia flows through diode Dia in the direction shown in Figure 5, and similarly, when current Ib flows through diode Dib in the direction shown in Figure 5.

[0037] At time t10, when pulse circuit 2 outputs a signal Vp at the "L" level, NMOS transistor 3 turns off. When NMOS transistor 3 turns off, current flows through coil L in the same direction as shown in Figure 3, as indicated by the dashed line arrow in Figure 4, and flows from terminal D to coil L. The current from coil L then flows as currents Ia and Ib through diodes Dia and Dib, respectively.

[0038] At time t11, when pulse circuit 2 outputs a high-level signal Vp, NMOS transistor 3 turns on. When NMOS transistor 3 turns on, a reverse voltage Vdd is applied to diodes Dia and Dib, causing currents Ia and Ib to begin to decrease.

[0039] At time t12, when NMOS transistor 3 is turned on, a voltage Vdd is applied to coil L, generating an induced electromotive force in coil L, and the voltage Vd at terminal D rises. Similarly, reverse recovery currents Ia and Ib flow through diodes Dia and Dib. Subsequently, when the voltage Vd is clamped by Zener diode ZD and diode Di, the voltages Vg at gate electrodes Ga and Gb of NMOS transistors Ma and Mb rise, and NMOS transistors Ma and Mb turn on, albeit not completely.

[0040] When NMOS transistors Ma and Mb are turned on, current flows through them, reducing the reverse recovery currents Ia and Ib flowing through diodes Dia and Dib. To achieve this operation, the Zener diode ZD and diode Di are selected such that the breakdown voltage of NMOS transistor Ma is higher than the sum of the clamp voltage of Zener diode ZD, the forward voltage of diode Di, and the threshold voltage of NMOS transistor Ma. The same applies to NMOS transistor Mb.

[0041] At time t13, when the induced electromotive force in coil L disappears, diodes Dia and Dib stop supplying the reverse recovery currents Ia and Ib. Note that the operation from time t14 onwards is the same as the operation from time t10 onwards.

[0042] Furthermore, in this embodiment, if a Zener diode ZD and a diode Di are present, even if an induced electromotive force is generated in the coil L and a high voltage is applied to terminal D, the voltage Vd at terminal D will be clamped to a level lower by the sum of the clamp voltage of the Zener diode ZD and the forward voltage of the diode Di, based on the lower breakdown voltage of the NMOS transistors Ma and Mb.

[0043] Therefore, currents Ia and Ib flow almost equally through diodes Dia and Dib, and current can also flow through NMOS transistors Ma and Mb. Consequently, the current tolerance of the coil L when an induced electromotive force is generated becomes larger.

[0044] According to this embodiment, it is possible to provide an electronic circuit with improved durability.

[0045] ===Unique Text=== Figure 7 shows an example of the configuration of the bridge circuit 100 and the semiconductor module 11, and is an example of the application of the semiconductor module 11. The bridge circuit 100 includes switches SW1 to SW4, a power supply 5, a capacitor 6, and an inductor L. Switch SW2 corresponds to the NMOS transistor 3 of the test circuit 1 and constitutes the upper arm. Switch SW1 constitutes the upper arm, and switch SW3 constitutes the lower arm.

[0046] The semiconductor module 11 comprises a lower arm switch SW4 and includes a semiconductor chip Ca, a semiconductor chip Cb, diodes Dia, Dib, Di, and a Zener diode ZD.

[0047] The semiconductor chip Ca is provided with an NMOS transistor Ma, and the semiconductor chip Cb is provided with an NMOS transistor Mb. The semiconductor chip Ca has a gate terminal TGa, a drain terminal TDa, and a source terminal TSa, while the semiconductor chip Cb has a gate terminal TGb, a drain terminal TDb, and a source terminal TSa. Furthermore, the gate terminals TGa and TGb are connected to terminal G, the drain terminals TDa and TDb are connected to terminal D, and the source terminals TSa and TSb are connected to terminal S.

[0048] In this case, the Zener diode ZD and diode Di are located outside the semiconductor chips Ca and Cb. The semiconductor chip Ca corresponds to the "first semiconductor chip," and the semiconductor chip Cb corresponds to the "second semiconductor chip." The gate terminal TGa corresponds to the "first control terminal," the drain terminal TDa corresponds to the "first power supply terminal," and the source terminal TSa corresponds to the "first ground terminal." Furthermore, the gate terminal TGb corresponds to the "second control terminal," the drain terminal TDb corresponds to the "second power supply terminal," and the source terminal TSb corresponds to the "second ground terminal."

[0049] ==Operation of the bridge circuit 100 and semiconductor module 11== The bridge circuit 100 switches switches SW1 to SW4 on and off, changing the direction of the current flowing through coil L. Test circuit 1 corresponds to the circuit when switch SW2 is switched on and off while switch SW1 of the bridge circuit 100 is off, switch SW3 is on, and switch SW4 is off. In the following explanation, coil L will be described as being part of the motor.

[0050] When the motor is rotating forward, switches SW1 and SW4 are turned on, and switches SW2 and SW3 are turned off. In this case, current from power supply 5 flows in the order of switch SW1, motor, and switch SW4.

[0051] When reversing the motor, switches SW2 and SW3 are turned on, and switches SW1 and SW4 are turned off. In this case, the current from power supply 5 flows in the order of switch SW2, motor, and switch SW3.

[0052] Thus, when switches SW1 to SW4 are turned on and off, an induced electromotive force is generated in the motor (coil L), which may result in a high voltage being applied to terminal D of the semiconductor module 11. However, as in this embodiment, the presence of a Zener diode ZD and a diode Di between terminals D and G of the semiconductor module 11 suppresses the destruction of the NMOS transistors Ma and Mb.

[0053] Figure 8 shows an example of the configuration of test circuit 1 and electronic circuit 10b. Electronic circuit 10b differs from electronic circuit 10a in that the cathodes of the Zener diode ZD and diode Di are connected. Thus, even when using a Zener diode ZD and diode Di, electronic circuit 10b can achieve the same effect as electronic circuit 10a.

[0054] Furthermore, although an NMOS transistor was used as an example in this embodiment, the electronic circuits 10a, 10b and the semiconductor module 11 may be similarly realized using an IGBT. In this case, diodes Dia and Dib are separately provided in antiparallel between the collector and emitter of the IGBT.

[0055] ===Summary=== The electronic circuit 10a of this embodiment has been described above. The electronic circuit 10a comprises NMOS transistors Ma and Mb, diodes Dia and Dib, Zener diode ZD, and diode Di, with the anodes of Zener diode ZD and diode Di connected. Even when a high voltage is applied from coil L to the drain electrodes Da and Db of NMOS transistors Ma and Mb, the voltage Vd is clamped by Zener diode ZD and diode Di, so that the reverse recovery current flowing through diodes Dia and Dib does not concentrate on one side. As a result, the voltage at the connection point of Zener diode ZD and diode Di is more easily determined, and an electronic circuit with improved withstand capability can be provided.

[0056] The electronic circuit 10b comprises NMOS transistors Ma and Mb, diodes Dia and Dib, Zener diode ZD, and diode Di, with the cathodes of Zener diode ZD and diode Di connected. Even when a high voltage is applied from coil L to the drain electrodes Da and Db of NMOS transistors Ma and Mb, the voltage Vd is clamped by Zener diode ZD and diode Di, preventing the reverse recovery current flowing through diodes Dia and Dib from concentrating on one side. This provides an electronic circuit with improved withstand capability.

[0057] Furthermore, the breakdown voltage of the NMOS transistor Ma is higher than the sum of the clamp voltage of the Zener diode ZD, the forward voltage of the diode Di, and the threshold voltage of the NMOS transistor Ma. The same applies to the NMOS transistor Mb. Thus, because the Zener diode ZD and diode Di are selected, when the voltage Vd is clamped by the Zener diode ZD and diode Di, the voltage Vg of the gate electrodes Ga and Gb of the NMOS transistors Ma and Mb rises, and the NMOS transistors Ma and Mb turn on, albeit not completely. As a result, current flows not only through the diodes Dia and Dib, respectively, but also through the NMOS transistors Ma and Mb, increasing the current withstand capability of the electronic circuits 10a and 10b.

[0058] Furthermore, the NMOS transistors Ma and Mb are MOS transistors, and the diodes Dia and Dib are parasitic diodes of the respective NMOS transistors Ma and Mb. This reduces the circuit area when electronic circuits 10a and 10b are implemented as integrated circuits.

[0059] Furthermore, the semiconductor module 11 comprises semiconductor chips Ca and Cb, diodes Dia and Dib, a Zener diode ZD, and a diode Di, with the cathodes of the Zener diode ZD and diode Di connected. Since the Zener diode ZD and diode Di are located outside the semiconductor chips Ca and Cb, the semiconductor module 11 can be designed to meet various conditions.

[0060] Furthermore, the semiconductor module 11 comprises semiconductor chips Ca and Cb, diodes Dia and Dib, a Zener diode ZD, and a diode Di, with the anodes of the Zener diode ZD and diode Di connected. Since the Zener diode ZD and diode Di are located outside the semiconductor chips Ca and Cb, the semiconductor module 11 can be designed to meet various conditions.

[0061] The embodiments described above are provided to facilitate understanding of the present invention and are not intended to limit its interpretation. Furthermore, the present invention may be modified or improved without departing from its spirit, and it goes without saying that equivalents thereof are included. [Explanation of Symbols]

[0062] 1. Test Circuit 2. Pulse Circuit 3,Ma,Mb NMOS transistor 4, Di, Dia, Dib diode 5 Power supply 6 Capacitors 7,10a,10b electronic circuit 11 Semiconductor Modules Ca,Cb semiconductor chips ZD Zener diode

Claims

1. A first switching element having a first control electrode, a first power supply side electrode to which an inductive load is connected, and a first ground side electrode, A second switching element having a second control electrode connected to the first control electrode, a second power supply side electrode connected to the first power supply side electrode, and a second ground side electrode connected to the first ground side electrode, A first diode is provided in antiparallel to the first switching element, A second diode is provided in antiparallel to the second switching element, A third diode having a cathode connected to the first power supply side electrode, A fourth diode having a cathode connected to the first control electrode, Equipped with, The anodes of the third diode and the fourth diode are connected, electronic circuit.

2. A first switching element having a first control electrode, a first power supply side electrode to which an inductive load is connected, and a first ground side electrode, A second switching element having a second control electrode connected to the first control electrode, a second power supply side electrode connected to the first power supply side electrode, and a second ground side electrode connected to the first ground side electrode, A first diode is provided in antiparallel to the first switching element, A second diode is provided in antiparallel to the second switching element, A third diode having an anode connected to the first power supply side electrode, A fourth diode having an anode connected to the first control electrode, Equipped with, The cathodes of the third diode and the fourth diode are connected, electronic circuit.

3. An electronic circuit according to claim 1 or 2, The breakdown voltage of the first switching element is higher than the sum of the breakdown voltage of the third diode, the forward voltage of the fourth diode, and the threshold voltage of the first switching element. The breakdown voltage of the second switching element is higher than the sum of the breakdown voltage of the third diode, the forward voltage of the fourth diode, and the threshold voltage of the second switching element. electronic circuit.

4. The electronic circuit according to claim 3, Each of the first and second switching elements is a MOS transistor. The first diode is a parasitic diode included in the first switching element, The second diode is a parasitic diode included in the second switching element. electronic circuit.

5. A first semiconductor chip is provided with a first switching element having a first control terminal, a first power supply terminal to which an inductive load is connected, and a first ground terminal. A second semiconductor chip is provided with a second switching element having a second control terminal, a second power supply terminal, and a second ground terminal. A first diode is provided in antiparallel to the first switching element, A second diode is provided in antiparallel to the second switching element, A third diode is provided outside the first and second semiconductor chips and has an anode connected to the first power supply terminal, A fourth diode is provided outside the first and second semiconductor chips and has an anode connected to the first control terminal, Equipped with, The cathodes of the third diode and the fourth diode are connected, The first and second control terminals, the first and second power supply terminals, and the first and second ground terminals are connected to each other. Semiconductor module.

6. A first semiconductor chip is provided with a first switching element having a first control terminal, a first power supply terminal to which an inductive load is connected, and a first ground terminal. A second semiconductor chip is provided with a second switching element having a second control terminal, a second power supply terminal, and a second ground terminal. A first diode is provided in antiparallel to the first switching element, A second diode is provided in antiparallel to the second switching element, A third diode is provided outside the first and second semiconductor chips and has a cathode connected to the first power supply terminal, A fourth diode is provided outside the first and second semiconductor chips and has a cathode connected to the first control terminal, Equipped with, The anodes of the third diode and the fourth diode are connected, The first and second control terminals, the first and second power supply terminals, and the first and second ground terminals are connected to each other. Semiconductor module.

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