Semiconductor equipment

Abstract

The present disclosure aims to provide a semiconductor device that can suppress unintended activation of control power supply voltage drop protection during the initial charging period, and can also perform control power supply voltage drop protection during the control power supply voltage stabilization period. [Solution] The semiconductor device 100 according to the embodiment includes an IGBT 41, a control IC 1, a control IC 2A, and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by a bootstrap operation using a control power supply voltage VccL supplied to the control IC 2A. The control IC 2A has a control voltage detection circuit 22A that detects a decrease in the control power supply voltage VccL, and the control voltage detection circuit 22A has a period detection circuit 221A that detects an initial charging period for initially charging the bootstrap circuit 3 by a bootstrap operation.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device.

Background Art

[0002] An Intelligent Power Module (IPM) that integrates an Insulated Gate Bipolar Transistor (IGBT) for power conversion, a Free Wheeling Diode (FWD), and an Integrated Circuit (IC) for drive and protection functions into one package is known. In an IPM used as a three-phase inverter circuit for driving an electric motor such as a three-phase motor, for example, four control voltages (three for the upper arm and one for the lower arm) are required. However, by applying a bootstrap circuit having a bootstrap diode (BSD), a capacitor, and a limiting resistor, the power supply for the upper arm can be replaced with a capacitor. As a result, the component mounting area of a power conversion device including the IPM can be reduced.

[0003] Before starting to drive a load device such as a motor by an IGBT, the bootstrap circuit needs to charge a capacitor (initial charge) by the switching operation of the IGBT in the lower arm. During the initial charge, a current (inrush current) flows from the control power supply for the lower arm to the bootstrap circuit. If this inrush current is an excessive current beyond expectation, the capacity of the control power supply for the lower arm may not be sufficient, and power supply drop protection may be applied to the lower arm. The bootstrap circuit has a limiting resistor as described above in order to suppress this power supply drop protection.

[0004] Patent Document 1 discloses a power conversion device capable of detecting an abnormal state of a switch in an initial charge circuit while suppressing an excessive inrush current from flowing into a capacitor due to an abnormality of the switch in the initial charge circuit. Patent Document 2 discloses an invention for reducing inrush current in a power converter by determining the timing for terminating initial charging based on the magnitude of the current generated when initial charging is completed earlier in the initial charging of multiple capacitors. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2022-40631 [Patent Document 2] Japanese Patent Publication No. 2023-162789 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] Conventional control power supply voltage undervoltage protection designs the operating voltage level to protect against voltage drops based on the point when the control power supply voltage has stabilized. Therefore, during operations with large voltage fluctuations, such as the initial charging period, the control power supply voltage undervoltage protection is more likely to activate. If the undervoltage protection is activated in the lower arm, the capacitor in the bootstrap circuit will not be charged, resulting in a problem where the control power supply voltage of the upper arm does not reach the desired voltage level. On the other hand, if the operating voltage of the control power supply voltage undervoltage protection is set to match the voltage fluctuations during the initial charging period, the protection operation when the control power supply voltage stabilizes at the desired voltage level will be insufficient.

[0007] The purpose of this disclosure is to provide a semiconductor device that can suppress unintended activation of control power supply voltage drop protection during the initial charging period, and can also perform control power supply voltage drop protection during the control power supply voltage stabilization period. [Means for solving the problem]

[0008] To achieve the above objective, a semiconductor device according to one aspect of the present disclosure includes a first switching element, a second switching element connected in series with the first switching element and positioned at a lower potential than the first switching element, a first control circuit for controlling the driving operation of the first switching element, a second control circuit for controlling the driving operation of the second switching element and the protective operation of the first and second switching elements, and a bootstrap circuit for generating a first control power supply voltage supplied to the first control circuit by a bootstrap operation using a second control power supply voltage supplied to the second control circuit, wherein the second control circuit has a voltage drop detection circuit for detecting a decrease in the second control power supply voltage, and the voltage drop detection circuit has a period detection circuit for detecting an initial charging period for initially charging the bootstrap circuit by the bootstrap operation. [Effects of the Invention]

[0009] According to one aspect of this disclosure, it is possible to suppress unintended activation of control power supply voltage drop protection during the initial charging period, and to perform control power supply voltage drop protection even during the control power supply voltage stabilization period. [Brief explanation of the drawing]

[0010] [Figure 1] This is a block diagram showing an example of a schematic configuration of a semiconductor device according to the first embodiment of this disclosure. [Figure 2] This is a block diagram showing an example of a schematic configuration of a control IC for a lower arm provided in a semiconductor device according to a first embodiment of the present disclosure. [Figure 3] This is a block diagram showing an example of a schematic configuration of a control voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device according to a first embodiment of the present disclosure. [Figure 4] This figure schematically shows examples of the waveforms of the charging current, charging voltage, and control power supply voltage for the lower arm flowing through the bootstrap circuit provided in the semiconductor device according to the first embodiment of this disclosure. [Figure 5]This diagram schematically shows examples of the waveforms of the charging current, charging voltage, and lower arm control power supply voltage flowing through the bootstrap circuit in a conventional semiconductor device. [Figure 6] This block diagram shows an example of a schematic configuration of a control voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device, according to a modification of the first embodiment of the present disclosure. [Figure 7] This is a block diagram showing an example of a schematic configuration of a control voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device according to a second embodiment of the present disclosure. [Figure 8] This block diagram shows an example of a schematic configuration of a voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device, according to a modification of the second embodiment of the present disclosure. [Figure 9] This block diagram shows an example of a schematic configuration of a voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device according to a third embodiment of the present disclosure. [Figure 10] This is a block diagram showing an example of a schematic configuration of a voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device according to a fourth embodiment of the present disclosure. [Figure 11] This is a block diagram showing an example of a schematic configuration of a voltage drop detection circuit provided in a control IC for the lower arm of a semiconductor device according to a fifth embodiment of the present disclosure. [Modes for carrying out the invention]

[0011] The embodiments for implementing this disclosure will be described with reference to the drawings. Note that the dimensions and scale of the elements in each drawing may differ from those of the actual product. Furthermore, the embodiments described below are illustrative examples of embodiments that may be envisioned when implementing this disclosure. Therefore, the scope of this disclosure is not limited to the embodiments exemplified below.

[0012] [First Embodiment] The semiconductor device according to the first embodiment of the present disclosure will be described with reference to FIGS. 1 to 5. The semiconductor device according to this embodiment will be described by taking an intelligent power module as an example. However, the semiconductor device according to this embodiment can be applied to a device having a function of generating a high-potential-side voltage using a low-potential-side voltage such as a bootstrap operation.

[0013] 1-1. Overall configuration of the semiconductor device: The overall configuration of the semiconductor device 100 according to this embodiment will be described with reference to FIG. 1. FIG. 1 is a block diagram showing an example of the schematic configuration of the semiconductor device 100.

[0014] As shown in FIG. 1, the semiconductor device 100 includes a control IC 1 for the upper arm, a control IC 2A for the lower arm, a bootstrap circuit 3, a driving element 4 for the upper arm, and a driving element 5 for the lower arm. The semiconductor device 100 includes a positive-side voltage input terminal 10P, a negative-side voltage input terminal 10N, an intermediate terminal 10M, a control power supply voltage input terminal 10VU for the upper arm, a reference potential terminal 10GU for the upper arm, and a control signal input terminal 10SU for the upper arm. The semiconductor device 100 includes a control power supply voltage input terminal 10VL for the lower arm, a reference potential terminal 10GL for the lower arm, and a control signal input terminal 10SL for the lower arm. Hereinafter, the "control power supply voltage input terminal" may be abbreviated as the "power supply input terminal".

[0015] The control IC1 for the upper arm (an example of the first control circuit) is a HVIC (HIGH VOLTAGE IC) that controls the high-potential side, that is, the drive element 4 for the upper arm. The control IC1 is an integrated circuit that controls the driving operation of the IGBT41 (an example of the first switching element) based on the input signal SinU for the upper arm input via the control signal input terminal 10SU. The input signal SinU is input from a control device (not shown) that controls the semiconductor device 100. The control IC1 operates with the reference potential of the reference potential VggU for the upper arm applied to the reference potential terminal 10GU and uses the control power supply voltage VccU for the upper arm (an example of the first control power supply voltage) generated by the bootstrap operation of the bootstrap circuit 3 (details will be described later) as the power supply.

[0016] The control IC2A for the lower arm (an example of the second control circuit) is a LVIC (LOW VOLTAGE IC) that controls the low-potential side, that is, the drive element 5 for the lower arm. The control IC2A is an integrated circuit that controls the driving operation of the IGBT51 (an example of the second switching element) based on the input signal SinL for the lower arm input via the control signal input terminal 10SL and controls the protection operations of the IGBT41 and IGBT51. The input signal SinL is input from a control device (not shown) that controls the semiconductor device 100. The control IC2A operates with the reference potential of the reference potential VggL for the lower arm applied to the reference potential terminal 10GL and uses the control power supply voltage VccL for the lower arm (an example of the second control power supply voltage) supplied via the power supply input terminal 10VL for the lower arm as the power supply.

[0017] The control power supply voltage VccL is generated by a voltage generation circuit 6 connected to the power supply input terminal 10VL and the reference potential terminal 10GL. The voltage generation circuit 6 is composed of, for example, a DC power supply. The positive side of the voltage generation circuit 6 is connected to the power supply input terminal 10VL, and the negative side of the voltage generation circuit 6 is connected to, for example, the reference potential terminal (e.g., ground terminal) of the semiconductor device 100 and the reference potential terminal 10GL. Therefore, the reference potential terminal 10GL is connected to the ground terminal of the semiconductor device 100.

[0018] [[ID=1,1]] The driving element 4 includes an IGBT 41 and a freewheeling diode 42. The gate of the IGBT 41 is connected to the output terminal of the control IC 1, the collector of the IGBT 41 is connected to the positive voltage input terminal 10P, and the emitter of the IGBT 41 is connected to the intermediate terminal 10M and the reference potential terminal 10GU. The freewheeling diode 42 is connected in antiparallel to the IGBT 41. Specifically, the cathode of the freewheeling diode 42 is connected to the collector of the IGBT 41, and the anode of the freewheeling diode 42 is connected to the emitter of the IGBT 41.

[0019] The driving element 5 includes an IGBT 51, a freewheeling diode 52, a temperature sensor 53 (not shown in Figure 1, see Figure 2), and a current sensor 54 (not shown in Figure 1, see Figure 2). Details of the temperature sensor 53 and current sensor 54 will be described later. The gate of the IGBT 51 is connected to the output terminal of the control IC 2A, the collector of the IGBT 51 is connected to the emitter of the IGBT 41, the anode of the freewheeling diode 42, the intermediate terminal 10M, and the reference potential terminal 10GU, and the emitter of the IGBT 51 is connected to the negative voltage input terminal 10N and the reference potential terminal 10GL. The freewheeling diode 52 is connected in antiparallel to the IGBT 51. Specifically, the cathode of the freewheeling diode 52 is connected to the collector of the IGBT 51, and the anode of the freewheeling diode 52 is connected to the emitter of the IGBT 51.

[0020] IGBTs 41 and 51 are controlled by control ICs 1 and 2A, causing them to repeatedly switch between on and off states with their phases inverted relative to each other. This allows the semiconductor device 100 to supply AC power to load devices such as motors from the intermediate terminal 10M. Thus, the intermediate terminal 10M functions as an AC power output terminal.

[0021] Thus, the semiconductor device 100 includes drive elements 4 and 5, each having IGBTs 41 and 51. Drive elements 4 and 5 are connected in series between the positive voltage input terminal 10P and the negative voltage input terminal 10N. Drive element 4 is located on the positive voltage input terminal 10P side, i.e., the high potential side. Drive element 5 is located on the negative voltage input terminal 10N side, i.e., the low potential side. Therefore, the semiconductor device 100 includes IGBT 41 (an example of a first switching element) and IGBT 51 (an example of a second switching element) which is connected in series with IGBT 41 and located on a lower potential side than IGBT 41.

[0022] Bootstrap circuit 3 is a circuit that generates the control power supply voltage VccU for the upper arm supplied to control IC 1 by a bootstrap operation using the control power supply voltage VccL for the lower arm supplied to control IC 2A. Bootstrap circuit 3 has a bootstrap diode 31, a bootstrap capacitor 32, and a limiting resistor 33. One terminal of the limiting resistor 33 is connected to the positive terminal of the voltage generation circuit 6 via the power supply input terminal 10VL for the lower arm. The other terminal of the limiting resistor 33 is connected to the anode of the bootstrap diode 31. The cathode of the bootstrap diode 31 is connected to one electrode of the bootstrap capacitor 32 via the power supply input terminal 10VU for the upper arm. The other electrode of the bootstrap capacitor 32 is connected to the reference potential terminal 10GU for the upper arm. Thus, bootstrap circuit 3 is positioned between the power supply input terminal 10VL for the lower arm and the reference potential terminal 10GU for the upper arm. The limiting resistor 33, bootstrap diode 31, and bootstrap capacitor 32 are connected in series between the power input terminal 10VL and the reference potential terminal 10GU.

[0023] Now, let's explain the bootstrap operation. In Figure 1, the bootstrap diode 31 constitutes a charging path α that charges the bootstrap capacitor 32. The limiting resistor 33 limits the current flowing through the bootstrap diode 31. When IGBT 41 is off and IGBT 51 is on, current flows along the charging path α, charging the bootstrap capacitor 32 and generating a voltage across it. Next, when IGBT 41 is on and IGBT 51 is off, the charge stored in the bootstrap capacitor 32 is discharged, and a voltage higher than the input voltage is generated above the bootstrap capacitor 32. As a result, the gate potential of IGBT 41 becomes higher than the emitter potential, allowing IGBT 41 to be driven.

[0024] 1-2. Configuration of control ICs installed in semiconductor devices: The control ICs 1 and 2A provided in the semiconductor device 100 will be explained using the control IC 2A for the lower arm as an example. Note that the control IC 1 for the upper arm does not have the temperature detection circuit 23 and current detection circuit 24 provided in the control IC 2A. Furthermore, the control IC 1 does not have the configuration provided in the control IC 2A for switching the determination voltage for detecting the control power supply voltage during and after the initial charging period. Figure 2 is a block diagram showing an example of the schematic configuration of the control IC 2A. In Figure 2, the drive element 5, which is the object controlled by the control IC 2A, is shown for ease of understanding. Also, the freewheeling diode 52 provided in the drive element 5 is not shown in Figure 2.

[0025] As shown in Figure 2, the control IC2A includes a gate drive circuit 21, a control voltage detection circuit 22A, a temperature detection circuit 23, a current detection circuit 24, a logical OR gate 25a, an alarm signal generation circuit 25b, a transistor 25c, a constant current source 25d, and a resistor element 25e.

[0026] The gate drive circuit 21 includes an on / off control circuit 211. The on / off control circuit 211 drives the IGBT 51 provided on the drive element 5, for example by PWM control, based on the input signal SinL input from a control device (not shown) via the control signal input terminal 10SL.

[0027] The control voltage detection circuit (an example of a voltage drop detection circuit) 22A of the control IC 2A is a circuit that detects a drop in the control power supply voltage VccL. As will be described in detail later, the control voltage detection circuit 22A outputs a low-level output voltage when the control power supply voltage VccL input from the power supply input terminal 10VL is higher than a predetermined voltage. On the other hand, the control voltage detection circuit 22A outputs a high-level output voltage when the control power supply voltage VccL input from the power supply input terminal 10VL is lower than the predetermined voltage. This predetermined voltage is set, for example, to the lowest voltage at which the gate drive circuit 21 can operate.

[0028] As shown in Figure 2, the temperature detection circuit 23 includes a comparator 231, a voltage generation circuit 232, and a constant current source 233. The voltage generation circuit 232 is composed of, for example, a DC power supply. The comparator 231 is composed of, for example, an operational amplifier. The negative side of the voltage generation circuit 232 is connected to the reference potential terminal (for example, the ground terminal) of the semiconductor device 100. Therefore, the voltage generation circuit 232 is connected to the reference potential terminal 10GL (see Figure 1). The positive side of the voltage generation circuit 232 is connected to the non-inverting input terminal (+) of the comparator 231. The inverting input terminal (-) of the comparator 231 is connected to the temperature sensor 53 provided on the driving element 5. The temperature sensor 53 is composed of, for example, a diode made of silicon. The anode of the temperature sensor 53 is connected to the inverting input terminal (-) of the comparator 231, and the cathode of the temperature sensor 53 is connected to the reference potential terminal 10GL. The output terminal of the constant current source 233 is connected to the anode of the temperature sensor 53.

[0029] Generally, the forward voltage of a silicon diode is lower at higher ambient temperatures than at lower ambient temperatures. Therefore, when a constant current is input from the constant current source 233 to the temperature sensor 53, the voltage drop across the temperature sensor 53 decreases as the temperature of the IGBT 51 rises. As a result, the voltage input from the temperature sensor 53 to the temperature detection circuit 23 decreases as the temperature of the IGBT 51 rises.

[0030] The voltage output from the voltage generation circuit 232 is set to be higher than the voltage detected by the temperature sensor 53 when the IGBT 51 temperature is above the absolute maximum rated temperature. Therefore, the comparator 231 outputs a low-level output voltage when the temperature of the IGBT 51 is below the absolute maximum rated temperature. Conversely, the comparator 231 outputs a high-level output voltage when the temperature of the IGBT 51 is above the absolute maximum rated temperature. In this way, the temperature detection circuit 23 can detect whether the temperature of the IGBT 51 exceeds the absolute maximum rated temperature by using the voltage input from the temperature sensor 53, which changes according to the temperature of the IGBT 51.

[0031] As shown in Figure 2, the current detection circuit 24 includes a resistor 241, a comparator 242, and a voltage generation circuit 243. The resistor 241 is connected between a current sensor 54 provided on the driving element 5 and a reference potential terminal 10GL. The current sensor 54 outputs a detection current corresponding to the current flowing through the IGBT 51. One terminal of the resistor 241 is connected to the output terminal of the current sensor 54, and the other terminal of the resistor 241 is connected to the reference potential terminal 10GL. The current detection circuit 24 is configured to use the voltage drop generated across the resistor 241 when the detection current output from the current sensor 54 flows through the resistor 241 as the detection voltage. In other words, the current detection circuit 24 uses the voltage at one terminal of the resistor 241 connected to the current sensor 54 as the detection voltage corresponding to the current flowing through the IGBT 51.

[0032] The voltage generation circuit 243 is composed of, for example, a DC power supply. The negative side of the voltage generation circuit 243 is connected to the reference potential terminal (for example, the ground terminal) of the control IC 2A. Therefore, the voltage generation circuit 243 is connected to the reference potential terminal 10GL. The positive side of the voltage generation circuit 243 is connected to the inverting input terminal (-) of the comparator 242. The voltage generation circuit 243 is configured to generate a comparison voltage of a predetermined voltage level. The comparison voltage is set to a voltage corresponding to, for example, the absolute maximum rated current of the IGBT 51.

[0033] The non-inverting input terminal (+) of comparator 242 is connected to the current sensor 54 and one terminal of the resistor element 241. Comparator 242 outputs a low-level output voltage when the detected voltage, which is the voltage drop across the resistor element 241, is lower than the comparison voltage generated by the voltage generation circuit 243. Comparator 242 also outputs a high-level output voltage when the detected voltage is higher than the comparison voltage.

[0034] The detected current output from the current sensor 54 is proportional to the current output from the IGBT 51. Therefore, the current detection circuit 24 outputs a low-level output signal when the voltage corresponding to the detected current output from the current sensor 54 is lower than the voltage corresponding to the absolute maximum rated current of the IGBT 51 (i.e., the IGBT 51 is in a normal state). On the other hand, the current detection circuit 24 outputs a high-level output voltage when the voltage corresponding to the detected current output from the current sensor 54 is higher than the voltage corresponding to the absolute maximum rated current of the IGBT 51 (i.e., an overcurrent is flowing through the IGBT 51).

[0035] As shown in Figure 2, one of the three input terminals of the OR gate 25a is connected to the output terminal of the control voltage detection circuit 22A. One of the remaining input terminals of the OR gate 25a is connected to the output terminal of comparator 231, which is the output terminal of the temperature detection circuit 23. The other remaining input terminal of the OR gate 25a is connected to the output terminal of comparator 242, which is the output terminal of the current detection circuit 24. The output terminal of the OR gate 25a is connected to the on / off control circuit 211.

[0036] Therefore, the OR gate 25a outputs a low-level output voltage to the ON / OFF control circuit 211 when the control power supply voltage VccL, the current flowing through IGBT51, and the temperature of IGBT51 are all normal. On the other hand, if there is an abnormality in at least one of the control power supply voltage VccL, the current flowing through IGBT51, and the temperature of IGBT51, the OR gate 25a outputs a high-level output voltage to the ON / OFF control circuit 211.

[0037] The on / off control circuit 211 continues to operate based on the voltage level of the input signal SinL when the voltage level of the output voltage input from the OR gate 25a is low. On the other hand, the on / off control circuit 211 stops the operation of the IGBT 51 regardless of the voltage level of the input signal SinL when the voltage level of the output voltage input from the OR gate 25a is high. As a result, the on / off control circuit 211 can stop the operation of the IGBT 51 if there is an abnormality in at least one of the control power supply voltage VccL, the current flowing through the IGBT 51, or the temperature of the IGBT 51.

[0038] As shown in Figure 2, each of the three input terminals of the alarm signal generation circuit 25b is connected in a one-to-one correspondence to the output terminal of the control voltage detection circuit 22A, the output terminal of the temperature detection circuit 23, and the output terminal of the current detection circuit 24. The transistor 25c, located on the output side of the alarm signal generation circuit 25b, is composed of, for example, an N-type field-effect transistor. The gate of transistor 25c is connected to the output terminal of the alarm signal generation circuit 25b. The drain of transistor 25c is connected to the output terminal of the constant current source 25d. The source of transistor 25c is connected to the reference potential terminal 10GL.

[0039] The alarm signal generation circuit 25b outputs a low-level output voltage to the gate of transistor 25c if none of the control voltage detection circuit 22A, temperature detection circuit 23, or current detection circuit 24 have detected an abnormality. On the other hand, if at least one of the control voltage detection circuit 22A, temperature detection circuit 23, or current detection circuit 24 has detected an abnormality, the alarm signal generation circuit 25b outputs a high-level output voltage to the gate of transistor 25c for a predetermined period of time. Therefore, when at least one of the control IC 2A and IGBT 51 changes from a normal state to an abnormal state, the alarm signal generation circuit 25b outputs a pulsed output voltage with a high voltage level to the gate of transistor 25c for a predetermined period of time.

[0040] Therefore, transistor 25c is in the off state when none of the control voltage detection circuit 22A, temperature detection circuit 23, or current detection circuit 24 detect an abnormal condition. On the other hand, if at least one of the control voltage detection circuit 22A, temperature detection circuit 23, or current detection circuit 24 detects an abnormal condition, transistor 25c is in the on state only for the period during which the voltage level of the output voltage output from the alarm signal generation circuit 25b is high.

[0041] One terminal of the resistor 25e is connected to the drain of transistor 25c and the output terminal of constant current source 25d. The other terminal of the resistor 25e is connected to the alarm signal output terminal 10VFO provided on semiconductor device 100.

[0042] The alarm signal output terminal 10VFO is connected to the drain of transistor 25c via a resistor 25e, resulting in an open-drain output. When none of the control voltage detection circuit 22A, temperature detection circuit 23, or current detection circuit 24 detect an abnormal condition, the output voltage output from the alarm signal generation circuit 25b is low level, causing transistor 25c to be in the off state. Therefore, the voltage at the alarm signal output terminal 10VFO becomes high level. On the other hand, when at least one of the control voltage detection circuit 22A, temperature detection circuit 23, or current detection circuit 24 detects an abnormal condition, the output voltage output from the alarm signal generation circuit 25b is high level, causing transistor 25c to be in the on state. Therefore, the voltage at the alarm signal output terminal 10VFO becomes the potential of the reference potential terminal 10GL (e.g., 0V). Thus, the voltage at the alarm signal output terminal 10VFO is the inverted voltage of the output voltage output from the alarm signal generation circuit 25b. As a result, an alarm signal based on the output voltage output from the alarm signal generation circuit 25b is output from the alarm signal output terminal 10VFO.

[0043] 1-3. Configuration of a voltage drop detection circuit provided in a semiconductor device: The voltage drop detection circuit provided in the second control circuit of the semiconductor device according to this embodiment will be described with reference to Figures 1 and 2, and with reference to Figure 3. Figure 3 is a circuit block diagram showing an example of the schematic configuration of the control voltage detection circuit (an example of a voltage drop detection circuit) 22A in this embodiment.

[0044] As shown in Figure 3, the control voltage detection circuit 22A includes a period detection circuit 221A, a voltage conversion circuit 222, a comparator 223, and a signal output terminal 224. A portion of claim 1 of the period detection circuit 221A is a circuit that detects the initial charging period during which the bootstrap circuit 3 is initially charged by the bootstrap operation. The period detection circuit 221A includes a differential amplifier circuit 2211 and a comparator circuit 2212. The differential amplifier circuit 2211 is a circuit that amplifies the difference between the charging voltage Vb, which is based on the charging current Ib flowing through the bootstrap circuit 3, and a comparison voltage Vc11, which has a voltage level similar to that of the control power supply voltage VccL. The comparator circuit 2212 is a circuit that compares the output voltage V2211 output from the differential amplifier circuit 2211 with the comparison voltage Vc12.

[0045] The differential amplifier circuit 2211 includes an amplifier 2211a, an input resistor 2211b, a feedback resistor 2211c, and a voltage generation circuit 2211d. The voltage generation circuit 2211d is configured, for example, with a DC power supply. The negative terminal of the voltage generation circuit 2211d is connected to the reference potential terminal (for example, the ground terminal) of the semiconductor device 100. Therefore, the negative terminal of the voltage generation circuit 2211d is at the same potential as the reference potential terminal 10GL. The voltage generation circuit 2211d is configured to output the same voltage as the voltage generation circuit 6. The voltage generation circuit 2211d and the voltage generation circuit 6 are configured to output the same voltage to each other. However, the outputs of the voltage generation circuit 2211d and the voltage generation circuit 6 may differ within the tolerance range of their respective outputs. In this case as well, the outputs of the voltage generation circuit 2211d and the voltage generation circuit 6 are considered to be the same voltage. Therefore, the comparison voltage Vc11, which is the voltage output by the voltage generation circuit 2211d, will be a voltage with the same voltage level as the control power supply voltage VccL, which is the voltage output by the voltage generation circuit 6.

[0046] Amplifier 2211a is composed of, for example, an operational amplifier. The non-inverting input terminal (+) of amplifier 2211a is connected to the positive terminal of the voltage generation circuit 2211d. The inverting input terminal (-) of amplifier 2211a is connected to the other terminal of input resistor 2211b and the other terminal of feedback resistor 2211c. The output terminal of amplifier 2211a is connected to one terminal of feedback resistor 2211c.

[0047] One terminal of input resistor 2211b is connected to the charging voltage input terminal 10CT provided on control IC 2A. The charging voltage input terminal 10CT is connected to the anode of the bootstrap diode 31 and the other terminal of the limiting resistor 33, which are provided on bootstrap circuit 3. Therefore, one terminal of input resistor 2211b is connected to the anode of the bootstrap diode 31 and the other terminal of the limiting resistor 33 via the charging voltage input terminal 10CT. The charging voltage Vb input to the charging voltage input terminal 10CT corresponds to the voltage drop that occurs across the limiting resistor 33 due to the charging current Ib flowing through the limiting resistor 33. The charging current Ib is the current supplied from the voltage generation circuit 6 via the power supply input terminal 10VL. For this reason, the charging voltage Vb is lower than the control power supply voltage VccL by the amount of the voltage drop that occurs across the limiting resistor 33.

[0048] The charging voltage Vb is input to the inverting input terminal (-) of amplifier 2211a via input resistor 2211b, and the comparison voltage Vc11 is input to the non-inverting input terminal (+) of amplifier 2211a. Therefore, the differential amplifier circuit 2211 outputs an output voltage V2211 by multiplying the voltage obtained by dividing the resistance value of the feedback resistor 2211c by the resistance value of the input resistor 2211b by the difference between the comparison voltage Vc11 (i.e., the control power supply voltage VccL) and the charging voltage Vb. As time progresses during the initial charging period, the amount of charge in the bootstrap capacitor 32 increases, the charging current Ib decreases, the voltage drop across the limiting resistor 33 becomes smaller, and the charging voltage Vb increases. That is, the voltage level of the charging voltage Vb approaches the voltage level of the control power supply voltage VccL as time progresses during the initial charging period. As a result, the output voltage V2211 decreases as time progresses during the initial charging period.

[0049] The comparison circuit 2212 includes a comparator 2212a and a voltage generation circuit 2212b. The voltage generation circuit 2212b is composed of, for example, a DC power supply. The negative side of the voltage generation circuit 2212b is connected to the reference potential terminal (for example, the ground terminal) of the semiconductor device 100. Therefore, the negative side of the voltage generation circuit 2212b is at the same potential as the reference potential terminal 10GL. The voltage generation circuit 2212b is configured to output a comparison voltage Vc12 having a voltage level obtained by multiplying the resistance value of the feedback resistor 2211c by the resistance value of the input resistor 2211b by a voltage level at which the output voltage V2211 output by the differential amplifier circuit 2211 can be considered as 0 volts. In other words, the comparison voltage Vc12 is set to have a voltage level that is amplified by an amplification factor based on the input resistor 2211b and the feedback resistor 2211c, from a voltage level at which the charging voltage Vb and the control power supply voltage VccL can be considered to be the same.

[0050] The comparator 2212a is composed of, for example, an operational amplifier. The non-inverting input terminal (+) of comparator 2212a is connected to the output terminal of the differential amplifier circuit 2211 (i.e., the output terminal of amplifier 2211a) and one terminal of the feedback resistor 2211c. The inverting input terminal (-) of comparator 2212a is connected to the positive side of the voltage generation circuit 2212b. The output terminal of comparator 2212a is connected to the voltage conversion circuit 222. Therefore, if the output voltage V2211 input from the differential amplifier circuit 2211 is higher than the comparison voltage Vc12, the comparator circuit 2212 outputs a signal indicating a high signal level (i.e., voltage level) SgA (details will be described later) to the voltage conversion circuit 222. On the other hand, if the output voltage V2211 input from the differential amplifier circuit 2211 is lower than the comparison voltage Vc12, the comparison circuit 2212 outputs a low-level indicator signal SgA to the voltage conversion circuit 222, which indicates that the signal level (i.e., voltage level) is low.

[0051] When the bootstrap capacitor 32 (see Figure 1) is fully charged, the initial charging of the bootstrap circuit 3 is complete, and the charging current Ib stops flowing. As a result, the voltage level of the charging voltage Vb becomes approximately the same as the voltage level of the control power supply voltage VccL. Therefore, the initial charging period at which initial charging is completed can be detected based on the difference between the charging voltage Vb and the control power supply voltage VccL. In this embodiment, the period detection circuit 221A calculates the difference between the charging voltage Vb and the comparison voltage Vc11 in the differential amplifier circuit 2211, and detects the end timing of the initial charging period by comparing the output voltage V2211 and the comparison voltage Vc12 in the comparison circuit 2212. Thus, in this embodiment, the period detection circuit 221A detects the initial charging period based on the difference between the charging voltage Vb, which is based on the charging current Ib flowing through the bootstrap circuit 3, and the comparison voltage Vc11, which has a voltage level similar to that of the control power supply voltage VccL.

[0052] The voltage conversion circuit 222 is a circuit that raises the determination voltage V222 for determining a decrease in the control power supply voltage VccL after the period detection circuit 221A detects the end of the initial charging period compared to before the period detection circuit 221A detects the end of the initial charging period. The suggestion signal SgA output from the period detection circuit 221A indicates whether or not the initial charging period has ended, depending on the signal level. That is, a high signal level of suggestion signal SgA indicates that the initial charging period has not ended. On the other hand, a low signal level of suggestion signal SgA indicates that the initial charging period has ended.

[0053] Therefore, when the signal level of the suggestion signal SgA input from the period detection circuit 221A is high, the voltage conversion circuit 222 determines that the period detection circuit 221A has not detected the end of the initial charging period and outputs a determination voltage V222 at a predetermined signal level (i.e., voltage level). On the other hand, when the signal level of the suggestion signal SgA input from the period detection circuit 221A is low, the voltage conversion circuit 222 determines that the period detection circuit 221A has detected the end of the initial charging period and outputs a determination voltage V222 at a higher signal level than before the initial charging period was detected.

[0054] As will be explained in detail later, the control power supply voltage VccL during the initial charging period may be lower than the protection voltage required to protect the control IC2A from a drop in the control power supply voltage VccL when the control IC2A is driving a load device (not shown) such as a motor by the drive element 5. Also, when the control IC2A is performing the initial charging operation by the bootstrap circuit 3, it is necessary to protect the control IC2A from a drop in the control power supply voltage VccL. However, the protection voltage during the initial charging operation can be lower than the protection voltage when the load device (not shown) such as a motor is being driven by the drive element 5. For this reason, the voltage conversion circuit 222 sets and outputs a higher determination voltage V222 corresponding to the protection voltage after the initial charging period has ended than during the initial charging period.

[0055] As shown in Figure 3, the comparator 223, located on the output side of the control voltage detection circuit 22A, is composed of, for example, an operational amplifier. The non-inverting input terminal (+) of the comparator 223 is connected to the output terminal of the voltage conversion circuit 222. The inverting input terminal (-) of the comparator 223 is connected to the power supply input terminal 10VL. The output terminal of the comparator 223 is connected to the signal output terminal 224 provided on the control voltage detection circuit 22A. The signal output terminal 224 is connected to the input terminal of the alarm signal generation circuit 25b and the input terminal of the OR gate 25a (see Figure 2). The signal output terminal 224 is the terminal that outputs an output signal Sout, which indicates by voltage level whether or not the control power supply voltage VccL is decreasing.

[0056] Therefore, the comparator 223 compares the judgment voltage V222 input from the voltage conversion circuit 222 with the control power supply voltage VccL input from the voltage generation circuit 6 via the power supply input terminal 10VL. If the control power supply voltage VccL is higher than the judgment voltage V222 (i.e., normal operation), the comparator 223 outputs a low-level output signal via the signal output terminal 224 to the alarm signal generation circuit 25b and the OR gate 25a. On the other hand, if the control power supply voltage VccL is lower than the judgment voltage V222 (i.e., abnormal operation), the comparator 223 outputs a high-level output signal via the signal output terminal 224 to the alarm signal generation circuit 25b and the OR gate 25a.

[0057] As described above, the voltage conversion circuit 222 outputs a determination voltage V222 to the comparator 223 that has a different voltage level depending on whether the initial charging period has ended or not. Therefore, the comparator 223 can compare the optimal determination voltage V222 with the control power supply voltage VccL depending on whether the initial charging period has ended or not. As a result, the control voltage detection circuit 22A can appropriately detect whether it is necessary to protect the control IC2A from a decrease in the control power supply voltage VccL, in both the case of the initial charging period and the control voltage stabilization period after the initial charging period has ended.

[0058] 1-4. Operation of semiconductor devices: As an example of the operation of the semiconductor device according to this embodiment, the protection operation of the control IC from a drop in the control power supply voltage during bootstrap operation will be explained with reference to Figures 1 to 3 and using Figure 4. Figure 4 is a schematic diagram showing the waveforms of the charging current, the control power supply voltage for the upper arm, and the control power supply voltage for the lower arm during bootstrap operation. In Figure 4, "IB" indicates the charging current, "VccU" indicates the control power supply voltage for the upper arm, and "VccL" indicates the control power supply voltage for the lower arm. In Figure 4, "V222" indicates the determination voltage output from the voltage conversion circuit 222, "Pic" indicates the initial charging period, and "Pso" indicates the control voltage stabilization period after the initial charging period has ended.

[0059] In the semiconductor device 100 according to this embodiment, the bootstrap operation is initiated when the control IC 1 keeps the drive element 4 in the off state, and the control IC 2A repeatedly controls the drive element 5 to be on and off. When the drive element 5 is controlled to be on, the charging path α shown in Figure 1 is formed.

[0060] The charging path α is a current path that passes through the following in the order listed above: voltage generation circuit 6, power input terminal 10VL, limiting resistor 33, bootstrap diode 31, bootstrap capacitor 32, reference potential terminal 10GU, IGBT 51, reference potential terminal 10GL, and voltage generation circuit 6. The bootstrap capacitor 32 is charged by the charging current Ib flowing through the charging path α. Specifically, the voltage between the two electrodes of the bootstrap capacitor 32 is maintained at the potential difference between the control power supply voltage VccL and the reference potential VggU for the upper arm by charging through the charging path α. Therefore, the control power supply voltage VccU supplied to the power input terminal 10VU is set to a voltage that is higher by the control power supply voltage VccL compared to the reference potential of the reference potential terminal 10GU. In this way, the semiconductor device 100 generates the control power supply voltage VccU for the upper arm by bootstrap operation using the IGBT 51 and the bootstrap circuit 3.

[0061] In this embodiment, during bootstrap operation, the bootstrap capacitor 32 is charged by the repeated on / off states of the drive element 5. In this case, the charging current Ib flowing through the bootstrap circuit 3 has a pulsed current waveform. The pulsed charging current Ib has a larger current value the smaller the amount of charge charged in the bootstrap capacitor 32. As shown in Figure 4, suppose that the bootstrap capacitor 32 is not charged and initial charging begins at time t1 when the control power supply voltage VccU is 0V (i.e., at the same potential as the reference potential terminal 10GU). Then, during the initial charging period Pic, the current value of the charging current Ib is largest at time t1. As time passes from time t1 and the on / off state of the drive element 5 is repeated, the amount of charge charged in the bootstrap capacitor 32 increases, and the voltage of the control power supply voltage VccU rises. At that time, the current value of the charging current Ib gradually decreases.

[0062] The control power supply voltage VccL fluctuates as the charging current Ib flows. As shown in Figure 4, the fluctuation of the control power supply voltage VccL increases as the value of the charging current Ib increases. Therefore, the fluctuation of the control power supply voltage VccL is largest at time t1 and decreases as time passes from time t1 and the on / off state of the drive element 5 is repeatedly switched on and off. In this embodiment, the voltage conversion circuit 222 (see Figure 3) is set so that the voltage level Vpic of the determination voltage V222 is lower than the voltage level at the time of maximum fluctuation of the control power supply voltage VccL. Therefore, the semiconductor device 100 is prevented from stopping due to control voltage drop protection during the initial charging period Pic.

[0063] The output voltage V2211 from the differential amplifier circuit 2211 (see Figure 3) is highest at time t1 when the charging voltage Vb is at its highest, and decreases as time passes from time t1 and the on / off state of the drive element 5 is repeatedly switched on and off. When the charge in the bootstrap capacitor 32 reaches its maximum and the control power supply voltage VccU reaches the target level Vtg, the output voltage V2211 from the differential amplifier circuit 2211 (see Figure 3) becomes lower than the comparison voltage Vc12. For example, at time t2, the voltage level of the suggestion signal SgA output from the period detection circuit 221A switches from a high level to a low level. As a result, at time t2, the determination voltage V222 output from the voltage conversion circuit 222 becomes a voltage level Vpso, which is higher than the voltage level Vpic during the initial charging period Pic. As a result, during the control voltage stabilization period Pso after the initial charging period Pic has ended, the semiconductor device 100 can detect a decrease in the control power supply voltage VccL by the determination voltage V222 of the voltage level Vpso and perform a control power supply voltage drop protection operation.

[0064] 1-5. Effects of semiconductor devices: The effects of the semiconductor device according to this embodiment will be explained with reference to Figures 1 to 4 and with reference to Figure 5. Conventional semiconductor devices generate a control power supply voltage for the upper arm by bootstrap operation, similar to semiconductor device 100, but the period detection circuit 221A and voltage conversion circuit 222 (see Figure 3) in this embodiment are not provided in the control voltage detection circuit. For this reason, in conventional semiconductor devices, the judgment voltage input to the comparator corresponding to comparator 223 (see Figure 3) is set to the voltage level during the initial charging period and the control voltage stabilization period after the end of the initial charging period.

[0065] Figure 5 schematically shows the waveforms of the charging current, the control power supply voltage for the upper arm, and the control power supply voltage for the lower arm during bootstrap operation in a conventional semiconductor device. In Figure 5, "IB" represents the charging current, "VccU" represents the control power supply voltage for the upper arm, and "VccL" represents the control power supply voltage for the lower arm. In Figure 5, "Vdtm" represents the judgment voltage input to the comparator, "Pic" represents the initial charging period, and "Pso" represents the control voltage stabilization period.

[0066] As described above, the determination voltage Vdtm is set to the same voltage level Vpso during the initial charging period Pic and the control voltage stabilization period Pso after the initial charging period Pic has ended. The voltage level Vpso is, for example, the same as the voltage level Vpso of the determination voltage V222 in this embodiment (see Figure 4). As shown in Figure 5, if the control power supply voltage VccL for the lower arm falls below the determination voltage Vdtm at time t1a, after time t1 when the bootstrap operation starts, the control power supply voltage drop protection is activated. As a result, the bootstrap operation stops at time t1b, after a predetermined time has elapsed from time t1a, and the control power supply voltage VccU for the upper arm drops. At time t1c, after a predetermined time has elapsed from time t1b, the bootstrap operation resumes. Subsequently, at time t2, the voltage level of the control power supply voltage VccU reaches the target level Vtg, and the bootstrap operation ends.

[0067] Thus, in conventional semiconductor devices, the voltage level Vpso of the determination voltage Vdtm during the initial charging period Pic is set to be the same as the voltage level during the control voltage stabilization period Pso. Therefore, during bootstrap operation when the amount of charge in the bootstrap capacitor is small (for example, operation at time t1 shown in Figure 5), the control power supply voltage VccU may become lower than the determination voltage Vdtm, and the bootstrap operation may temporarily stop. As a result, conventional semiconductor devices suffer from the problem of a longer initial charging period Pic.

[0068] In contrast, in the semiconductor device 100 according to this embodiment, the voltage level Vpic of the determination voltage V222 during the initial charging period Pic is set lower than the voltage level Vpso during the control voltage stabilization period Pso. As a result, the semiconductor device 100 can suppress the activation of protection against an unintended drop in the control power supply voltage VccL during the initial charging period Pic, thereby preventing the initial charging time from being prolonged. Furthermore, since the semiconductor device 100 sets the voltage level Vpso of the determination voltage V222 during the control voltage stabilization period Pso higher than the voltage level Vpic, it can perform protection against a drop in the control power supply voltage similar to that of conventional semiconductor devices.

[0069] As described above, the semiconductor device 100 according to this embodiment includes an IGBT 41, an IGBT 51 connected in series with the IGBT 41 and positioned at a lower potential than the IGBT 41, a control IC 1 that controls the driving operation of the IGBT 41, a control IC 2A that controls the driving operation of the IGBT 51 and the protection operations of the IGBT 41 and the IGBT 51, and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by a bootstrap operation using a control power supply voltage VccL supplied to the control IC 2A. The control IC 2A has a control voltage detection circuit 22A that detects a decrease in the control power supply voltage VccL, and the control voltage detection circuit 22A has a period detection circuit 221A that detects an initial charging period for initially charging the bootstrap circuit 3 by a bootstrap operation.

[0070] As a result, the semiconductor device 100 can suppress unintended activation of the control power supply voltage drop protection during the initial charging period, and can also perform control power supply voltage drop protection during the control power supply voltage stabilization period.

[0071] 1-5. Variations: A semiconductor device according to a modification of this embodiment will be described with reference to Figures 1 and 2, and with reference to Figure 6. This modified semiconductor device has the same configuration as the semiconductor device 100 according to this embodiment, except that the configuration of the control voltage detection circuit is different. For this reason, components of the semiconductor device according to this modified embodiment that perform the same function as the components of the semiconductor device 100 according to this embodiment are denoted by the same reference numerals, and their descriptions are omitted. Figure 6 is a circuit block diagram showing an example of the schematic configuration of the control voltage detection circuit (an example of a voltage drop detection circuit) 22AM in this modified embodiment.

[0072] As shown in Figure 6, the control voltage detection circuit 22AM provided in the semiconductor device 100M according to this modified example has a delay circuit 225 that delays the signal input from the period detection circuit 221A, which indicates the detection of the end of the initial charging period, by a predetermined time and outputs it to the voltage conversion circuit 222. The input terminal of the delay circuit 225 is connected to the output terminal of the comparator 2212a provided in the period detection circuit 221A. The output terminal of the delay circuit 225 is connected to the input terminal of the voltage conversion circuit 222. As a result, the delay circuit 225 can delay the signal input from the comparator 2212a, which is SgA, by a predetermined time and output it to the voltage conversion circuit 222.

[0073] Therefore, the timing at which the period detection circuit 221A detects the initial charging period and the voltage conversion circuit 222 converts the voltage level of the determination voltage V222 is delayed by the amount of the delay in the delay circuit 225 compared to the timing in this embodiment. Consequently, the semiconductor device 100M can convert the voltage level of the determination voltage V222 after the initial charging period has ended more reliably than the semiconductor device 100. As a result, the semiconductor device 100M can more reliably suppress the unintended activation of the control power supply voltage drop protection during the initial charging period, and can also perform the control power supply voltage drop protection during the control power supply voltage stabilization period.

[0074] [Second Embodiment] A semiconductor device according to a second embodiment of this disclosure will be described with reference to Figure 7. The semiconductor device according to this embodiment has the same configuration as the semiconductor device 100 according to the first embodiment, except that the configuration of the control voltage detection circuit is different. For this reason, for the components of the semiconductor device according to this embodiment, components that perform the same actions and functions as the components of the semiconductor device 100 according to the first embodiment are denoted by the same reference numerals and their descriptions are omitted.

[0075] 2-1. Overall configuration of the semiconductor device: Since the semiconductor device 200 according to this embodiment has the same overall configuration as the semiconductor device 100 according to the first embodiment described above, a detailed explanation will be omitted.

[0076] 2-2. Configuration of control ICs installed in semiconductor devices: The control IC for the upper arm (an example of the first control circuit) provided in the semiconductor device 200 according to this embodiment has the same configuration as the control IC 1 for the upper arm in the first embodiment described above, so its explanation will be omitted. The control IC2B for the lower arm (an example of the second control circuit) provided in the semiconductor device 200 according to this embodiment has a similar configuration to the control IC2A for the lower arm in the first embodiment, except for the configuration of the voltage drop detection circuit. For this reason, a description of the overall configuration of the control IC2B for the lower arm provided in the semiconductor device 200 according to this embodiment will be omitted.

[0077] 2-3. Configuration of a voltage drop detection circuit provided in a semiconductor device: The control voltage detection circuit (an example of a voltage drop detection circuit) 22B provided in the control IC 2B of the semiconductor device 200 according to this embodiment will be described with reference to Figure 7. Figure 7 is a circuit block diagram showing an example of the schematic configuration of the control voltage detection circuit 22B in this embodiment.

[0078] As shown in Figure 7, the control voltage detection circuit 22B includes a period detection circuit 221B, a voltage conversion circuit 222, a comparator 223, and a signal output terminal 224. The period detection circuit 221B is a circuit that detects the initial charging period during which the bootstrap circuit 3 is initially charged by the bootstrap operation. The period detection circuit 221B includes a comparator 2213 and a voltage generation circuit 2214. The voltage generation circuit 2214 is composed of, for example, a DC power supply. The negative side of the voltage generation circuit 2214 is connected to the reference potential terminal (for example, the ground terminal) of the semiconductor device 100. Therefore, the negative side of the voltage generation circuit 2214 is at the same potential as the reference potential terminal 10GL. The voltage generation circuit 2214 is configured to output a comparison voltage Vc13 that is a predetermined value lower than the control power supply voltage VccL. This predetermined value is set to a voltage at the same voltage level as the voltage generated when a predetermined charging current Ib flows through the limiting resistor 33, for example.

[0079] Comparator 2213 is composed of, for example, an operational amplifier. The non-inverting input terminal (+) of comparator 2213 is connected to the charging voltage input terminal 10CT. The inverting input terminal (-) of comparator 2213 is connected to the positive side of the voltage generation circuit 2214. The output terminal of comparator 2213 is connected to the voltage conversion circuit 222. Therefore, if the charging voltage Vb input from the bootstrap circuit 3 via the charging voltage input terminal 10CT is higher than the comparison voltage Vc13, comparator 2213 outputs a high-level suggestion signal SgB to the voltage conversion circuit 222, indicating a signal level (i.e., voltage level). On the other hand, if the charging voltage Vb input from the bootstrap circuit 3 via the charging voltage input terminal 10CT is lower than the comparison voltage Vc13, comparator 2213 outputs a low-level suggestion signal SgB to the voltage conversion circuit 222, indicating a signal level (i.e., voltage level).

[0080] When the bootstrap capacitor 32 (see Figure 1) is fully charged, the initial charging of the bootstrap circuit 3 is complete, and the charging current Ib stops flowing. As a result, the voltage level of the charging voltage Vb becomes approximately the same as the voltage level of the control power supply voltage VccL. Therefore, the initial charging period during which the initial charging is completed can be detected based on a comparison between the charging voltage Vb and the comparison voltage Vc13. Thus, in this embodiment, the period detection circuit 221B detects the initial charging period based on the charging voltage Vb, which is determined by the charging current Ib flowing through the bootstrap circuit 3.

[0081] As described in the first embodiment above, the charging voltage Vb corresponds to the voltage drop across the limiting resistor 33 caused by the charging current Ib flowing through it, and is lower than the control power supply voltage VccL by the amount of this voltage drop. The charging current Ib decreases as the amount of charge accumulated in the bootstrap capacitor 32 increases as the bootstrap operation by the bootstrap circuit 3 progresses. Therefore, the voltage drop across the limiting resistor 33 decreases as the bootstrap operation by the bootstrap circuit 3 progresses, and the charging voltage Vb increases as the bootstrap operation progresses, becoming approximately the same voltage as the control power supply voltage VccL at the end of the initial charging period.

[0082] Therefore, if the charging voltage Vb is lower than the comparison voltage Vc13, the period detection circuit 221B outputs a signal SgB to the voltage conversion circuit 222 indicating that the signal level (i.e., voltage level) is low and the initial charging period has not yet ended. On the other hand, if the charging voltage Vb is higher than the comparison voltage Vc13, the period detection circuit 221B outputs a signal SgB to the voltage conversion circuit 222 indicating that the signal level (i.e., voltage level) is high and the initial charging period has ended.

[0083] The voltage conversion circuit 222 is a circuit that raises the determination voltage V222 for determining a decrease in the control power supply voltage VccL after the period detection circuit 221B has detected the end of the initial charging period compared to before the period detection circuit 221B has detected the end of the initial charging period. The suggestion signal SgB output from the period detection circuit 221B indicates whether or not the initial charging period has ended, depending on the signal level. That is, a low level suggestion signal SgB indicates that the initial charging period has not ended. On the other hand, a high level suggestion signal SgB indicates that the initial charging period has ended.

[0084] Therefore, when the signal level of the suggestion signal SgB input from the period detection circuit 221B is low, the voltage conversion circuit 222 determines that the period detection circuit 221B has not detected the end of the initial charging period and outputs a determination voltage V222 at a predetermined signal level (i.e., voltage level). On the other hand, when the signal level of the suggestion signal SgB input from the period detection circuit 221B is high, the voltage conversion circuit 222 determines that the period detection circuit 221B has detected the end of the initial charging period and outputs a determination voltage V222 at a higher signal level than before the initial charging period was detected.

[0085] The voltage conversion circuit 222 outputs a determination voltage V222 to the comparator 223 that has a different voltage level depending on whether the initial charging period has ended or not. Therefore, the comparator 223 can compare the optimal determination voltage V222 with the control power supply voltage VccL depending on whether the initial charging period has ended or not. As a result, the control voltage detection circuit 22B can appropriately detect whether it is necessary to protect the control IC 2B from a decrease in the control power supply voltage VccL, both during the initial charging period and during the control voltage stabilization period after the initial charging period, similar to the control voltage detection circuit 22A in the first embodiment described above.

[0086] 2-4. Operation of semiconductor devices: As an example of the operation of the semiconductor device 200 according to this embodiment, the operation to protect the control IC 2B from a drop in the control power supply voltage during bootstrap operation is the same as the protection operation in the semiconductor device 100 according to the first embodiment, except that the method of detecting the end of the initial charging period in the period detection circuit 221B is different. For this reason, the explanation of the operation of the semiconductor device 200 will be omitted.

[0087] 2-5. Effects of semiconductor devices: The semiconductor device according to this embodiment can detect a decrease in the control power supply voltage VccL using a determination voltage V222 with different voltage levels during the initial charging period and after the initial charging period has ended, thus achieving the same effects as the semiconductor device 100 according to the first embodiment.

[0088] As described above, the semiconductor device 200 according to this embodiment includes an IGBT 41, an IGBT 51 connected in series with the IGBT 41 and positioned at a lower potential than the IGBT 41, a control IC 1 that controls the driving operation of the IGBT 41, a control IC 2B that controls the driving operation of the IGBT 51 and the protection operations of the IGBT 41 and IGBT 51, and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by a bootstrap operation using a control power supply voltage VccL supplied to the control IC 2B. The control IC 2B has a control voltage detection circuit 22B that detects a decrease in the control power supply voltage VccL, and the control voltage detection circuit 22B has a period detection circuit 221B that detects an initial charging period for initially charging the bootstrap circuit 3 by a bootstrap operation.

[0089] As a result, the semiconductor device 200 according to this embodiment suppresses unintended activation of the control power supply voltage drop protection during the initial charging period, and also enables control power supply voltage drop protection during the control power supply voltage stabilization period.

[0090] 2-5. Variations: A semiconductor device according to a modification of this embodiment will be described with reference to Figure 8. This modified semiconductor device has the same configuration as the semiconductor device 200 according to this embodiment, except that the configuration of the control voltage detection circuit is different. For this reason, components of the semiconductor device according to this modified embodiment that perform the same function as the components of the semiconductor device 200 according to this embodiment are denoted by the same reference numerals and their descriptions are omitted. Figure 8 is a circuit block diagram showing an example of the schematic configuration of the control voltage detection circuit (an example of a voltage drop detection circuit) 22BM in this modified embodiment.

[0091] As shown in Figure 8, the control voltage detection circuit 22BM provided in the semiconductor device 200M according to this modified example has a delay circuit that delays the signal SgB, which is input from the period detection circuit 221B and indicates the detection of the end of the initial charging period, by a predetermined time and outputs it to the voltage conversion circuit 222. The input terminal of the delay circuit 225 is connected to the output terminal of the comparator 2213 provided in the period detection circuit 221B. The output terminal of the delay circuit 225 is connected to the input terminal of the voltage conversion circuit 222. As a result, the delay circuit 225 can delay the signal SgB input from the comparator 2213 by a predetermined time and output it to the voltage conversion circuit 222.

[0092] Therefore, the timing at which the voltage conversion circuit 222 converts the voltage level of the determination voltage V222 after the period detection circuit 221B detects the initial charging period is delayed by the amount of the delay in the delay circuit 225 compared to the timing in this embodiment. Consequently, the semiconductor device 200M can convert the voltage level of the determination voltage V222 after the initial charging period has ended more reliably than the semiconductor device 200. As a result, the semiconductor device 200M can suppress unintended activation of the control power supply voltage drop protection during the initial charging period, and can also perform control power supply voltage drop protection during the control power supply voltage stabilization period.

[0093] [Third Embodiment] A semiconductor device according to a third embodiment of this disclosure will be described with reference to Figure 9. The semiconductor device according to this embodiment has the same configuration as the semiconductor device 100 according to the first embodiment, except that the configuration of the control voltage detection circuit is different. For this reason, for the components of the semiconductor device according to this embodiment, components that perform the same actions and functions as the components of the semiconductor device 100 according to the first embodiment are denoted by the same reference numerals and their descriptions are omitted.

[0094] 3-1. Overall configuration of the semiconductor device: Since the semiconductor device 300 according to this embodiment has the same overall configuration as the semiconductor device 100 according to the first embodiment described above, a detailed explanation will be omitted.

[0095] 3-2. Configuration of control ICs installed in semiconductor devices: The control IC for the upper arm (an example of the first control circuit) provided in the semiconductor device 300 according to this embodiment has the same configuration as the control IC 1 for the upper arm in the first embodiment described above, so its explanation is omitted. The control IC2C for the lower arm (an example of the second control circuit) provided in the semiconductor device 300 according to this embodiment has a similar configuration to the control IC2A for the lower arm in the first embodiment, except for the configuration of the voltage drop detection circuit. For this reason, a description of the overall configuration of the control IC2C for the lower arm provided in the semiconductor device 300 according to this embodiment will be omitted.

[0096] 3-3. Configuration of a voltage drop detection circuit provided in a semiconductor device: The control voltage detection circuit (an example of a voltage drop detection circuit) 22C provided in the control IC 2C of the semiconductor device 300 according to this embodiment will be described with reference to Figure 9. Figure 9 is a circuit block diagram showing an example of the schematic configuration of the control voltage detection circuit 22C in this embodiment.

[0097] As shown in Figure 9, the control voltage detection circuit 22C includes a period detection circuit 221C, a voltage conversion circuit 222, a comparator 223, and a signal output terminal 224. The period detection circuit 221C is a circuit that detects the initial charging period during which the bootstrap circuit 3 is initially charged by the bootstrap operation. The period detection circuit 221C has a delay circuit 2215 that delays the charging start signal Scos by a predetermined time in order to output the charging start signal Scos, which indicates that initial charging to the bootstrap circuit 3 has started, to the voltage conversion circuit 222 as an indication signal SgC, which indicates that the end of the initial charging period has been detected.

[0098] The delay circuit 2215 has two input terminals. One of these input terminals is connected to the start signal input terminal 10CS provided on the control IC 2C, and the other input terminal is connected to the charge voltage input terminal 10CT. Therefore, the delay circuit 2215 receives a charge start signal Scs via the start signal input terminal 10CS and a charge voltage Vb via the charge voltage input terminal 10CT. The charge start signal Scs is input, for example, from a control device (not shown) that controls the semiconductor device 300 and outputs input signals SinU and SinL (see Figure 1).

[0099] The delay circuit 2215 has a preset time corresponding to the initial charging period. The delay circuit 2215 defines the start timing of the initial charging period as the timing when the charging start signal Scos is input via the start signal input terminal 10CS and the charging voltage Vb is first input via the charging voltage input terminal 10CT. The delay circuit 2215 starts measuring the elapsed time of the initial charging period from this start timing. Once the delay circuit 2215 has measured the same elapsed time as the time corresponding to the initial charging period, it outputs the charging start signal Scos as an indication signal SgC to the voltage conversion circuit 222.

[0100] The signal level of the charging start signal Scs switches from a low level to a high level, for example, when initial charging begins. From the start of measuring the elapsed time of the initial charging period until the time corresponding to the initial charging period has elapsed, the time set by the delay circuit 2215 has not elapsed. For this reason, the period detection circuit 221C outputs an indication signal SgC to the voltage conversion circuit 222, indicating that the initial charging period has not ended, for example, when the signal level (i.e., voltage level) is low. On the other hand, after the time corresponding to the initial charging period has elapsed from the start of measuring the elapsed time of the initial charging period, the time set by the delay circuit 2215 has elapsed. For this reason, the period detection circuit 221C outputs an indication signal SgC to the voltage conversion circuit 222, indicating that the initial charging period has ended, for example, when the charging start signal Scs is delayed and the signal level (i.e., voltage level) is high.

[0101] The voltage conversion circuit 222 is a circuit that raises the determination voltage V222 for determining a decrease in the control power supply voltage VccL after the period detection circuit 221B has detected the end of the initial charging period compared to before the period detection circuit 221B has detected the end of the initial charging period. The suggestion signal SgC output from the period detection circuit 221C indicates whether or not the initial charging period has ended, depending on the signal level. That is, a low level suggestion signal SgC indicates that the initial charging period has not ended. On the other hand, a high level suggestion signal SgC indicates that the initial charging period has ended.

[0102] Therefore, when the signal level of the suggestion signal SgC input from the period detection circuit 221C is low, the voltage conversion circuit 222 determines that the period detection circuit 221C has not detected the end of the initial charging period and outputs a determination voltage V222 at a predetermined signal level (i.e., voltage level). On the other hand, when the signal level of the suggestion signal SgC input from the period detection circuit 221C is high, the voltage conversion circuit 222 determines that the period detection circuit 221C has detected the end of the initial charging period and outputs a determination voltage V222 at a higher signal level than before the end of the initial charging period was detected.

[0103] The voltage conversion circuit 222 outputs a determination voltage V222 to the comparator 223 that has a different voltage level depending on whether the initial charging period has ended or not. Therefore, the comparator 223 can compare the optimal determination voltage V222 with the control power supply voltage VccL depending on whether the initial charging period has ended or not. As a result, the control voltage detection circuit 22C can appropriately detect whether it is necessary to protect the control IC2C from a decrease in the control power supply voltage VccL, both during and after the initial charging period, similar to the control voltage detection circuit 22A in the first embodiment described above.

[0104] 3-4. Operation of semiconductor devices: As an example of the operation of the semiconductor device 300 according to this embodiment, the operation to protect the control IC 2C from a drop in the control power supply voltage during bootstrap operation is the same as the protection operation in the semiconductor device 100 according to the first embodiment, except that the method of detecting the end of the initial charging period in the period detection circuit 221C is different. For this reason, the explanation of the operation of the semiconductor device 300 will be omitted.

[0105] 3-5. Effects of semiconductor devices: The semiconductor device 300 according to this embodiment can detect a decrease in the control power supply voltage VccL using a determination voltage V222 with different voltage levels during the initial charging period and after the initial charging period has ended, thus achieving the same effects as the semiconductor device 100 according to the first embodiment.

[0106] As described above, the semiconductor device 100 according to this embodiment includes an IGBT 41, an IGBT 51 connected in series with the IGBT 41 and positioned at a lower potential than the IGBT 41, a control IC 1 that controls the driving operation of the IGBT 41, a control IC 2C that controls the driving operation of the IGBT 51 and the protection operations of the IGBT 41 and IGBT 51, and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by a bootstrap operation using a control power supply voltage VccL supplied to the control IC 2C. The control IC 2C has a control voltage detection circuit 22C that detects a decrease in the control power supply voltage VccL, and the control voltage detection circuit 22C has a period detection circuit 221C that detects an initial charging period for initially charging the bootstrap circuit 3 by a bootstrap operation.

[0107] As a result, the semiconductor device 300 according to this embodiment suppresses unintended activation of the control power supply voltage drop protection during the initial charging period, and also enables control power supply voltage drop protection during the control power supply voltage stabilization period.

[0108] [Fourth Embodiment] A semiconductor device according to a fourth embodiment of this disclosure will be described with reference to Figure 10. The semiconductor device according to this embodiment is characterized in that the control voltage drop protection function is disabled during the initial charging period. With respect to the components of the semiconductor device according to this embodiment, components that perform the same actions and functions as the components of the semiconductor device 100 according to the first embodiment are denoted by the same reference numerals and their descriptions are omitted.

[0109] 4-1. Overall configuration of the semiconductor device: Since the semiconductor device 400 according to this embodiment has the same overall configuration as the semiconductor device 100 according to the first embodiment, a description will be omitted.

[0110] 4-2. Configuration of control ICs in semiconductor devices: The control IC for the upper arm (an example of the first control circuit) provided in the semiconductor device 400 according to this embodiment has the same configuration as the control IC 1 for the upper arm in the first embodiment described above, so its explanation will be omitted. The control IC2D for the lower arm (an example of the second control circuit) provided in the semiconductor device according to this embodiment has a similar configuration to the control IC2A for the lower arm in the first embodiment, except for the configuration of the voltage drop detection circuit. For this reason, a description of the overall configuration of the control IC2D for the lower arm provided in the semiconductor device 400 according to this embodiment will be omitted.

[0111] 4-3. Configuration of a voltage drop detection circuit provided in a semiconductor device: The control voltage detection circuit (an example of a voltage drop detection circuit) 22D provided in the control IC 2D of the semiconductor device 400 according to this embodiment will be described with reference to Figure 10. Figure 10 is a circuit block diagram showing an example of the schematic configuration of the control voltage detection circuit 22D in this embodiment.

[0112] As shown in Figure 10, the control voltage detection circuit 22D includes a period detection circuit 221A, a comparator 223, a signal output terminal 224, a voltage generation circuit 226, and a transistor 227.

[0113] The voltage generation circuit 226 is composed of, for example, a DC power supply. The positive side of the voltage generation circuit 226 is connected to the non-inverting input terminal (+) of the comparator 223. The negative side of the voltage generation circuit 226 is connected to the reference potential terminal (for example, the ground terminal) of the semiconductor device according to this embodiment. Therefore, the negative side of the voltage generation circuit 226 is at the same potential as the reference potential terminal 10GL. The voltage generation circuit 226 is configured to output a determination voltage V226 at the same voltage level as the determination voltage V222 output by the voltage conversion circuit 222 in the first embodiment after the end of the initial charging period. Therefore, in this embodiment, the determination voltage V226 input to the comparator 223 is the same voltage input from the voltage generation circuit 226 during both the initial charging period and after the end of the initial charging period (i.e., always).

[0114] The signal output terminal 224 is a terminal that outputs an output signal Sout, which indicates whether or not the control power supply voltage VccL is decreasing, based on the voltage level. Transistor 227 (an example of a fixed circuit) is a circuit that fixes the voltage level of the signal output terminal 224 to a voltage level at which the output signal Sout does not show a decrease in the control power supply voltage VccL until the end of the initial charging period is detected by the period detection circuit 221A. Transistor 227 is composed of, for example, an N-type field-effect transistor. The drain of transistor 227 is connected to the output terminal of comparator 223 and the signal output terminal 224. The source of transistor 227 is connected to the reference potential terminal (e.g., ground terminal) of semiconductor device 400. Therefore, the source of transistor 227 is at the same potential as the negative side of the voltage generation circuit 226 and the reference potential terminal 10GL.

[0115] The gate of transistor 227 is connected to the output terminal of the period detection circuit 221A. Specifically, the gate of transistor 227 is connected to the output terminal of comparator 2212a provided in comparator circuit 2212 of the period detection circuit 221A. As a result, the suggestion signal SgA output by the period detection circuit 221A is input to the gate of transistor 227. As described in the first embodiment above, the voltage level of the suggestion signal SgA is high during the initial charging period and low during the control voltage stabilization period after the end of the initial charging period.

[0116] Therefore, transistor 227 is ON during the initial charging period, and the potential of the signal output terminal 224 during the initial charging period is low level (e.g., ground potential). Consequently, the control voltage detection circuit 22D outputs a low-level output signal Sout to the alarm signal generation circuit 25b during the initial charging period, regardless of whether the control power supply voltage VccL is higher or lower than the determination voltage V226. The low-level output signal Sout is the voltage output to the alarm signal generation circuit 25b when the control power supply voltage VccL has not decreased. Therefore, the control voltage detection circuit 22D disables its control voltage drop protection function during the initial charging period.

[0117] On the other hand, transistor 227 is in the off state during the control voltage stabilization period after the initial charging period. As a result, the signal output terminal 224 is electrically disconnected from the reference potential terminal of the semiconductor device 400. Therefore, during the control voltage stabilization period after the initial charging period, an output signal Sout with a voltage level corresponding to the comparison result of comparator 223 is output from the signal output terminal 224 to the alarm signal generation circuit 25b.

[0118] 4-4. Operation of semiconductor devices: As an example of the operation of the semiconductor device 400 according to this embodiment, the operation to protect the control IC from a drop in the control power supply voltage during bootstrap operation involves using an indication signal SgA output from the period detection circuit 221A to disable the control voltage protection function during the initial charging period, and then releasing the control voltage protection function after the initial charging period has ended. Furthermore, the method for detecting the end of the initial charging period in the period detection circuit 221A in this embodiment is the same as that of the period detection circuit 221A in the first embodiment described above. For this reason, a description of the operation of the semiconductor device according to this embodiment will be omitted.

[0119] 4-5. Effects of semiconductor devices: In this embodiment, the semiconductor device 400 has its control voltage drop protection function disabled during the initial charging period, thereby preventing unintended drop protection of the control power supply voltage VccL from being applied during the initial charging period. Furthermore, the semiconductor device 400 can perform the control voltage drop protection function after the initial charging period has ended. Therefore, the semiconductor device 400 can obtain the same effects as the semiconductor device 100 according to the first embodiment.

[0120] As described above, the semiconductor device 400 according to this embodiment includes an IGBT 41, an IGBT 51 connected in series with the IGBT 41 and positioned at a lower potential than the IGBT 41, a control IC 1 that controls the driving operation of the IGBT 41, a control IC 2D that controls the driving operation of the IGBT 51 and the protection operations of the IGBT 41 and the IGBT 51, and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by a bootstrap operation using a control power supply voltage VccL supplied to the control IC 2D. The control IC 2D has a control voltage detection circuit 22D that detects a decrease in the control power supply voltage VccL, and the control voltage detection circuit 22D has a period detection circuit 221A that detects an initial charging period for initially charging the bootstrap circuit 3 by a bootstrap operation.

[0121] As a result, the semiconductor device 400 according to this embodiment suppresses unintended activation of the control power supply voltage drop protection during the initial charging period, and also enables control power supply voltage drop protection during the control power supply voltage stabilization period.

[0122] Furthermore, the control voltage detection circuit 22D provided in the semiconductor device 400 includes a signal output terminal 224 that outputs an output signal indicating whether or not the control power supply voltage VccL is decreasing by voltage level, and a transistor 227 that fixes the voltage level of the signal output terminal 224 to a voltage level at which the output signal does not indicate a decrease in the control power supply voltage VccL until the end of the initial charging period is detected by the period detection circuit 221A.

[0123] As a result, the semiconductor device 400 can disable the control voltage drop protection function during the initial charging period, thereby preventing unintended drop protection of the control power supply voltage VccL from being activated during the initial charging period.

[0124] [Fifth Embodiment] A semiconductor device according to the fifth embodiment of this disclosure will be described with reference to Figure 11. The semiconductor device according to this embodiment is characterized in that the control voltage drop protection function is disabled during the initial charging period. With respect to the components of the semiconductor device according to this embodiment, components that perform the same actions and functions as at least one of the components of the semiconductor device according to the second embodiment and the semiconductor device according to the fourth embodiment are denoted by the same reference numerals and their descriptions are omitted.

[0125] 5-1. Overall configuration of the semiconductor device: Since the semiconductor device 500 according to this embodiment has the same overall configuration as the semiconductor device 200 according to the second embodiment described above, a detailed explanation will be omitted.

[0126] 5-2. Configuration of control ICs installed in semiconductor devices: The control IC for the upper arm (an example of the first control circuit) provided in the semiconductor device according to this embodiment has the same configuration as the control IC for the upper arm in the second embodiment described above, so its explanation is omitted. The control IC2E for the lower arm (an example of the second control circuit) provided in the semiconductor device 500 according to this embodiment has a similar configuration to the control IC2B for the lower arm in the second embodiment, except for the configuration of the voltage drop detection circuit. For this reason, a description of the overall configuration of the control IC2E for the lower arm provided in the semiconductor device according to this embodiment will be omitted.

[0127] 5-3. Configuration of a voltage drop detection circuit provided in a semiconductor device: The control voltage detection circuit (an example of a voltage drop detection circuit) 22E provided in the control IC 2E of the semiconductor device 500 according to this embodiment will be described with reference to Figure 11. Figure 11 is a circuit block diagram showing an example of the schematic configuration of the control voltage detection circuit 22E provided in the semiconductor device 500 according to this embodiment.

[0128] As shown in Figure 11, the control voltage detection circuit 22E includes a period detection circuit 221B, a comparator 223, a signal output terminal 224, a voltage generation circuit 226, a transistor 227, and a logic inversion gate 228.

[0129] The input terminal of the logic inversion gate 228 is connected to the output terminal of the period detection circuit 221A. The output terminal of the logic inversion gate 228 is connected to the gate of transistor 227. As a result, the gate of transistor 227 receives an inverted signal SgBI, which is the voltage level of the suggestion signal SgB output by the period detection circuit 221B inverted. As described in the second embodiment above, the voltage level of the suggestion signal SgB is low during the initial charging period and high during the control voltage stabilization period after the initial charging period ends. Therefore, the voltage level of the inverted signal SgBI is high during the initial charging period and low during the control voltage stabilization period after the initial charging period ends.

[0130] Therefore, the transistor 227 in this embodiment operates in the same manner as the transistor 227 in the fourth embodiment described above. As a result, the control voltage detection circuit 22E disables its control voltage drop protection function during the initial charging period. On the other hand, after the initial charging period ends (i.e., the control voltage stabilization period), an output signal Sout of the voltage level corresponding to the comparison result of the comparator 223 is output from the signal output terminal 224 to the alarm signal generation circuit 25b.

[0131] 5-4. Operation of semiconductor devices: As an example of the operation of the semiconductor device 500 according to this embodiment, the operation to protect the control IC from a drop in the control power supply voltage during bootstrap operation involves using an indication signal SgB output from the period detection circuit 221B to disable the control voltage protection function during the initial charging period, and then releasing the control voltage protection function after the initial charging period has ended. Furthermore, the method for detecting the end of the initial charging period in the period detection circuit 221B in this embodiment is the same as that of the period detection circuit 221B in the second embodiment described above. For this reason, a description of the operation of the semiconductor device 500 according to this embodiment will be omitted.

[0132] 5-5. Effects of semiconductor devices: In this embodiment, the semiconductor device 500 has its control voltage drop protection function disabled during the initial charging period, thereby preventing unintended voltage drop protection from being applied during the initial charging period. Furthermore, the semiconductor device 500 can perform the control voltage drop protection function after the initial charging period has ended. Therefore, the semiconductor device 500 can achieve the same effects as the semiconductor device 400 according to the fourth embodiment described above.

[0133] As described above, the semiconductor device 500 according to this embodiment includes an IGBT 41, an IGBT 51 connected in series with the IGBT 41 and positioned at a lower potential than the IGBT 41, a control IC 1 that controls the driving operation of the IGBT 41, a control IC 2E that controls the driving operation of the IGBT 51 and the protection operations of the IGBT 41 and the IGBT 51, and a bootstrap circuit 3 that generates a control power supply voltage VccU supplied to the control IC 1 by a bootstrap operation using a control power supply voltage VccL supplied to the control IC 2E. The control IC 2E has a control voltage detection circuit 22E that detects a decrease in the control power supply voltage VccL, and the control voltage detection circuit 22E has a period detection circuit 221B that detects an initial charging period for initially charging the bootstrap circuit 3 by a bootstrap operation.

[0134] As a result, the semiconductor device 500 according to this embodiment suppresses unintended activation of the control power supply voltage drop protection during the initial charging period, and also enables control power supply voltage drop protection during the control power supply voltage stabilization period.

[0135] Furthermore, the control voltage detection circuit 22E provided in the semiconductor device 500 includes a signal output terminal 224 that outputs an output signal indicating whether or not the control power supply voltage VccL is decreasing by voltage level, and a transistor 227 that fixes the voltage level of the signal output terminal 224 to a voltage level at which the output signal does not indicate a decrease in the control power supply voltage VccL until the end of the initial charging period is detected by the period detection circuit 221B.

[0136] As a result, the semiconductor device 500 can disable the control voltage drop protection function during the initial charging period, thereby preventing unintended drop protection of the control power supply voltage VccL from being activated during the initial charging period.

[0137] This disclosure is not limited to the embodiments described above and can be modified in various ways. In the first to fifth embodiments described above, the voltage on the anode side of the bootstrap diode 31 is used as the charging voltage Vb, but the disclosure is not limited thereto. For example, even if the charging voltage Vb is the voltage on the cathode side of the bootstrap diode 31, the same effects as those of the semiconductor device in the first to fifth embodiments can be obtained.

[0138] In the first to fifth embodiments described above, the charging voltage Vb on the anode side of the bootstrap diode 31 is used to detect the end of the initial charging period, but the disclosure is not limited thereto. For example, the end of the initial charging period may be detected using the voltage between both electrodes of the bootstrap capacitor 32 (i.e., the control power supply voltage VccU for the upper arm). In this case as well, the same effects as those of the semiconductor device in the first to fifth embodiments can be obtained.

[0139] In the fourth and fifth embodiments described above, the control voltage drop protection function is disabled during the initial charging period by setting the potential of the signal output terminal 224 to the same potential as, for example, the reference potential terminal of the semiconductor device. However, the disclosure is not limited thereto. For example, in the voltage conversion circuit 222 of the first to third embodiments described above, the determination voltage V222 may be set to 0 volts during the initial charging period. As a result, during the initial charging period, the control power supply voltage VccL will not fall below the determination voltage V222, and the period detection circuits 221A, 221B, and 221C will be in a state similar to that in which the control voltage drop protection function is disabled. [Explanation of symbols]

[0140] 1,2A,2B,2C,2D,2E Control IC 3. Bootstrap Circuit 4,5 Driving elements 6,226,232,243,2211d,2212b,2214 Voltage generation circuit 10CS Start signal input terminal 10CT charging voltage input terminal 10GL,10GU Reference potential terminal 10M intermediate terminal 10N Negative side voltage input terminal 10P Positive side voltage input terminal 10SL, 10SU Control signal input terminals 10VFO Alarm signal output terminal 10VL, 10VU control power supply voltage input terminal (power input terminal) 21 Gate drive circuit 22A, 22AM, 22B, 22BM, 22C, 22D, 22E Control Voltage Detection Circuit 23 Temperature detection circuit 24 Current detection circuit 25a OR gate 25b Alarm signal generation circuit 25c,227 transistor 25d,233 constant current source 25e,241 Resistor element 31 Bootstrap Diode 32 Bootstrap Capacitors 33 limiting resistor 41,51 IGBT 42, 52 Freewheeling diode 53 Temperature sensor 54 Current Sensor 100, 100M, 200, 200M, 300, 400, 500 Semiconductor Equipment 211 On / Off Control Circuit 221A, 221B, 221C Period detection circuit 222 Voltage Conversion Circuit 223,231,242,2212a,2213, 224 Signal output terminal 225,2215 Delay Circuit 228 Logical Inversion Gate 2211 Differential Amplifier Circuit 2211a Amplifier 2211b Input Resistor 2211c feedback resistor 2212 Comparison circuit Ib charging current Pic Initial charging period Pso control voltage stabilization period SCS charging start signal SgA, SgB, SgC suggestive signals SgBI inverted signal SinL, SinU input signals Sout output signal V222, V226 Judgment voltage Vdtm Judgment voltage V2211 Output Voltage Vb Charging voltage Vc11, Vc12, Vc13 Comparison Voltage VccL, VccU control power supply voltage VggL, VggU reference potentials VPIC, VPSO voltage levels Vtg Target Level α Charging path

Claims

1. First switching element, A second switching element is connected in series with the first switching element and positioned at a lower potential than the first switching element, A first control circuit that controls the driving operation of the first switching element, A second control circuit controls the driving operation of the second switching element and the protective operation of the first switching element and the second switching element, A bootstrap circuit that generates a first control power voltage supplied to the first control circuit by a bootstrap operation using a second control power voltage supplied to the second control circuit, Equipped with, The second control circuit has a voltage drop detection circuit that detects a decrease in the second control power supply voltage, The voltage drop detection circuit includes a period detection circuit that detects the initial charging period during which the bootstrap circuit is initially charged by the bootstrap operation. Semiconductor equipment.

2. The voltage drop detection circuit includes a voltage conversion circuit that increases the determination voltage for determining a drop in the second control power supply voltage after the end of the initial charging period is detected by the period detection circuit compared to before the end of the initial charging period is detected by the period detection circuit. The semiconductor device according to claim 1.

3. The voltage conversion circuit sets the determination voltage to 0 volts during the initial charging period. The semiconductor device according to claim 2.

4. The period detection circuit detects the initial charging period based on the difference between the charging voltage, which is determined by the charging current flowing through the bootstrap circuit during the bootstrap operation, and a comparison voltage having a voltage level similar to that of the second control power supply voltage. A semiconductor device according to any one of claims 1 to 3.

5. The period detection circuit detects the initial charging period based on the charging voltage derived from the charging current flowing through the bootstrap circuit during the bootstrap operation. A semiconductor device according to any one of claims 1 to 3.

6. The voltage drop detection circuit includes a delay circuit that delays a signal input from the period detection circuit, which indicates the detection of the end of the initial charging period, by a predetermined time and outputs it to the voltage conversion circuit. The semiconductor device according to claim 2.

7. The period detection circuit includes a delay circuit that delays the charging start signal, which indicates that the initial charging to the bootstrap circuit has started, by a predetermined time in order to output the charging start signal to the voltage conversion circuit as an indication signal that the end of the initial charging period has been detected. The semiconductor device according to claim 2.

8. The voltage drop detection circuit is, An output terminal that outputs an output signal indicating whether or not the second control power supply voltage has decreased, based on the voltage level, A fixing circuit fixes the voltage level of the output terminal to a voltage level at which the output signal does not show a decrease in the second control power supply voltage until the end of the initial charging period is detected by the period detection circuit. has The semiconductor device according to claim 1.

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