Harmonic evaluation method, harmonic evaluation apparatus, and program

Abstract

The objective is to provide a harmonic evaluation method, a harmonic evaluation device, and a program that can evaluate whether an AC filter connected to a self-commutated power converter placed in the transmission path of a power conversion system satisfies harmonic regulatory values. [Solution] The harmonic evaluation method of the embodiment involves a computer evaluating the harmonics of the AC voltage and / or AC current generated at the grid interconnection point between the power converter and the AC grid, using a predetermined harmonic evaluation formula based on the equivalent circuit of a power conversion system that supplies AC power from a self-commutated power converter to an AC grid. The computer substitutes a harmonic limit value into either the grid interconnection point voltage or the grid outflow current included in the harmonic evaluation formula, calculates the characteristic values ​​of the components represented in the equivalent circuit, derives a boundary line of the harmonic limit value that the characteristic values ​​of the components can take based on a graph of the calculation results shown in the complex plane, and determines whether the characteristic values ​​are within the region of the limit value based on the derived boundary line.

Description

Technical Field

[0001] Embodiments of the present invention relate to a harmonic evaluation method, a harmonic evaluation apparatus, and a program.

Background Art

[0002] In a power conversion system, since a power converter is arranged in the power transmission path to an AC system, harmonics occur in the power (more specifically, voltage and current) supplied to the AC system at the connection point connected to the AC system. Predetermined regulation values are set for the voltage and current supplied to the AC system with respect to harmonics. Therefore, when supplying voltage and current to the AC system in the power conversion system, it is necessary to suppress harmonics so that they are below the set regulation values.

[0003] Regarding this, for example, Non-Patent Document 1 and Non-Patent Document 2 propose a method for designing an AC filter for a reactive power compensation device so that harmonics generated when supplying voltage and current to the AC system are below the regulation values. However, since the design methods proposed in Non-Patent Document 1 and Non-Patent Document 2 are for a separately excited power converter, they cannot be directly applied when the power converter is self-excited.

Prior Art Documents

Non-Patent Documents

[0004]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] The problem that the present invention aims to solve is to provide a harmonic evaluation method, a harmonic evaluation device, and a program that can be applied when designing an AC filter connected to a self-commutated power converter placed in the transmission path of a power conversion system to evaluate whether the designed AC filter satisfies harmonic regulatory values. [Means for solving the problem]

[0006] The harmonic evaluation method of the embodiment is a harmonic evaluation method in which a computer evaluates the harmonics of the AC voltage and / or AC current in the AC power generated at the grid connection point between the power converter and the AC system, using a predetermined harmonic evaluation formula based on the equivalent circuit of a power conversion system that supplies AC power from a self-commutated power converter to an AC system. The computer calculates the characteristic values ​​of the components of the power conversion system represented in the equivalent circuit by substituting the corresponding harmonic limit value into either the grid connection point voltage, which represents the AC voltage generated at the grid connection point, or the grid outflow current, which represents the AC current flowing from the grid connection point toward the AC system, both of which are included in the harmonic evaluation formula. The computer derives the boundary line of the harmonic limit value that the characteristic value of the component can take, based on a graph of the calculation results of the characteristic value shown in the complex plane. The computer determines whether the characteristic value of the component is within the limit value region based on the derived boundary line. [Brief explanation of the drawing]

[0007] [Figure 1] A diagram showing an example of the configuration of a power conversion system to be evaluated in the harmonic evaluation method according to the embodiment. [Figure 2] A diagram showing an example of the equivalent circuit of the power conversion system to be evaluated in the harmonic evaluation method of the embodiment. [Figure 3] A flowchart showing an example of the processing procedure in the harmonic evaluation method according to the first embodiment. [Figure 4]This figure shows an example (part 1) of a graph generated in the harmonic evaluation method of the first embodiment. [Figure 5] This figure shows an example (part 2) of a graph generated in the harmonic evaluation method of the first embodiment. [Figure 6] This figure shows an example (part 3) of a graph generated in the harmonic evaluation method of the first embodiment. [Figure 7] A flowchart showing an example of the processing procedure in the harmonic evaluation method according to the second embodiment. [Figure 8] A figure showing an example of a graph generated in the harmonic evaluation method of the second embodiment. [Figure 9] A flowchart showing an example of the processing procedure in the harmonic evaluation method according to the third embodiment. [Figure 10] This figure shows an example of a graph generated in the harmonic evaluation method of the third embodiment. [Figure 11] A flowchart showing an example of the processing procedure in the harmonic evaluation method according to the fourth embodiment. [Figure 12] This figure shows an example of a graph generated in the harmonic evaluation method of the fourth embodiment. [Figure 13] A flowchart showing an example of the processing procedure for the method of presenting the results of harmonic evaluation according to the fifth embodiment. [Figure 14] A flowchart showing an example of the processing procedure for the method of presenting the results of harmonic evaluation according to the sixth embodiment. [Figure 15] A flowchart showing an example of the processing procedure for the method of presenting the results of harmonic evaluation according to the seventh embodiment. [Figure 16] A flowchart showing an example of the processing procedure for the method of presenting the results of harmonic evaluation according to the eighth embodiment. [Figure 17] A flowchart showing an example of the processing procedure for the method of presenting the results of harmonic evaluation according to the ninth embodiment. [Figure 18] A flowchart showing an example of the processing procedure for the method of presenting the results of harmonic evaluation according to the tenth embodiment. [Figure 19]A flowchart showing an example of the processing procedure of the method for presenting the determination result of harmonic evaluation according to the 11th embodiment. [Figure 20] A flowchart showing an example of the processing procedure of the method for presenting the determination result of harmonic evaluation according to the 12th embodiment. [Figure 21] A diagram showing an example of the hardware configuration of a harmonic evaluation device that executes the harmonic evaluation method according to the embodiment.

Mode for Carrying Out the Invention

[0008] Hereinafter, the harmonic evaluation method, harmonic evaluation device, and program according to the embodiment will be described with reference to the drawings.

[0009] The harmonic evaluation method of the present embodiment is a method for evaluating harmonics generated in the voltage or current of either one or both of the active power and reactive power supplied in a power conversion system (hereinafter referred to as "AC power") by a harmonic evaluation device executing a program. The harmonic evaluation device evaluates the harmonics generated in the voltage or current of the AC power by the harmonic evaluation method, for example, by a hardware processor executing a program (software) stored in a memory (storage device). The memory is realized by, for example, semiconductor memory elements such as ROM (Read Only Memory), RAM (Random Access Memory), flash memory, a hard disk drive (Hard Disk Drive: HDD), an optical disk, etc.

[0010] A hardware processor refers to circuits such as CPUs (Central Processing Units), GPUs (Graphics Processing Units), LSIs (Large Scale Integrations), SOCs (System on Chips), Application Specific Integrated Circuits (ASICs), and programmable logic devices (e.g., Simple Programmable Logic Devices (SPLDs), Complex Programmable Logic Devices (CPLDs), and Field Programmable Gate Arrays (FPGAs)). Instead of storing the program in memory, the hardware processor may be configured to directly embed the program within its circuitry. In this case, the hardware processor reads and executes the program embedded within the circuitry to perform harmonic evaluation using a harmonic evaluation method. A hardware processor is not limited to being configured as a single circuit; it may also be configured as a single hardware processor by combining multiple independent circuits to implement a harmonic evaluation method. Multiple components may also be integrated into a single hardware processor to implement a harmonic evaluation method. Multiple components may be incorporated into a single dedicated LSI to realize a harmonic evaluation method. Here, the program (software) may be stored in advance in a storage device that constitutes a semiconductor memory element such as ROM, RAM, or flash memory, or a storage device such as a hard disk drive (HDD) (a storage device equipped with a non-transient storage medium), or it may be stored in a removable storage medium such as a DVD or CD-ROM (a non-transient storage medium), and installed in the storage device of the harmonic evaluation device when the storage medium is mounted in a drive device provided in the harmonic evaluation device.A program (software) may be downloaded in advance via a network from other computer devices including, for example, a server device and a storage device incorporated in a cloud computing system, and installed in a storage device included in the harmonic evaluation device. The program (software) installed in the storage device included in the harmonic evaluation device may be transferred to a processing circuit such as a hardware processor included in the harmonic evaluation device and executed. The harmonic evaluation device may be realized by, for example, a server device and a storage device incorporated in a cloud computing system.

[0011] [Configuration of Power Conversion System to be Evaluated] FIG. 1 is a diagram showing an example of the configuration of a power conversion system to be evaluated in the harmonic evaluation method according to the embodiment. The power conversion system 1 to be evaluated is a system that converts power transmitted and received in direct current into alternating current, or converts, for example, a device that stores energy in direct current such as a storage battery into alternating current. In the following description, it is assumed that the power conversion system 1 to be evaluated is a system that converts power transmitted and received in direct current into alternating current. The power conversion system 1 includes a self-excited converter 11, which is a self-excited power converter, connected to an AC power system 14 at a system connection point 15 via a converter transformer 12 and a connection transformer 13. In the power conversion system 1, an AC filter 16 is connected between the converter transformer 12 and the connection transformer 13. In the following description, the AC voltage generated at the system connection point 15 is referred to as "system connection point voltage ΔV", and the AC current flowing from the system connection point 15 toward the AC power system 14 is referred to as "system outflow current ΔI".

[0012] Here, the equivalent circuit of the power conversion system 1 shown in Figure 1 will be explained. Figure 2 is a diagram showing an example of the equivalent circuit of the power conversion system 1 to be evaluated in the harmonic evaluation method of the embodiment. When the configuration of the power conversion system 1 shown in Figure 1 is represented by an equivalent circuit, as shown in Figure 2, the self-excited converter 11 can be represented by the harmonic voltage source V, the converter transformer 12 by the transformer reactance Zt, the interconnection transformer 13 by the transformer reactance Zc, the AC system 14 by the AC system impedance Zs, and the AC filter 16 by the filter impedance Zf, and so on, with each parameter being represented. The AC filter 16 can also be represented as a parameter of filter admittance Yf by taking the reciprocal of the filter impedance Zf. Thus, the equivalent circuit of the power conversion system 1 has a configuration in which the harmonic voltage source V is interconnected with the AC system impedance Zs at the system interconnection point 15 via the transformer reactance Zt and the transformer reactance Zc. In the equivalent circuit of power conversion system 1, a filter impedance Zf (or filter admittance Yf) is connected between the transformer reactance Zt and the transformer reactance Zc.

[0013] Here, the harmonic voltage source V is the voltage value of the harmonic voltage output (supplied) by the self-excited converter 11. The transformer reactance Zt is the reactance value of the converter transformer 12 designed by the designer who designs the configuration of the power transmission side power system in the power conversion system 1, and the transformer reactance Zc is the reactance value of the interconnection transformer 13 designed by the designer. The filter impedance Zf is the impedance value of the AC filter 16 designed by the designer, and the filter admittance Yf is the admittance value of the AC filter 16 designed by the designer. The AC system impedance Zs is the impedance value of the AC system 14 at the location where the self-excited converter 11 is connected. The AC system impedance Zs is a value determined by the configuration of the AC system 14.

[0014] Figure 2 shows the trajectory of RX, which represents the AC system impedance Zs in terms of the relationship between the real part resistance R and the imaginary part reactance X. The trajectory of RX shown within the AC system 14 in Figure 2 is an example of RX values ​​obtained by plotting all possible operating states in the interconnected AC system on the RX plane according to the switching on / off of transmission lines, the switching on / off of transformers, the number of generators in operation, etc., and finding the outer circumference of the RX plane. In this case, the AC system impedance Zs is represented by the RX values ​​shown on the RX plane. If the point of change in the trajectory of RX on the RX plane (the corner of the trajectory of RX shown in Figure 2) is taken as the AC system impedance Zs, then the AC system impedance Zs can be represented by seven RX values. If a predetermined combination of resistance R and reactance X in the trajectory of RX on the RX plane is taken as the AC system impedance Zs, then the AC system impedance Zs can be represented by a fraction of the RX values ​​of that combination.

[0015] The self-commutated converter 11 is an example of a "self-commutated power converter".

[0016] The harmonic evaluation method of this embodiment is a method for evaluating the harmonics of the voltage and current of the AC power generated at the grid connection point 15 for a power conversion system 1 to be evaluated with such a configuration. More specifically, the harmonic evaluation method of this embodiment is a method for evaluating whether the harmonics of the voltage and current of the AC power generated at the grid connection point 15 are less than or equal to the harmonic limit value, by using either the grid connection point voltage ΔV or the grid outflow current ΔI as the harmonic limit value (hereinafter referred to as the "harmonic limit value"). The grid connection point voltage ΔV and the grid outflow current ΔI are, for example, voltage and current values ​​specified by the interconnection regulations of the power company operating the AC grid 14.

[0017] [Method for evaluating harmonics] (First embodiment) The first harmonic evaluation method (hereinafter referred to as the "first harmonic evaluation method") is a method for deriving the boundary line of the harmonic limit that the filter impedance Zf of the AC filter 16 connected to the self-excited converter 11 can take, using the grid connection point voltage ΔV. In the first harmonic evaluation method, the filter impedance Zf = (1 / Yf) is expressed by the harmonic evaluation formula shown in equation (1) below, using the harmonic voltage source V, transformer reactance Zt and transformer reactance Zc, AC grid impedance Zs, and grid connection point voltage ΔV, from the equivalent circuit of the power conversion system 1 shown in Figure 2. However, in equation (1) below, a phase difference of -180° to +180° between the harmonic voltage source V and the grid connection point voltage ΔV is considered. In the first harmonic evaluation method, the harmonic limit value related to voltage (hereinafter referred to as the "harmonic voltage limit value") is substituted for the grid connection point voltage ΔV.

[0018]

number

[0019] Based on equation (1) above, the locus range of the filter impedance Zf (filter admittance Yf) of the AC filter 16 that is within the harmonic voltage limit value, which is the grid connection point voltage ΔV, can be derived using a known AC system impedance Zs. In the following explanation, the harmonic evaluation formula in equation (1) above will be referred to as the "first harmonic evaluation formula".

[0020] The first harmonic evaluation formula is an example of a "predetermined harmonic evaluation formula." The AC filter 16 is an example of a "component of a power conversion system," and the filter impedance Zf and filter admittance Yf of the AC filter 16 are examples of "characteristic values ​​of components of a power conversion system." The transformer reactance Zt of the converter transformer 12 and the transformer reactance Zc of the interconnection transformer 13 are examples of "characteristic values ​​of transformers."

[0021] Here, we will describe a processing procedure for deriving the locus range of the AC filter 16 such that the harmonic voltages generated in the AC voltage are within the power grid connection point voltage ΔV, which is the harmonic regulation value for voltage, using the first harmonic evaluation formula. Figure 3 is a flowchart showing an example of the processing procedure in the harmonic evaluation method according to the first embodiment (first harmonic evaluation method). In the following description, it will be assumed that the processing procedure of the first harmonic evaluation method is performed by a processing circuit provided in the harmonic evaluation device. The order of the harmonic is denoted as "n", the highest order of the harmonic is denoted as "N", and it will be assumed that there are multiple data points for the nth harmonic in the AC system impedance Zs. In the following description, the order of the harmonic n will be referred to as "harmonic order n", and the highest order of the harmonic N will be referred to as "maximum harmonic order N".

[0022] The first harmonic evaluation method is performed, for example, in response to instructions from a designer who designs the configuration of the power conversion system 1. The processing circuit of the harmonic evaluation device receives the following parameters from the designer: the harmonic voltage source V output by the self-excited converter 11, multiple AC system impedances Zs, the design values ​​of transformer reactances Zt and Zc, the system connection point voltage ΔV which is a harmonic regulation value, and the maximum harmonic order N. When the device is instructed to perform a harmonic evaluation, it executes the first harmonic evaluation method.

[0023] When the first harmonic evaluation method is executed, the processing circuit first initializes the harmonic order n. Here, if the harmonic order n is n=1, it is the fundamental frequency in the AC voltage and is therefore not subject to harmonic evaluation. For this reason, the processing circuit initializes the harmonic order n to n=2 (step S101).

[0024] The processing circuit then determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S102). If the result of the determination in step S102 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit sets parameter i to i=1 (step S103). Parameter i is a variable used to count the number of AC system impedances Zs.

[0025] The processing circuit checks whether data for the i-th AC system impedance Zs represented by parameter i exists (for example, the RX value at the change point of the RX trajectory shown in Figure 2 within AC system 14) (step S104). If, as a result of the check in step S104, data for the i-th AC system impedance Zs exists, the processing circuit reads the n-th AC system impedance Zs represented by the current harmonic order n (step S105).

[0026] The processing circuit calculates the filter admittance Yf using the first harmonic evaluation formula shown in equation (1) above (step S106). At this time, the processing circuit calculates the filter admittance Yf using the first harmonic evaluation formula, assuming that the phase difference between the harmonic voltage source V and the grid connection point voltage ΔV is between -180° and +180°. Then, the processing circuit obtains the filter impedance Zf from the calculated result of the filter admittance Yf (step S107). More specifically, the processing circuit calculates the filter impedance Zf (Zf = 1 / Yf) by taking the reciprocal of the calculated filter admittance Yf.

[0027] Subsequently, the processing circuit adds "1" to parameter i (i=i+1) and returns the process to step S104 (step S108). This causes the processing circuit to repeat steps S104 to S107, calculating the filter admittance Yf and filter impedance Zf as fractions of the AC system impedance Zs input by the designer, at the current harmonic order n. The processing circuit may store the calculated results of filter admittance Yf and filter impedance Zf in, for example, the memory (storage device) of the harmonic evaluation device.

[0028] On the other hand, if the check in step S104 reveals that data for the i-th AC system impedance Zs does not exist, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns to the process in step S102 (step S109). Then, if the determination in step S102 reveals that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit calculates the filter admittance Yf and filter impedance Zf for the next harmonic order n as a fraction of the AC system impedance Zs input by the designer. The processing circuit may store the calculation results of the filter admittance Yf and filter impedance Zf in, for example, the memory (storage device) of the harmonic evaluation device.

[0029] On the other hand, if the result of the determination in step S102 indicates that the current harmonic order n is not less than or equal to the maximum harmonic order N, that is, if the current harmonic order n is greater than the maximum harmonic order N, the processing circuit performs a harmonic evaluation of the filter impedance Zf or filter admittance Yf of the AC filter 16 connected to the self-excited converter 11 based on the calculation results of each filter impedance Zf obtained up to this point (or the calculation results of each filter admittance Yf obtained up to this point) (step S110). At this time, the processing circuit generates an R,X,n graph shown in the RX plane for each harmonic order n based on the calculation results of each filter impedance Zf obtained up to this point. The processing circuit may also generate a G,B,n graph shown in the GB plane for each harmonic order n based on the calculation results of each filter admittance Yf obtained up to this point, representing the relationship between the real conductance G and the imaginary susceptance B. The processing circuit then determines, based on the generated R,X,n graph (or G,B,n graph) for each harmonic order n, whether the filter impedance Zf (or filter admittance Yf) of the AC filter 16 connected to the self-excited converter 11 falls within the range of the harmonic limit boundary, given that the transformer reactance Zt and transformer reactance Zc are the input design values. The processing circuit may also determine whether the filter impedance Zf (or filter admittance Yf) of the AC filter 16 falls within the range of the harmonic limit boundary for all harmonic orders n. Details regarding the processing procedure for harmonic evaluation in the processing circuit will be described later.

[0030] The processing circuit then presents the judgment result to the designer (step S900). At this time, the processing circuit displays the presented judgment result on, for example, a display device provided by the harmonic evaluation device or a display device connected to the harmonic evaluation device. The display device may be, for example, a liquid crystal display (LCD) or an organic electroluminescence (EL) display.

[0031] A processing circuit is an example of a "computer," "calculation unit," "derivation unit," or "decision unit."

[0032] Here, we will describe an example of a graph generated by the processing circuit in step S110. Figures 4 to 6 show an example of a graph generated in the harmonic evaluation method of the first embodiment (first harmonic evaluation method). Each of the graphs shown in Figures 4 to 6 is a graph of a single harmonic order n. In the following description, the G,B,n graph of a single harmonic order n will be referred to as the "G,B graph," and the R,X,n graph of a single harmonic order n will be referred to as the "R,X graph."

[0033] Figure 4 shows an example of the G,B graph generated by the processing circuit in step S110. Rearranging the first harmonic evaluation formula shown in equation (1) above using the voltage U at the branching point between the filter impedance Zf and the transformer reactance Zc, as shown in equation (2) below, we obtain equation (3) below.

[0034]

number

[0035]

number

[0036] When the second term on the right-hand side of equation (3) (=-(1 / Zt+1 / (Zs+Zc))) is plotted on the GB plane of the G,B graph, it resembles circle T1. On the other hand, when the first term on the right-hand side of equation (3) (=V / Zt / U) is plotted on the GB plane, it resembles circle T2, whose center lies on the circumference of circle T1. Furthermore, since the phase of the first term on the right-hand side of equation (3) can range from -180° to +180°, the right-hand side of equation (3) can be represented as the outer circle T3 when circle T2 is moved along the circumference of circle T1. In other words, the filter admittance Yf is represented by the region obtained by adding the radius of circle T2 to the circumference of circle T1. Here, the area inside circle T2 is the region where the voltage U at the branching point between the filter impedance Zf and the transformer reactance Zc is large. Furthermore, since the voltage of the AC filter 16 (hereinafter referred to as "filter voltage Vf") is proportional to the grid connection point voltage ΔV, the area inside circle T3 is considered to be the region exceeding the harmonic voltage limit at the grid connection point 15, and the area outside circle T3 is considered to be the region below the harmonic voltage limit. Thus, the region exceeding the harmonic voltage limit can be visually determined on the GB plane (also called the admittance plane). However, since the real part of the actual filter admittance Yf is a positive value, the region that is actually below the harmonic voltage limit is the region A1 outside circle T3, which is shown by the shaded area in Figure 4. In the following explanation, the region A1 that is actually below the harmonic voltage limit will be referred to as the "voltage limit region A1".

[0037] Figures 5 and 6 show examples of R,X graphs generated by the processing circuit in step S110. When the first harmonic evaluation formula shown in equation (1) above is evaluated in the RX plane (also called the impedance plane) with Zf = 1 / Yf, the range of the boundary line below the harmonic voltage limit differs depending on whether the calculated result of filter admittance Yf includes the origin or not. For this reason, the range of the boundary line below the harmonic voltage limit is switched depending on whether the calculated result of filter admittance Yf includes the origin or not.

[0038] Figure 5 shows the circle T4 of filter admittance Yf, which is shown in the RX plane, and the circle T5 of filter impedance Zf, which corresponds to filter admittance Yf, when the circle T4 does not include the origin. Here, if the impedance Z is given by equation (4) below, the reciprocal of the impedance Z (admittance Y) is given by equation (5) below. Therefore, the circle T5 of filter impedance Zf is located at a distance of 1 / r from the origin of the RX plane and at an angle of 180° relative to the position of the circle T4 of filter admittance Yf, by taking the reciprocal of the filter admittance Yf. When the circle T4 of filter admittance Yf does not include the origin, the region A2 outside the circle T5 of filter impedance Zf, which is shown by the shaded area in Figure 5, is the region where the harmonic voltage actually falls below the limit. In the following explanation, the region A2 where the harmonic voltage actually falls below the limit will be referred to as the "voltage limit region A2".

[0039]

number

[0040]

number

[0041] On the other hand, Figure 6 shows the circle T7 of the filter impedance Zf, which corresponds to the filter admittance Yf, in the same RX plane as the circle T6 of the filter admittance Yf, when the circle T6 of the filter admittance Yf includes the origin. In this case as well, the circle T7 of the filter impedance Zf is located at a distance of 1 / r from the origin of the RX plane and at an angle of 180° inverse relative to the position of the circle T6 of the filter admittance Yf, similar to the circle T5 of the filter impedance Zf. However, when the circle T6 of the filter admittance Yf includes the origin, the region where the harmonic voltage is below the limit is reversed, and the region A3 inside the circle T7 of the filter impedance Zf, which is shaded in Figure 6, is the region where the harmonic voltage is actually below the limit. In the following explanation, the region A3 where the harmonic voltage is actually below the limit will be referred to as the "voltage limit region A3".

[0042] In this way, the first harmonic evaluation method involves a processing circuit in the harmonic evaluation device substituting the harmonic voltage source V input by the designer, multiple AC system impedances Zs, transformer reactance Zt (design value), and transformer reactance Zc (design value) into the first harmonic evaluation formula. Furthermore, by substituting the harmonic voltage limit value into the grid connection point voltage ΔV, the processing circuit evaluates the harmonics of the AC filter 16 connected to the self-excited converter 11. The processing circuit then presents a G,B,n graph, an R,X,n graph, and a judgment result as a result of the harmonic evaluation. This allows the designer to visually determine from the G,B,n graph and R,X,n graph whether the filter admittance Yf (or filter impedance Zf) of the AC filter 16 in the power system configuration being designed falls within the range of the harmonic voltage limit value.

[0043] The GB plane (admittance plane) and the RX plane (impedance plane) are examples of "complex planes," and the G,B,n graph and the R,X,n graph are examples of "graphs shown on the complex plane." The G,B,n graph is an example of an "admittance graph," and the R,X,n graph is an example of an "impedance graph."

[0044] (Second embodiment) The second harmonic evaluation method (hereinafter referred to as the "second harmonic evaluation method") is a method for deriving the boundary line of the harmonic regulation value that the filter impedance Zf of the AC filter 16 connected to the self-excited converter 11 can take, using the grid outflow current ΔI. In the second harmonic evaluation method, the filter impedance Zf = (1 / Yf) is expressed by the harmonic evaluation formula shown in equation (6) below, using the harmonic voltage source V, transformer reactance Zt and transformer reactance Zc, AC grid impedance Zs, and grid outflow current ΔI, from the equivalent circuit of the power conversion system 1 shown in Figure 2. However, in equation (6) below as well, based on the same idea as the first harmonic evaluation formula of the first harmonic evaluation method, a phase difference of -180° to +180° between the harmonic voltage source V and the grid outflow current ΔI is considered. In the second harmonic evaluation method, the harmonic regulation value for current (hereinafter referred to as the "harmonic current regulation value") is substituted for the system outflow current ΔI.

[0045]

number

[0046] Based on equation (6) above, the locus range of the filter impedance Zf (filter admittance Yf) of the AC filter 16 that is within the harmonic current limit value, the system outflow current ΔI, can be derived using a known AC system impedance Zs. In the following explanation, the harmonic evaluation formula in equation (6) above will be referred to as the "second harmonic evaluation formula".

[0047] Here, we will describe a processing procedure for deriving the locus range of the AC filter 16 such that the harmonic currents generated in the AC current are within the system outflow current ΔI, which is the harmonic regulation value for current, using the second harmonic evaluation formula. Figure 7 is a flowchart showing an example of the processing procedure in the harmonic evaluation method (second harmonic evaluation method) according to the second embodiment. In the following description, as with the first harmonic evaluation method, the processing procedure of the second harmonic evaluation method will be assumed to be executed by the processing circuit provided in the harmonic evaluation device. In the second harmonic evaluation method, as with the first harmonic evaluation method, the order of the harmonic is assumed to be the harmonic order n, the maximum harmonic order is assumed to be the maximum harmonic order N, and it is assumed that there are multiple data points for the nth harmonic in the AC system impedance Zs.

[0048] The second harmonic evaluation method, like the first harmonic evaluation method, is performed, for example, in response to instructions from the designer. The processing circuit of the harmonic evaluation device receives the following parameters from the designer: the harmonic voltage source V output (supplied) by the self-excited converter 11, multiple AC system impedances Zs, the design values ​​of transformer reactance Zt and transformer reactance Zc, the harmonic regulation value of system outflow current ΔI, and the maximum harmonic order N. When the device is instructed to perform a harmonic evaluation, it executes the second harmonic evaluation method.

[0049] When the second harmonic evaluation method is executed, similar to the first harmonic evaluation method, the processing circuit first initializes the harmonic order n to n=2 (step S201). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S202). If the result of the determination in step S202 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit sets the parameter i, which is a variable for counting the number of AC system impedances Zs, to i=1 (step S203).

[0050] The processing circuit checks whether data for the i-th AC system impedance Zs represented by parameter i exists (for example, the RX value at the change point of the RX trajectory shown in Figure 2 within AC system 14) (step S204). If, as a result of the check in step S204, data for the i-th AC system impedance Zs exists, the processing circuit reads the n-th AC system impedance Zs represented by the current harmonic order n (step S205).

[0051] The processing circuit calculates the filter admittance Yf using the second harmonic evaluation formula shown in equation (6) above (step S206). At this time, the processing circuit calculates the filter admittance Yf using the second harmonic evaluation formula, assuming that the phase difference between the harmonic voltage source V and the system outflow current ΔI is between -180° and +180°. Then, the processing circuit calculates the filter impedance Zf (Zf = 1 / Yf) by taking the reciprocal of the calculated filter admittance Yf (step S207).

[0052] Subsequently, the processing circuit adds "1" to parameter i (i=i+1) and returns the process to step S204 (step S208). This causes the processing circuit to repeat steps S204 to S207, and, similar to the first harmonic evaluation method, calculate the filter admittance Yf and filter impedance Zf for the current harmonic order n as a fraction of the AC system impedance Zs input by the designer. The processing circuit may store the calculation results of filter admittance Yf and filter impedance Zf in, for example, the memory (storage device) of the harmonic evaluation device.

[0053] On the other hand, if the check in step S204 reveals that data for the i-th AC system impedance Zs does not exist, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns to step S202 (step S209). Then, if the determination in step S202 reveals that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit calculates the filter admittance Yf and filter impedance Zf for the next harmonic order n as a fraction of the AC system impedance Zs input by the designer, similar to the first harmonic evaluation method. The processing circuit may store the calculation results of the filter admittance Yf and filter impedance Zf in, for example, the memory (storage device) of the harmonic evaluation device.

[0054] On the other hand, if the result of the determination in step S202 indicates that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit performs a harmonic evaluation of the filter impedance Zf or filter admittance Yf of the AC filter 16 connected to the self-excited converter 11 based on the calculation results of each filter impedance Zf obtained up to this point (or the calculation results of each filter admittance Yf obtained up to this point) (step S210). At this time, the processing circuit generates an R,X,n graph showing the calculation results of each filter impedance Zf obtained up to this point in the RX plane for each harmonic order n, or a G,B,n graph showing the calculation results of each filter admittance Yf obtained up to this point in the GB plane for each harmonic order n, similar to the first harmonic evaluation method. Then, similar to the first harmonic evaluation method, the processing circuit determines, based on the generated R,X,n graph (or G,B,n graph) for each harmonic order n, whether the filter impedance Zf (or filter admittance Yf) of the AC filter 16 connected to the self-excited converter 11 falls within the range of the harmonic regulation boundary, given that the transformer reactance Zt and transformer reactance Zc are the input design values, for each harmonic order n, or for all harmonic orders n. Details regarding the processing procedure for harmonic evaluation in this processing circuit will be described later.

[0055] The processing circuit then presents the determination result to the designer, similar to the first harmonic evaluation method (step S900).

[0056] Here, an example of a graph generated by the processing circuit in step S210 will be described. Figure 8 shows an example of a graph generated in the harmonic evaluation method of the second embodiment (second harmonic evaluation method). Figure 8 shows an example of a G,B graph for a certain harmonic order n, generated by the processing circuit in step S210, similar to the G,B graph in the first harmonic evaluation method shown in Figure 4.

[0057] The second harmonic evaluation formula shown in equation (6) above can be transformed as shown in equation (7) below.

[0058]

number

[0059] When the second term on the right-hand side of equation (7) (=-(1 / Zt+1 / (Zs+Zc))) is plotted on the GB plane of the G,B graph, it resembles the circle T8. On the other hand, when the first term on the right-hand side of equation (7) (=V / ΔI / (Zt·(Zs+Zc))) is plotted on the GB plane, it resembles the circle T9, whose center lies on the circumference of circle T8. Since the phase of the first term on the right-hand side of equation (7) can range from -180° to +180°, the right-hand side of equation (7) represents the outer circumference when circle T9 is moved along the circumference of circle T8. Here, in the second harmonic evaluation method, the circle T9 in the first term on the right-hand side of equation (7) is a circle that depends on the AC system impedance Zs. In other words, the radius of circle T9 changes depending on the AC system impedance Zs when it is moved along the circumference of circle T8. Therefore, the right-hand side of equation (7) above (filter admittance Yf) is a region obtained by adding the radius of circle T9 to the circumference of circle T8, but it is not a circle, and is represented as a deformed region such as region T10. And, in the second harmonic evaluation method as in the first harmonic evaluation method, the area inside region T10 is the region that exceeds the harmonic current limit at the grid connection point 15, and the area outside region T10 is the region that is below the harmonic current limit. Therefore, the region that is actually below the harmonic current limit can be visually determined on the GB plane as region A4 outside region T10, which is shown by the shaded area in Figure 8. In the following explanation, region A4 that is actually below the harmonic current limit will be referred to as "region A4 within the current limit".

[0060] In the second harmonic evaluation method, as in the first harmonic evaluation method, the second harmonic evaluation formula shown in equation (6) above can also be evaluated in the RX plane with Zf = 1 / Yf. The approach in this case is the same as in the first harmonic evaluation method described above. In other words, in the second harmonic evaluation method, when the second harmonic evaluation formula shown in equation (6) above is evaluated in the RX plane, the range of the boundary line below the harmonic current limit will differ depending on whether the circle T of the filter admittance Yf includes the origin or not. For this reason, in the second harmonic evaluation method as well, the range of the boundary line below the harmonic current limit is switched depending on whether the circle T of the filter admittance Yf includes the origin or not. Furthermore, in the second harmonic evaluation method, similar to the first harmonic evaluation method, if the circle T of the filter admittance Yf does not include the origin, the region outside the region T of the filter impedance Zf becomes the region where the harmonic current is actually below the limit value. Conversely, if the circle T of the filter admittance Yf includes the origin, the region where the harmonic current is below the limit value is reversed, and the region inside the region T of the filter impedance Zf becomes the region where the harmonic current is actually below the limit value. An example of the R,X graph in this case should be considered to be equivalent to the example of the R,X graph in the first harmonic evaluation method shown in Figures 5 and 6. Therefore, the explicit and detailed explanation of the R,X graph when the second harmonic evaluation formula is evaluated in the RX plane with Zf = 1 / Yf is omitted.

[0061] In this way, in the second harmonic evaluation method, the processing circuit of the harmonic evaluation device substitutes the harmonic voltage source V input by the designer, the multiple AC system impedances Zs, the transformer reactance Zt (design value), and the transformer reactance Zc (design value) into the second harmonic evaluation formula, and further substitutes the harmonic current limit value into the system outflow current ΔI to perform a harmonic evaluation of the AC filter 16 connected to the self-excited converter 11. In the second harmonic evaluation method, as in the first harmonic evaluation method, the processing circuit presents a G,B,n graph (or R,X,n graph) and a judgment result as a result of the harmonic evaluation. This allows the designer to visually determine, from the G,B,n graph (or R,X,n graph), whether the filter admittance Yf (or filter impedance Zf) of the AC filter 16 in the power transmission system configuration being designed falls within the range of the harmonic current limit.

[0062] (Third embodiment) The third embodiment of the harmonic evaluation method (hereinafter referred to as the "third harmonic evaluation method") is a method for deriving the boundary of the harmonic limit that the AC system impedance Zs of the AC system 14 to which the self-excited converter 11 is to be connected can take when the self-excited converter 11 under design is connected to the AC system 14 to which it is to be applied, using the grid connection point voltage ΔV. In the third harmonic evaluation method, the AC system impedance Zs = (1 / Ys) from the equivalent circuit of the power conversion system 1 shown in Figure 2 is expressed by the harmonic evaluation formula shown in equation (8) below, using the harmonic voltage source V, transformer reactance Zt and transformer reactance Zc, filter impedance Zf, and grid connection point voltage ΔV. Here, Ys is the AC system admittance. However, in equation (8) below, based on the same reasoning as the first harmonic evaluation formula of the first harmonic evaluation method, a phase difference of -180° to +180° between the harmonic voltage source V and the grid connection point voltage ΔV is considered. In the third harmonic evaluation method as well, the harmonic voltage limit value is substituted for the grid connection point voltage ΔV, similar to the first harmonic evaluation method. In the third harmonic evaluation method, for example, if the power conversion system 1 is not equipped with an AC filter 16, the filter impedance Zf becomes Zf = ∞.

[0063]

number

[0064] Based on equation (8) above, the locus range of the AC system impedance Zs (AC system admittance Ys) of AC system 14 that is within the harmonic voltage limit value, which is the system interconnection point voltage ΔV, can be derived using a known filter impedance Zf. In the following explanation, the harmonic evaluation formula in equation (8) above will be referred to as the "third harmonic evaluation formula".

[0065] Here, we will describe a processing procedure for deriving the locus range of the AC system 14 in which the harmonic voltages generated in the AC voltage are within the system connection point voltage ΔV, which is the harmonic regulation value for voltage, using the third harmonic evaluation formula. Figure 9 is a flowchart showing an example of the processing procedure in the harmonic evaluation method (third harmonic evaluation method) according to the third embodiment. In the following description, as with the first harmonic evaluation method, the processing procedure of the third harmonic evaluation method will be performed by the processing circuit provided in the harmonic evaluation device. And, as with the first harmonic evaluation method, in the third harmonic evaluation method as well, the order of the harmonic will be the harmonic order n and the maximum harmonic order will be the maximum harmonic order N. Here, we assume that there is only one AC system 14.

[0066] The third harmonic evaluation method, like the first harmonic evaluation method, is performed, for example, in response to instructions from the designer. The processing circuit of the harmonic evaluation device receives the following parameters from the designer: the harmonic voltage source V output (supplied) by the self-excited converter 11, the filter impedance Zf of the AC filter 16, the design values ​​of the transformer reactance Zt and Zc, the harmonic regulation value of the grid connection point voltage ΔV, and the maximum harmonic order N. When the device is instructed to perform a harmonic evaluation, it executes the third harmonic evaluation method.

[0067] When the third harmonic evaluation method is executed, similar to the first harmonic evaluation method, the processing circuit first initializes the harmonic order n to n=2 (step S301). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S302).

[0068] If the result of the determination in step S302 indicates that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit calculates the AC system admittance Ys using the third harmonic evaluation formula shown in equation (8) above (step S303). At this time, the processing circuit calculates the AC system admittance Ys using the third harmonic evaluation formula, assuming that the phase difference between the harmonic voltage source V and the system connection point voltage ΔV is between -180° and +180°. Then, the processing circuit calculates the AC system impedance Zs (Zs = 1 / Ys) by taking the reciprocal of the calculated AC system admittance Ys (step S304). The processing circuit may store the calculation results of the AC system admittance Ys and the AC system impedance Zs in, for example, the memory (storage device) of the harmonic evaluation device.

[0069] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S302 (step S305). Then, if the result of the determination in step S302 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit calculates the AC system admittance Ys and AC system impedance Zs for the next harmonic order n. The processing circuit may store the calculation results of the AC system admittance Ys and AC system impedance Zs in, for example, the memory (storage device) of the harmonic evaluation device.

[0070] On the other hand, if the result of the determination in step S302 indicates that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit performs a harmonic evaluation of the AC system impedance Zs or AC system admittance Ys of the AC system 14 connected to the self-excited converter 11, based on the calculation results of each AC system impedance Zs obtained up to this point (or the calculation results of each AC system admittance Ys obtained up to this point) (step S310). At this time, the processing circuit generates an R,X,n graph showing the calculation results of each AC system impedance Zs obtained up to this point in the RX plane for each harmonic order n, or a G,B,n graph showing the calculation results of each AC system admittance Ys obtained up to this point in the GB plane for each harmonic order n, similar to the first harmonic evaluation method. Then, similar to the first harmonic evaluation method, the processing circuit uses the R,X,n graph (or G,B,n graph) for each harmonic order n generated as the input design values ​​for transformer reactance Zt and transformer reactance Zc, and determines whether the value that the AC system impedance Zs (or AC system admittance Ys) of the AC system 14 can take when the self-excited converter 11 under design is connected to the AC system 14 to which it is intended to be applied falls within the boundary range of the harmonic regulation value, for each harmonic order n, or for all harmonic orders n. Details regarding the processing procedure for harmonic evaluation in this processing circuit will be described later.

[0071] The processing circuit then presents the determination result to the designer, similar to the first harmonic evaluation method (step S900).

[0072] Here, an example of a graph generated by the processing circuit in step S310 will be described. Figure 10 is a diagram showing an example of a graph generated in the harmonic evaluation method of the third embodiment (third harmonic evaluation method). Figure 10 shows an example of a G,B graph for a certain harmonic order n, generated by the processing circuit in step S310, similar to the G,B graph in the first harmonic evaluation method shown in Figure 4.

[0073] As described above, in the third harmonic evaluation method as well, the phase difference between the harmonic voltage source V and the grid connection point voltage ΔV is considered to be between -180° and +180°. Therefore, V / ΔV in the first term on the right-hand side of equation (8) (=V / ΔV·Zt / Zf-1) is a circle. And if we consider that the other terms in the first term on the right-hand side of equation (8) can be reduced to the complex constants Za and Zb, then the third harmonic evaluation formula shown in equation (8) can be expressed as shown in equation (9) below.

[0074]

number

[0075] From equation (9) above, the AC system admittance Ys is like a circle T13 obtained by moving the center of circle T12, which is obtained by multiplying the V / ΔV circle T11 by 1 / |Za|, to -Zb. Here, the radius of circle T13 of the AC system admittance Ys is proportional to the radius of the original V / ΔV circle T11. Therefore, when the system connection point voltage ΔV becomes small (in other words, the harmonic voltage limit becomes stricter), the radius of circle T11 of V / ΔV becomes large, and when the system connection point voltage ΔV becomes large (in other words, there is a margin for the harmonic voltage limit), the radius of circle T11 of V / ΔV becomes small. From this, in the third harmonic evaluation method, it becomes possible to visually determine on the GB plane that the area outside circle T13 is below the harmonic voltage limit, and the area inside circle T13 is above the harmonic voltage limit. However, in the third harmonic evaluation method as in the first harmonic evaluation method, the real part of the actual AC system admittance Ys is a positive value. Therefore, the region where the harmonic voltage actually falls below the limit is the region A5 outside the circle T13, which is shaded in Figure 10. In the following explanation, the region A5 where the harmonic voltage actually falls below the limit will be referred to as the "region A5 within the voltage limit".

[0076] In the third harmonic evaluation method, as with the first harmonic evaluation method, the third harmonic evaluation formula shown in equation (8) above can also be evaluated in the RX plane with Zs = 1 / Ys. In this case, as with the first harmonic evaluation method described above, when the third harmonic evaluation formula shown in equation (8) above is evaluated in the RX plane, the range of the boundary line below the harmonic voltage regulation value will differ depending on whether the circle T of the AC system admittance Ys includes the origin or not. Therefore, in the third harmonic evaluation method as well, the range of the boundary line below the harmonic voltage limit is switched depending on whether the circle T of the AC system admittance Ys includes the origin or not. And, in the third harmonic evaluation method as well, if the circle T of the AC system admittance Ys does not include the origin, the region outside the circle T of the AC system impedance Zs becomes the region where the harmonic voltage limit is actually exceeded. If the circle T of the AC system admittance Ys includes the origin, the region where the harmonic voltage limit is exceeded is reversed, and the region inside the circle T of the AC system impedance Zs becomes the region where the harmonic voltage limit is actually exceeded. An example of the R,X graph in this case should be considered to be equivalent to the example of the R,X graph in the first harmonic evaluation method shown in Figures 5 and 6. Accordingly, the explicit and detailed explanation of the R,X graph when evaluating the harmonic voltage limit on the RX plane with Zs = 1 / Ys is omitted.

[0077] In this way, in the third harmonic evaluation method, the processing circuit of the harmonic evaluation device substitutes the harmonic voltage source V input by the designer, the filter impedance Zf of the AC filter 16, the transformer reactance Zt (design value), and the transformer reactance Zc (design value) into the third harmonic evaluation formula, and further substitutes the harmonic voltage limit value into the grid connection point voltage ΔV to perform a harmonic evaluation when the self-excited converter 11 under design is connected to the AC system 14 to which it is intended to be applied. In the third harmonic evaluation method, as in the first harmonic evaluation method, the processing circuit presents a G,B,n graph, an R,X,n graph, and a judgment result as the result of the harmonic evaluation. This allows designers to visually determine, from the G,B,n graph or R,X,n graph, whether the AC system admittance Ys (or AC system impedance Zs) of the AC system 14 to which the power transmission system being designed is connected falls within the range of the harmonic voltage regulation value.

[0078] (Fourth embodiment) The fourth embodiment of the harmonic evaluation method (hereinafter referred to as the "fourth harmonic evaluation method") is a method for deriving the boundary of the harmonic regulation value that the AC system impedance Zs of the AC system 14 to which the self-excited converter 11 is to be connected can take when the self-excited converter 11 under design is connected to the AC system 14 to which it is to be applied, using the system outflow current ΔI. In the fourth harmonic evaluation method, the AC system impedance Zs = (1 / Ys) from the equivalent circuit of the power conversion system 1 shown in Figure 2 is expressed by the harmonic evaluation formula shown in equation (10) below, using the harmonic voltage source V, transformer reactance Zt and transformer reactance Zc, filter impedance Zf, and system outflow current ΔI. However, in equation (10) below as well, based on the same idea as the third harmonic evaluation formula of the third harmonic evaluation method, a phase difference of -180° to +180° between the harmonic voltage source V and the system outflow current ΔI is considered. In the fourth harmonic evaluation method, as in the second harmonic evaluation method, the harmonic current limit value is substituted for the grid outflow current ΔI. In the fourth harmonic evaluation method, as in the third harmonic evaluation method, for example, if the power conversion system 1 is not equipped with an AC filter 16, the filter impedance Zf becomes Zf = ∞.

[0079]

number

[0080] Based on equation (10) above, the locus range of the AC system impedance Zs (AC system admittance Ys) of AC system 14 that is within the harmonic current limit value, which is the system outflow current ΔI, can be derived using a known filter impedance Zf. In the following explanation, the harmonic evaluation formula in equation (10) above will be referred to as the "fourth harmonic evaluation formula".

[0081] Here, we will describe a processing procedure for deriving the locus range of the AC system 14 in which the harmonic currents generated in the AC current are within the system outflow current ΔI, which is the harmonic current regulation value, using the fourth harmonic evaluation formula. Figure 11 is a flowchart showing an example of the processing procedure in the harmonic evaluation method (fourth harmonic evaluation method) according to the fourth embodiment. In the following description, as with the third harmonic evaluation method, the processing procedure of the fourth harmonic evaluation method will be assumed to be executed by the processing circuit provided in the harmonic evaluation device. And, as with the third harmonic evaluation method, in the fourth harmonic evaluation method as well, the order of the harmonic will be the harmonic order n, and the maximum order of the harmonic will be the maximum harmonic order N. Here again, we assume that there is only one AC system 14.

[0082] The fourth harmonic evaluation method, like the third harmonic evaluation method, is performed, for example, in response to instructions from the designer. The processing circuit of the harmonic evaluation device receives the following parameters from the designer: the harmonic voltage source V output (supplied) by the self-excited converter 11, the filter impedance Zf of the AC filter 16, the design values ​​of the transformer reactance Zt and transformer reactance Zc, the harmonic regulation value of the system outflow current ΔI, and the maximum harmonic order N. When the device is instructed to perform a harmonic evaluation, it executes the fourth harmonic evaluation method.

[0083] When the fourth harmonic evaluation method is executed, similar to the third harmonic evaluation method, the processing circuit first initializes the harmonic order n to n=2 (step S401). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S402).

[0084] If the result of the determination in step S402 indicates that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit calculates the AC system impedance Zs using the fourth harmonic evaluation formula shown in equation (10) above (step S403). At this time, the processing circuit calculates the AC system impedance Zs using the fourth harmonic evaluation formula, assuming that the phase difference between the harmonic voltage source V and the system outflow current ΔI is between -180° and +180°. Then, the processing circuit calculates the AC system admittance Ys (Ys = 1 / Zs) by taking the reciprocal of the calculated AC system impedance Zs (step S404). The processing circuit may store the calculation results of the AC system impedance Zs and AC system admittance Ys in, for example, the memory (storage device) of the harmonic evaluation device.

[0085] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S402 (step S405). Then, if the result of the determination in step S402 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit calculates the AC system impedance Zs and AC system admittance Ys for the next harmonic order n. The processing circuit may store the calculation results of the AC system impedance Zs and AC system admittance Ys in, for example, the memory (storage device) of the harmonic evaluation device.

[0086] On the other hand, if the result of the determination in step S402 is that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit performs a harmonic evaluation of the AC system impedance Zs or AC system admittance Ys of the AC system 14 to which the self-excited converter 11 is connected, based on the calculation results of each AC system impedance Zs obtained up to this point (or the calculation results of each AC system admittance Ys obtained up to this point) (step S410). At this time, the processing circuit generates an R,X,n graph showing the calculation results of each AC system impedance Zs obtained up to this point in the RX plane for each harmonic order n, or a G,B,n graph showing the calculation results of each AC system admittance Ys obtained up to this point in the GB plane for each harmonic order n, similar to the third harmonic evaluation method. Then, similar to the third harmonic evaluation method, the processing circuit uses the R,X,n graph (or G,B,n graph) for each harmonic order n generated as the input design values ​​for transformer reactance Zt and transformer reactance Zc, and determines whether the value that the AC system impedance Zs (or AC system admittance Ys) of the AC system 14 can take when the self-excited converter 11 under design is connected to the AC system 14 to which it is intended to be applied falls within the boundary range of the harmonic regulation value, for each harmonic order n, or for all harmonic orders n. Details regarding the processing procedure for harmonic evaluation in this processing circuit will be described later.

[0087] The processing circuit then presents the determination result to the designer, similar to the third harmonic evaluation method (step S900).

[0088] Here, an example of a graph generated by the processing circuit in step S410 will be described. Figure 12 is a diagram showing an example of a graph generated in the harmonic evaluation method of the fourth embodiment (fourth harmonic evaluation method). Figure 12 shows an example of an R,X graph of a certain harmonic order n generated by the processing circuit in step S410.

[0089] As described above, in the fourth harmonic evaluation method as well, the phase difference between the harmonic voltage source V and the system outflow current ΔI is considered to be between -180° and +180°. Therefore, V / ΔI in the first term on the right-hand side of equation (10) (= (V / ΔI) - Zt·(1 + (Zc / Zf)) - Zc) is a circle. And if we consider that the other terms in the first term on the right-hand side of equation (10) can be reduced to the complex constants Zd and Ze, then the fourth harmonic evaluation formula shown in equation (10) can be expressed as shown in equation (11) below.

[0090]

number

[0091] From equation (11) above, the AC system impedance Zs is like a circle T16 obtained by shifting the center of circle T15, which is obtained by multiplying circle T14 of V / ΔI by 1 / |Zd|, to -Ze. Here, the radius of circle T16 of the AC system impedance Zs is proportional to the radius of the original circle T14 of V / ΔI. Therefore, the radius of circle T16 of the AC system impedance Zs increases when the system outflow current ΔI becomes small (in other words, the harmonic current limit becomes stricter), and decreases when the system outflow current ΔI becomes large (in other words, there is a margin for the harmonic current limit). From this, in the fourth harmonic evaluation method, it becomes possible to visually determine on the RX plane that the area outside circle T16 is below the harmonic current limit, and the area inside circle T16 is above the harmonic current limit. However, in the fourth harmonic evaluation method, as with the third harmonic evaluation method, the real part of the actual AC system impedance Zs is a positive value. Therefore, the region where the harmonic current actually falls below the limit is the region A6 outside the circle T16, which is shaded in Figure 12. In the following explanation, the region A6 where the harmonic current actually falls below the limit will be referred to as the "region A6 within the current limit."

[0092] In the fourth harmonic evaluation method, similar to the third harmonic evaluation method, the fourth harmonic evaluation formula shown in equation (10) above can also be evaluated in the GB plane with Ys = 1 / Zs. In this case, the approach can be considered equivalent to that of the third harmonic evaluation method described above. More specifically, when evaluating the fourth harmonic evaluation formula shown in equation (10) above in the GB plane, the range of the boundary line below the harmonic current limit differs depending on whether the circle T of the AC system impedance Zs includes the origin or not. Therefore, in the fourth harmonic evaluation method as well, the range of the boundary line below the harmonic current limit is switched depending on whether the circle T of the AC system impedance Zs includes the origin or not. Furthermore, in the fourth harmonic evaluation method, similar to the third harmonic evaluation method, if the circle T of the AC system impedance Zs does not include the origin, the region outside the circle T of the AC system admittance Ys becomes the region where the harmonic current is actually below the limit value. Conversely, if the circle T of the AC system impedance Zs includes the origin, the region where the harmonic current is below the limit value is reversed, and the region inside the circle T of the AC system admittance Ys becomes the region where the harmonic current is actually below the limit value. An example of the G,B graph in this case can be considered equivalent to the example of the R,X graph in the first harmonic evaluation method shown in Figures 5 and 6. Therefore, the explicit and detailed explanation of the G,B graph when evaluating the harmonic current limit value on the GB plane with Ys = 1 / Zs is omitted.

[0093] In this way, the fourth harmonic evaluation method involves the processing circuit of the harmonic evaluation device substituting the harmonic voltage source V input by the designer, the filter impedance Zf of the AC filter 16, the transformer reactance Zt (design value), and the transformer reactance Zc (design value) into the fourth harmonic evaluation formula. Furthermore, by substituting the harmonic current limit value into the system outflow current ΔI, the system evaluates the harmonics when the self-excited converter 11 under design is connected to the AC system 14 to which it is intended to be applied. In the fourth harmonic evaluation method, as in the third harmonic evaluation method, the processing circuit presents R,X,n graphs, G,B,n graphs, and judgment results as the results of the harmonic evaluation. This allows designers to visually determine, from the R,X,n graph or G,B,n graph, whether the AC system impedance Zs (or AC system admittance Ys) of the AC system 14 to which the power transmission system being designed is connected falls within the range of the harmonic current limit.

[0094] [Method for presenting the results of harmonic evaluation] (Fifth embodiment) The following describes the method for presenting the judgment results of the harmonic evaluation in the first harmonic evaluation method described above. As described above, in the first harmonic evaluation method, the processing circuit calculates the filter admittance Yf using the first harmonic evaluation formula shown in equation (1) above. The processing circuit generates G,B,n graphs for each harmonic order n from the calculation result of the filter admittance Yf and performs a harmonic evaluation to determine whether the filter admittance Yf (design value) of the AC filter 16 is within the boundary range of the harmonic voltage regulation value. The processing circuit presents the evaluation results (judgment results) of the harmonic evaluation performed for each harmonic order n, or for all harmonic orders n, to the designer.

[0095] Figure 13 is a flowchart showing an example of the processing procedure for presenting the harmonic evaluation determination result (determination result in the first harmonic evaluation method) according to the fifth embodiment. The flowchart in Figure 13 shows the processing procedure (hereinafter referred to as "the evaluation result presentation method of the first-1") in which the processing circuit generates G, B, n graphs (see Figure 4) from the calculation result of the filter admittance Yf and presents the result of the harmonic evaluation of the voltage when the AC filter 16 is connected to the self-excited converter 11. In the following description, it is assumed that the calculation results of the filter admittance Yf for all harmonic orders n have been obtained by the processing procedure of the first harmonic evaluation method (see Figure 3).

[0096] When the evaluation result presentation method of 1-1 is initiated, the processing circuit first initializes the harmonic order n. Here again, if the harmonic order n is n=1, it is the fundamental frequency in the AC voltage and is not subject to harmonic evaluation, so the processing circuit initializes the harmonic order n to n=2 (step S111).

[0097] The processing circuit then determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S112). If the determination in step S112 shows that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit generates G, B, and n graphs from the calculation results of the filter admittance Yf for the current harmonic order n (step S113). For example, the processing circuit generates G, B, and 1 graphs (see Figure 4) based on the calculation results of the filter admittance Yf for each of the current harmonic orders n=1.

[0098] The processing circuit plots the filter admittance Yf of the AC filter 16 connected to the self-excited converter 11 onto the GB plane of the generated G,B,n graph (step S114). The processing circuit may also present this G,B,n graph to the designer.

[0099] The processing circuit determines whether the filter admittance Yf of the AC filter 16 is within the voltage limit region in the generated G,B,n graph (step S115). For example, the processing circuit determines whether the filter admittance Yf of the AC filter 16 is within the voltage limit region A1 outside circle T3 in the G,B graph shown in Figure 4.

[0100] If the determination in step S115 determines that the filter admittance Yf of the AC filter 16 is within the voltage limit range in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic voltage limit" (step S116). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device. Then, the processing circuit proceeds to step S118.

[0101] On the other hand, if the determination in step S115 determines that the filter admittance Yf of the AC filter 16 is not within the voltage limit region in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic voltage limit" (step S117). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device. Then, the processing circuit proceeds to step S118.

[0102] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S112 (step S118). As a result, the processing circuit repeats the processes from step S112 to step S117, and determines whether the filter admittance Yf of the AC filter 16 is within the voltage limit region of the G,B,n graph for each harmonic order n.

[0103] On the other hand, if the determination in step S112 indicates that the current harmonic order n is not less than or equal to the maximum harmonic order N, that is, if the current harmonic order n is greater than the maximum harmonic order N, the processing circuit presents the determination results up to this point to the designer as the evaluation result (step S900). Before presenting the evaluation result to the designer in step S900, the processing circuit may determine, based on the determination result for each harmonic order n, whether the filter admittance Yf of the AC filter 16 is within the voltage limit region of the G,B,n graph for all harmonic orders n. The processing circuit may then add this determination result to the determination result for each harmonic order n and present it to the designer as the evaluation result.

[0104] In this way, in the evaluation result presentation method of 1-1, the processing circuit of the harmonic evaluation device presents the harmonic evaluation results by superimposing the filter admittance Yf of the AC filter 16 onto the G,B,n graph based on the calculation result of the filter admittance Yf in the first harmonic evaluation method. The processing circuit then presents, as the result of the harmonic evaluation, the G,B,n graph for each harmonic order n with the filter admittance Yf superimposed, and the judgment result for each harmonic order n (which may include the G,B,n graph with the filter admittance Yf included for all harmonic orders n, or the judgment result for all harmonic orders n). This allows the designer to visually determine whether the filter admittance Yf of the AC filter 16 in the power transmission system configuration being designed falls within the range below the harmonic voltage limit (voltage limit region) by comparing the G,B,n graph with the filter admittance Yf of the AC filter 16 superimposed and checking the judgment result.

[0105] (Sixth embodiment) As described above, in the first harmonic evaluation method, the processing circuit calculates the filter admittance Yf using the first harmonic evaluation formula shown in equation (1) above, and further calculates the filter impedance Zf from the result of calculating the filter admittance Yf. The processing circuit generates R,X,n graphs for each harmonic order n from the result of calculating the filter impedance Zf, and performs a harmonic evaluation to determine whether the filter impedance Zf (design value) of the AC filter 16 is within the boundary range of the harmonic voltage regulation value. The processing circuit presents the evaluation results (determination results) obtained by performing the harmonic evaluation for each harmonic order n, or for all harmonic orders n, to the designer.

[0106] Figure 14 is a flowchart showing an example of the processing procedure for presenting the harmonic evaluation result (the result in the first harmonic evaluation method) according to the sixth embodiment. The flowchart in Figure 14 shows the processing procedure (hereinafter referred to as the "first-second evaluation result presentation method") when the processing circuit generates an R,X,n graph (see Figures 5 and 6) from the calculation result of the filter impedance Zf and presents the result of the harmonic evaluation of the voltage when the AC filter 16 is connected to the self-excited converter 11. In the following description, it is assumed that the calculation results of the filter impedance Zf for all harmonic orders n have been obtained by the processing procedure of the first harmonic evaluation method (see Figure 3).

[0107] When the evaluation result presentation method 1-2 is started, similar to the evaluation result presentation method 1-1, the processing circuit first initializes the harmonic order n to n=2 (step S121). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S122).

[0108] If the result of the determination in step S122 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit generates an R,X,n graph from the calculation result of the filter impedance Zf for the current harmonic order n (step S123). For example, the processing circuit generates an R,X,1 graph (see Figures 5 and 6) based on the calculation result of the filter impedance Zf for each of the current harmonic orders n=1.

[0109] The processing circuit plots the filter impedance Zf of the AC filter 16 connected to the self-excited converter 11 onto the RX plane of the generated R,X,n graph (step S124). The processing circuit may also present this R,X,n graph to the designer, similar to the evaluation result presentation method in 1-1.

[0110] The processing circuit determines whether the calculated result of filter admittance Yf in the generated R,X,n graph includes the origin (step S125). If the determination in step S125 determines that the calculated result of filter admittance Yf includes the origin, the processing circuit proceeds to step S130. On the other hand, if the determination in step S125 determines that the calculated result of filter admittance Yf does not include the origin, the processing circuit proceeds to step S140. For example, if the circle T of the calculated result of filter admittance Yf includes the origin of the RX plane, as shown by circle T6 in the R,X graph in Figure 6, the processing circuit proceeds to step S130. If the circle T4 in the R,X graph in Figure 5 does not include the origin of the RX plane, the processing proceeds to step S140.

[0111] In step S125, if the calculation result of the filter admittance Yf is determined to include the origin, the processing circuit determines whether or not the filter impedance Zf of the AC filter 16 is within the voltage limit region in the generated R,X,n graph (step S130). For example, the processing circuit determines whether or not the filter impedance Zf of the AC filter 16 is within the voltage limit region A3 inside circle T7 in the R,X graph shown in Figure 6.

[0112] If the determination in step S130 determines that the filter impedance Zf of the AC filter 16 is within the voltage limit range in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic voltage limit" (step S131). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device. Then, the processing circuit proceeds to step S150.

[0113] On the other hand, if the determination in step S130 determines that the filter impedance Zf of the AC filter 16 is not within the voltage limit region in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic voltage limit" (step S132). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device. Then, the processing circuit proceeds to step S150.

[0114] On the other hand, in step S125, if it is determined that the calculation result of the filter admittance Yf does not include the origin, the processing circuit determines whether or not the filter impedance Zf of the AC filter 16 is within the voltage limit region in the generated R,X,n graph (step S140). For example, the processing circuit determines whether or not the filter impedance Zf of the AC filter 16 is within the voltage limit region A2 outside the circle T5 in the R,X graph shown in Figure 5.

[0115] If the determination in step S140 determines that the filter impedance Zf of the AC filter 16 is within the voltage limit range in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic voltage limit" (step S141). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device. Then, the processing circuit proceeds to step S150.

[0116] On the other hand, if the determination in step S140 determines that the filter impedance Zf of the AC filter 16 is not within the voltage limit region in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic voltage limit" (step S142). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device. Then, the processing circuit proceeds to step S150.

[0117] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S122 (step S150). As a result, the processing circuit repeats the processes from step S122 to step S142, and determines whether the filter impedance Zf of the AC filter 16 is within the voltage limit region of the R,X,n graph for each harmonic order n.

[0118] On the other hand, if the result of the determination in step S122 is that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit presents the determination results up to this point to the designer as the evaluation result (step S900). Similar to the evaluation result presentation method in 1-1, the processing circuit may, before presenting the evaluation result to the designer in step S900, determine whether the filter impedance Zf of the AC filter 16 is within the voltage limit region of the R,X,n graph for all harmonic orders n based on the determination result for each harmonic order n. The processing circuit may then add this determination result to the determination result for each harmonic order n and present it to the designer as the evaluation result.

[0119] In this way, in the first-second evaluation result presentation method, the processing circuit of the harmonic evaluation device presents the harmonic evaluation results by superimposing the filter impedance Zf of the AC filter 16 onto the R,X,n graph based on the calculation result of the filter impedance Zf in the first harmonic evaluation method. In the first-second evaluation result presentation method, as in the first-first evaluation result presentation method, the processing circuit presents, as the result of the harmonic evaluation, an R,X,n graph for each harmonic order n with the filter impedance Zf superimposed, and a judgment result for each harmonic order n (which may include an R,X,n graph with the filter impedance Zf including all harmonic orders n, or a judgment result for all harmonic orders n). This allows designers to visually determine whether the filter impedance Zf of the AC filter 16 in the power transmission system configuration they are designing falls within the range of harmonic voltage limits (voltage limit range) by comparing the R, X, and n graphs with the filter impedance Zf of the AC filter 16 superimposed, or by checking the judgment results.

[0120] (Seventh Embodiment) The following describes how the results of the harmonic evaluation are presented in the second harmonic evaluation method described above. As described above, in the second harmonic evaluation method, the processing circuit calculates the filter admittance Yf using the second harmonic evaluation formula shown in equation (6) above. The processing circuit generates G,B,n graphs for each harmonic order n from the calculation result of the filter admittance Yf and performs a harmonic evaluation to determine whether the filter admittance Yf (design value) of the AC filter 16 is within the boundary range of the harmonic current limit value. The processing circuit presents the evaluation results (determination results) of the harmonic evaluation performed for each harmonic order n, or for all harmonic orders n, to the designer.

[0121] Figure 15 is a flowchart showing an example of the processing procedure for presenting the judgment result of the harmonic evaluation according to the seventh embodiment (the judgment result in the second harmonic evaluation method). The flowchart in Figure 15 shows the processing procedure (hereinafter referred to as "the evaluation result presentation method of 2-1") in which the processing circuit generates G, B, n graphs (see Figure 8) from the calculation result of the filter admittance Yf and presents the result of the harmonic evaluation of the voltage when the AC filter 16 is connected to the self-excited converter 11. In the following description, it is assumed that the calculation results of the filter admittance Yf for all harmonic orders n have been obtained by the processing procedure of the second harmonic evaluation method (see Figure 7).

[0122] When the evaluation result presentation method of 2-1 is started, similar to the evaluation result presentation method of 1-1, the processing circuit first initializes the harmonic order n to n=2 (step S211). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S212).

[0123] If the result of the determination in step S212 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit generates G, B, and n graphs from the calculation results of the filter admittance Yf for the current harmonic order n (step S213). For example, the processing circuit generates G, B, and 1 graphs (see Figure 8) based on the calculation results of the filter admittance Yf for each of the current harmonic orders n=1.

[0124] The processing circuit plots the filter admittance Yf of the AC filter 16 connected to the self-excited converter 11 onto the GB plane of the generated G,B,n graph (step S214). The processing circuit may also present the G,B,n graph in this state to the designer, similar to the evaluation result presentation method of 1-1.

[0125] The processing circuit determines whether the filter admittance Yf of the AC filter 16 is within the current limit region in the generated G,B,n graph (step S215). For example, the processing circuit determines whether the filter admittance Yf of the AC filter 16 is within the current limit region A4 outside circle T10 in the G,B graph shown in Figure 8.

[0126] If the determination in step S215 determines that the filter admittance Yf of the AC filter 16 is within the current limit range in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic current limit" (step S216). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of 1-1. The processing circuit then proceeds to step S218.

[0127] On the other hand, if the determination in step S215 determines that the filter admittance Yf of the AC filter 16 is not within the current limit range in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic current limit" (step S217). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of 1-1. The processing circuit then proceeds to step S218.

[0128] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S212 (step S218). As a result, the processing circuit repeats the processes from step S212 to step S217, and determines whether the filter admittance Yf of the AC filter 16 is within the current limiting region of the G,B,n graph for each harmonic order n.

[0129] On the other hand, if the result of the determination in step S212 is that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit presents the determination results up to this point to the designer as the evaluation result (step S900). Similar to the evaluation result presentation method of 1-1, the processing circuit may, before presenting the evaluation result to the designer in step S900, determine whether the filter admittance Yf of the AC filter 16 is within the current limiting region of the G,B,n graph for all harmonic orders n based on the determination result for each harmonic order n. The processing circuit may then add this determination result to the determination result for each harmonic order n and present it to the designer as the evaluation result.

[0130] In this way, in the evaluation result presentation method 2-1, similar to the evaluation result presentation method 1-1, the processing circuit of the harmonic evaluation device presents the harmonic evaluation results by superimposing the filter admittance Yf of the AC filter 16 onto the G,B,n graph based on the calculation result of the filter admittance Yf in the second harmonic evaluation method. Then, in the evaluation result presentation method 2-1, similar to the evaluation result presentation method 1-1, the processing circuit presents, as the result of the harmonic evaluation, the G,B,n graphs for each harmonic order n with the filter admittance Yf superimposed, and the judgment results for each harmonic order n (which may include the G,B,n graph with the filter admittance Yf including all harmonic orders n, or the judgment results for all harmonic orders n). This allows designers to visually determine whether the filter admittance Yf of the AC filter 16 in the power transmission system configuration they are designing falls within the range of harmonic current limits (within the current limit region) by comparing the G, B, and n graphs overlaid with the filter admittance Yf of the AC filter 16 and checking the judgment results.

[0131] (Eighth embodiment) As described above, in the second harmonic evaluation method, the processing circuit calculates the filter admittance Yf using the second harmonic evaluation formula shown in equation (6) above, and further calculates the filter impedance Zf from the result of the filter admittance Yf. The processing circuit generates R,X,n graphs for each harmonic order n from the result of the filter impedance Zf calculation, and performs a harmonic evaluation to determine whether the filter impedance Zf (design value) of the AC filter 16 is within the boundary range of the harmonic current limit value. The processing circuit presents the evaluation results (determination results) obtained by performing the harmonic evaluation for each harmonic order n, or for all harmonic orders n, to the designer.

[0132] Figure 16 is a flowchart showing an example of the processing procedure for presenting the harmonic evaluation result (the result in the second harmonic evaluation method) according to the eighth embodiment. The flowchart in Figure 16 shows the processing procedure (hereinafter referred to as "the evaluation result presentation method of the second-2") in which the processing circuit generates an R,X,n graph from the calculation result of the filter impedance Zf and presents the result of the harmonic evaluation of the voltage when the AC filter 16 is connected to the self-excited converter 11. In the following description, it is assumed that the calculation results of the filter impedance Zf for all harmonic orders n have been obtained by the processing procedure of the second harmonic evaluation method (see Figure 7).

[0133] When the evaluation result presentation method of 2-2 is started, similar to the evaluation result presentation method of 2-1, the processing circuit first initializes the harmonic order n to n=2 (step S221). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S222).

[0134] If the result of the determination in step S222 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit generates an R,X,n graph from the calculation result of the filter impedance Zf for the current harmonic order n (step S223).

[0135] The processing circuit plots the filter impedance Zf of the AC filter 16 connected to the self-excited converter 11 onto the RX plane of the generated R,X,n graph (step S224). The processing circuit may also present this R,X,n graph to the designer, similar to the evaluation result presentation method in 2-1.

[0136] The processing circuit determines whether the calculated result of filter admittance Yf in the generated R,X,n graph includes the origin (step S225). If the determination in step S225 determines that the calculated result of filter admittance Yf includes the origin, the processing circuit proceeds to step S230. On the other hand, if the determination in step S225 determines that the calculated result of filter admittance Yf does not include the origin, the processing circuit proceeds to step S240.

[0137] In step S225, if it is determined that the calculation result of the filter admittance Yf includes the origin, the processing circuit determines whether or not the filter impedance Zf of the AC filter 16 is within the current limit region in the generated R,X,n graph (step S230).

[0138] If the determination in step S230 determines that the filter impedance Zf of the AC filter 16 is within the current limit range in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic current limit" (step S231). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the first and second steps. The processing circuit then proceeds to step S250.

[0139] On the other hand, if the determination in step S230 determines that the filter impedance Zf of the AC filter 16 is not within the current limit range in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic current limit" (step S232). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the 1st-2. Then, the processing circuit proceeds to step S250.

[0140] On the other hand, in step S225, if it is determined that the calculation result of the filter admittance Yf does not include the origin, the processing circuit determines whether or not the filter impedance Zf of the AC filter 16 is within the current limit region in the generated R,X,n graph (step S240).

[0141] If the determination in step S240 determines that the filter impedance Zf of the AC filter 16 is within the current limit range in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic current limit" (step S241). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the first and second steps. The processing circuit then proceeds to step S250.

[0142] On the other hand, if the determination in step S240 determines that the filter impedance Zf of the AC filter 16 is not within the current limit range in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic current limit" (step S242). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the 1st-2. Then, the processing circuit proceeds to step S250.

[0143] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S222 (step S250). As a result, the processing circuit repeats the process from step S222 to step S242, and determines whether the filter impedance Zf of the AC filter 16 is within the current limit region of the R,X,n graph for each harmonic order n.

[0144] On the other hand, if the result of the determination in step S222 is that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit presents the determination results up to this point to the designer as the evaluation result (step S900). Similar to the evaluation result presentation method in 2-1, the processing circuit may, before presenting the evaluation result to the designer in step S900, determine whether the filter impedance Zf of the AC filter 16 is within the current limiting region of the R,X,n graph for all harmonic orders n based on the determination result for each harmonic order n. The processing circuit may then add this determination result to the determination result for each harmonic order n and present it to the designer as the evaluation result.

[0145] In this way, in the evaluation result presentation method of 2-2, the processing circuit of the harmonic evaluation device presents the harmonic evaluation results by superimposing the filter impedance Zf of the AC filter 16 onto the R,X,n graph based on the calculation result of the filter impedance Zf in the second harmonic evaluation method. In the evaluation result presentation method of 2-2, as in the evaluation result presentation method of 2-1, the processing circuit presents, as the result of the harmonic evaluation, an R,X,n graph for each harmonic order n with the filter impedance Zf superimposed, and a judgment result for each harmonic order n (which may include an R,X,n graph with the filter impedance Zf including all harmonic orders n, or a judgment result for all harmonic orders n). This allows designers to visually determine whether the filter impedance Zf of the AC filter 16 in the power transmission system configuration they are designing falls within the range of harmonic current limits (within the current limit region) by comparing the R, X, and n graphs with the filter impedance Zf of the AC filter 16 superimposed, or by checking the judgment results.

[0146] (Ninth embodiment) The following describes how the results of the harmonic evaluation are presented in the third harmonic evaluation method described above. As described above, in the third harmonic evaluation method, the processing circuit calculates the AC system admittance Ys using the third harmonic evaluation formula shown in equation (8) above. The processing circuit generates G,B,n graphs for each harmonic order n from the calculation result of the AC system admittance Ys and performs a harmonic evaluation to determine whether the AC system admittance Ys (design value) of the AC system 14 is within the boundary range of the harmonic voltage regulation value. The processing circuit presents the evaluation results (determination results) of the harmonic evaluation performed for each harmonic order n, or for all harmonic orders n, to the designer.

[0147] Figure 17 is a flowchart showing an example of the processing procedure for presenting the harmonic evaluation result (the result in the third harmonic evaluation method) according to the ninth embodiment. The flowchart in Figure 17 shows the processing procedure (hereinafter referred to as "the evaluation result presentation method of 3-1") when the processing circuit generates G, B, n graphs (see Figure 10) from the calculation result of the AC system admittance Ys and presents the result of the harmonic evaluation of the voltage in the AC system 14 connected to the self-excited converter 11. In the following description, it is assumed that the calculation results of the AC system admittance Ys for all harmonic orders n have been obtained by the processing procedure of the third harmonic evaluation method (see Figure 9).

[0148] When the evaluation result presentation method of 3-1 is started, similar to the evaluation result presentation method of 1-1, the processing circuit first initializes the harmonic order n to n=2 (step S311). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S312).

[0149] If the result of the determination in step S312 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit generates G, B, n graphs from the calculation results of the AC system admittance Ys for the current harmonic order n (step S313). For example, the processing circuit generates G, B, 1 graphs (see Figure 10) based on the calculation results of the AC system admittance Ys for each of the current harmonic orders n=1.

[0150] The processing circuit plots the AC system admittance Ys of the AC system 14 connected to the self-excited converter 11 onto the GB plane of the generated G,B,n graph (step S314). The processing circuit may also present the G,B,n graph in this state to the designer, similar to the evaluation result presentation method of 1-1.

[0151] The processing circuit determines whether the AC system admittance Ys of AC system 14 is within the voltage limit region in the generated G,B,n graph (step S315). For example, the processing circuit determines whether the AC system admittance Ys of AC system 14 is within the voltage limit region A5 outside circle T13 in the G,B graph shown in Figure 10.

[0152] If the determination in step S315 determines that the AC system admittance Ys of the AC system 14 is within the voltage limit range region in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic voltage limit" (step S316). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of 1-1. The processing circuit then proceeds to step S318.

[0153] On the other hand, if the determination in step S315 determines that the AC system admittance Ys of the AC system 14 is not within the voltage limit range in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic voltage limit" (step S317). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of 1-1. The processing circuit then proceeds to step S318.

[0154] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S312 (step S318). As a result, the processing circuit repeats the processes from step S312 to step S317, and determines whether the AC system admittance Ys of the AC system 14 is within the voltage limit region of the G,B,n graph for each harmonic order n.

[0155] On the other hand, if the result of the determination in step S312 is that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit presents the determination results up to this point to the designer as the evaluation result (step S900). Similar to the evaluation result presentation method of 1-1, the processing circuit may, before presenting the evaluation result to the designer in step S900, determine whether the AC system admittance Ys of the AC system 14 is within the voltage limit region of the G,B,n graph for all harmonic orders n based on the determination result of each harmonic order n. The processing circuit may then add this determination result to the determination result of each harmonic order n and present it to the designer as the evaluation result.

[0156] In this way, in the evaluation result presentation method of 3-1, the processing circuit of the harmonic evaluation device presents the harmonic evaluation results by superimposing the AC system admittance Ys of the AC system 14 onto the G,B,n graph based on the calculation result of the AC system admittance Ys in the third harmonic evaluation method. Then, in the evaluation result presentation method of 3-1, similar to the evaluation result presentation method of 1-1, the processing circuit presents as the result of the harmonic evaluation the G,B,n graphs of each harmonic order n with the AC system admittance Ys superimposed, and the judgment results for each harmonic order n (which may include the G,B,n graph of the AC system admittance Ys including all harmonic orders n, or the judgment results for all harmonic orders n). This allows the designer to visually determine whether the AC system admittance Ys of the AC system 14, when the self-commutated converter 11 under design is connected to the AC system 14, falls within the range of the harmonic voltage limit (voltage limit region) by comparing the G, B, and n graphs overlaid with the AC system admittance Ys of the AC system 14 and checking the judgment results.

[0157] (Tenth embodiment) As described above, in the third harmonic evaluation method, the processing circuit calculates the AC system admittance Ys using the third harmonic evaluation formula shown in equation (8) above, and further calculates the AC system impedance Zs from the calculation result of the AC system admittance Ys. The processing circuit generates R,X,n graphs for each harmonic order n from the calculation result of the AC system impedance Zs, and performs a harmonic evaluation to determine whether the AC system impedance Zs (design value) of the AC system 14 is within the boundary range of the harmonic voltage regulation value. The processing circuit presents the evaluation results (determination results) obtained by performing the harmonic evaluation for each harmonic order n, or for all harmonic orders n, to the designer.

[0158] Figure 18 is a flowchart showing an example of the processing procedure for presenting the harmonic evaluation determination result (determination result in the third harmonic evaluation method) according to the tenth embodiment. The flowchart in Figure 18 shows the processing procedure (hereinafter referred to as "the evaluation result presentation method of 3-2") when the processing circuit generates an R,X,n graph from the calculation result of the AC system impedance Zs and presents the result of the harmonic evaluation of the voltage in the AC system 14 connected to the self-excited converter 11. In the following description, it is assumed that the calculation results of the AC system impedance Zs for all harmonic orders n have been obtained by the processing procedure of the third harmonic evaluation method (see Figure 9).

[0159] When the evaluation result presentation method of 3-2 is started, similar to the evaluation result presentation method of 3-1, the processing circuit first initializes the harmonic order n to n=2 (step S321). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S322).

[0160] If the result of the determination in step S322 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit generates an R,X,n graph from the calculation result of the AC system impedance Zs for the current harmonic order n (step S323).

[0161] The processing circuit plots the AC system impedance Zs of the AC system 14 connected to the self-excited converter 11 onto the RX plane of the generated R,X,n graph (step S324). The processing circuit may also present this R,X,n graph to the designer, similar to the evaluation result presentation method in 3-1.

[0162] The processing circuit determines whether the calculated result of AC system admittance Ys in the generated R,X,n graph includes the origin (step S325). If the determination in step S325 determines that the calculated result of AC system admittance Ys includes the origin, the processing circuit proceeds to step S330. On the other hand, if the determination in step S325 determines that the calculated result of AC system admittance Ys does not include the origin, the processing circuit proceeds to step S340.

[0163] In step S325, if it is determined that the calculation result of the AC system admittance Ys includes the origin, the processing circuit determines whether or not the AC system impedance Zs of the AC system 14 is within the voltage limit region in the generated R,X,n graph (step S330).

[0164] If the determination in step S330 determines that the AC system impedance Zs of the AC system 14 is within the voltage limit range region in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic voltage limit" (step S331). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the 1st-2. Then, the processing circuit proceeds to step S350.

[0165] On the other hand, if the determination in step S330 determines that the AC system impedance Zs of the AC system 14 is not within the voltage limit range region in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic voltage limit" (step S332). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the 1st-2. Then, the processing circuit proceeds to step S350.

[0166] On the other hand, in step S325, if it is determined that the calculation result of the AC system admittance Ys does not include the origin, the processing circuit determines whether or not the AC system impedance Zs of the AC system 14 is within the voltage limit region in the generated R,X,n graph (step S340).

[0167] If the determination in step S340 determines that the AC system impedance Zs of the AC system 14 is within the voltage limit range region in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic voltage limit" (step S341). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the 1st-2. Then, the processing circuit proceeds to step S350.

[0168] On the other hand, if the determination in step S340 determines that the AC system impedance Zs of the AC system 14 is not within the voltage limit range region in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic voltage limit" (step S342). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the 1st-2. Then, the processing circuit proceeds to step S350.

[0169] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S322 (step S350). As a result, the processing circuit repeats the processes from step S322 to step S342, and determines whether the AC system impedance Zs of the AC system 14 is within the voltage limit region of the R,X,n graph for each harmonic order n.

[0170] On the other hand, if the result of the determination in step S322 is that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit presents the determination results up to this point to the designer as the evaluation result (step S900). Similar to the evaluation result presentation method in 3-1, the processing circuit may, before presenting the evaluation result to the designer in step S900, determine whether the AC system impedance Zs of the AC system 14 is within the voltage limit region of the R,X,n graph for all harmonic orders n, based on the determination result for each harmonic order n. The processing circuit may then add this determination result to the determination result for each harmonic order n and present it to the designer as the evaluation result.

[0171] In this way, in the evaluation result presentation method of 3-2, the processing circuit of the harmonic evaluation device presents the harmonic evaluation results by superimposing the AC system impedance Zs of the AC system 14 onto the R,X,n graph based on the calculation result of the AC system impedance Zs in the third harmonic evaluation method. Then, in the evaluation result presentation method of 3-2, as in the evaluation result presentation method of 3-1, the processing circuit presents, as the result of the harmonic evaluation, an R,X,n graph for each harmonic order n with the AC system impedance Zs superimposed, and a judgment result for each harmonic order n (which may include an R,X,n graph with the AC system impedance Zs including all harmonic orders n, or a judgment result for all harmonic orders n). This allows the designer to visually determine whether the AC system impedance Zs of the AC system 14, when the self-commutated converter 11 under design is connected to the AC system 14, falls within the range of harmonic voltage limits (voltage limit range) by comparing the R,X,n graphs with the AC system impedance Zs of the AC system 14 superimposed and checking the judgment results.

[0172] (11th embodiment) The following describes how the results of the harmonic evaluation are presented in the fourth harmonic evaluation method described above. As described above, in the fourth harmonic evaluation method, the processing circuit calculates the AC system impedance Zs using the fourth harmonic evaluation formula shown in equation (10) above. The processing circuit generates G,B,n graphs for each harmonic order n from the calculation result of the AC system impedance Zs and performs a harmonic evaluation to determine whether the AC system impedance Zs (design value) of the AC system 14 is within the boundary range of the harmonic current limit value. The processing circuit presents the evaluation results (judgment results) of the harmonic evaluation performed for each harmonic order n, or for all harmonic orders n, to the designer.

[0173] Figure 19 is a flowchart showing an example of the processing procedure for presenting the harmonic evaluation result (the result in the fourth harmonic evaluation method) according to the eleventh embodiment. The flowchart in Figure 19 shows the processing procedure (hereinafter referred to as "the evaluation result presentation method of 4-1") when the processing circuit generates an R,X,n graph (see Figure 12) from the calculation result of the AC system impedance Zs and presents the result of the harmonic evaluation of the current in the AC system 14 connected to the self-excited converter 11. In the following description, it is assumed that the calculation results of the AC system impedance Zs for all harmonic orders n have been obtained by the processing procedure of the fourth harmonic evaluation method (see Figure 11).

[0174] When the evaluation result presentation method of 4-1 is started, similar to the evaluation result presentation method of 1-1, the processing circuit first initializes the harmonic order n to n=2 (step S411). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S412).

[0175] If the result of the determination in step S412 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit generates an R,X,n graph from the calculation result of the AC system impedance Zs for the current harmonic order n (step S413). For example, the processing circuit generates an R,X,1 graph (see Figure 12) based on the calculation result of the AC system impedance Zs for each of the current harmonic orders n=1.

[0176] The processing circuit plots the AC system impedance Zs of the AC system 14 connected to the self-excited converter 11 onto the RX plane of the generated R,X,n graph (step S414). The processing circuit may also present the R,X,n graph in this state to the designer, similar to the evaluation result presentation method in 1-1.

[0177] The processing circuit determines whether the AC system impedance Zs of AC system 14 is within the current limit region in the generated R,X,n graph (step S415). For example, the processing circuit determines whether the AC system impedance Zs of AC system 14 is within the current limit region A6 outside the circle T16 in the R,X graph shown in Figure 12.

[0178] If the determination in step S415 determines that the AC system impedance Zs of the AC system 14 is within the current limit range region in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic current limit" (step S416). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of 1-1. The processing circuit then proceeds to step S418.

[0179] On the other hand, if the determination in step S415 determines that the AC system impedance Zs of the AC system 14 is not within the current limit range region in the R,X,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic current limit" (step S417). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of 1-1. The processing circuit then proceeds to step S418.

[0180] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S412 (step S418). As a result, the processing circuit repeats the processes from step S412 to step S417, and determines whether the AC system impedance Zs of the AC system 14 is within the current limiting region of the R,X,n graph for each harmonic order n.

[0181] On the other hand, if the result of the determination in step S412 is that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit presents the determination results up to this point to the designer as the evaluation result (step S900). Similar to the evaluation result presentation method of 1-1, the processing circuit may, before presenting the evaluation result to the designer in step S900, determine whether the AC system impedance Zs of the AC system 14 is within the current limiting range of the R,X,n graph for all harmonic orders n based on the determination result for each harmonic order n. The processing circuit may then add this determination result to the determination result for each harmonic order n and present it to the designer as the evaluation result.

[0182] In this way, in the evaluation result presentation method of 4-1, the processing circuit of the harmonic evaluation device presents the harmonic evaluation results by superimposing the AC system impedance Zs of the AC system 14 onto the R,X,n graph based on the calculation result of the AC system impedance Zs in the fourth harmonic evaluation method. Then, in the evaluation result presentation method of 4-1, similar to the evaluation result presentation method of 1-1, the processing circuit presents, as the result of the harmonic evaluation, an R,X,n graph for each harmonic order n with the AC system impedance Zs superimposed, and a judgment result for each harmonic order n (which may include an R,X,n graph with the AC system impedance Zs including all harmonic orders n, or a judgment result for all harmonic orders n). This allows the designer to visually determine whether the AC system impedance Zs of the AC system 14, when the self-excited converter 11 under design is connected to the AC system 14, falls within the range of the harmonic current limit (within the current limit region) by comparing the R,X,n graphs overlaid with the AC system impedance Zs of the AC system 14 and checking the judgment results.

[0183] (12th embodiment) As described above, in the fourth harmonic evaluation method, the processing circuit calculates the AC system impedance Zs using the fourth harmonic evaluation formula shown in equation (10) above, and further calculates the AC system admittance Ys from the calculation result of the AC system impedance Zs. The processing circuit generates G,B,n graphs for each harmonic order n from the calculation result of the AC system admittance Ys, and performs a harmonic evaluation to determine whether the AC system admittance Ys (design value) of the AC system 14 is within the boundary range of the harmonic current limit value. The processing circuit presents the evaluation results (determination results) obtained by performing the harmonic evaluation for each harmonic order n, or for all harmonic orders n, to the designer.

[0184] Figure 20 is a flowchart showing an example of the processing procedure for presenting the harmonic evaluation determination results (determination results in the fourth harmonic evaluation method) according to the twelfth embodiment. The flowchart in Figure 20 shows the processing procedure (hereinafter referred to as "the evaluation result presentation method of 4-2") when the processing circuit generates G, B, and n graphs from the calculation results of the AC system admittance Ys and presents the results of the harmonic evaluation of the voltage in the AC system 14 connected to the self-excited converter 11. In the following description, it is assumed that the calculation results of the AC system admittance Ys for all harmonic orders n have been obtained by the processing procedure of the fourth harmonic evaluation method (see Figure 11).

[0185] When the evaluation result presentation method of 4-2 is started, similar to the evaluation result presentation method of 4-1, the processing circuit first initializes the harmonic order n to n=2 (step S421). Then, the processing circuit determines whether the current harmonic order n is less than or equal to the maximum harmonic order N (step S422).

[0186] If the result of the determination in step S422 is that the current harmonic order n is less than or equal to the maximum harmonic order N, the processing circuit generates a G, B, n graph from the calculation result of the AC system admittance Ys for the current harmonic order n (step S423).

[0187] The processing circuit plots the AC system admittance Ys of the AC system 14 connected to the self-excited converter 11 onto the G,B plane of the generated G,B,n graph (step S424). The processing circuit may also present the G,B,n graph in this state to the designer, similar to the evaluation result presentation method in 4-1.

[0188] The processing circuit determines whether the calculated result of the AC system impedance Zs in the generated G,B,n graph includes the origin (step S425). If the determination in step S425 determines that the calculated result of the AC system impedance Zs includes the origin, the processing circuit proceeds to step S430. On the other hand, if the determination in step S425 determines that the calculated result of the AC system impedance Zs does not include the origin, the processing circuit proceeds to step S440.

[0189] In step S425, if it is determined that the calculation result of the AC system impedance Zs includes the origin, the processing circuit determines whether or not the AC system admittance Ys of the AC system 14 is within the current limit region in the generated G,B,n graph (step S430).

[0190] If the determination in step S430 determines that the AC system admittance Ys of AC system 14 is within the current limit range region in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic current limit" (step S431). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the first and second steps. The processing circuit then proceeds to step S450.

[0191] On the other hand, if the determination in step S430 determines that the AC system admittance Ys of the AC system 14 is not within the current limit range region in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic current limit" (step S432). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the 1-2. Then, the processing circuit proceeds to step S450.

[0192] On the other hand, in step S425, if it is determined that the calculation result of the AC system impedance Zs does not include the origin, the processing circuit determines whether or not the AC system admittance Ys of the AC system 14 is within the current limit region in the generated G,B,n graph (step S440).

[0193] If the determination in step S440 determines that the AC system admittance Ys of AC system 14 is within the current limit range region in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "within the harmonic current limit" (step S441). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the first and second steps. The processing circuit then proceeds to step S450.

[0194] On the other hand, if the determination in step S440 determines that the AC system admittance Ys of the AC system 14 is not within the current limit range region in the G,B,n graph, the processing circuit sets the determination result for the current harmonic order n to "outside the harmonic current limit" (step S442). The processing circuit may store the determination result for the current harmonic order n in, for example, the memory (storage device) of the harmonic evaluation device, similar to the evaluation result presentation method of the 1st-2. Then, the processing circuit proceeds to step S450.

[0195] Subsequently, the processing circuit adds "1" to the harmonic order n (n=n+1) and returns the process to step S422 (step S450). As a result, the processing circuit repeats the processes from step S422 to step S442, and determines whether the AC system admittance Ys of the AC system 14 is within the current limiting range of the G,B,n graph for each harmonic order n.

[0196] On the other hand, if the result of the determination in step S422 is that the current harmonic order n is not less than or equal to the maximum harmonic order N (i.e., the current harmonic order n is greater than the maximum harmonic order N), the processing circuit presents the determination results up to this point to the designer as the evaluation result (step S900). Similar to the evaluation result presentation method in 4-1, the processing circuit may, before presenting the evaluation result to the designer in step S900, determine whether the AC system admittance Ys of the AC system 14 is within the current limiting range of the G,B,n graph for all harmonic orders n based on the determination results for each harmonic order n. The processing circuit may then add this determination result to the determination results for each harmonic order n and present it to the designer as the evaluation result.

[0197] In this way, in the evaluation result presentation method of 4-2, the processing circuit of the harmonic evaluation device presents the harmonic evaluation results by superimposing the AC system admittance Ys of AC system 14 onto the G,B,n graph based on the calculation result of AC system admittance Ys in the fourth harmonic evaluation method. Then, in the evaluation result presentation method of 4-2, as in the evaluation result presentation method of 4-1, the processing circuit presents as the result of the harmonic evaluation the G,B,n graph of each harmonic order n with the AC system admittance Ys superimposed, and the judgment result for each harmonic order n (which may include the G,B,n graph of AC system admittance Ys including all harmonic orders n, or the judgment result for all harmonic orders n). This allows the designer to visually determine whether the AC system admittance Ys of the AC system 14, when the self-commutated converter 11 under design is connected to the AC system 14, falls within the range of harmonic current limits (within the current limit range) by comparing the G, B, and n graphs overlaid with the AC system admittance Ys of the AC system 14 and checking the judgment results.

[0198] [Hardware configuration of the harmonic evaluation device] Figure 21 shows an example of the hardware configuration of a harmonic evaluation device that performs the harmonic evaluation method according to the embodiment. As shown in the figure, the harmonic evaluation device 100 has a configuration in which a communication controller 100-1, a CPU 100-2, RAM 100-3 used as working memory, ROM 100-4 for storing boot programs and the like, a storage device 100-5 such as flash memory or an HDD, a drive device 100-6, etc. are interconnected by an internal bus or a dedicated communication line. The communication controller 100-1 communicates with components other than the harmonic evaluation device 100. The storage device 100-5 stores a program 100-5a that is executed by the CPU 100-2. This program is loaded into RAM 100-3 by a DMA (Direct Memory Access) controller (not shown) and the like, and executed by the CPU 100-2. This enables the harmonic evaluation device 100, more specifically, to realize some or all of the functions for performing harmonic evaluation, such as the first to fourth harmonic evaluation methods and the evaluation result presentation methods 1-1 to 4-2 described above.

[0199] CPU100-2 is an example of a "computer," "calculation unit," "derivation unit," and "decision unit."

[0200] As described above, according to the harmonic evaluation method of each embodiment, the harmonic evaluation formula for evaluating the harmonics of the voltage generated at the grid connection point 15 between the self-excited converter 11 constituting the power conversion system 1 and the AC grid 14, and the current flowing out into the AC grid (in other words, AC power), is derived from the equivalent circuit of the power conversion system 1. Then, in the harmonic evaluation method of each embodiment, the processing circuit of the harmonic evaluation device uses the grid connection point voltage ΔV or grid outflow current ΔI included in the harmonic evaluation formula as the harmonic limit value of the AC power (AC voltage or AC current) generated at the grid connection point 15, and derives the boundary line of the harmonic limit value that the filter impedance Zf and filter admittance Yf of the AC filter 16 connected to the self-excited converter 11, and the AC grid impedance Zs and AC grid admittance Ys of the AC grid 14 to which the self-excited converter 11 is connected, for each harmonic order n. In the harmonic evaluation method of each embodiment, the processing circuit of the harmonic evaluation device performs harmonic evaluation of the filter impedance Zf and filter admittance Yf of the AC filter 16, and the AC system impedance Zs and AC system admittance Ys of the AC system 14, based on the derived harmonic limit boundary values ​​for each harmonic order n. At this time, in the harmonic evaluation method of each embodiment, the processing circuit of the harmonic evaluation device generates a G,B,n graph, which represents the boundary values ​​of the derived harmonic limit values ​​for each harmonic order n on the GB plane (admittance plane) which shows the relationship between the real conductance G and the imaginary susceptance B of admittance, and an R,X,n graph, which represents the relationship between the real resistance R and the imaginary reactance X of impedance. In the harmonic evaluation method of each embodiment, the processing circuit of the harmonic evaluation device performs harmonic evaluation by determining, based on the generated G,B,n graph and R,X,n graph, whether the values ​​that the filter impedance Zf and filter admittance Yf of the AC filter 16 and the AC system impedance Zs and AC system admittance Ys of the AC system 14 can take are within the boundary range of the harmonic regulation value, for each harmonic order n or for all harmonic orders n.In each embodiment of the harmonic evaluation method, the processing circuit of the harmonic evaluation device displays the generated G,B,n graph, R,X,n graph, and the evaluation results (judgment results) of the harmonic evaluation on, for example, a display device of the harmonic evaluation device or a display device connected to the harmonic evaluation device, thereby presenting this information to the designer who designed the power system configuration on the transmission side of the power conversion system 1, who instructed the execution of the harmonic evaluation method of each embodiment. As a result, the designer using the harmonic evaluation method of each embodiment can visually determine whether the configuration of the power system on the transmission side that they are designing falls within the harmonic regulation range by checking the respective graphs and evaluation results (judgment results) displayed on the display device. In other words, designers using the harmonic evaluation method of each embodiment can visually evaluate whether the characteristics of the AC filter 16 connected to the self-excited converter 11 of the power transmission system being designed satisfy the harmonic regulation values, and confirm the characteristics and conditions of the AC system 14 to which the designed AC filter 16 can be applied, on a complex plane such as the GB plane (admittance plane) or the RX plane (impedance plane).

[0201] In the embodiments described above, the processing circuit of the harmonic evaluation device calculates the admittance Y and impedance Z for all harmonic orders n from harmonic order n=2 to the maximum harmonic order N using a harmonic evaluation formula, and then generates G,B,n graphs and R,X,n graphs for all harmonic orders n from harmonic order n=2 to the maximum harmonic order N based on the calculation results for each harmonic order n, and determines whether or not it is within the harmonic regulation limit. However, the processing procedure of the processing circuit in each embodiment is not limited to the processing procedure of the embodiments described above. For example, the processing circuit may first calculate the admittance Y and impedance Z at the current harmonic order n using a harmonic evaluation formula, then generate a G,B,n graph and an R,X,n graph for the current harmonic order n, determine whether it is within the harmonic limit, and then perform the following processing steps: calculate the admittance Y and impedance Z for the next harmonic order n, generate the G,B,n graph and R,X,n graph, and determine whether it is within the harmonic limit. In other words, the processing circuit may perform a series of processing steps—calculating the admittance Y and impedance Z, generating the G,B,n graph and R,X,n graph, and determining whether it is within the harmonic limit—for each harmonic order n. In this case, the processing procedure of the processing circuit can be easily considered based on the description of the processing procedure of the processing circuit in the embodiment described above. Therefore, a detailed explanation of the processing procedure when the processing circuit performs a series of processing steps—calculating admittance Y and impedance Z, generating G,B,n graphs and R,X,n graphs, and determining whether or not the harmonic limit is within the limit—for each harmonic order n will be omitted.

[0202] In the embodiments described above, an example was explained in which the configuration of the power conversion system 1 is as shown in Figure 1, and its equivalent circuit is as shown in Figure 2. However, the configuration of the power conversion system is not limited to the configuration shown in Figure 1, and the equivalent circuit may also have a different configuration from the one shown in Figure 2, depending on the configuration of the power conversion system. For example, in the configuration of the power conversion system 1 shown in Figure 1, the transformer 12 for the converter may be replaced with a reactor, or the interconnection transformer 13 may be omitted, and in accordance with this configuration of the power conversion system, the equivalent circuit may also have a different configuration from the one shown in Figure 2. In this case, the harmonic evaluation formula used for harmonic evaluation will also be different from the respective harmonic evaluation formulas in the embodiments described above, and will be a harmonic evaluation formula corresponding to the configuration of the power conversion system and its equivalent circuit. In this case, the harmonic evaluation formula should be equivalent to the respective harmonic evaluation formulas in the embodiments described above. Furthermore, the processing procedure in the processing circuit should also be equivalent to the processing procedure in the embodiments described above. Therefore, detailed explanations regarding harmonic evaluation formulas for different power conversion system configurations and their equivalent circuit configurations, as well as processing procedures for processing circuits, will be omitted.

[0203] According to at least one embodiment described above, a computer (for example, a processing circuit in a harmonic evaluation device) evaluates the harmonics of the AC voltage and / or AC current in the AC power generated at the grid connection point (15) between the power converter and the AC system, using a predetermined harmonic evaluation formula based on the equivalent circuit of a power conversion system (1) that supplies AC power from a self-excited power converter (11) to an AC system (14), wherein the harmonic evaluation formula includes either a grid connection point voltage (ΔV) representing the AC voltage generated at the grid connection point and a grid outflow current (ΔI) representing the AC current flowing from the grid connection point toward the AC system, By substituting the harmonic regulation values, the characteristic values ​​of the components of the power conversion system (e.g., AC filters) represented in the equivalent circuit are calculated. Based on the graphs (G,B,n graphs or R,X,n graphs) showing the calculation results of the characteristic values ​​in the complex plane (GB plane or RX plane), the boundary lines of the harmonic regulation values ​​that the characteristic values ​​of the components can take are derived. By determining whether the characteristic values ​​of the components fall within the regulation range based on the derived boundary lines, it is possible to evaluate whether the designed AC filters satisfy the harmonic regulation values ​​when designing AC filters connected to self-commutated power converters placed in the power transmission path of the power conversion system.

[0204] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of Symbols]

[0205] 1... Power conversion system, 11... Self-excited converter, 12... Transformer for converter, 13... Interconnection transformer, 14... AC system, 15... Interconnection point, 16... AC filter, 100... Harmonic evaluation device

Claims

1. Computers A harmonic evaluation method for evaluating harmonics of AC voltage and / or AC current in AC power generated at the grid interconnection point between a power converter and an AC grid, using a predetermined harmonic evaluation formula based on the equivalent circuit of a power conversion system that supplies AC power from a self-commutated power converter to an AC grid, The characteristic values ​​of the components of the power conversion system represented in the equivalent circuit are calculated by substituting the corresponding harmonic regulation value into either the grid connection point voltage, which represents the AC voltage generated at the grid connection point, or the grid outflow current, which represents the AC current flowing from the grid connection point toward the AC system, as included in the harmonic evaluation formula. Based on a graph showing the calculation results of the characteristic values ​​in the complex plane, the boundary line of the harmonic regulation value that the characteristic values ​​of the component can take is derived. The characteristic value of the aforementioned component is determined to be within the regulatory value range based on the derived boundary line. Methods for evaluating harmonics.

2. The aforementioned harmonic evaluation formula is a harmonic evaluation formula for determining the filter admittance, which represents the characteristic value of the AC filter connected to the power converter, based on the harmonic voltage of the AC voltage supplied by the power converter as represented in the equivalent circuit, the transformer reactance representing the characteristic value of the transformer connected to the power converter, the AC system impedance representing the characteristic value of the AC system, and the system interconnection point voltage. The aforementioned computer, The harmonic voltage limit value, which is the harmonic limit value corresponding to the AC voltage, is substituted into the grid connection point voltage to calculate the filter admittance. Based on the admittance graph showing the calculation results of the filter admittance on the admittance plane, the boundary line of the harmonic voltage limit that the filter admittance can take is derived. The filter admittance is determined to be within the voltage limit range based on the derived boundary line. The harmonic evaluation method according to claim 1.

3. The aforementioned computer, By taking the reciprocal of the calculation result of the filter admittance, the filter impedance representing the characteristic value of the AC filter is calculated. Based on the impedance graph showing the calculated filter impedance on the impedance plane, the boundary line of the harmonic voltage limit that the filter impedance can take is derived. Depending on whether the calculated result of the filter admittance includes the origin of the impedance graph, the region within the voltage limit value based on the derived boundary line is switched. It is determined whether the filter impedance is within the switched voltage limit range. The harmonic evaluation method according to claim 2.

4. The aforementioned harmonic evaluation formula is a harmonic evaluation formula for determining the filter admittance, which represents the characteristic value of the AC filter connected to the power converter, based on the harmonic voltage of the AC voltage supplied by the power converter as represented in the equivalent circuit, the transformer reactance representing the characteristic value of the transformer connected to the power converter, the AC system impedance representing the characteristic value of the AC system, and the system outflow current. The aforementioned computer, The harmonic current limit value, which is the harmonic limit value corresponding to the AC current, is substituted into the system outflow current to calculate the filter admittance. Based on the admittance graph showing the calculation results of the filter admittance on the admittance plane, the boundary line of the harmonic current limit value that the filter admittance can take is derived. The filter admittance is determined to be within the current limit range based on the derived boundary line. The harmonic evaluation method according to claim 1.

5. The aforementioned computer, By taking the reciprocal of the calculation result of the filter admittance, the filter impedance representing the characteristic value of the AC filter is calculated. Based on the impedance graph showing the calculated filter impedance on the impedance plane, the boundary line of the harmonic current limit that the filter impedance can take is derived. Depending on whether the calculated result of the filter admittance includes the origin of the impedance graph, the region within the current limit value based on the derived boundary line is switched. It is determined whether the filter impedance is within the switched current limit range. The harmonic evaluation method according to claim 4.

6. The aforementioned harmonic evaluation formula is a harmonic evaluation formula for determining the AC system admittance, which represents the characteristic value of the AC system, based on the harmonic voltage of the AC voltage supplied by the power converter as represented in the equivalent circuit, the transformer reactance representing the characteristic value of the transformer connected to the power converter, the filter impedance representing the characteristic value of the AC filter connected to the power converter, and the system interconnection point voltage. The aforementioned computer, The harmonic voltage limit value, which is the harmonic limit value corresponding to the AC voltage, is substituted into the power grid connection point voltage to calculate the AC system admittance. Based on the admittance graph showing the calculation results of the AC system admittance on the admittance plane, the boundary line of the harmonic voltage regulation value that the AC system admittance can take is derived. The AC system admittance is determined to be within the voltage limit range based on the derived boundary line. The harmonic evaluation method according to claim 1.

7. The aforementioned computer, By taking the reciprocal of the calculation result of the AC system admittance, the AC system impedance, which represents the characteristic value of the AC system, is calculated. Based on the impedance graph showing the calculation results of the AC system impedance on the impedance plane, the boundary line of the harmonic voltage limit that the AC system impedance can take is derived. Depending on whether the calculation result of the AC system admittance includes the origin of the impedance graph, the region within the voltage limit value based on the derived boundary line is switched. It is determined whether the AC system impedance is within the switched voltage limit range. The harmonic evaluation method according to claim 6.

8. The aforementioned harmonic evaluation formula is a harmonic evaluation formula for determining the AC system impedance, which represents the characteristic value of the AC system, based on the harmonic voltage of the AC voltage supplied by the power converter represented in the equivalent circuit, the transformer reactance representing the characteristic value of the transformer connected to the power converter, the filter impedance representing the characteristic value of the AC filter connected to the power converter, and the system outflow current. The aforementioned computer, The harmonic current limit value, which is the harmonic limit value corresponding to the AC current, is substituted into the system outflow current to calculate the AC system impedance. Based on the impedance graph showing the calculation results of the AC system impedance on the impedance plane, the boundary line of the harmonic current limit value that the AC system impedance can take is derived. The AC system impedance is determined to be within the current limit range based on the derived boundary line. The harmonic evaluation method according to claim 1.

9. The aforementioned computer, The AC system admittance, which represents the characteristic value of the AC system, is calculated by taking the reciprocal of the calculation result of the AC system impedance. Based on the admittance graph showing the calculation results of the AC system admittance on the admittance plane, the boundary line of the harmonic current limit value that the AC system admittance can take is derived. Depending on whether the calculation result of the AC system impedance includes the origin of the admittance graph, the region within the current limit value based on the derived boundary line is switched. The AC system admittance is determined to be within the switched current limit range. The harmonic evaluation method according to claim 8.

10. The aforementioned computer, For each harmonic order of the AC voltage or AC current, the characteristic values ​​of the components of the power conversion system represented in the equivalent circuit are calculated. Based on the graphs of the calculation results of the characteristic values ​​for each harmonic order of the AC voltage or AC current shown in the complex plane, the boundary line of the harmonic limit that the characteristic values ​​of the component can take is derived for each harmonic order of the AC voltage or AC current. For each harmonic order of the AC voltage or AC current, it is determined whether the characteristic value of the component falls within the range of the regulatory value. A harmonic evaluation method according to any one of claims 1 to 9.

11. The aforementioned computer, Based on the determination result of whether the characteristic value of the component, determined for each harmonic order of the AC voltage or AC current, falls within the regulatory limit range, it is determined whether the characteristic values ​​of the component for all harmonics of the AC voltage or AC current fall within the regulatory limit range. The harmonic evaluation method according to claim 10.

12. The aforementioned computer, The graph shows the calculation results of the characteristic values ​​for each harmonic order of the AC voltage or AC current in the complex plane, A graph showing the calculation results of the characteristic value, which collectively represents all orders of harmonics of the AC voltage or AC current, on the complex plane, The determination result of whether the characteristic value of the component determined for each harmonic order of the AC voltage or AC current falls within the range of the regulatory value, The determination result of whether the characteristic values ​​of the component determined for all harmonics of the AC voltage or AC current fall within the range of the regulatory value, Display one or more of the following on the display device: The harmonic evaluation method according to claim 11.

13. A harmonic evaluation device for evaluating harmonics of AC voltage and / or AC current in AC power generated at the grid interconnection point between a power converter and the AC system, using a predetermined harmonic evaluation formula based on the equivalent circuit of a power conversion system that supplies AC power to an AC system from a self-commutated power converter, A calculation unit calculates characteristic values ​​of the components of the power conversion system represented in the equivalent circuit by substituting the corresponding harmonic regulation value into either the grid connection point voltage, which represents the AC voltage generated at the grid connection point, or the grid outflow current, which represents the AC current flowing from the grid connection point toward the AC system, both of which are included in the harmonic evaluation formula. A derivation unit that derives the boundary line of the harmonic regulation value that the characteristic value of the component can take, based on a graph showing the calculation results of the characteristic value in the complex plane, A determination unit that determines whether the characteristic value of the aforementioned component is within the regulatory value range based on the derived boundary line, A harmonic evaluation device equipped with [a specific feature].

14. On the computer, A program for evaluating the harmonics of the AC voltage and / or AC current in the AC power generated at the grid connection point between the power converter and the AC system, using a predetermined harmonic evaluation formula based on the equivalent circuit of a power conversion system that supplies AC power from a self-commutated power converter to an AC system, The characteristic values ​​of the components of the power conversion system represented in the equivalent circuit are calculated by substituting the corresponding harmonic regulation value into either the grid connection point voltage, which represents the AC voltage generated at the grid connection point, or the grid outflow current, which represents the AC current flowing from the grid connection point toward the AC system, as included in the harmonic evaluation formula. Based on a graph showing the calculation results of the characteristic values ​​in the complex plane, the boundary line of the harmonic regulation value that the characteristic values ​​of the component can take is derived. The system determines whether the characteristic value of the aforementioned component falls within the regulatory value range based on the derived boundary line. program.

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