Optical elements, optical instruments, and electronic devices
By bonding dielectric multilayer films with an adhesive and using spacers, the optical elements in XR devices achieve enhanced mechanical stability and light efficiency, addressing delamination issues in multilayer films.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SEMICON ENERGY LAB CO LTD
- Filing Date
- 2025-11-11
- Publication Date
- 2026-05-26
AI Technical Summary
Existing optical elements in XR devices, such as goggles, face challenges with delamination and cracking of multilayer films due to film stress, leading to deteriorated optical properties and mechanical instability.
A configuration of first and second dielectric multilayer films bonded with an adhesive, each with specific refractive index layers, and optionally using spherical spacers to maintain uniform gaps, reducing film stress and preventing delamination.
The solution provides a high-performance optical element with improved mechanical stability and light utilization efficiency, suitable for thin and lightweight electronic devices.
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Abstract
Description
Technical Field
[0001] One aspect of the present invention relates to optical elements, optical devices, and electronic devices.
[0002] Note that one aspect of the present invention is not limited to the above technical field. The technical field of one aspect of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Or, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specifically, examples of the technical field of one aspect of the present invention disclosed in this specification include semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, lighting devices, power storage devices, storage devices, imaging devices, their operating methods, or their manufacturing methods.
[0003] Note that in this specification and the like, the semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. A transistor and a semiconductor circuit are one aspect of a semiconductor device. Also, a storage device, a display device, an imaging device, and an electronic device may have a semiconductor device.
Background Art
[0004] As electronic devices for XR (a general term for Extended Reality, Virtual Reality (VR), Augmented Reality (AR), Mixed Reality (MR), etc.), goggle-type devices and glasses-type devices have been developed.
[0005] Also, as display panels used in these electronic devices, typically, display devices including liquid crystal elements, display devices including organic EL (Electro Luminescence) elements or light-emitting diodes (LEDs: Light Emitting Diodes) can be mentioned.
[0006] Display devices equipped with organic EL elements do not require a backlight, which is necessary for liquid crystal displays, thus enabling the realization of thin, lightweight, high-contrast, and low-power display devices. For example, an example of an electronic device for VR using organic EL elements, and an example of an optical device used in said electronic device, are described in Patent Document 1. [Prior art documents] [Patent Documents]
[0007] [Patent Document 1] WO2024 / 116029 [Non-patent literature]
[0008] [Non-Patent Document 1] Takashi Koida, "High-Mobility Transparent Conductive Film," National Institute of Advanced Industrial Science and Technology (AIST), AIST Photovoltaic Power Generation Research Results Presentation 2019, Internet<URL:https: / / unit.aist.go.jp / rpd-envene / PV / ja / results / 2019 / oral / T13.pdf> [Overview of the project] [Problems that the invention aims to solve]
[0009] XR devices, such as goggles, are desirable to be small and thin in order to improve portability and wearability. Therefore, such electronic devices utilize thin reflective and refractive optical systems designed to have a short focal length.
[0010] Reflective and refractive optical systems utilize half-mirrors and polarizing beam splitters with optical thin films. These optical thin films can be metal thin films or dielectric multilayer films, and by adjusting the material and film thickness, transmittance, reflectance, or polarization state can be controlled.
[0011] For example, if you want to achieve desired optical properties at an interface between two optical elements, you can deposit an optical thin film on one of the optical elements and then bond that optical thin film to the other optical element. If the optical thin film is a multilayer film, it is possible to appropriately set the material, number of layers, film thickness, etc., to obtain the desired optical properties through calculations using optical simulations.
[0012] On the other hand, theoretically ideal multilayer films may not have sufficient adhesion to optical elements due to factors such as film stress. Therefore, the mechanical strength of the bond may not be adequately maintained. Furthermore, if delamination or cracking occurs in the multilayer film, the optical properties will deteriorate significantly.
[0013] Therefore, one aspect of the present invention aims to provide a high-performance optical element. Alternatively, it aims to provide an optical element that functions as a high-performance half-mirror. Alternatively, it aims to provide an optical element having a multilayer film that is less prone to peeling. Alternatively, it aims to provide an optical device having the above-mentioned optical element. Alternatively, it aims to provide a thin optical device with high light utilization efficiency. Alternatively, it aims to provide a small electronic device having the above-mentioned optical device. Alternatively, it aims to provide an electronic device with low power consumption. Alternatively, it aims to provide a novel electronic device.
[0014] Furthermore, the description of these problems does not preclude the existence of other problems. Moreover, one aspect of the present invention does not need to solve all of these problems. Other problems will become clear from the description in the specification, drawings, and claims, and it is possible to extract other problems from the description in the specification, drawings, and claims. [Means for solving the problem]
[0015] One aspect of the present invention relates to a high-performance optical element and an optical device having the optical element.
[0016] One aspect of the present invention comprises a first multilayer film in contact with a first surface of a first element and a second multilayer film in contact with a second surface of a second element, with an adhesive in contact with both the first and second multilayer films, wherein the first multilayer film has a lamination of a first layer and a second layer having a different refractive index from the first layer, and the second multilayer film has a lamination of a third layer and a fourth layer having a different refractive index from the third layer, and each of the first element, the first multilayer film, the adhesive, the second element, and the second multilayer film is an optical element that is transparent to visible light.
[0017] The first and second elements can each be lenses formed from a resin material.
[0018] The first surface may have a concave curve, and the second surface may have a convex curve.
[0019] The thickness of the adhesive is preferably 0.1 μm or more and 1 μm or less. Furthermore, a spherical spacer may be provided between the first multilayer film and the second multilayer film.
[0020] The first and second multilayer films can each act as beam splitters with different optical properties.
[0021] When the reflectance of the first multilayer film is a and the reflectance of the second multilayer film is b, it is preferable that the relationship b = (1-2a) / (2-3a) is satisfied.
[0022] Preferably, the first and third layers are made of the same material, and the second and fourth layers are made of the same material.
[0023] The first and third layers preferably have regions that come into contact with the adhesive. Alternatively, the first layer preferably has a region that comes into contact with the first surface, and the third layer preferably has a region that comes into contact with the second surface.
[0024] Another aspect of the present invention is an optical device having the above-mentioned optical element as a half-mirror, and having a configuration in which a linear polarizer, a first phase difference plate, a half-mirror, a second phase difference plate, and a reflective polarizer are arranged in this order.
[0025] Another aspect of the present invention is an optical device having the above-mentioned optical element as a half-mirror, and having a configuration in which a first reflective polarizing plate, a first phase difference plate, a half-mirror, a second phase difference plate, and a second reflective polarizing plate are arranged in this order.
[0026] An electronic device comprising the above-mentioned optical device and a display device, wherein the display device has a light-emitting element and a transistor connected to the light-emitting element, and the transistor has a metal oxide in its channel-forming region, is also one embodiment of the present invention. The metal oxide is preferably indium oxide. [Effects of the Invention]
[0027] According to one aspect of the present invention, a high-performance optical element can be provided. Alternatively, an optical element that functions as a high-performance half-mirror can be provided. Alternatively, an optical element having a multilayer film that is resistant to peeling can be provided. Alternatively, an optical device having the above optical element can be provided. Alternatively, a thin optical device with high light utilization efficiency can be provided. Alternatively, a small electronic device having the above optical device can be provided. Alternatively, an electronic device with low power consumption can be provided. Alternatively, a novel electronic device can be provided.
[0028] Furthermore, the description of these effects does not preclude the existence of other effects. One aspect of the present invention does not necessarily have to possess all of these effects. Other effects can be extracted from the description, drawings, and claims. [Brief explanation of the drawing]
[0029] [Figure 1] Figure 1 is a diagram illustrating an optical element. [Figure 2]Figures 2(A) to 2(C) illustrate the stress in multilayer films. [Figure 3] Figures 3(A) and 3(B) illustrate the spectral transmittance of multilayer films. [Figure 4] Figures 4(A) and 4(B) illustrate the optical paths of a reflecting and refraction optical system. [Figure 5] Figure 5 is a diagram illustrating a reflective / refracting optical system. [Figure 6] Figures 6(A) through 6(H) illustrate the optical elements of a reflecting and refractive optical system. [Figure 7] Figures 7(A) through 7(G) illustrate the optical elements of a reflecting and refraction optical system. [Figure 8] Figure 8 is a diagram illustrating a reflective / refracting optical system. [Figure 9] Figures 9(A) to 9(C) illustrate the configuration and optical path of a half-mirror. [Figure 10] Figures 10(A) and 10(B) illustrate the pixels of the display panel. [Figure 11] Figures 11(A) through 11(E) illustrate the display panel. [Figure 12] Figures 12(A) and 12(B) illustrate the eyeglass-type device. [Figure 13] Figures 13(A) and 13(B) illustrate examples of display panel configurations. [Figure 14] Figure 14 illustrates an example of the display panel configuration. [Figure 15] Figure 15 illustrates an example of the display panel configuration. [Figure 16] Figure 16 illustrates an example of the display panel configuration. [Figure 17] Figure 17 illustrates an example of the display panel configuration. [Figure 18] Figure 18 illustrates an example of the display panel configuration. [Figure 19] Figure 19 illustrates an example of the display panel configuration. [Figure 20]Figures 20(A) and 20(B) illustrate transistors. [Figure 21] Figures 21(A) and 21(B) illustrate the carrier concentration dependence of hole mobility. Figure 21(C) is a cross-sectional view illustrating an indium oxide film. [Modes for carrying out the invention]
[0030] Embodiments will be described in detail with reference to the drawings. However, it will be readily apparent to those skilled in the art that the present invention is not limited to the following description, and that its form and details can be modified in various ways without departing from the spirit and scope of the invention. Therefore, the present invention is not to be interpreted as being limited to the descriptions of the embodiments shown below. In the configuration of the invention described below, the same reference numerals are used in common between different drawings for the same parts or parts having similar functions, and repeated descriptions may be omitted. In addition, hatching of the same elements constituting the figures may be omitted or changed as appropriate between different drawings.
[0031] Furthermore, even if an element is shown as a single element in a circuit diagram, it may be composed of multiple elements as long as there is no functional disadvantage. For example, multiple transistors that act as switches may be connected in series or parallel. Also, a capacitor may be divided and placed in multiple locations.
[0032] Furthermore, a single conductor may have multiple functions, such as wiring, electrodes, and terminals, and in this specification, multiple designations may be used for the same element. Also, even if elements are shown as directly connected in a circuit diagram, they may actually be connected via one or more conductors, and in this specification, such configurations are included in the category of direct connection.
[0033] In this specification, "connection" includes, for example, "electrical connection." The term "electrical connection" is sometimes used to describe the connection relationships of circuit elements as physical objects. Furthermore, "electrical connection" includes both "direct connection" and "indirect connection." "A and B are directly connected" means that A and B are connected without the use of circuit elements (e.g., transistors, switches, etc.; however, wiring is not considered a circuit element). On the other hand, "A and B are indirectly connected" means that A and B are connected through one or more circuit elements.
[0034] For example, assuming a circuit containing A and B is in operation, if there is a timing during the circuit's operation when electrical signals are exchanged or potential interactions occur between A and B, then it can be defined that "A and B are indirectly connected" as physical objects. Furthermore, even if there is a timing during the circuit's operation when no electrical signals are exchanged or potential interactions occur between A and B, if there is a timing during the circuit's operation when electrical signals are exchanged or potential interactions occur between A and B, then it can be defined that "A and B are indirectly connected."
[0035] An example of a case where "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors. On the other hand, an example of a case where "A and B are not indirectly connected" is when an insulator is interposed in the path from A to B. Specifically, this includes cases where a capacitive element is connected between A and B, or where a transistor gate insulating film is interposed between A and B. Therefore, it cannot be said that "the gate (A) of a transistor and the source or drain (B) of a transistor are indirectly connected."
[0036] Another example of a situation where it cannot be said that "A and B are indirectly connected" is when multiple transistors are connected via source and drain in the path from A to B, and a constant potential V is supplied from a power supply, GND, etc., to the nodes between the transistors.
[0037] (Embodiment 1) This embodiment describes an optical element, optical instrument, and electronic device according to one aspect of the present invention.
[0038] One aspect of the present invention is a high-performance optical element. The optical element has a first dielectric multilayer film provided in contact with a first optical element, and a second dielectric multilayer film provided in contact with a second optical element, and the first dielectric multilayer film and the second dielectric multilayer film are bonded together with an adhesive.
[0039] In reflective and refractive optical systems used in VR devices and other applications, half-mirrors are used to fold back the optical path. While metal films or dielectric multilayer films can be used as half-mirrors, using dielectric multilayer films, which absorb less visible light, is preferable to improve the efficiency of light utilization.
[0040] In dielectric multilayer films, desired optical properties can be obtained by alternately stacking materials with different refractive indices, and generally, increasing the number of layers improves the optical properties. However, as the total thickness of the dielectric multilayer film increases, delamination becomes more likely due to film stress.
[0041] Therefore, in one aspect of the present invention, a first dielectric multilayer film with a small number of layers and low stress, provided on one of two optical elements (optical elements such as lenses), and a second dielectric multilayer film with a small number of layers and low stress, provided on the other optical element, are bonded together via an adhesive. By adopting this configuration, it is possible to form an optical element having a dielectric multilayer film with a large number of layers, excellent optical properties, and resistance to film peeling.
[0042] Furthermore, one embodiment of the present invention is an optical instrument having a configuration in which multiple elements (optical components) are combined. When this configuration is housed in a casing, it is simply called a lens. Alternatively, due to its thin shape, it may be called a pancake lens.
[0043] Figure 1 is a cross-sectional view illustrating an optical element according to one embodiment of the present invention, with a portion shown enlarged. The optical element 50 can be used in a reflective / refracting optical system of a VR device or the like, and has an optical element 52, an optical element 53, and a half mirror 34. Depending on the function of the optical device into which the optical element 50 is incorporated, the optical elements 52 and 53 can function as lenses or as supports for the half mirror 34.
[0044] The half-mirror 34 has a structure in which dielectric multilayer films 34a and dielectric multilayer films 34b are bonded together via an adhesive 34c. Dielectric multilayer film 34a can be configured by alternately stacking dielectric films 34e and 34f with different refractive indices. Dielectric multilayer film 34b can be configured by alternately stacking dielectric films 34g and 34h with different refractive indices. Note that the configuration of alternately stacking two types of dielectric films is just one example, and a configuration of stacking three or more types of dielectric films can also be used. Furthermore, the dielectric films constituting dielectric multilayer films 34a and dielectric multilayer films 34b are set to an appropriate thickness for each layer.
[0045] Materials that can be used as dielectric films 34e, 34f, 34g, and 34h include, for example, low refractive index materials such as silicon oxide, silicon oxide nitride, magnesium fluoride, lithium fluoride, or sodium fluoride. High refractive index materials include titanium oxide, niobium oxide, silicon nitride, aluminum oxide, zirconium oxide, or hafnium oxide.
[0046] Generally, when a dielectric multilayer film, such as a half-mirror, is sandwiched between a pair of optical elements, the dielectric multilayer film is placed on one optical element, and this dielectric multilayer film and the other optical element are bonded together using an adhesive. While highly flat surfaces can sometimes be joined using optical contact (direct bonding) without adhesive, adhesives are used when surfaces with curvature are difficult to precisely match in terms of curvature.
[0047] Here, the dielectric multilayer film can be appropriately configured in terms of material, number of layers, film thickness, etc., to obtain the desired optical properties through calculations using optical simulations. In many cases, increasing the number of layers can improve the optical properties.
[0048] However, since optical simulations do not take film stress into account, fabricating a theoretically ideal multilayer film is difficult. Figures 2(A) to 2(C) illustrate the film stress of a dielectric multilayer film 33 deposited on a substrate 55. Here, the substrate 55 is assumed to be sufficiently thick and rigid compared to the dielectric multilayer film 33. Dielectric films are mainly deposited using vapor phase methods such as vapor deposition, but the stress on the dielectric multilayer film 33 differs depending on the shape and physical properties of the substrate 55 to which the film is deposited, as well as the inherent physical properties of the dielectric film, deposition conditions, and number of layers.
[0049] Ideally, as shown in Figure 2(A), it is preferable to reduce the overall film stress of the dielectric multilayer film 33 by alternately stacking materials with different force directions (arrows in the figure) when formed into a film. However, the structure of the dielectric multilayer film 33 actually fabricated rarely matches such an ideal structure, and in most cases, compressive or tensile stress is applied to the dielectric multilayer film 33. Furthermore, the more layers of dielectric multilayer film 33 there are, that is, the thicker the total thickness, the greater the film stress.
[0050] Figure 2(B) illustrates the deformation of the dielectric multilayer film 33 when a relatively large compressive stress (a force that causes the film to stretch) is applied to it. When compressive stress is applied, the dielectric multilayer film 33 deforms by partially expanding, and may delaminate from the substrate 55.
[0051] Figure 2(C) illustrates the deformation of the dielectric multilayer film 33 when a relatively large tensile stress (a force that causes the film to contract) is applied to it. When tensile stress is applied, cracks occur in the dielectric multilayer film 33, and if the stress progresses further, it may delaminate from the substrate 55.
[0052] The adhesion of the film to the substrate 55 also varies depending on the film deposition conditions. For example, the adhesion of the film can be improved by increasing the substrate temperature during film deposition or by surface modification of the film-deposited surface by plasma treatment. If the material of the optical element corresponding to the substrate 55 is a highly heat-resistant material such as glass, the adhesion of the film can be made relatively high.
[0053] However, if the material of the optical element is a resin with low heat resistance, the film deposition temperature cannot be sufficiently raised. As a result, delamination of the film, as shown in Figure 2(B) or Figure 2(C), is likely to occur. In addition, discoloration or other alterations may occur due to plasma treatment. Wearable devices worn on the body are preferably lightweight. Therefore, it is preferable to use lightweight resin lenses for optical devices used in VR equipment and the like.
[0054] As described above, delamination of the film is mainly caused by stress related to the total thickness of the multilayer film and the adhesion of the films. Delamination occurs when the stress exceeds a threshold or when the adhesion of the films is below a threshold, and does not occur if the stress is below a threshold and the adhesion of the films exceeds a threshold. Furthermore, assuming that the adhesion of the films is maximized, the threshold can be said to be determined by the number of layers in the multilayer film. Therefore, in one aspect of the present invention, the number of layers (total thickness) of the multilayer film is limited so as not to exceed a threshold, and the multilayer films are bonded together to obtain the desired optical properties.
[0055] In other words, as shown in Figure 1, a dielectric multilayer film 34a with a number of layers not exceeding a threshold is formed on the optical element 53, and a dielectric multilayer film 34b with a number of layers not exceeding a threshold is formed on the optical element 52, and the two are bonded together via an adhesive 34c. The adhesive is in the liquid phase before curing and works to absorb the stress of one of the dielectric multilayer films 34a and 34b and prevent it from being transmitted to the other. Therefore, the film stress of the entire multilayer film does not increase due to bonding, and film delamination does not occur.
[0056] In this case, by making the thickness of the adhesive 34c as thin as possible, the dielectric multilayer film 34a / adhesive 34c / dielectric multilayer film 34b configuration can be made to function as a half-mirror equivalent to when it is formed from a single dielectric multilayer film. In this specification, the descriptions of elements A / B / C etc. refer to a configuration in which elements A and B are in contact, and elements B and C are in contact.
[0057] In a narrow sense, a half-mirror is a mirror with both reflectivity and transmittance of 50%, but the term "half-mirror" in this specification is not limited to this. In a reflective-refracting optical system, light passes through a half-mirror and then reflects. Therefore, the efficiency of light utilization is the product of reflectivity and transmittance, but since reflectivity + transmittance generally equals 1, if one of the reflectivity or transmittance decreases, the other increases. In other words, in a reflective-refracting optical system where light is used twice (reflection and transmission), the efficiency of light utilization does not change significantly even if both the reflectivity and transmittance deviate from 50%. Therefore, the reflectivity and transmittance of a half-mirror used in a reflective-refracting optical system are not limited to 50% in the wavelength range in which they are used, but can be, for example, 40% to 60%.
[0058] Next, we will explain the simulation results when the configuration corresponding to dielectric multilayer film 34a / adhesive 34c / dielectric multilayer film 34b functions as a half-mirror. The simulation was performed using Essential Macleod, simulation software from Thin Film Center Inc.
[0059] The simulation used a model with the configuration of optical element 53 / dielectric multilayer film 34a / adhesive 34c / dielectric multilayer film 34b / optical element 52, as shown in Table 1, with varying adhesive thicknesses. The materials of optical element 53 and optical element 52 were materials with a refractive index n=1.5, the materials of dielectric multilayer film 34a and dielectric multilayer film 34b were laminated (3 layers) of TiO2 and SiO2, and the material of adhesive 34c was resin. The total number of layers of dielectric multilayer film 34a, dielectric multilayer film 34b, and adhesive 34c was 7. Examples of materials with a refractive index n=1.5 include glass or resin.
[0060] [Table 1]
[0061] For comparison, a simulation of a configuration without bonding (Ref.) shown in Table 2 was also performed. In Ref., SiO2 was used instead of adhesive 34c in layer No. 4, resulting in a total of 7 layers.
[0062] [Table 2]
[0063] The refractive index n of each material used in the simulation is shown in Table 3. Furthermore, the thickness of each layer of the dielectric multilayer film shown in Tables 1 and 2 is the optimal value calculated through simulation so that both the reflectance and transmittance in the visible light region are approximately 50%.
[0064] [Table 3]
[0065] Figure 3(A) shows the simulation results comparing the spectral transmittance of the configuration at 100 nm of adhesive shown in Table 1 and the configuration without bonding (Ref.). As shown in Table 3, since the refractive index of the adhesive is close to that of SiO2, by bringing the thickness of the adhesive closer to that of the other layers, it acts in the same way as SiO2, and it can be seen that even in a configuration where two dielectric multilayer films are bonded together, the optical properties are equivalent to those of a single dielectric multilayer film.
[0066] Figure 3(B) shows the simulation results comparing the spectral transmittance of adhesives at 500 nm, 1000 nm, and 2000 nm, as shown in Table 1. Compared to the 100 nm adhesive, the interference-induced waves increase, but it can be seen that in the visible light range, the interference begins to decrease when the adhesive is reduced to 1000 nm or less.
[0067] Therefore, when the adhesive 34c is to function as a single half-mirror, a thickness of 0.1 μm to 1 μm is preferable.
[0068] Furthermore, since the adhesive 34c is in the liquid phase before curing, it is extremely difficult to make the gaps between the multilayer films uniform using only the adhesive 34c. Therefore, as shown in Figure 1, it is preferable to disperse spherical spacers 34d in the adhesive 34c and use the spherical spacers 34d to make the gaps between the multilayer films uniform. As for the spacers 34d, the same material as the layers or adhesive constituting the multilayer films, or a material with a refractive index equivalent to that of the layers or adhesive constituting the multilayer films (for example, silicon oxide), with a diameter of 0.1 μm or more and 1 μm or less can be used.
[0069] Furthermore, while the light utilization efficiency of a half-mirror used in a reflective / refracting optical system is maximized (25%) when the transmittance (or reflectance) is 50%, the minimum light utilization efficiency is 24% when the transmittance is between 40% and 60%, and even when it is between 30% and 70%, the minimum light utilization efficiency remains at 21%.
[0070] Furthermore, since the light emitted from the display panel is of specific wavelengths—R (red light, e.g., 620nm to 630nm), G (green light, e.g., 520nm to 530nm), and B (blue light, e.g., 450nm to 460nm)—the half-mirror properties only need to act on the central wavelength of each light and the light in its vicinity. Therefore, it can be used as a half-mirror not only in the entire visible light spectrum, but also in the presence of interference waves, as long as the conditions are met.
[0071] Therefore, even when the thickness of the adhesive 34c is 1 μm or more, it can still function as a half-mirror. However, when the adhesive 34c is thick, multiple reflections occur between the dielectric multilayer film 34a and the dielectric multilayer film 34b, so it is preferable to consider the dielectric multilayer film 34a and the dielectric multilayer film 34b as independent beam splitters and to give them different optical properties.
[0072] Figure 4(A) is a diagram illustrating some of the optical elements and optical paths of a reflective-refracting optical system. Figure 4(A) shows the configuration shown in Figure 1 (optical element 53 / half mirror 34 / optical element 52) and the circular polarizers (phase difference plate 35 and reflective polarizer 36) into which the light passing through this configuration is incident. Note that the explanation of polarization conversion in a reflective-refracting optical system is omitted here and will be described in detail later.
[0073] As shown in Figure 4(A), when considering the half mirror 34 as a single unit, the incident light L0 passes through the half mirror 34, is reflected by the reflective polarizer 36, is reflected again by the half mirror 34, and passes through the reflective polarizer 36 again.
[0074] On the other hand, if the dielectric multilayer film 34a and the dielectric multilayer film 34b each act as independent beam splitters, it is necessary to consider the multiple reflections occurring between the dielectric multilayer film 34a and the dielectric multilayer film 34b in addition to the optical path described above.
[0075] Figure 4(B) is a diagram illustrating the optical path, including multiple reflections occurring between the dielectric multilayer film 34a and the dielectric multilayer film 34b, when the configuration of the half mirror 34 in Figure 4(A) is dielectric multilayer film 34a / adhesive 34c / dielectric multilayer film 34b.
[0076] Here, the reflectance of the dielectric multilayer film 34a is set to a and the transmittance to 1-a. Also, the reflectance of the dielectric multilayer film 34b is set to b and the transmittance to 1-b. Furthermore, when light L0 is incident from the optical element 53 side, the light reflected by the dielectric multilayer film 34a and returning to the optical element 53 is S1, the light reflected by the dielectric multilayer film 34b and passing through the dielectric multilayer film 34a and returning to the optical element 53 is S2, and the light reflected by the reflective polarizer 36 and passing through the dielectric multilayer film 34b and dielectric multilayer film 34a and returning to the optical element 53 is S3. Furthermore, the light that passes through the dielectric multilayer film 34a and dielectric multilayer film 34b is set to T1, the light reflected by the dielectric multilayer film 34b and passing through the reflective polarizer 36 is set to T2, and the light reflected by the dielectric multilayer film 34a and passing through the dielectric multilayer film 34b and reflective polarizer 36 is set to T3. In addition, specific transmitted and reflected light between optical elements will be conveniently described as L1 to L33.
[0077] First, the light L0 incident from the optical element 53 is separated into light L1, which is reflected by the dielectric multilayer film 34a, and light L2, which is transmitted through the dielectric multilayer film 34a. Here, since the reflectance of the dielectric multilayer film 34a is a and the transmittance is 1-a, when L0=1, the light L1 and light L2 are given by equations 1 and 2.
[0078] [Math 1] L1 = a [Math 2] L2 = 1 - a
[0079] Light L2 is separated into light L3 that passes through the dielectric multilayer film 34b and light L4 that is reflected by the dielectric multilayer film 34b. Here, since the reflectance of the dielectric multilayer film 34b is b and the transmittance is 1-b, light L3 and light L4 are given by equations 3 and 4.
[0080] [Math 3]L3=(1-a)(1-b) [Math 4] L4 = b(1-a)
[0081] Light L4 is separated into light L5 that passes through the dielectric multilayer film 34a and light L6 that is reflected by the dielectric multilayer film 34a. Therefore, light L5 and light L6 are given by equations 5 and 6.
[0082] [Math 5] L5 = b(1-a) 2 [Equation 6] L6 = ab(1 - a)
[0083] The light L6 is separated into the light L7 that passes through the dielectric multilayer film 34b and the light L8 that is reflected by the dielectric multilayer film 34b. Therefore, the lights L7 and L8 are represented by Equations 7 and 8.
[0084] [Equation 7] L7 = ab(1 - a)(1 - b) [Equation 8] L8 = ab(1 - a) 2 (1 - a)
[0085] The light L8 is separated into the light L9 that passes through the dielectric multilayer film 34a and the light L10 that is reflected by the dielectric multilayer film 34a. Therefore, the lights L9 and L10 are represented by Equations 9 and 10.
[0086] [Equation 9] L9 = ab(1 - a) 2 (1 - a) 2 [Equation 10] L10 = a(1 - a)b 2 b 2 (1 - a)
[0087] The light L10 is separated into the light L11 that passes through the dielectric multilayer film 34b and the light L12 that is reflected by the dielectric multilayer film 34b. Therefore, the lights L11 and L12 are represented by Equations 11 and 12.
[0088] [Equation 11] L11 = a(1 - a)b(1 - b) 2 b 2 (1 - a)(1 - b) [Equation 12] L12 = a(1 - a)b(1 - a) 2 b 3 (1 - a)
[0089] The light L12 is separated into the light L13 that passes through the dielectric multilayer film 34a and the light reflected by the dielectric multilayer film 34a. Therefore, the light L13 is represented by Equation 13, and hereafter, light generated by multiple reflections occurs in the same manner as described above.
[0090] [Equation 13] L13 = a(1 - a)b(1 - a)(1 - b) 2 b 3 (1 - a) 2
[0091] Here, when light L0 is incident from the optical element 53 side, the light S1 that is reflected by the dielectric multilayer film 34a and returns to the optical element 53 is given by Equation 14, as shown in Equation 1.
[0092] [Number 14]S1=L1=a
[0093] Furthermore, the light S2 that is reflected by the dielectric multilayer film 34b and passes through the dielectric multilayer film 34a and returns to the optical element 53 is given by equations 5, 9, and 13, with the first term being b(1-a). 2 Since it can be considered as an infinite geometric sequence with common ratio ab, we can use the formula for the sum of an infinite geometric sequence to obtain equation 15.
[0094] [Number 15]S2=b(1-a) 2 (1-ab)
[0095] Furthermore, the light T1 transmitted through the dielectric multilayer films 34a and 34b can be considered as an infinite geometric sequence with first term (1-a)(1-b) and common ratio ab, according to equations 3, 7, and 11. Therefore, using the formula for the sum of an infinite geometric sequence, we obtain equation 16.
[0096] [Math 16] T1 = (1-a)(1-b) / (1-ab)
[0097] Here, light T1 is reflected by the reflective polarizer 36, and when this reflected light is called light L20, light L20 is reflected by the dielectric multilayer film 34b and separated into light L21 that passes through the reflective polarizer 36 and light L22 that passes through the dielectric multilayer film 34b. Therefore, light L21 and light L22 are given by equations 17 and 18.
[0098] [Math 17]L21=b(1-a)(1-b) / (1-ab) [Math 18]L22=(1-a)(1-b) 2 (1-ab)
[0099] Light L22 is separated into light L23 that passes through the dielectric multilayer film 34a and light L24 that is reflected by the dielectric multilayer film 34a. Therefore, light L23 and light L24 are given by equations 19 and 20.
[0100] [Math 19] L23 = (1-a) 2 (1-b) 2 (1-ab) [Math 20] L24 = a(1-a)(1-b) 2 (1-ab)
[0101] Light L24 is separated into light L25 that passes through the dielectric multilayer film 34b and light L26 that is reflected by the dielectric multilayer film 34b. Therefore, light L25 and light L26 are given by equations 21 and 22.
[0102] [Math 21] L25 = a(1-a)(1-b) 3 (1-ab) [Number 22]L26=ab(1-a)(1-b) 2 (1-ab)
[0103] Light L26 is separated into light L27 that passes through the dielectric multilayer film 34a and light L28 that is reflected by the dielectric multilayer film 34a. Therefore, light L27 and light L28 are given by equations 23 and 24.
[0104] [Number 23]L27=ab(1-a) 2 (1-b) 2 (1-ab) [Number 24]L28=a 2 b(1-a)(1-b) 2 (1-ab)
[0105] Light L28 is separated into light L29 that passes through the dielectric multilayer film 34b and light L30 that is reflected by the dielectric multilayer film 34b. Therefore, light L29 and light L30 are given by equations 25 and 26.
[0106] [Number 25]L29=a 2 b(1-a)(1-b) 3 (1-ab) [Number 26]L30=a 2 b 2 (1-a)(1-b) 2 (1-ab)
[0107] Light L30 is separated into light L31 that passes through the dielectric multilayer film 34a and light L32 that is reflected by the dielectric multilayer film 34a. Therefore, light L31 and light L32 are given by equations 27 and 28.
[0108] [Number 27]L31=a 2 b 2 (1-a) 2 (1-b) 2 (1-ab) [Number 28]L32=a 3 b 2 (1-a)(1-b) 2 (1-ab)
[0109] Light L32 is separated into light L33 that passes through the dielectric multilayer film 34b and light that is reflected by the dielectric multilayer film 34b. Therefore, light L33 is given by equation 29, and subsequently, light due to multiple reflections is generated in the same manner as described above.
[0110] [Number 29]L33=a 3 b 2 (1-a)(1-b) 3 (1-ab)
[0111] Here, the light T2 reflected by the dielectric multilayer film 34b and transmitted through the reflective polarizer 36 is given by equation 30, which can be obtained from equation 17.
[0112] [Number 30]T2=L21=b(1-a)(1-b) / (1-ab)
[0113] Furthermore, the light S3 reflected by the reflective polarizer 36, transmitted through the dielectric multilayer film 34b and dielectric multilayer film 34a and returned to the optical element 53, is given by equations 19, 23, and 27, with the first term being (1-a). 2 (1-b) 2 Since (1-ab) can be considered an infinite geometric sequence with common ratio ab, we can use the formula for the sum of an infinite geometric sequence to obtain equation 31.
[0114] [Math 31] S3 = (1-a) 2 (1-b) 2 (1-ab) 2
[0115] Furthermore, the light T3 reflected by the dielectric multilayer film 34a and transmitted through the dielectric multilayer film 34b and the reflective polarizer 36 is given by equations 21, 25, and 29, with the first term being a(1-a)(1-b). 3 Since (1-ab) can be considered an infinite geometric sequence with common ratio ab, we can use the formula for the sum of an infinite geometric sequence to obtain equation 32.
[0116] [Math 32] T3 = a(1-a)(1-b) 3 (1-ab) 2
[0117] Here, the total reflectance S of the dielectric multilayer films 34a and 34b is the sum of S1, S2, and S3, so from equations 14, 15, and 31, we get equation 33.
[0118] [Number 33]S=1-((1-a)(1-b)(a-2ab+b) / (1-ab) 2 )
[0119] Furthermore, the total transmittance T of the dielectric multilayer films 34a and 34b is the sum of T2 and T3, so from equations 30 and 32, we get equation 34.
[0120] [Number 34]T=(1-a)(1-b)(a-2ab+b) / (1-ab) 2
[0121] Here, when considering a single half-mirror, in a reflective / refracting optical system, it is used twice for transmission and reflection, so the efficiency of light utilization is the product of the reflectance x and the transmittance 1-x, and it reaches its maximum value of 25% when x=0.5 (x(1-x)=0.25).
[0122] When a half-mirror is constructed using dielectric multilayer films 34a and 34b acting as independent beam splitters, the light utilization efficiency reaches an extreme value (maximum value of 0.25) when equation 35 is satisfied, where the derivative of equation 34 becomes 0.
[0123] [Number 35]b=(1-2a) / (2-3a)
[0124] Therefore, in equation 35, possible combinations of a and b include, for example, a=0% and b=50%, a=25% and b=40%, a=30% and b=36.36%, or a=40% and b=25%.
[0125] In other words, when the reflectance of the dielectric multilayer film 34a is a and the reflectance of the dielectric multilayer film 34b is b, the light utilization efficiency can be set to 25%, similar to the case when using a single half-mirror, by satisfying equation 35.
[0126] As described above, by bonding a dielectric multilayer film provided on one of two optical elements with a dielectric multilayer film provided on the other optical element via an adhesive, it is possible to form an optical element having a dielectric multilayer film with a large number of layers, excellent optical properties, and resistance to film peeling. With this configuration, it is possible to fabricate multilayer films of thicknesses that cannot be produced by conventional methods of stacking different films alternately in sequence due to film peeling, thereby increasing the degree of design freedom. Furthermore, when the two multilayer films are symmetrical, the time-consuming multilayer film deposition process can be standardized, reducing the deposition time by approximately half. Therefore, manufacturing costs can also be reduced.
[0127] Next, we will explain the specific configuration of the reflecting and refraction optical system using Figure 5.
[0128] Figure 5 shows a display panel 20 and a reflector / refractor optical system 30 of an electronic device. Figure 5 also shows the optical path of visible light emitted from the display panel 20 and reaching the eye 40. Note that the shapes and arrangements of the elements shown in Figure 5 are examples only.
[0129] The reflective and refractive optical system 30 has a configuration in which a linear polarizer 31, a phase difference plate 32, a half mirror 34, a phase difference plate 35, a reflective polarizer 36, and a lens 51 are arranged in this order in one direction from the display panel 20 side, with the optical axis 57 passing through the center of each. The combination of polarizers and phase difference plates (linear polarizer 31 and phase difference plate 32, phase difference plate 35 and reflective polarizer 36) is also called a circular polarizer, which converts unpolarized light into circularly polarized light.
[0130] Note that Figure 5 shows an example where the lens 51 is located between the reflective polarizer 36 and the eye 40, but this is not the only option. The lens 51 can be placed in other positions, and multiple lenses, including lens 51, can be provided. Furthermore, the lens 51 and other components can be used as supports for other elements of the reflective refractive optical system 30 described above.
[0131] Furthermore, in Figure 5, the elements constituting the reflecting and refractionating optical system 30 are shown spaced apart to clarify the explanation of the optical path and polarization state, but this is not the only option. Several adjacent elements can be placed in close proximity to each other.
[0132] To create a configuration where adjacent elements are close together, it is preferable to bond the elements together using an optical adhesive that has high transmittance for the wavelength of light used (in one embodiment of the present invention, the wavelength range of visible light, or the range of 430 nm to 780 nm) and does not absorb or birefringe specific polarizations. Alternatively, instead of bonding, one element may be formed in contact with the other by a method such as coating. Alternatively, the elements may be arranged so that they are in contact with each other without providing any adhesive between them. Alternatively, a gap may be provided between them.
[0133] Furthermore, an anti-reflective layer may be provided on the surface of a light-transmitting element that has an interface with air. By preventing unwanted reflections at the surface of the element (the interface between the air and the element), the efficiency of light utilization can be improved and the generation of stray light can be suppressed. Note that an anti-reflective layer is not necessary for half mirrors and reflective polarizers, which also have a reflective function.
[0134] As the anti-reflective layer, an anti-reflective film or a dielectric multilayer film can be used. For example, on curved surfaces such as the surface of a lens where it is not easy to apply a film, it is preferable to apply a dielectric multilayer film. Also, in the case of an element with a flat surface, either an anti-reflective film or a dielectric multilayer film may be applied. However, if the element on which the anti-reflective layer is formed is made of resin or the like, the element may suffer thermal damage during the formation of the dielectric multilayer film. In such cases, it is preferable to apply an anti-reflective film to the element via an adhesive.
[0135] Anti-reflective films include types that cancel out reflected light through interference and moth-eye types that continuously change the refractive index due to fine protrusions formed on the surface. In either type, it is preferable to use a base film that is not manufactured by the stretching method. Films manufactured using the stretching method may have optical anisotropy, which may change the polarization state. From the perspective of low angle dependence and wavelength dependence, it can be said that it is preferable to use the moth-eye type.
[0136] By using a reflective / refracting optical system 30 with this configuration, the light emitted from the display panel 20 can be converted into linearly polarized or circularly polarized light for use, allowing for selective reflection and transmission by elements arranged along the optical path. Therefore, the optical path length can be secured within a limited space, and the reflective / refracting optical system 30 can be made more compact.
[0137] Next, we will describe the details of each element of the display panel 20 and the reflecting / refracting optical system 30.
[0138] As the display panel 20, a liquid crystal panel having liquid crystal elements, an organic EL panel having organic EL elements, or an LED panel having microLEDs can be used. In particular, it is preferable to use an organic EL panel, which is self-emissive and easy to form a high-definition display area. In this specification, a microLED refers to a chip with a chip area of 10,000 μm². 2The following light-emitting diodes are represented. Note that the LED panel is not limited to microLEDs; for example, a chip with a chip area of 10,000 μm² is also included. 2 Larger than 1mm 2 The following light-emitting diodes (also called mini-LEDs) may be used. In this embodiment, an example using an organic EL panel will be described.
[0139] The linear polarizer 31 can transmit one linearly polarized light from light (unpolarized) that vibrates in all 360° directions. As the linear polarizer 31, for example, a thin film with iodine or dye uniaxially oriented, a wire grid polarizer, or a dielectric multilayer film can be used.
[0140] In this explanation, the transmission axis of the linear polarizer 31 is assumed to be 0°, but 0° is not an absolute value, but rather a reference value. In other words, the polarization plane of linearly polarized light transmitted through the linear polarizer 31 is treated as 0°. Therefore, for example, 90° linear polarization in this embodiment means linearly polarized light whose polarization plane is rotated by 90° when transmitted through the linear polarizer 31.
[0141] The phase difference plate 32 has the function of converting linearly polarized light into circularly polarized light. Here, a λ / 4 plate (quarter-wave plate) is used for the phase difference plate 32. When the linear polarizer 31 and the λ / 4 plate are superimposed so that the lagging axis of the λ / 4 plate is 45° with respect to the axis of linearly polarized light emitted from the linear polarizer 31, right-rotating circularly polarized light (right circularly polarized light) is produced. Conversely, when the linear polarizer 31 and the λ / 4 plate are superimposed so that the lagging axis of the λ / 4 plate is -45° with respect to the axis of linearly polarized light emitted from the linear polarizer 31, left-rotating circularly polarized light (left circularly polarized light) is produced. In one aspect of the present invention, either right-rotating or left-rotating circularly polarized light may be used, provided that the combination with the characteristics of the reflective polarizer 36, which will be described later, is appropriate.
[0142] The half-mirror 34 can be configured in which an adhesive 34c is provided between the dielectric multilayer film 34a and the dielectric multilayer film 34b, according to one aspect of the present invention. The adhesive 34c can be the optical adhesive described above.
[0143] Since dielectric multilayer films 34a and 34b are extremely thin multilayer films, their formation requires a support. In Figure 5, the support is omitted, but the support material is preferably a material with high transmittance of visible light and infrared light, and glass or resin can be used. By using resin materials for the supports of dielectric multilayer films 34a and 34b, the optical element can be made lighter.
[0144] Furthermore, the presence of a curved support surface allows for curvature to be imparted to the half-mirror 34. For example, as shown in Figure 6(A), a plano-concave lens-shaped optical element 53 having a concave surface and a plano-convex lens-shaped optical element 52 having a convex surface can be used as the support surface.
[0145] Here, we will also describe the supports for the other elements shown in Figure 5. As supports for the linear polarizer 31 and phase difference plate 32 that act as circular polarizers, for example, a display panel 20 can be used, as shown in Figure 6(A), and the linear polarizer 31 and phase difference plate 32 can be bonded to the display surface side.
[0146] Furthermore, as a support for the phase difference plate 35 and the reflective polarizer 36, which act as circular polarizers, a lens 51 can be used, for example, as shown in Figure 6(A), and the phase difference plate 35 and the reflective polarizer 36 can be bonded to the light incident side of the lens 51.
[0147] Note that the form of each support is not limited to those described above. For example, as shown in Figure 6(B), the phase difference plate 32 and the linear polarizer 31 can be attached to the plane opposite to the concave surface of the optical element 53. Also, as shown in Figure 6(C), the phase difference plate 35 and the reflective polarizer 36 can be attached to the plane opposite to the convex surface of the optical element 52. Furthermore, as shown in Figure 6(D), a configuration combining Figures 6(B) and 6(C) is also possible.
[0148] Furthermore, the forms of optical elements 53 and 52 are not limited to those described above. For example, optical element 53 can be a meniscus lens or a biconcave lens, as shown in Figures 6(E) and 6(F). Similarly, optical element 52 can be a meniscus lens or a biconvex lens, as shown in Figures 6(G) and 6(H).
[0149] Furthermore, the position of lens 51 is not limited to that shown in Figure 5; for example, it can be in the position shown in Figure 7(A). Also, while Figures 5 and 7(A) illustrate lens 51 as a plano-convex lens, it is not limited to this. For example, lens 51 can be one selected from a biconvex lens, plano-convex lens, convex meniscus lens, biconcave lens, plano-concave lens, or concave meniscus lens, or it can be a combination of multiple lenses as shown in Figure 7(B). Figure 7(B) shows an example where lens 51 is composed of two lenses, lens 58 and lens 59. Lens 51 can also be a combination of three or more lenses. In addition, lens 51 is not limited to a spherical lens; it may also be an aspherical lens. By using a combination lens or an aspherical lens, various lens aberrations can be reduced.
[0150] Alternatively, as shown in Figure 7(C), lens 51 can be an aspherical singlet lens having regions A1 and A2 that function as convex lenses and regions B1 and B2 that function as part of a concave lens. Here, Figure 7(C) shows an example where regions A1 and B1 are provided on the light-incident side (front side) of lens 51 and regions A2 and B2 are provided on the emission side (back side), but the front and back sides may be reversed. Also, in Figures 7(D) to 7(G) described later, the front and back sides do not matter with respect to the incident light.
[0151] Figure 7(C) shows an example where the surface shape differs on the incident and exit sides of the light. By using such a shape, different effects of diffusion and focusing can be achieved in the central and peripheral areas, enabling fine correction of aberrations. For example, by independently adjusting the curvature of the front surface and the back surface, it is possible to achieve a focusing effect overall. In other words, by using a configuration like that shown in Figure 7(C), it is possible to have a corrective function through a region that functions as a concave lens, while the overall structure functions as a convex lens for magnification.
[0152] Furthermore, the effects required of lens 51 are diverse and vary depending on the overall configuration of the reflective-refractive optical system into which it is combined. Therefore, as shown in Figure 7(D), the shape may be the same on both the incident and exit sides of the light. Alternatively, as shown in Figure 7(E), one of the light-transmitting surfaces may be flat. Alternatively, as shown in Figure 7(F), only a region B2 that functions as a concave lens may be provided on one of the light-transmitting surfaces. Alternatively, as shown in Figure 7(G), only a region A2 that functions as a convex lens may be provided on one of the light-transmitting surfaces.
[0153] The shape of lens 51 can be determined according to the desired effect, and a spherical lens can also be used. Furthermore, depending on the preferred effect, lens 51 may be composed of a combination of multiple lenses.
[0154] The focal length of the reflecting / refracting optical system 30 can be determined by the combined effect of the power of the half-mirror 34 acting as a concave mirror and the power of the lenses provided in the reflecting / refracting optical system 30. Therefore, it is preferable to appropriately adjust the shapes of the lens 51, the lens-shaped optical element 52, and the lens-shaped optical element 53 so that a desired focal length can be obtained. Furthermore, combinations of multiple supports with different shapes have the following characteristics and can be appropriately selected according to the purpose.
[0155] The Petzval sum, calculated from the refractive index and focal length of each lens, serves as an indicator of field curvature. When the Petzval sum is zero, the image plane becomes flat, which is a desirable characteristic for the lens system. To satisfy this, either the refractive index or the focal length must be negative. Since the refractive index cannot be negative, it is preferable to use a concave lens with a negative focal length. Therefore, to suppress field curvature, it is preferable that one or more of the lens 51, optical element 52, and optical element 53 have a concave lens shape.
[0156] Since refraction is accompanied by chromatic aberration, combining positive and negative power is effective in correcting chromatic aberration. Even if the incident surface is flat, chromatic aberration will occur unless the light rays are parallel. Therefore, a combination of surfaces that can correct each other (convex and concave surfaces) is advantageous. Accordingly, to suppress chromatic aberration, it is preferable that the combination of lens 51, optical element 52, and optical element 53 be a combination of a convex lens shape and a concave lens shape.
[0157] Simply put, the greater the positive power, the shorter the focal length can be, and the smaller the overall optical system can be. Even in a configuration where most of the positive power is handled by a half-mirror, the presence of a convex surface allows for an even shorter focal length. Therefore, in order to increase the positive power as much as possible, it is preferable that one or more of the lens 51, optical element 52, and optical element 53 have the shape of a convex lens.
[0158] In a reflective-refractive optical system as described in one aspect of the present invention, polarizers and phase difference plates are required. These are in the form of films, and a flat bonding surface is advantageous from a manufacturing perspective. Therefore, from the viewpoint of ease of manufacture, it is preferable that one or more of the lens 51, optical element 52, and optical element 53 have a flat surface on the outside.
[0159] For the lenses used in the reflective / refracting optical system 30, it is desirable to use resin lenses to reduce weight. On the other hand, resin has a property that makes it prone to birefringence. In materials that exhibit birefringence, the refractive index differs depending on the direction of polarization vibration, so the transmission speed differs for each polarization component. Therefore, after passing through the material, a phase difference occurs between the polarization components, causing a change in the polarization state. In a reflective / refracting optical system, when a change in the polarization state occurs, light rays that do not pass through the normal optical path are generated. These light rays enter the eye as stray light and are perceived as a double image or a blurred image.
[0160] The relationship between polarization state and optical path will be described later, but for the reasons mentioned above, it is preferable that lenses located in the optical path through which polarized light travels back and forth be made of glass, which exhibits almost no birefringence. Furthermore, since humans cannot perceive polarization, even if a resin lens with birefringence is used in the lens positioned directly in front of the eye 40, there will be no problem in the visibility of the display.
[0161] For example, acrylic resin, polycarbonate resin, polyester resin, and cycloolefin resin are known to be used as resins for lenses, and these can typically be used as lens materials. Furthermore, if a material with sufficiently low birefringence is used, resin lenses can also be used in the optical path on which polarized light travels back and forth.
[0162] The phase difference plate 35 has the function of reversibly converting linearly polarized and circularly polarized light. Similar to the phase difference plate 32, a λ / 4 plate (quarter-wave plate) can be used as the phase difference plate 35.
[0163] The reflective polarizer 36 can reflect linearly polarized light whose reflection axis and vibration direction coincide, and transmit linearly polarized light perpendicular to the reflection axis. The axis perpendicular to the reflection axis is called the transmission axis. The reflective polarizer 36 is positioned so that its transmission axis is perpendicular to and overlaps with the transmission axis of the linear polarizer 31. This arrangement allows for the creation of an optical path for visible light accompanied by reflection.
[0164] Next, we will explain the optical path of the visible light emitted by the display panel 20 shown in Figure 5.
[0165] Some of the light emitted from the display panel 20 passes through the linear polarizer 31 and the phase difference plate 32, partially passes through the half mirror 34, passes through the phase difference plate 35, and is reflected by the reflective polarizer 36. The light reflected by the reflective polarizer 36 passes through the phase difference plate 35 and is partially reflected by the half mirror 34. The light partially reflected by the half mirror 34 passes through the phase difference plate 35, the reflective polarizer 36, and the lens 51, enters the eye 40, and forms an image on the retina.
[0166] In this way, by repeatedly reflecting within the reflective / refracting optical system 30, the optical path length can be secured, making it possible to create an optical system with a short focal length.
[0167] The details of the optical path, including the polarization state, will now be explained. Light (unpolarized) vibrating in all 360° directions emitted from the display panel 20 is incident on the linear polarizer 31. The transmission axis of the linear polarizer 31 is 0°, and 0° linearly polarized light is emitted from the linear polarizer 31. If a liquid crystal panel is used for the display panel 20, the linear polarizer 31 can be used as one of the pair of polarizers that the liquid crystal panel has.
[0168] The 0° linearly polarized light emitted from the linear polarizer 31 is converted to left-circularly polarized light (L) by the phase difference plate 32. The left-circularly polarized light (L) is partially transmitted through the half mirror 34 and incident on the phase difference plate 35, where it is converted back to 0° linearly polarized light. Here, we describe an example where the light emitted from the phase difference plate 32 is left-circularly polarized, but it can also be right-circularly polarized.
[0169] The 0° linearly polarized light emitted from the phase difference plate 35 is reflected by the reflective polarizer 36 with a reflection axis of 0°, incident on the phase difference plate 35, and converted to left-circularly polarized light (L). The left-circularly polarized light (L) is partially reflected by the half-mirror 34, and its polarity is reversed to right-circularly polarized light (R). The right-circularly polarized light (R) is incident on the phase difference plate 35 and converted to 90° linearly polarized light. The 90° linearly polarized light passes through the reflective polarizer 36 and lens 51 with a transmission axis of 90° and is incident on the eye 40.
[0170] Furthermore, the reflective and refractive optical system can also be configured as shown in Figure 8. The configuration shown in Figure 8 reflects the light that is initially partially reflected by the half-mirror 34 towards the eye 40, thereby increasing the light utilization efficiency by approximately twofold. The configuration shown in Figure 8 differs from the configuration shown in Figure 5 in that the linear polarizer 31 is replaced with a reflective polarizer 61 with a transmission axis of 0° and a reflection axis of 90°. Therefore, the configurations shown in Figures 6(A) to 7(G) can also be applied by replacing the linear polarizer 31 with a reflective polarizer 61.
[0171] In the configuration shown in Figure 8, in addition to the optical path LP1 of the polarization state described above, the optical path LP2 of light that is partially reflected by the half mirror 34 is also utilized. Left circularly polarized light (L) emitted from the phase difference plate 32 is partially reflected by the half mirror 34, and its polarity is reversed to become right circularly polarized light (R). The right circularly polarized light (R) is incident on the phase difference plate 32 and converted to 90° linearly polarized light. The 90° linearly polarized light is reflected by the reflective polarizer 61 with a reflection axis of 90°, incident on the phase difference plate 32, and converted to right circularly polarized light (R). The right circularly polarized light (R) is partially transmitted through the half mirror 34 and incident on the phase difference plate 35, where it is converted to 90° linearly polarized light. The 90° linearly polarized light is transmitted through the reflective polarizer 36 and lens 51 with a transmission axis of 90° and incident on the eye 40.
[0172] As explained above, by configuring the reflective / refracting optical system as shown in Figure 8, both the light that is initially incident on the half-mirror 34 and is semi-transmitted and semi-reflected can be effectively utilized, thereby increasing the light utilization efficiency by approximately twofold.
[0173] In the configuration shown in Figure 8, as shown in Figure 9(A), the two optical paths, optical path LP1 and optical path LP2, are merged and their imaging positions are aligned, thereby approximately doubling the efficiency of light utilization. This is possible because the two separated light paths LP1 and LP2 are refracted or reflected in the same way, and ultimately the two optical paths overlap. To obtain this effect, it is preferable to have a symmetrical optical system with the half-mirror 34 as the boundary.
[0174] A symmetrical optical system is one in which optical elements are arranged symmetrically with respect to a reference plane of symmetry, and each of the symmetrical optical elements has the same optical properties.
[0175] In Figure 9(A), light is shown to be reflected off the surface of the half-mirror 34, but in reality, reflection occurs using the entire film thickness direction. In one aspect of the present invention, for example, as shown in Figure 9(B), in the dielectric multilayer film 34a, the dielectric film 34e can be provided so as to have a region in contact with the optical element 53, and the dielectric film 34f can be provided so as to have a region in contact with the adhesive 34c. In the dielectric multilayer film 34b, the dielectric film 34g can be provided so as to have a region in contact with the optical element 52, and the dielectric film 34h can be provided so as to have a region in contact with the adhesive 34c. If the optical element 53 and the optical element 52 are formed from the same material, the dielectric film 34e and the dielectric film 34g are formed from the same material, and the dielectric film 34f and the dielectric film 34h are formed from the same material, the elements on the optical path LP1 and the optical path LP2 can be made strictly symmetrical.
[0176] Furthermore, in the conventional example shown in Figure 9(C), where a multilayer film is provided on the optical element 53 by alternately stacking dielectric films 34e and 34f, and the multilayer film and optical element 52 are bonded together with adhesive 34c, the elements on the optical paths LP1 and LP2 become asymmetric. Therefore, if a corrective element is not provided on either the optical path LP1 or the optical path LP2, a shift in the imaging positions of the two may occur.
[0177] Next, the configuration of pixels and light-emitting elements of an organic EL panel that can be used as a display panel 20 will be described. In one aspect of the present invention, it is preferable that the light-emitting elements used are of an MML (Metal Mask Less) structure, in which the light-emitting layer is separated and formed using a lithography process, without using an FMM (Fine Metal Mask). MML structure light-emitting elements can have a higher aperture ratio than light-emitting elements made using an FMM, enabling light emission at high brightness or low power consumption. The organic EL panel is configured to further improve the light extraction efficiency by combining an MML structure light-emitting element with a convex lens, and when combined with the reflectivity optical system 30 of one aspect of the present invention, it is possible to form an XR device with high display quality and low power consumption.
[0178] Figure 10(A) is a diagram corresponding to the cross-section B1-B2 shown in the top view of the pixels of the S-stripe array shown in Figure 10(B). The pixels have sub-pixels 105R, 105G, and 105B, but the explanation of sub-pixel 105R is omitted here, and sub-pixels 105G and 105B are explained. For sub-pixel 105R, refer to the explanation of sub-pixels 105G and 105B.
[0179] Although this example uses pixels with an S-strip arrangement, the MML structure can be applied to any subpixel shape, including stripe arrangements, delta arrangements, zigzag arrangements, pentile arrangements, and diamond arrangements.
[0180] The light-emitting element 110G of the sub-pixel 105G and the light-emitting element 110B of the sub-pixel 105B are provided on the substrate 161. The substrate 161 includes a support and elements of the pixel circuit.
[0181] For the light-emitting elements 110G and 110B, it is preferable to use, for example, OLED (Organic Light Emitting Diode) or QLED (Quantum-dot Light Emitting Diode). As the light-emitting material of the EL element, not only organic compounds but also inorganic compounds (such as quantum dot materials) can be used.
[0182] The light-emitting element 110G has a pixel electrode 111G, an organic layer 112G, a common layer 114, and a common electrode 113. The light-emitting element 110B has a pixel electrode 111B, an organic layer 112B, a common layer 114, and a common electrode 113. The common layer 114 and the common electrode 113 are provided in common to both the light-emitting element 110G and the light-emitting element 110B.
[0183] The organic layer 112G of the light-emitting element 110G contains a luminescent organic compound that emits at least green light. The organic layer 112B of the light-emitting element 110B contains a luminescent organic compound that emits at least blue light. The organic layer 112G and the organic layer 112B can also be called EL layers and each contains a layer (luminescent layer) that contains at least a luminescent substance.
[0184] In the following, when describing matters common to the light-emitting element 110G and the light-emitting element 110B, they may be referred to simply as the light-emitting element 110. Similarly, for components distinguished by letters, such as the organic layer 112G and the organic layer 112B, when describing matters common to them, the letters may be omitted and a code may be used.
[0185] The organic layer 112 and the common layer 114 can each independently have one or more of the following: an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer. For example, the organic layer 112 may have a stacked structure of a hole injection layer, a hole transport layer, an emissive layer, and an electron transport layer from the pixel electrode 111 side, and the common layer 114 may have an electron injection layer.
[0186] Pixel electrodes 111G and 111B are provided for each light-emitting element. A common electrode 113 and a common layer 114 are provided as a continuous layer common to each light-emitting element. A conductive film that is transparent to visible light is used on either each pixel electrode or the common electrode 113, and a conductive film that is reflective is used on the other. By making each pixel electrode transparent and the common electrode 113 reflective, a bottom-emission type display device can be made. Conversely, by making each pixel electrode reflective and the common electrode 113 transparent, a top-emission type display device can be made. Furthermore, by making both each pixel electrode and the common electrode 113 transparent, a dual-emission type display device can be made.
[0187] A protective layer 121 is provided on the common electrode 113, covering the light-emitting elements 110G and 110B. The protective layer 121 has the function of preventing impurities such as water from diffusing to each light-emitting element from above.
[0188] It is preferable that the end of the pixel electrode 111 has a tapered shape. When the end of the pixel electrode 111 has a tapered shape, the organic layer 112 provided along the end of the pixel electrode 111 can also have a shape with an inclined portion. By making the end of the pixel electrode 111 tapered, the coverage of the organic layer 112 that is provided over the end of the pixel electrode 111 can be improved. Furthermore, by making the side surface of the pixel electrode 111 tapered, it becomes easier to remove foreign matter (for example, dust or particles) during the manufacturing process by washing or other processes, which is preferable.
[0189] In this specification, a tapered shape refers to a shape in which at least a portion of the side surface of a structure is inclined with respect to the substrate surface. For example, it is preferable to have a region in which the angle between the inclined side surface and the substrate surface (also called the taper angle) is less than 90°.
[0190] The organic layer 112 is processed in an island-like manner, for example, using a resist mask formed by lithography. As a result, the organic layer 112 has a shape where the angle between the top surface and the side surface is close to 90 degrees at its edges. On the other hand, organic films formed using FMM or the like tend to gradually become thinner towards the edges, and for example, the top surface is formed in a slope shape over a range of 1 μm to 10 μm, making it difficult to distinguish between the top surface and the side surface.
[0191] Between two adjacent light-emitting elements, there are insulating layers 124, 125, and 126.
[0192] Between two adjacent light-emitting elements, the sides of each organic layer 112 are positioned opposite each other with a resin layer 126 in between. The resin layer 126 is located between the two adjacent light-emitting elements and is provided to fill the edges of each organic layer 112 and the region between the two organic layers 112. The resin layer 126 has a smooth, convex upper surface shape, and a common layer 114 and a common electrode 113 are provided covering the upper surface of the resin layer 126.
[0193] The resin layer 126 functions as a planarizing film that fills the step between two adjacent light-emitting elements. By providing the resin layer 126, it is possible to prevent the common electrode 113 from being separated by the step at the edge of the organic layer 112 (also called step breakage), and thus prevent the common electrode on the organic layer 112 from becoming insulated.
[0194] Furthermore, the resin layer 126 insulates the organic layers 112 of adjacent light-emitting elements 110 from each other. This reduces leakage current through the organic layers 112 between adjacent light-emitting elements, suppressing unwanted light emission due to crosstalk. Consequently, the color reproduction accuracy of the display device can be improved.
[0195] As the resin layer 126, an insulating layer having an organic material can be suitably used. For example, as the resin layer 126, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimidoamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins can be used. Alternatively, as the resin layer 126, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin may be used.
[0196] Furthermore, a photosensitive resin can be used as the resin layer 126. A photoresist may be used as the photosensitive resin. The photosensitive resin can be a positive-type material or a negative-type material.
[0197] The resin layer 126 may contain a material that absorbs visible light. For example, the resin layer 126 itself may be composed of a material that absorbs visible light, or the resin layer 126 may contain a pigment that absorbs visible light. As the resin layer 126, for example, a resin that can be used as a color filter that transmits red, blue, or green light and absorbs other light, or a resin that contains carbon black as a pigment and functions as a black matrix can be used.
[0198] The resin layer 126 absorbs light emitted obliquely from the light-emitting element, thereby suppressing light leakage (stray light) from the light-emitting element to adjacent light-emitting elements via the resin layer 126. This improves the display quality of the display device.
[0199] The insulating layer 125 is provided in contact with the side surface of the organic layer 112. The insulating layer 125 also covers the upper end of the organic layer 112. Furthermore, a portion of the insulating layer 125 is provided in contact with the upper surface of the substrate 161.
[0200] The insulating layer 125 is located between the resin layer 126 and the organic layer 112 and functions as a protective film to prevent the resin layer 126 from coming into contact with the organic layer 112. If the organic layer 112 and the resin layer 126 come into contact, the organic layer 112 may dissolve due to organic solvents used during the formation of the resin layer 126. Therefore, by providing the insulating layer 125 between the organic layer 112 and the resin layer 126, it is possible to protect the sides of the organic layer 112.
[0201] The insulating layer 125 can be an insulating layer having an inorganic material. For example, inorganic insulating films such as oxide insulating films, nitride insulating films, oxidative nitride insulating films, and nitride oxide insulating films can be used for the insulating layer 125. The insulating layer 125 may be a single layer or a laminated structure. Examples of oxide insulating films include silicon oxide film, aluminum oxide film, magnesium oxide film, indium gallium zinc oxide film, gallium oxide film, germanium oxide film, yttrium oxide film, zirconium oxide film, lanthanum oxide film, neodymium oxide film, hafnium oxide film, and tantalum oxide film. Examples of nitride insulating films include silicon nitride film and aluminum nitride film. Examples of oxidative nitride insulating films include silicon oxidative nitride film and aluminum oxidative nitride film. Examples of nitride oxide insulating films include silicon nitride film and aluminum nitride film. In particular, by applying an aluminum oxide film, a metal oxide film such as a hafnium oxide film, or an inorganic insulating film such as a silicon nitride film or a silicon oxide film, formed by atomic layer deposition (ALD), to the insulating layer 125, it is possible to form an insulating layer 125 with fewer pinholes and excellent protection for the EL layer.
[0202] In this specification, the term "oxide-nitride" refers to a material in which the oxygen content is greater than the nitrogen content, and the term "nitride oxide" refers to a material in which the nitrogen content is greater than the oxygen content. For example, when "silicon oxynitride" is written, it refers to a material in which the oxygen content is greater than the nitrogen content, and when "silicon nitride oxide" is written, it refers to a material in which the nitrogen content is greater than the oxygen content.
[0203] The insulating layer 125 can be formed using sputtering, chemical vapor deposition (CVD), pulsed laser deposition (PLD), ALD, or other methods. It is preferable to form the insulating layer 125 using the ALD method, which provides good coverage.
[0204] Alternatively, a reflective film (for example, a metal film containing one or more selected from silver, palladium, copper, titanium, and aluminum) may be provided between the insulating layer 125 and the resin layer 126, and the light emitted from the light-emitting layer may be reflected by the reflective film. This can improve the light extraction efficiency.
[0205] The insulating layer 124 is formed when a portion of the protective layer (also called a mask layer or sacrificial layer) used to protect the organic layer 112 remains after etching the organic layer 112. The insulating layer 124 can be made from the same material as the insulating layer 125. In particular, using the same material for both the insulating layer 124 and the insulating layer 125 is preferable because it allows for the use of common processing equipment.
[0206] In particular, metal oxide films such as aluminum oxide films and hafnium oxide films, or inorganic insulating films such as silicon nitride films and silicon oxide films, formed by the ALD method, have few pinholes and therefore offer excellent protection for the EL layer, making them suitable for use in insulating layers 125 and 124.
[0207] The protective layer 121 can be, for example, a single-layer structure or a multilayer structure including at least an inorganic insulating film. Examples of inorganic insulating films include oxide films or nitride films such as silicon oxide film, silicon oxide nitride film, silicon oxide nitride film, silicon nitride film, aluminum oxide film, aluminum oxide nitride film, and hafnium oxide film. Alternatively, semiconductor materials or conductive materials such as indium gallium oxide, indium zinc oxide, indium tin oxide, and indium gallium zinc oxide may be used as the protective layer 121.
[0208] An insulating layer 104 is provided on the protective layer 121, and the insulating layer 104 functions as a planarizing layer. The insulating layer 104 can be formed from a material that can be used as a resin layer 126, or a material that can be used as an insulating layer 125. In some cases, the insulating layer 104 may not be provided.
[0209] On the insulating layer 104, a plano-convex lens 102 (lenses 102G, 102B) is provided so as to overlap with the light-emitting element 110. An insulating layer 107 is also provided on the lens 102. Each lens 102 is provided in pairs with the light-emitting element 110. Specifically, lens 102R is provided so as to overlap with light-emitting element 110R, lens 102G is provided so as to overlap with light-emitting element 110G, and lens 102B is provided so as to overlap with light-emitting element 110B. In other words, one lens 102 is provided for each sub-pixel.
[0210] The lens 102 is positioned above the light-emitting element 110 (in the direction from which light is emitted). Because the lens 102 has a convex lens shape, it can be used to focus the light. In other words, it can suppress the divergence of light emitted by the light-emitting element, thereby improving the light extraction efficiency of the display device. The lens 102 can be manufactured using the same material and process as the resin layer 126.
[0211] The insulating layer 107 provided on the lens 102 is an adhesive layer provided between it and the substrate 163, and it is preferable to use an organic material. For example, an optical adhesive having a refractive index close to that of glass or film that can be used as the substrate 163 can be used.
[0212] Furthermore, while the above-mentioned lens can improve the efficiency of light extraction from the display panel, using a light-emitting element with higher luminous efficiency is also effective in increasing the front brightness of the display panel. In principle, with tandem organic EL elements, the brightness increases according to the number of stacked stages for the same current density, and a two-stage tandem organic EL element can obtain twice the brightness compared to a single organic EL element.
[0213] Furthermore, since the lifespan of an organic EL element depends on the current density, even if the brightness of a tandem organic EL element is doubled, its lifespan will be equivalent to that of a single organic EL element if the current density remains the same. In other words, tandem organic EL elements can be considered an effective technology for increasing the brightness and reliability of organic EL elements.
[0214] The above is a description of an example configuration of a light-emitting element and its vicinity.
[0215] Figure 11(A) is a block diagram illustrating a display panel 20 according to one embodiment of the present invention. The display panel 20 includes a pixel array 74, a circuit 75, and a circuit 76. The pixel array 74 has pixels 70 arranged in the column and row directions.
[0216] Pixel 70 may have multiple sub-pixels 71. The sub-pixels 71 have the function of emitting light for display. By assigning colors such as R (red), G (green), and B (blue) to the light emitted by the sub-pixels 71, full-color display can be achieved.
[0217] The sub-pixel 71 has a light-emitting device that emits unpolarized visible light. Preferably, an EL element such as an OLED or QLED is used as the light-emitting device. Examples of light-emitting materials for the EL element include fluorescent materials, phosphorescent materials, thermally activated delayed fluorescence (TADF) materials, and inorganic compounds (such as quantum dot materials). Alternatively, LEDs such as micro-LEDs can be used as the light-emitting device.
[0218] Circuits 75 and 76 are driver circuits for driving the sub-pixels 71. Circuit 75 can function as a source driver circuit, and circuit 76 can function as a gate driver circuit. Circuits 75 and 76 can be, for example, shift register circuits.
[0219] Alternatively, the display panel 20 may be divided into multiple regions vertically and horizontally, and pixels may be driven in each of the divided regions.
[0220] For example, as shown in Figure 11(B), circuits 75 and 76 can be separated and arranged below the pixel array 74. In this case, the display panel 20 can be made into a stacked structure of layers 77 and 78, with multiple circuits 75 and 76 each provided on layer 77, and the pixel array 74 on layer 78 so as to overlap them.
[0221] By dividing the circuits 75 and 76, the pixel array 74 can be driven in divided regions. For example, the pixel array 74 can be operated at partially different frame rates. The pixel array 74 can be displayed at partially different resolutions, and it can also be made compatible with foveal rendering.
[0222] Furthermore, by placing the driver circuit in the lower layer of the pixel array 74, the wiring length can be shortened and the wiring capacitance can be reduced. Therefore, a display device that can operate at high speed and with low power consumption can be made. In addition, the display panel 20 can have a narrow bezel.
[0223] Note that the arrangement and area of circuits 75 and 76 shown in Figure 11(B) are examples and can be changed as appropriate. Also, parts of circuits 75 and 76 can be formed on the same layer as the pixel array 74. Furthermore, layers 77 may be provided with circuits such as memory circuits, arithmetic circuits, and communication circuits.
[0224] This configuration, for example, involves providing layer 77 on a single-crystal silicon substrate, forming circuits 75 and 76 with transistors having silicon in the channel formation region (hereinafter referred to as Si transistors), and forming the pixel circuits of the pixel array 74 provided on layer 78 with transistors having metal oxide in the channel formation region (hereinafter referred to as OS transistors). OS transistors can be formed using thin films and can be stacked on top of Si transistors.
[0225] As shown in Figure 11(C), the configuration may also include a layer 79 between layer 77 and layer 78 on which an OS transistor is provided. The layer 79 can be provided with an OS transistor that forms part of the pixel circuit of the pixel array 74. Alternatively, it can be provided with an OS transistor that forms part of circuits 75 and 76. Alternatively, it can be provided with an OS transistor that forms part of circuits such as memory circuits, arithmetic circuits, and communication circuits that can be provided in layer 77.
[0226] Furthermore, the shape of the display panel 20 in a top view is not limited to a rectangle; it may also be a circle as shown in Figure 11(D), or a polygon such as an octagon as shown in Figure 11(E).
[0227] Figure 12(A) shows an example of a spectacle-type device having a display device and optical equipment according to one embodiment of the present invention. Here, the combination of the display panel 20 and the reflector-refractor optical system 30 shown in Figure 5 or Figure 8 is shown as a display unit 99 with a dashed line.
[0228] The user can view the image displayed on the display panel 20 by bringing their eyes close to the vicinity of the reflective / refracting optical system 30 located on the display surface side of the display panel 20. Because the user views the image with a widened field of view provided by the reflective / refracting optical system 30, they can experience a sense of immersion and presence.
[0229] Two sets of display units 99 are incorporated into the housing 90. One display unit 99 is for the right eye, and the other is for the left eye. By displaying images corresponding to the parallax in each display unit 99, the user can perceive a sense of depth in the images.
[0230] Furthermore, the housing 90 or the retaining device 95 may be provided with input and output terminals. The input terminals can be connected to cables that supply video signals from video output devices, power for charging batteries, etc. The output terminals may function as, for example, audio output terminals, allowing the connection of earphones, headphones, etc. However, if the system is configured to output audio data via wireless communication, or if audio is output from an external video output device, such audio output terminals may not be provided.
[0231] Furthermore, a wireless communication module and a storage module may be provided inside the housing 90 or the holder 95. The wireless communication module allows for wireless communication, enabling the download of content to be viewed and its storage in the storage module. This allows the user to view the downloaded content offline.
[0232] Furthermore, as shown in Figure 12(B), a gaze detection sensor 91 may be provided inside the housing 90. The gaze detection sensor 91 uses light emitted from a light source 92 provided inside the housing 90 to detect the position of the gaze by reading the change in reflected light due to the movement of the iris. It is preferable to use near-infrared light, which has extremely low visual sensitivity, as the light emitted by the light source 92. For example, operation buttons such as power on, power off, sleep, volume adjustment, channel change, menu display, selection, confirmation, back, and video playback, stop, pause, fast forward, and rewind may be displayed, and the user can perform each operation by visually confirming the operation button. In addition, the system may detect the user's fatigue state from the number of blinks, etc., and display an alert.
[0233] By using the display device according to one aspect of the present invention in a glasses-type device, it is possible to obtain an electronic device with low power consumption and high reliability.
[0234] This embodiment can be implemented in appropriate combination with other embodiments described in this specification, at least in part.
[0235] (Embodiment 2) In this embodiment, a configuration example of a display panel that can be used as the display device according to one aspect of the present invention will be described.
[0236] The display panel of this embodiment is a high-definition display panel, and is particularly suitable for use in the display unit of wearable devices that can be worn on the head, such as devices for VR such as head-mounted displays, and devices for AR of glasses type.
[0237] [Display Module] Fig. 13(A) shows a perspective view of the display module 280. The display module 280 includes a display panel 200A and an FPC 290. Note that the display panel included in the display module 280 is not limited to the display panel 200A, and may be any one of the display panels 200B to 200F described later.
[0238] The display module 280 includes a substrate 291 and a substrate 292. The display module 280 includes a display unit 281. The display unit 281 is an area for displaying an image.
[0239] Fig. 13(B) shows a perspective view schematically showing the configuration on the substrate 291 side. On the substrate 291, a circuit unit 282, a pixel circuit unit 283 on the circuit unit 282, and a pixel unit 284 on the pixel circuit unit 283 are stacked. In addition, a terminal unit 285 for connecting to the FPC 290 is provided in a portion that does not overlap with the pixel unit 284 on the substrate 291. The terminal unit 285 and the circuit unit 282 are connected via a wiring unit 286 formed of a plurality of wirings.
[0240] The pixel section 284 has a plurality of periodically arranged pixels 284a. A magnified view of one pixel 284a is shown on the right side of Figure 13(B). The pixel 284a has a light-emitting element 110R that emits red light, a light-emitting element 110G that emits green light, and a light-emitting element 110B that emits blue light.
[0241] The pixel circuit section 283 has a plurality of periodically arranged pixel circuits 283a. Each pixel circuit 283a is a circuit that controls the light emission of three light-emitting devices that one pixel 284a has. A single pixel circuit 283a may be configured to have three circuits that control the light emission of one light-emitting device. For example, each pixel circuit 283a can be configured to have at least one selection transistor, one current control transistor (drive transistor), and a capacitive element for each light-emitting device. In this case, a gate signal is input to the gate of the selection transistor, and a source signal is input to the source. This realizes an active matrix type display panel.
[0242] The circuit section 282 has circuits for driving each pixel circuit 283a of the pixel circuit section 283. For example, it is preferable to have one or both of a gate line drive circuit and a source line drive circuit. In addition, it may have at least one of the following: an arithmetic circuit, a memory circuit, and a power supply circuit. Furthermore, transistors provided in the circuit section 282 may constitute a part of the pixel circuit 283a. That is, the pixel circuit 283a may be composed of transistors in the pixel circuit section 283 and transistors in the circuit section 282.
[0243] The FPC290 functions as wiring for supplying video signals and power potential to the circuit section 282 from an external source. An IC may also be mounted on the FPC290.
[0244] The display module 280 can be configured such that one or both of the pixel circuit section 283 and the circuit section 282 are superimposed on the lower side of the pixel section 284, thereby enabling an extremely high aperture ratio (effective display area ratio) of the display section 281. For example, the aperture ratio of the display section 281 can be 40% or more and less than 100%, preferably 50% or more and 95%, and more preferably 60% or more and 95%. Furthermore, it is possible to arrange the pixels 284a at an extremely high density, enabling an extremely high pixel density of the display section 281. For example, it is preferable that the pixels 284a in the display section 281 are arranged at a pixel density of 20000 ppi or less, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, with a pixel density of 20000 ppi or less, or 30000 ppi or less.
[0245] Because such a display module 280 is extremely high-resolution, it can be suitably used in VR devices such as head-mounted displays, or in glasses-type AR devices. For example, even in a configuration where the display part of the display module 280 is viewed through lenses, the display module 280 has an extremely high-resolution display part 281, so even when the display part is magnified with lenses, pixels are not visible, allowing for a highly immersive display. Furthermore, the display module 280 is not limited to this, and can be suitably used in electronic devices with relatively small display parts. For example, it can be suitably used in the display part of wearable electronic devices such as wristwatches.
[0246] [Display Panel 200A] The display panel 200A shown in Figure 14 includes a substrate 301, light-emitting elements 110R, 110G, 110B, a capacitor 240, and a transistor 310.
[0247] Substrate 301 corresponds to substrate 291 in Figures 13(A) and 13(B).
[0248] The transistor 310 is a transistor having a channel-forming region in the substrate 301. The substrate 301 can be a semiconductor substrate such as a single-crystal silicon substrate. The transistor 310 comprises a portion of the substrate 301, a conductive layer 311, a low-resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 functions as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and functions as a gate insulating layer. The low-resistance region 312 is a region of the substrate 301 doped with impurities and functions as either a source or a drain. The insulating layer 314 is provided covering the side surface of the conductive layer 311.
[0249] Furthermore, an element isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301.
[0250] Furthermore, an insulating layer 261 is provided covering the transistor 310, and a capacitance 240 is provided on the insulating layer 261.
[0251] The capacitor 240 has a conductive layer 241, a conductive layer 245, and an insulating layer 243 located between them. The conductive layer 241 acts as one electrode of the capacitor 240, the conductive layer 245 acts as the other electrode of the capacitor 240, and the insulating layer 243 acts as the dielectric of the capacitor 240.
[0252] The conductive layer 241 is provided on the insulating layer 261 and embedded in the insulating layer 254. The conductive layer 241 is connected to either the source or drain of the transistor 310 by a plug 271 embedded in the insulating layer 261. The insulating layer 243 is provided covering the conductive layer 241. The conductive layer 245 is provided in the region that overlaps with the conductive layer 241 via the insulating layer 243.
[0253] An insulating layer 255a is provided covering the capacitance 240, an insulating layer 255b is provided on top of the insulating layer 255a, and an insulating layer 255c is provided on top of the insulating layer 255b.
[0254] Insulating layers 255a, 255b, and 255c can each preferably be made of inorganic insulating films. For example, it is preferable to use silicon oxide films for insulating layers 255a and 255c, and silicon nitride films for insulating layer 255b. This allows insulating layer 255b to function as an etching protective film. In this embodiment, an example is shown in which a part of insulating layer 255c is etched and a recess is formed, but the insulating layer 255c does not necessarily have to have a recess.
[0255] A light-emitting element 110G and a light-emitting element 110B are provided on the insulating layer 255c. The configuration of the light-emitting elements 110G and 110B can be found in Embodiment 1.
[0256] The display panel 200A uses different light-emitting devices for each light-emitting color, resulting in minimal chromaticity changes between low-brightness and high-brightness illumination. Furthermore, because the organic layers 112G and 112B are separated, crosstalk between adjacent sub-pixels can be suppressed even in high-resolution display panels. Therefore, a display panel with high resolution and high display quality can be realized.
[0257] An insulating layer 125 and a resin layer 126 are provided in the region between adjacent light-emitting elements.
[0258] The pixel electrodes 111G and 111B of the light-emitting element are connected to either the source or drain of the transistor 310 by plugs 256 embedded in insulating layers 255a, 255b, and 255c, a conductive layer 241 embedded in insulating layer 254, and plugs 271 embedded in insulating layer 261. The height of the upper surface of insulating layer 255c and the height of the upper surface of plug 256 are equal or approximately equal. Various conductive materials can be used for the plugs.
[0259] Further, a protective layer 121 is provided on the light-emitting element 110G and the light-emitting element 110B. An insulating layer 104 and lenses 102 (lenses 102G and 102B) are provided on the protective layer 121. The substrate 163 is bonded on the lenses 102 by an insulating layer 107 that functions as an adhesive layer.
[0260] An insulating layer covering the upper surface end portion of the pixel electrode 111 is not provided between two adjacent pixel electrodes 111. Therefore, the interval between adjacent light-emitting elements can be made extremely narrow. Thus, a high-definition or high-resolution display panel can be obtained.
[0261] [Display panel 200B] The display panel 200B shown in FIG. 15 has a structure in which a transistor 310A having a channel formed in a semiconductor substrate and a transistor 310B are stacked. In the following description of the display panel, the description of the same parts as the previously described display panel may be omitted.
[0262] The display panel 200B has a structure in which a substrate 301B provided with a transistor 310B, a capacitor 240, and a light-emitting device and a substrate 301A provided with a transistor 310A are bonded together.
[0263] Here, an insulating layer 345 is provided on the lower surface of the substrate 301B, and an insulating layer 346 is provided on the insulating layer 261 provided on the substrate 301A. The insulating layer 345 and the insulating layer 346 are insulating layers that function as protective layers, and can suppress the diffusion of impurities into the substrate 301B and the substrate 301A. As the insulating layer 345 and the insulating layer 346, an inorganic insulating film that can be used for the protective layer 121 can be used.
[0264] A plug 343 penetrating the substrate 301B and the insulating layer 345 is provided on the substrate 301B. Here, it is preferable to provide an insulating layer 344 that functions as a protective layer to cover the side surface of the plug 343.
[0265] Furthermore, the substrate 301B has a conductive layer 342 provided beneath the insulating layer 345. The conductive layer 342 is embedded in the insulating layer 335, and the undersides of the conductive layer 342 and the insulating layer 335 are flattened. The conductive layer 342 is also connected to the plug 343.
[0266] On the other hand, the substrate 301A has a conductive layer 341 on top of an insulating layer 346. The conductive layer 341 is embedded in the insulating layer 336, and the upper surfaces of the conductive layer 341 and the insulating layer 336 are flattened.
[0267] It is preferable to use the same conductive material for conductive layer 341 and conductive layer 342. For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or a metal nitride film (titanium nitride film, molybdenum nitride film, tungsten nitride film) composed of the above elements can be used. In particular, it is preferable to use copper for conductive layer 341 and conductive layer 342. This makes it possible to apply Cu-Cu (copper-copper) direct bonding technology (a technology that achieves electrical conductivity by connecting Cu (copper) pads to each other).
[0268] [Display Panel 200C] The display panel 200C shown in Figure 16 has a configuration in which conductive layer 341 and conductive layer 342 are joined via bumps 347.
[0269] As shown in Figure 16, conductive layers 341 and 342 can be connected by providing a bump 347 between them. The bump 347 can be formed using a conductive material containing, for example, gold (Au), nickel (Ni), indium (In), or tin (Sn). Solder may also be used as the bump 347. An adhesive layer 348 may also be provided between the insulating layer 345 and the insulating layer 346. Furthermore, when the bump 347 is provided, the insulating layer 335 and the insulating layer 336 may be omitted.
[0270] [Display Panel 200D] The display panel 200D shown in Figure 17 differs from the display panel 200A mainly in its transistor configuration.
[0271] Transistor 320 is an OS transistor in which a metal oxide (also called an oxide semiconductor) is applied to the semiconductor layer where the channel is formed.
[0272] The transistor 320 has a semiconductor layer 321, an insulating layer 323, a conductive layer 324, a pair of conductive layers 325, an insulating layer 326, and a conductive layer 327.
[0273] Substrate 331 corresponds to substrate 291 in Figures 13(A) and 13(B).
[0274] An insulating layer 332 is provided on the substrate 331. The insulating layer 332 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320, and prevents oxygen from detaching from the semiconductor layer 321 to the insulating layer 332. As the insulating layer 332, for example, a film that is less susceptible to hydrogen or oxygen diffusion than a silicon oxide film can be used, such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.
[0275] A conductive layer 327 is provided on an insulating layer 332, and an insulating layer 326 is provided covering the conductive layer 327. The conductive layer 327 functions as the first gate electrode of the transistor 320, and a portion of the insulating layer 326 functions as the first gate insulating layer. It is preferable to use an oxide insulating film, such as a silicon oxide film, for at least the portion of the insulating layer 326 that is in contact with the semiconductor layer 321. It is preferable that the upper surface of the insulating layer 326 is flattened.
[0276] The semiconductor layer 321 is provided on the insulating layer 326. Preferably, the semiconductor layer 321 has a metal oxide (also called an oxide semiconductor) film that exhibits semiconductor properties. A pair of conductive layers 325 are provided in contact with the semiconductor layer 321 and function as a source electrode and a drain electrode.
[0277] An insulating layer 328 is provided covering the top and side surfaces of a pair of conductive layers 325, as well as the side surfaces of the semiconductor layer 321, and an insulating layer 264 is provided on top of the insulating layer 328. The insulating layer 328 functions as a barrier layer to prevent impurities such as water or hydrogen from diffusing into the semiconductor layer 321 from the insulating layer 264, etc., and to prevent oxygen from detaching from the semiconductor layer 321. An insulating film similar to that of the insulating layer 332 can be used as the insulating layer 328.
[0278] The insulating layer 328 and the insulating layer 264 are provided with openings that reach the semiconductor layer 321. An insulating layer 323 in contact with the upper surface of the semiconductor layer 321 and a conductive layer 324 are embedded inside these openings. The conductive layer 324 functions as a second gate electrode, and the insulating layer 323 functions as a second gate insulating layer.
[0279] The upper surfaces of the conductive layer 324, the insulating layer 323, and the insulating layer 264 are flattened so that their heights are the same or approximately the same, and the insulating layer 329 and insulating layer 265 are provided covering them.
[0280] Insulating layers 264 and 265 function as interlayer insulating layers. Insulating layer 329 functions as a barrier layer to prevent impurities such as water or hydrogen from diffusing into the transistor 320 from insulating layer 265, etc. As insulating layer 329, an insulating film similar to that used for insulating layers 328 and 332 can be used.
[0281] A plug 274, which connects to one of the pair of conductive layers 325, is provided so as to be embedded in the insulating layer 265, insulating layer 329, and insulating layer 264. Here, it is preferable that the plug 274 has a conductive layer 274a that covers the sides of the openings of the insulating layer 265, insulating layer 329, insulating layer 264, and insulating layer 328, and a part of the upper surface of the conductive layer 325, and a conductive layer 274b that is in contact with the upper surface of the conductive layer 274a. In this case, it is preferable to use a conductive material that does not easily allow hydrogen and oxygen to diffuse as the conductive layer 274a.
[0282] The structure of the transistors in the display panel of this embodiment is not particularly limited. For example, planar transistors, staggered transistors, inverse staggered transistors, etc., can be used. Furthermore, either a top-gate or bottom-gate transistor structure may be used. Alternatively, gates may be provided above and below the semiconductor layer in which the channel is formed.
[0283] The transistor 320 employs a configuration in which a semiconductor layer on which a channel is formed is sandwiched between two gates. The transistor may be driven by connecting the two gates and supplying them with the same signal. Alternatively, the threshold voltage of the transistor may be controlled by applying a potential to control the threshold voltage to one of the two gates and a potential to drive the other gate.
[0284] The crystallinity of the semiconductor material used in the semiconductor layer of the transistor is not particularly limited; amorphous semiconductors, single-crystal semiconductors, or semiconductors with crystalline properties other than single crystals (microcrystalline semiconductors, polycrystalline semiconductors, or semiconductors having crystalline regions in part) may be used. Using a single-crystal semiconductor or a semiconductor with crystalline properties is preferable because it can suppress the degradation of transistor characteristics.
[0285] The band gap of the metal oxide used in the semiconductor layer of the transistor is preferably 2 eV or more, and more preferably 2.5 eV or more. By using a metal oxide with a large band gap, the off-current of the OS transistor can be reduced.
[0286] The semiconductor layer provided in the OS transistor preferably contains indium. Alternatively, it is preferable to have indium, M (where M is one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium), and zinc. In particular, it is preferable that M is one or more selected from aluminum, gallium, yttrium, and tin.
[0287] For example, it is preferable to use an indium-containing oxide (InOx) as the semiconductor layer of the OS transistor. Alternatively, it is preferable to use an oxide containing indium and gallium (also written as IGO). Alternatively, it is preferable to use an oxide containing indium, gallium, and zinc (also written as IGZO). Alternatively, it is preferable to use an oxide containing indium, tin, and zinc. Alternatively, it is preferable to use an oxide containing indium, gallium, tin, and zinc.
[0288] Furthermore, the oxide semiconductor used for the semiconductor layer of the OS transistor is preferably formed using either the sputtering method or the ALD method. When forming the oxide semiconductor using the sputtering method, productivity can be increased and the film density can be increased. When forming the oxide semiconductor using the ALD method, the coverage of the film can be improved.
[0289] OS transistors, which have a wider bandgap and lower carrier concentration than silicon transistors, can achieve extremely low off-currents. Therefore, this low off-current allows the charge stored in a capacitor connected in series with the transistor to be retained for extended periods.
[0290] OS transistors have extremely high field-effect mobility compared to transistors using amorphous silicon. Furthermore, OS transistors exhibit remarkably low source-drain leakage current (also called off-current) in the off state, allowing them to retain charge stored in a capacitor connected in series with the transistor for extended periods. Additionally, the application of OS transistors can reduce the power consumption of display panels.
[0291] Furthermore, to increase the luminescence brightness of the light-emitting device included in the pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting device. To achieve this, it is necessary to increase the source-drain voltage of the drive transistor included in the pixel circuit. Compared to Si transistors, OS transistors have a higher breakdown voltage between the source and drain, so a higher voltage can be applied between the source and drain of an OS transistor. Therefore, by using an OS transistor as the drive transistor included in the pixel circuit, the amount of current flowing through the light-emitting device can be increased, thereby increasing the luminescence brightness of the light-emitting device.
[0292] Furthermore, when the transistor operates in the saturation region, OS transistors exhibit a smaller change in source-drain current in response to changes in gate-source voltage compared to Si transistors. Therefore, by using OS transistors as driving transistors in the pixel circuit, the current flowing between the source and drain can be precisely controlled by changes in gate-source voltage, thereby allowing control of the amount of current flowing to the light-emitting device. This allows for an increase in the number of grayscale levels in the pixel circuit.
[0293] Furthermore, in terms of the saturation characteristics of the current flowing when a transistor operates in the saturation region, OS transistors can supply a more stable current (saturation current) than Si transistors, even when the source-drain voltage gradually increases. Therefore, by using OS transistors as driving transistors, a stable current can be supplied to the light-emitting device even if there are variations in the current-voltage characteristics of the EL device. In other words, when operating in the saturation region, the source-drain current remains almost unchanged even when the source-drain voltage is increased, thus stabilizing the luminescence brightness of the light-emitting device.
[0294] As described above, by using OS transistors in the drive transistors included in the pixel circuit, it is possible to achieve "reduced power consumption," "increased luminescence brightness," "multi-gradation," and "suppression of variations in light-emitting devices."
[0295] [Display Panel 200E] The display panel 200E shown in Figure 18 has a configuration in which a transistor 310 with a channel formed on a substrate 301 and a transistor 320 containing a metal oxide in the semiconductor layer where the channel is formed are stacked.
[0296] An insulating layer 261 is provided covering the transistor 310, and a conductive layer 251 is provided on the insulating layer 261. An insulating layer 262 is provided covering the conductive layer 251, and a conductive layer 252 is provided on the insulating layer 262. The conductive layers 251 and 252 each function as wiring. An insulating layer 263 and an insulating layer 332 are provided covering the conductive layer 252, and a transistor 320 is provided on the insulating layer 332. An insulating layer 265 is provided on the transistor 320, and a capacitor 240 is provided on the insulating layer 265. The capacitor 240 and the transistor 320 are connected by a plug 274.
[0297] Transistor 320 can be used as a transistor constituting a pixel circuit. Transistor 310 can also be used as a transistor constituting a pixel circuit, or as a transistor constituting a drive circuit (gate line drive circuit, source line drive circuit) for driving the pixel circuit. Furthermore, transistors 310 and 320 can be used as transistors constituting various circuits such as arithmetic circuits or memory circuits.
[0298] This configuration allows for the formation of not only pixel circuits but also drive circuits directly beneath the light-emitting device, making it possible to miniaturize the display panel compared to cases where the drive circuits are located around the display area.
[0299] [Display Panel 200F] The display panel 200F shown in Figure 19 is a configuration in which transistor 320 of the display panel 200E shown in Figure 18 is replaced with transistor 320A (vertical transistor). This configuration of replacing transistor 320 with transistor 320A can also be applied to the display panel 200D shown in Figure 17.
[0300] Figure 20(A) shows a cross-sectional view of transistor 320A in the XZ plane. Figure 20(B) shows a cross-sectional view in the XY plane, including wiring 440. Figures 20(A) and 20(B) show arrows indicating the X, Y, and Z directions, respectively.
[0301] Transistor 320A comprises an oxide semiconductor 470, an insulator 430, and a conductor 420. The oxide semiconductor 470 functions as a semiconductor layer, the insulator 430 functions as a gate insulator, and the conductor 420 functions as a gate electrode. Wiring 450 has a region that functions as either the source electrode or the drain electrode of transistor 320A. Wiring 440 has a region that functions as either the source electrode or the drain electrode of transistor 320A.
[0302] The wiring 440 and the insulator 480 are provided with openings 490 that penetrate through them and reach the wiring 450. The openings 490 have a roughly circular columnar shape on their upper surface. This configuration allows for miniaturization or high integration of memory cells. Preferably, the side surface of the opening 490 is perpendicular to the upper surface of the wiring 450. In this specification, "perpendicular" means a state in which two straight lines form an angle of 85° or more and 95° or less.
[0303] At least a portion of the oxide semiconductor 470 is placed in the opening 490. The oxide semiconductor 470 has a region in contact with the upper surface of the wiring 450, a region in contact with the side surface of the wiring 440, and a region in contact with the side surface of the insulator 480 in the opening 490.
[0304] The insulator 430 is positioned such that at least a portion of it covers the opening 490. The conductor 420 is positioned such that at least a portion of it is located in the opening 490. Preferably, the conductor 420 is provided so as to fill the opening 490, and in order to increase the degree of integration, its shape in a top view is preferably approximately circular.
[0305] As shown in Figure 20(A), the oxide semiconductor 470 has a region 470i and regions 470na and 470nb that are provided so as to sandwich region 470i.
[0306] Region 470na is the region of the oxide semiconductor 470 that is in contact with the wiring 450. At least a portion of region 470na functions as one of the source region and drain region of transistor 320A. Region 470nb is the region of the oxide semiconductor 470 that is in contact with the wiring 440. At least a portion of region 470nb functions as the other of the source region and drain region of transistor 320A. As shown in Figure 20(B), the wiring 440 is in contact with the entire outer periphery of the oxide semiconductor 470. Therefore, the other of the source region and drain region of transistor 320A can be formed around the entire outer periphery of the portion of the oxide semiconductor 470 that is formed in the same layer as the wiring 440.
[0307] Region 470i is the region in the oxide semiconductor 470 sandwiched between region 470na and region 470nb. At least a portion of region 470i functions as the channel formation region of transistor 320A. In other words, the channel formation region of transistor 320A is formed in a portion of the oxide semiconductor 470 located in the region between wiring 450 and wiring 440. Alternatively, the channel formation region of transistor 320A can be said to be located in the region of the oxide semiconductor 470 that is in contact with the insulator 480 or in a region near it.
[0308] The channel length of transistor 320A is the distance between the source region and the drain region. In other words, the channel length of transistor 320A is determined by the thickness of the insulator 480 on the wiring 450. Figure 20(A) shows the channel length L of transistor 320A with a dashed double arrow. In a cross-sectional view, the channel length L is the distance between the edge of the region where the oxide semiconductor 470 and the wiring 450 are in contact and the edge of the region where the oxide semiconductor 470 and the wiring 440 are in contact. In other words, the channel length L corresponds to the length of the side surface of the insulator 480 on the opening 490 side in a cross-sectional view.
[0309] In planar transistors, the channel length is limited by the exposure limit of photolithography, making further miniaturization difficult. However, in one embodiment of the present invention, the channel length can be set by the film thickness of the insulator 480. Therefore, the channel length of transistor 320A can be made into an extremely fine structure below the exposure limit of photolithography (for example, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less, and 1 nm or more, or 5 nm or more). This makes it possible to increase the on-current of transistor 320A.
[0310] Furthermore, as described above, a channel formation region, a source region, and a drain region can be formed in the aperture 490. This reduces the area occupied by transistor 320A compared to conventional transistors where the channel formation region, source region, and drain region are provided separately on the XY plane. This allows for an increase in pixel density.
[0311] Thus, a transistor having a channel-forming region along the side surface of the insulator 480 at the opening 490 is also called a vertical transistor.
[0312] Furthermore, in the XY plane including the channel formation region of the oxide semiconductor 470, the oxide semiconductor 470, the insulator 430, and the conductor 420 are arranged concentrically, similar to Figure 20(B). Therefore, the side surface of the conductor 420 located at the center faces the side surface of the oxide semiconductor 470 via the insulator 430. In other words, in a top view, the entire perimeter of the oxide semiconductor 470 becomes the channel formation region. In this case, for example, the channel width of the transistor 320A is determined by the length of the outer circumference of the oxide semiconductor 470. That is, the channel width of the transistor 320A can be said to be determined by the size of the maximum width of the opening 490 (the maximum diameter if the opening 490 is circular in a top view). Figures 20(A) and 20(B) show the maximum width D of the opening 490 with a double-headed arrow. Figure 20(B) shows the channel width W of the transistor 320A with a double-headed arrow. By increasing the maximum width D of the aperture 490, the channel width per unit area can be increased, and the on-current can be increased.
[0313] When forming the aperture 490 using photolithography, the maximum width D of the aperture 490 is limited by the exposure limit of the photolithography. Furthermore, the maximum width D of the aperture 490 is limited by the film thickness of the oxide semiconductor 470, insulator 430, and conductor 420 provided in the aperture 490. The maximum width D of the aperture 490 is, for example, 5 nm or more, 10 nm or more, or 20 nm or more, and preferably 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, or 30 nm or less. Note that if the aperture 490 is circular in a top view, the maximum width D of the aperture 490 corresponds to the diameter of the aperture 490, and the channel width W can be calculated as "D × π".
[0314] Furthermore, in a memory device according to one aspect of the present invention, the channel length L of the transistor 320A is preferably smaller than the channel width W of the transistor 320A. In one aspect of the present invention, the channel length L of the transistor 320A is 0.1 times or more and 0.99 times or less, preferably 0.5 times or more and 0.8 times or less, the channel width W of the transistor 320A. By adopting such a configuration, a transistor with good electrical characteristics and high reliability can be realized.
[0315] Furthermore, by forming the opening 490 so that it is roughly circular when viewed from above, the oxide semiconductor 470, the insulator 430, and the conductor 420 are arranged concentrically. As a result, the distance between the conductor 420 and the oxide semiconductor 470 becomes roughly uniform, so that the gate electric field can be applied to the oxide semiconductor 470 roughly uniformly.
[0316] In transistors using oxide semiconductors for the semiconductor layer, the channel formation region preferably has fewer oxygen vacancies or lower concentrations of impurities such as hydrogen, nitrogen, and metallic elements than the source and drain regions. For example, the concentration of aluminum in the channel formation region of an oxide semiconductor is 1 × 10⁻⁶. 22 atoms / cm 3 The following is preferable: 1 × 10 21 atoms / cm 3 The following is more preferable: 1 × 10 20 atoms / cm3 The following is more preferable: 5 × 10 19 atoms / cm 3 The following is more preferable: 1 × 10 19 atoms / cm 3 The following is more preferable: 5 × 10 18 atoms / cm 3 The following is more preferable: 1 × 10 18 atoms / cm 3 The following are even more preferable.
[0317] Furthermore, hydrogen near the oxygen vacancy can fill the oxygen vacancy, creating a defect (hereinafter referred to as V) O In the channel formation region, V (sometimes called H) is formed and can generate carrier electrons. O It is preferable that H is also reduced. Thus, the channel formation region of the transistor is a high-resistance region with a low carrier concentration. Therefore, the channel formation region of the transistor can be said to be type i (intrinsic) or substantially type i.
[0318] Furthermore, the source and drain regions of transistors using oxide semiconductors for the semiconductor layer have more oxygen vacancies than the channel formation region. O This region has increased carrier concentration and low resistance due to a high concentration of hydrogen (H) or high concentrations of impurities such as hydrogen, nitrogen, and metallic elements. In other words, the source and drain regions of a transistor are n-type regions with higher carrier concentration and lower resistance compared to the channel formation region.
[0319] In Figure 20(A), etc., the opening 490 is provided such that its side surface is perpendicular to the top surface of the wiring 450, but the present invention is not limited to this. For example, the side surface of the opening 490 may be tapered.
[0320] This embodiment can be implemented in appropriate combination with other embodiments and examples described herein, at least in part.
[0321] (Embodiment 3) This embodiment describes an indium oxide film that can be used in the semiconductor layer of a transistor in a display panel according to one aspect of the present invention.
[0322] Indium oxide is a semiconductor material with completely different physical properties from oxide semiconductors such as In-Ga-Zn oxide (hereinafter also referred to as IGZO) and zinc oxide.
[0323] In this specification, indium oxide having at least a crystalline portion or crystalline region in the film is referred to as crystalline indium oxide (crystal IO) or crystalline indium oxide (crystalline IO). Examples of crystal IO or crystalline IO include single-crystal indium oxide, polycrystalline indium oxide, and microcrystalline indium oxide.
[0324] Indium oxide is a semiconductor material with completely different physical properties from oxide semiconductors such as In-Ga-Zn oxide (hereinafter also referred to as IGZO) and zinc oxide.
[0325] This section describes the carrier concentration dependence of the hole mobility of indium oxide, silicon, and IGZO. Figure 21(A) shows the carrier concentration dependence of silicon (Si) and indium oxide (InO X Figure 21(B) is a schematic diagram of the carrier concentration dependence of hole mobility for IGZO.
[0326] First, as indicated by the arrows in Figure 21(B), IGZO tends to exhibit higher hole mobility as the carrier concentration increases. On the other hand, as indicated by the arrows in Figure 21(A), indium oxide tends to exhibit higher hole mobility as the carrier concentration decreases (see Non-Patent Literature 1). This trend is similar to that of silicon, where the lower the concentration of dopants (impurities) in the material, the less impurity scattering occurs and the higher the hole mobility. In other words, the higher the purity and intrinsic nature of indium oxide, the higher its hole mobility. From these results, it can be said that indium oxide, unlike IGZO, is a material with physical properties similar to silicon. Note that the properties of indium oxide shown in Figure 21(A) are assumed to be those of a single crystal. Therefore, when indium oxide is not a single crystal (for example, polycrystalline), the properties may differ from those shown in Figure 21(A).
[0327] In Figure 21(A), the low carrier concentration range R1 exhibits extremely high hole mobility, making it a suitable carrier concentration range for, for example, the channel formation region of a transistor. For example, in the case of indium oxide, the range R1 is such that the carrier concentration value is 1 × 10⁻⁶. 15 cm -3 This range includes, for example, 1 × 10 14 cm -3 The above is 1 x 10 18 cm -3 The range is as follows: By sufficiently reducing the carrier concentration, the hole mobility value can be increased to 270 cm⁻¹. 2 It can be expected to be raised to the level of (V·s).
[0328] Furthermore, in indium oxide, the region where the carrier concentration is within the range R1 may contain elements that lower the carrier concentration. Examples of elements that lower the carrier concentration include magnesium, calcium, zinc, cadmium, and copper. By substituting these elements for indium, the carrier concentration can be lowered. Other elements that lower the carrier concentration include nitrogen, phosphorus, arsenic, and antimony. For example, by substituting nitrogen, phosphorus, arsenic, or antimony for oxygen, the carrier concentration can be lowered.
[0329] On the other hand, the range R2 with high carrier concentration has low electrical resistance and can be said to be a suitable range of carrier concentration for applications such as the source and drain regions of a transistor, resistors, or transparent conductive films. The range R2 is when the carrier concentration value is 1 × 10⁻⁶. 20 cm -3 This range includes, for example, 1 × 10 19 cm -3 The above is 1 x 10 22 cm -3 The range is as follows: By making the carrier concentration sufficiently high, the resistivity can be increased to 1 × 10⁻⁶. -4 It is expected that the level can be reduced to below Ω·cm.
[0330] Furthermore, in the indium oxide, the region where the carrier concentration is in the range R2 may contain elements that increase the carrier concentration. For example, it is preferable to include elements common to the source and drain electrodes of the transistor. Examples of elements that increase the carrier concentration include titanium, zirconium, hafnium, tantalum, tungsten, molybdenum, tin, silicon, and boron. In particular, it is more preferable to use elements in which the oxide is conductive or semiconducting.
[0331] In this way, indium oxide uses regions with low carrier concentrations for the transistor's channel formation region and regions with high carrier concentrations for the transistor's source and drain regions. In other words, indium oxide can be considered an oxide in which valence electron control is possible. Note that in IGZO, strain can form in the source and drain regions due to stress on the electrodes in contact with the IGZO, and n-type regions may be formed. On the other hand, unlike IGZO, indium oxide allows for valence electron control, so it does not require strain to form in the film as in IGZO. Less strain in the film is expected to improve reliability. For example, by creating regions with carrier concentrations in the range R1 and range R2 shown in Figure 21(A) within the indium oxide film, a so-called nin junction (a junction between an n-type region, an i-type region, and an n-type region) can be created. Note that valence electron control in silicon transistors is generally known. On the other hand, valence electron control in indium oxide transistors is a novel technological concept that would not normally be conceived.
[0332] By applying the above technical concept, the indium oxide transistor described herein has two or more, preferably three or more, more preferably four or more, and most preferably five of the following features (1) to (5): (1) High on-current (in other words, high mobility). (2) Low off-current. (3) Normally off is possible. (4) High reliability. (5) High cutoff frequency (fT). For example, the indium oxide transistor described herein has high mobility, low off-current, and is normally off. This transistor is different from a transistor that is high mobility and normally on.
[0333] Next, we will describe indium oxide films applied to transistors. Indium oxide films are preferably crystalline (i.e., they have crystal grains). Examples of films with crystal grains include single-crystal films, polycrystalline films, or amorphous films (also called microcrystalline films) containing crystal grains. In particular, polycrystalline films are preferred for indium oxide films, and single-crystal films are more preferred. Single-crystal films do not have crystal grain boundaries. Impurities that inhibit carrier flow (typically insulating impurities, insulating oxides, etc.) tend to segregate at crystal grain boundaries. By using a single-crystal film, carrier scattering at crystal grain boundaries can be suppressed, enabling the realization of transistors with high field-effect mobility. Furthermore, it offers excellent effects such as suppressing variations in transistor characteristics caused by these crystal grain boundaries.
[0334] Furthermore, polycrystalline films are preferable because they can reduce carrier scattering and exhibit high field-effect mobility compared to microcrystalline or amorphous films. When using polycrystalline films, it is preferable to use films with the largest possible grain size and few grain boundaries. In a transistor to which a polycrystalline indium oxide film is applied, if there are no grain boundaries in the channel formation region, or if no grain boundaries are observed, the channel formation region is located within the single-crystal region contained in the polycrystalline film, and therefore it can be considered a transistor to which single-crystal indium oxide is applied.
[0335] The crystallinity of indium oxide can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscopy (TEM), or electron diffraction (ED). Alternatively, a combination of these methods may be used for analysis.
[0336] Furthermore, in this specification, a semiconductor layer in which no grain boundaries are observed in the channel-forming region, a semiconductor layer in which the channel-forming region is contained within a single crystal grain, or a semiconductor layer in which the direction of the crystal axes is the same in at least two regions within the channel-forming region can be called a single crystal film. In addition, a semiconductor layer in which, within a single crystal grain in the channel-forming region, the direction of other crystal axes changes continuously with respect to a certain crystal axis or crystal orientation as the axis of rotation can be called a single crystal film.
[0337] The channel formation region refers to the region within the semiconductor layer that overlaps with (or faces) the gate electrode via the gate insulating layer, and is located between the region in contact with the source electrode and the region in contact with the drain electrode. The current path in the channel formation region is the shortest distance between the source electrode and the drain electrode. Therefore, the crystal grains, grain boundaries, crystal axes, and crystal orientation in the channel formation region can be confirmed by cross-sectional observation including the semiconductor layer, source electrode, and drain electrode.
[0338] The indium oxide film in the channel-forming region is preferable to have a low impurity concentration. Impurities in the indium oxide film in the channel-forming region can act as a scattering source for carriers, and thus can cause a decrease in field-effect mobility. Furthermore, these impurities can also inhibit crystal growth in the indium oxide film. Examples of impurities in the indium oxide film include boron and silicon. The concentration of these impurities in the indium oxide film is preferably 0.1% or less, and more preferably 0.01% (100 ppm) or less. Note that elements such as carbon and hydrogen may be present in the deposition gas or precursor during film formation, and may remain in the indium oxide film in higher concentrations than the impurities mentioned above.
[0339] In addition, the indium oxide film in the channel formation region may contain an element that can become a trivalent cation the same as indium, as long as the crystal thereof maintains a cubic crystal structure (the bixbyite type). For example, group 13 elements of the periodic table such as gallium and aluminum, and group 3 elements of the periodic table and the like can be mentioned. Since these elements mainly exist as trivalent cations in the oxide, the carrier concentration of indium oxide can be kept low.
[0340] By using such an indium oxide film for a transistor, the field-effect mobility of the transistor can be made 50 cm 2 / (V·s) or more, preferably 100 cm 2 / (V·s) or more, more preferably 150 cm 2 / (V·s) or more, still more preferably 200 cm 2 / (V·s) or more, still more preferably 250 cm 2 / (V·s) or more.
[0341] One of the characteristics of the indium oxide film is that it has higher oxygen permeability (diffusivity) compared to the IGZO film. As shown in Fig. 21(C), the oxygen (O) diffusing into the indium oxide film (denoted as InO X ) permeates through the indium oxide film and is released as oxygen molecules (O2). In addition, it may be released as water molecules (H2O) by reacting with hydrogen contained in the film. Also, when there are oxygen deficiencies (V O ) in the film, the diffusing oxygen atoms fill the oxygen deficiencies. Since oxygen diffuses easily through the indium oxide film, it can be said that it is easier to fill oxygen deficiencies compared to the IGZO film.
[0342] Thus, since the indium oxide film is likely to reduce oxygen deficiencies in the film compared to the IGZO film, by applying such an indium oxide film to a transistor, a transistor showing extremely high reliability can be realized.
[0343] Furthermore, as shown in Figure 21(C), the indium oxide film diffuses hydrogen. Hydrogen diffusing into the indium oxide film from the outside permeates the film and is released as hydrogen molecules (H2). Alternatively, it reacts with oxygen contained in the film and is released as water molecules.
[0344] A transistor using an indium oxide film is a storage-type transistor that uses electrons as the majority carrier. Assuming that the carrier relaxation time is constant, the smaller the effective mass of electrons (carriers), the higher the electron mobility. In other words, by using indium oxide, which has a small effective mass of electrons, in a transistor, the on-current or field-effect mobility of the transistor can be increased.
[0345] Table 4 shows the effective masses of single-crystal indium oxide (here, In2O3) and single-crystal silicon (Si). As shown in Table 4, indium oxide is characterized by a small effective electron mass and a large effective hole mass. Furthermore, the effective electron mass of indium oxide is almost independent of the crystal orientation. Therefore, by using crystalline indium oxide in transistors, transistors with high field-effect mobility and high frequency characteristics (also called f-response) can be realized. In addition, because of the large effective hole mass, transistors with extremely low off-currents can be realized. For example, by applying an indium oxide film to a vertical transistor, the off-current per 1 μm of channel width is 1 fA (1 × 10⁻¹⁶) at 125°C. -15 A) Less than or equal to, or 1aA(1 × 10 -18 A) is less than or equal to 1aA(1 × 10) under room temperature (25°C) conditions. -18 A) Less than or equal to 1zA(1×10) -21 A) The following is possible. Furthermore, as shown in Table 4, indium oxide has a smaller effective electron mass and a larger effective hole mass than silicon, so it may be possible to realize transistors with higher field-effect mobility and lower off-current than Si transistors.
[0346] [Table 4]
[0347] It is preferable to provide a seed layer so as to be in contact with at least a portion of the crystalline indium oxide film. It is preferable to use a material containing crystals with a small difference in lattice constant (also called lattice mismatch) with the indium oxide for the seed layer. This can improve the crystallinity of the indium oxide film. A substrate (for example, a single-crystal substrate) may be used as one of the layers in contact with at least a portion of the crystalline indium oxide film.
[0348] One method for evaluating the degree of lattice mismatch is to use the following lattice mismatch value. The lattice mismatch Δa [%] between the crystals of the seed layer and the crystals of the formed film (indium oxide film in this case) is calculated as Δa = ((L1 - L2) / L2) × 100. Here, L1 is the length of the unit cell vector or lattice constant of the crystals of the formed film, and L2 is the length of the unit cell vector or lattice constant of the crystals of the seed layer.
[0349] The lattice mismatch Δa between the seed layer and the indium oxide film is preferably small in absolute value, and most preferably 0. For example, Δa can be -5% or more and 5% or less, preferably -4% or more and 4% or less, more preferably -3% or more and 3% or less, and even more preferably -2% or more and 2% or less.
[0350] Here, the indium oxide crystal has a cubic structure (bixbite type). For example, yttria-stabilized zirconia (YSZ) crystals can have a cubic structure (fluorite type). The lattice mismatch of the indium oxide crystal with respect to the cubic YSZ crystal is in the range of -2% to 2%, and a single crystal film of indium oxide can be epitaxially grown on a YSZ substrate.
[0351] Furthermore, the crystal structure of the seed layer and the crystal structure of the indium oxide film do not necessarily have to be the same in terms of crystal system or crystal orientation. For example, a film with a hexagonal or trigonal crystal structure can be used beneath an indium oxide film with a cubic crystal structure. For instance, by setting the crystal orientation of the surface of the seed layer to
[0001] and the crystal orientation of the underside of the indium oxide film to
[0111] , the requirements related to crystal orientation necessary for epitaxial growth can be met. Examples of hexagonal or trigonal crystals include wurtzite-type structures, YbFe2O4-type structures, Yb2Fe3O7-type structures, and modified forms thereof. An example of a crystal having a YbFe2O4-type or Yb2Fe3O7-type structure is IGZO.
[0352] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part. [Explanation of Symbols]
[0353] 20: Display panel, 30: Reflective / refractive optical system, 31: Linear polarizer, 32: Phase difference plate, 33: Dielectric multilayer film, 34: Half mirror, 34a: Dielectric multilayer film, 34b: Dielectric multilayer film, 34c: Adhesive, 34d: Spacer, 34e: Dielectric film, 34f: Dielectric film, 34g: Dielectric film, 34h: Dielectric film, 35: Phase difference plate, 36: Reflective polarizer, 40: Eye, 50: Optical element, 51: Lens, 52: Optical element, 53: Optical element, 55: Substrate, 57: Optical axis, 58: Lens, 59: Lens, 61: Reflective polarizer, 70: Pixel, 71: Sub-pixel, 74: Pixel array, 75: Circuit, 76 :Circuit, 77:Layer, 78:Layer, 79:Layer, 90:Housing, 91:Eye-tracking sensor, 92:Light source, 95:Holder, 99:Display unit, 102:Lens, 102B:Lens, 102G:Lens, 102R:Lens, 104:Insulating layer, 105B:Sub-pixel, 105G:Sub-pixel, 105R:Sub-pixel, 107:Insulating layer, 110:Light-emitting element, 110B:Light-emitting element, 110G:Light-emitting element, 111R:Light-emitting element, 111:Pixel electrode, 111B:Pixel electrode, 111G:Pixel electrode, 112:Organic layer, 112B:Organic layer, 112G:Organic layer, 113:Common electrode, 114:Common layer, 12 1: Protective layer, 124: Insulating layer, 125: Insulating layer, 126: Resin layer, 161: Substrate, 163: Substrate, 200A: Display panel, 200B: Display panel, 200C: Display panel, 200D: Display panel, 200E: Display panel, 200F: Display panel, 240: Capacitance, 241: Conductive layer, 243: Insulating layer, 245: Conductive layer, 251: Conductive layer, 252: Conductive layer, 254: Insulating layer, 255a: Insulating layer, 255b: Insulating layer, 255c: Insulating layer, 256: Plug, 261: Insulating layer, 262: Insulating layer, 263: Insulating layer, 264: Insulating layer, 265: Insulating layer, 271: Plug, 27 4: Plug, 274a: Conductive layer, 274b: Conductive layer, 280: Display module, 281: Display section, 282: Circuit section, 283: Pixel circuit section, 283a: Pixel circuit, 284: Pixel section, 284a: Pixel, 285: Terminal section, 286: Wiring section, 290: FPC, 291: Substrate, 292: Substrate, 301: Substrate, 301A: Substrate, 301B: Substrate, 310: Transistor, 310A: Transistor, 310B: Transistor, 311: Conductive layer, 312: Low resistance region, 313: Insulating layer, 314: Insulating layer, 315: Element isolation layer, 320: Transistor, 320A: Transistor,321: Semiconductor layer, 323: Insulating layer, 324: Conductive layer, 325: Conductive layer, 326: Insulating layer, 327: Conductive layer, 328: Insulating layer, 329: Insulating layer, 331: Substrate, 332: Insulating layer, 335: Insulating layer, 336: Insulating layer, 341: Conductive layer, 342: Conductive layer, 343: Plug, 344: Insulating layer, 345: Insulating layer, 346: Insulating layer, 347: Bump, 348: Adhesive layer, 420: Conductor, 430: Insulator, 440: Wiring, 450: Wiring, 470: Oxide semiconductor, 470i: Region, 470na: Region, 470nb: Region, 480: Insulator, 490: Aperture
Claims
1. A first multilayer film in contact with the first surface of the first optical element, The second optical element has a second multilayer film in contact with the second surface, An adhesive is provided between the first multilayer film and the second multilayer film, which are in contact with each other. The first multilayer film has a lamination of a first layer and a second layer having a different refractive index from the first layer. The second multilayer film has a lamination of a third layer and a fourth layer having a different refractive index from the third layer. Each of the first optical element, the first multilayer film, the adhesive, the second optical element, and the second multilayer film is an optical element that is transparent to visible light.
2. In claim 1, The first optical element and the second optical element are optical elements that are lenses formed from a resin material.
3. In claim 1, The first surface has a concave curved surface, The second surface is an optical element having a convex curved surface.
4. In claim 1, The thickness of the adhesive is 0.1 μm or more and 1 μm or less for the optical element.
5. In claim 1, An optical element having a spherical spacer between the first multilayer film and the second multilayer film.
6. In claim 1, The first and second multilayer films are optical elements that each act as beam splitters with different optical properties.
7. In claim 6, An optical element that satisfies the relationship b = (1 - 2a) / (2 - 3a), where a is the reflectance of the first multilayer film and b is the reflectance of the second multilayer film.
8. In claim 1, An optical element in which the first and third layers are made of the same material, and the second and fourth layers are made of the same material.
9. In claim 8, The first layer and the third layer are optical elements having regions in contact with the adhesive.
10. In claim 8, An optical element in which the first layer has a region in contact with the first surface, and the third layer has a region in contact with the second surface.
11. The optical element described in claim 1 is used as a half-mirror, An optical instrument having a configuration in which a linear polarizer, a first phase difference plate, the half mirror, a second phase difference plate, and a reflective polarizer are arranged in this order.
12. The optical element described in claim 1 is used as a half-mirror, An optical instrument having a configuration in which a first reflective polarizing plate, a first phase difference plate, the half mirror, a second phase difference plate, and a second reflective polarizing plate are arranged in this order.
13. The optical instrument and display device according to claim 11 or 12, The display device has a light-emitting element and a transistor connected to the light-emitting element. The transistor is an electronic device having a metal oxide in the channel formation region.
14. In claim 13, The aforementioned metal oxide is indium oxide in an electronic device.