Multilayer electronic components

Abstract

We provide stacked electronic components with excellent capacity and reliability. [Solution] A stacked electronic component according to one embodiment of the present disclosure includes a body including a dielectric layer and internal electrodes arranged alternately with the dielectric layer in a first direction, and external electrodes disposed on the body and connected to the internal electrodes, wherein at least one of the dielectric layers includes a perovskite compound represented by the general formula ABO3 and a perovskite layer including first crystal grains that do not have a core-shell structure, and auxiliary layers disposed on both sides of the perovskite layer facing the first direction and containing a first doping element, the first doping element may include one or more of Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si.

Description

[Technical Field]

[0001] This disclosure relates to a stacked electronic component. [Background technology]

[0002] Multi-layered ceramic capacitors (MLCCs), a type of multilayer electronic component, are chip-type capacitors that are mounted on printed circuit boards of various electronic products such as liquid crystal displays (LCDs), plasma display panels (PDPs), computers, smartphones, and mobile phones to charge or discharge electricity. Due to their small size, guaranteed high capacitance, and ease of mounting, these multilayer ceramic capacitors can be used as components in a wide range of electronic devices.

[0003] As the operating environments for multilayer ceramic capacitors (MLPCTs) become increasingly demanding, research has been conducted to improve their temperature stability and reliability. In particular, a method has been employed to form a dielectric layer by adding various minor elements, such as rare earth elements, to the BaTiO3-based perovskite compound used as the main component to improve the reliability of MLPCTs. In this case, the dielectric crystal grains constituting the dielectric layer form a core-shell structure, and the presence of this core-shell structure in the dielectric crystal grains improves the room-temperature dielectric constant, dielectric breakdown voltage characteristics, and lifetime reliability compared to pure BaTiO3-based perovskite compounds.

[0004] However, when fabricating a dielectric layer using a dielectric composition in which BaTiO3-based main component powder and minor component powder are mixed to form dielectric crystal grains with a core-shell structure, the core-shell structure may be formed randomly. In this case, there is a limitation that the size and position of the cores that realize capacitance cannot be adjusted, and if the fraction of cores among the total crystal grains decreases, a problem may arise in which the capacitance of the multilayer ceramic capacitor decreases. Therefore, research is needed on new forms of dielectric layers that can replace conventional dielectric layers with crystal grains having a core-shell structure. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2006-111466 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] One of the various objectives of this disclosure is to provide a stacked electronic component with excellent capacity and reliability.

[0007] However, the purpose of this disclosure is not limited to what is described above, and this can be more easily understood in the process of describing specific examples of this disclosure. [Means for solving the problem]

[0008] A multilayer electronic component according to an embodiment of the present disclosure includes a main body including a dielectric layer and internal electrodes alternately arranged with the dielectric layer in a first direction, and an external electrode disposed on the main body and connected to the internal electrode. At least one of the dielectric layers includes a perovskite layer including a perovskite compound represented by the general formula ABO3 and including first crystal grains having no core-shell structure, and auxiliary layers disposed on both surfaces of the perovskite layer facing each other in the first direction and including a first additive element. The first additive element can include one or more of Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si.

[0009] A multilayer electronic component according to an embodiment of the present disclosure includes a dielectric layer, a main body including internal electrodes alternately arranged with the dielectric layer in a first direction, and an external electrode disposed on the main body and connected to the internal electrode. At least one of the dielectric layers can include a single-crystal perovskite layer including a perovskite compound represented by the general formula ABO3, and auxiliary layers disposed on both surfaces of the perovskite layer facing each other in the first direction and including a first additive element.

Effects of the Invention

[0010] As one of various effects of the present disclosure, a multilayer electronic component excellent in capacitance and reliability can be provided.

Brief Description of the Drawings

[0011] [Figure 1] It is a perspective view schematically showing a multilayer electronic component according to an embodiment of the present disclosure. [Figure 2] It is a cross-sectional view schematically showing a cut cross-section along the line I-I' of FIG. 1. [Figure 3] It is a cross-sectional view schematically showing a cut cross-section along the line II-II' of FIG. 1. [Figure 4] It is a cross-sectional view schematically showing the fine structure of a dielectric layer. [Figure 5] It is a cross-sectional view schematically showing the fine structure of a dielectric layer of a multilayer electronic component according to another embodiment of the present disclosure. [Figure 6] A cross-sectional view schematically showing the microstructure of a dielectric layer of a multilayer electronic component according to another embodiment of the present disclosure. [Figure 7] A cross-sectional view schematically showing the microstructure of a dielectric layer of a multilayer electronic component according to another embodiment of the present disclosure. [Figure 8] A cross-sectional view schematically showing the microstructure of a dielectric layer of a multilayer electronic component according to another embodiment of the present disclosure. [Figure 9] A drawing showing the capacitances of the examples and comparative examples measured using a COMSOL analysis program.

Mode for Carrying Out the Invention

[0012] Hereinafter, embodiments of the present disclosure will be described with reference to specific examples and the accompanying drawings. However, the embodiments of the present disclosure can be modified into several other forms, and the scope of the present disclosure is not limited to the embodiments described below. Also, the embodiments of the present disclosure are provided to more fully explain the present disclosure to ordinary technicians. Therefore, the shapes and sizes of the elements in the drawings may be enlarged, reduced (or emphasized or simplified) for clearer explanation, and the elements denoted by the same reference numerals in the drawings are the same elements.

[0013] In addition, parts not related to the explanation are omitted in the drawings for the sake of clearly explaining the present disclosure, and the sizes and thicknesses of the illustrated configurations are arbitrarily shown for convenience of explanation, so the present disclosure is not necessarily limited by the illustration. Also, components having the same functions within the scope of the same concept are described using the same reference numerals. Further, throughout the specification, when a part “includes” a certain component, it means that other components can be further included, rather than excluding other components, unless otherwise stated to the contrary.

[0014] In the drawings, the first direction X can be defined as the thickness T direction, the second direction Y as the length L direction, and the third direction Z as the width W direction.

[0015] Multilayer electronic components Figure 1 is a schematic perspective view of a stacked electronic component according to one embodiment of the present disclosure; Figure 2 is a schematic cross-sectional view showing a section along line I-I' in Figure 1; Figure 3 is a schematic cross-sectional view showing a section along line II-II' in Figure 1; and Figure 4 is a schematic cross-sectional view showing the microstructure of the dielectric layer.

[0016] Hereinafter, with reference to Figures 1 to 4, a multilayer electronic component 100 according to one embodiment of the present disclosure will be described in detail. Furthermore, while a multilayer ceramic capacitor will be described as an example of a multilayer electronic component, the present disclosure is not limited to this and can be applied to a variety of multilayer electronic components, such as inductors, piezoelectric elements, varistors, or thermistors.

[0017] A stacked electronic component 100 according to one embodiment of the present disclosure includes a body 110 containing a dielectric layer 111 and internal electrodes 121, 122, and external electrodes 131, 132.

[0018] There are no particular restrictions on the specific shape of the main body 110, but as shown in the figure, the main body 110 can be hexahedral or a similar shape. Due to shrinkage of the ceramic powder contained in the main body 110 during the firing process, or due to the polishing process on the corners of the main body 110, the main body 110 may not have a perfectly straight hexahedral shape, but it can substantially have a hexahedral shape.

[0019] The main body 110 may have a fifth and sixth surface 5, 6 which are connected to each other in the third direction, and are connected to the first and second surfaces 1, 2, the first and second surfaces 1, 2, the third and fourth surfaces 3, 4, the first to fourth surfaces 1, 2, 3, 4, and the fifth and sixth surfaces 5, 6 which are connected to each other in the third direction.

[0020] The multiple dielectric layers 111 forming the main body 110 are in a fired state, and the boundaries between adjacent dielectric layers 111 can be integrated to such an extent that they are difficult to confirm without using a scanning electron microscope (SEM).

[0021] The internal electrodes 121 and 122 can be arranged alternately with respect to the dielectric layer 111 in a first direction. The main body 110 may include a capacitance forming section Ac which includes a first internal electrode 121 and a second internal electrode 122 arranged to face each other with the dielectric layer 111 in between, thereby forming a capacitance.

[0022] The first internal electrode 121 is separated from the fourth surface 4 and can be connected to the first external electrode 131 at the third surface 3. The second internal electrode 122 is separated from the third surface 3 and can be connected to the second external electrode 132 at the fourth surface 4.

[0023] The conductive metals contained in the internal electrodes 121 and 122 may be one or more of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti, and alloys thereof, but the present invention is not limited thereto.

[0024] At least one of the multiple dielectric layers 111 may include a perovskite layer C1 and an auxiliary layer T1 disposed on both sides of the perovskite layer C1 facing a first direction. For example, the auxiliary layer T1 may be disposed between the perovskite layer C1 and the internal electrodes 121, 122.

[0025] The perovskite layer C1 may have a first crystal grain G1 containing a perovskite compound represented by the general formula ABO3. For example, the perovskite layer C1 may mainly contain the above-mentioned perovskite compound, and the first crystal grain G1 contained in the perovskite layer C1 may have a perovskite crystal structure. The perovskite layer C1 may, for example, have a polycrystalline structure of the first crystal grain G1. The perovskite layer C1 may, for example, have a thin film structure made of a perovskite compound.

[0026] The above perovskite compounds include, for example, BaTiO3, (Ba 1-x Ca x )TiO3(0 <x<1)、Ba(Ti 1-y Ca y )O3(0 <y<1)、(Ba1-x Ca x )(Ti 1-y Zr y )O3(0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3(0 < y < 1), CaZrO3 and (Ca 1-x Sr x )(Zr 1-y Ti y )O3(0 < x ≤ 0.5, 0 < y ≤ 0.5) can include one or more of them.

[0027] The auxiliary layer T1 can contain a first additive element. For example, the auxiliary layer T1 can contain the above first additive element as the main component. The above first additive element can include, for example, one or more of rare earth elements, valence-fixed acceptor elements, valence-variable acceptor elements, and sintering aid elements. That is, the above first additive element can generally mean a sub-component element added to the ABO3 main component. The above first additive element can include one or more of Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si.

[0028] On the other hand, the "main component" in the present disclosure can mean a component that occupies a relatively large weight ratio or atomic number ratio compared to other components, and can mean a component that exceeds 50 wt% based on the weight of the entire composition or the entire dielectric layer, exceeds 50 at% based on the atomic number, or exceeds 50 mol% based on the number of moles.

[0029] The first crystal grains G1 contained in the perovskite layer C1 may not have a core-shell structure. In the present disclosure, that the crystal grains constituting the dielectric layer 111 have a "core-shell structure" means that the crystal grains do not contain a first additive element, or have a core part with a relatively low concentration of the first additive element and a shell part with a relatively high concentration of the first additive element.

[0030] In other words, the fact that the first crystal grain G1 does not have a core-shell structure means that the first crystal grain G1 does not have two phases with different concentrations of the first doped element, but rather has a single phase.

[0031] When a dielectric layer is formed using a dielectric composition containing a mixture of perovskite-based main component powder and additive powder to create dielectric crystal grains with a core-shell structure, the core-shell structure can be formed randomly. This can lead to problems such as the inability to adjust the size and position of the cores that provide capacitance, resulting in a decrease in the capacitance of the stacked electronic component.

[0032] On the other hand, in one embodiment of the present disclosure, the multilayer electronic component 100 can effectively improve the capacitance of the multilayer electronic component 100 by including a first crystal grain G1 in the perovskite layer C1 that does not have a core-shell structure.

[0033] The first crystal grain G1 may, for example, not substantially contain the first additive element. In this disclosure, the fact that the first crystal grain G1 substantially does not contain the first additive element can mean that the first additive element is intentionally not added to the perovskite layer C1 in order to improve the capacity of the stacked electronic component 100. However, during the manufacturing process of the stacked electronic component 100, a small amount of the first additive element may unexpectedly be present in the perovskite layer C1. Even in this case, if the first crystal grain G1 does not have a core-shell structure, the capacity of the stacked electronic component 100 can be improved. That is, the fact that the first crystal grain G1 substantially does not contain the first additive element can mean that the content of the first additive element in the total content of the elements constituting the first crystal grain G1 is 0.01 at% or less.

[0034] On the other hand, if the first crystal grain G1 does not have a core-shell structure, the room-temperature dielectric constant, dielectric strength characteristics, and lifetime reliability of the stacked electronic component 100 may decrease. However, in one embodiment of the stacked electronic component 100, the dielectric layer 111 includes an auxiliary layer T1 containing the first additive element, thereby ensuring the reliability of the stacked electronic component 100.

[0035] On the other hand, the perovskite layer C1 and the auxiliary layer T1 may be formed separately. The auxiliary layer T1 may have a polycrystalline structure of the second crystal grain G2, and the second crystal grain G2 does not have to have a perovskite crystal structure because it is mainly composed of the first additive element. In other words, the second crystal grain G2 can have a different crystal structure from the first crystal grain G1. The average crystal grain size of the first crystal grain G1 may be larger than the average crystal grain size of the second crystal grain G2, but the present invention is not limited thereto.

[0036] In addition to the first additive element described above, the auxiliary layer T1 may also contain a second additive element comprising one or more of Ba, Ti, Ca, and Zr. By including the second additive element in the auxiliary layer T1, the reliability of the multilayer electronic component 100 can be more effectively improved.

[0037] The perovskite layer C1 may include, for example, a plurality of first crystal grains G1 arranged continuously in a direction perpendicular to the first direction. However, not all crystal grains in the perovskite layer C1 have to be first crystal grains G1 that do not have a core-shell structure. For example, the perovskite layer C1 may include some crystal grains that have a core-shell structure.

[0038] In this case as well, in order to prevent a decrease in the capacitance of the stacked electronic component, the ratio of the number of first crystal grains G1 to the total number of crystal grains arranged in the perovskite layer C1 may be, for example, 80% or more. The ratio of the number of first crystal grains G1 can be calculated by identifying a predetermined region in an image obtained by analyzing an arbitrary cross-section of the dielectric layer 111 with analytical equipment such as STEM-EDS, and then calculating from the total number of crystal grains and the number of first crystal grains G1 present in that region. The total number of crystal grains extracted from the predetermined region may be, for example, 10 to 200, but the present invention is not limited thereto.

[0039] The thicknesses of the perovskite layer C1 and the auxiliary layer T1 are not particularly limited. That is, the thicknesses of the perovskite layer C1 and the auxiliary layer T1 can be appropriately designed taking into account the specifications and performance of the target multilayer electronic component 100. For example, as shown in Figure 4, in order to increase the capacitance of the multilayer electronic component 100, the thickness of the perovskite layer C1 can be greater than the thickness of the auxiliary layer T1.

[0040] The main body 110 may include cover portions 112 and 113 arranged on both sides facing the first direction of the capacitance forming portion Ac. The main body 110 may include margin portions 114 and 115 arranged on both sides facing the third direction of the capacitance forming portion Ac. The cover portions 112 and 113 and the margin portions 114 and 115 may contain the perovskite compound as a main component. The cover portions 112 and 113 and the margin portions 114 and 115 may have the same configuration as the dielectric layer 111, or they may have a different configuration from the dielectric layer 111.

[0041] External electrodes 131 and 132 can be positioned on the third and fourth surfaces 3 and 4 of the main body 110, and can extend onto portions of the first, second, fifth, and sixth surfaces 1, 2, 5, and 6. The external electrodes 131 and 132 may include a first external electrode 131 connected to a first internal electrode 121 and a second external electrode 132 connected to a second internal electrode 122.

[0042] The type and form of the external electrodes 131 and 132 are not particularly limited and can have a multilayer structure. For example, the external electrodes 131 and 132 may include base electrode layers 131a and 132a that come into contact with the internal electrodes 121 and 122, and plating layers 131b and 132b placed on the base electrode layers 131a and 132a.

[0043] The base electrode layers 131a and 132a may be fired electrode layers containing metal and glass. The metal contained in the base electrode layers 131a and 132a may include, for example, Cu, Ni, Pd, Pt, Au, Ag, Pb, and / or alloys containing these. The glass contained in the base electrode layers 131a and 132a may include, for example, one or more oxides of Ba, Ca, Zn, Al, B, and Si.

[0044] On the other hand, while the base electrode layers 131a and 132a can consist only of fired electrode layers, the present invention is not limited thereto, and the base electrode layers 131a and 132a may include a fired electrode layer containing metal and glass, and a resin electrode layer disposed on the fired electrode layer containing metal particles and resin.

[0045] The metal particles contained in the resin electrode layer may include one or more spherical particles and flake-shaped particles. The metal particles contained in the resin electrode layer may include, for example, Cu, Ni, Pd, Pt, Au, Ag, Pb, Sn and / or alloys containing these. The resin contained in the resin electrode layer may include, for example, one or more epoxy resin, acrylic resin, and ethylcellulose.

[0046] The plating layers 131b and 132b may include, for example, Ni, Sn, Pd, and / or alloys containing these, and may be formed from multiple layers. The plating layers 131b and 132b may be, for example, a Ni plating layer or a Sn plating layer, or a Ni plating layer and a Sn plating layer may be formed sequentially. The plating layers 131b and 132b may include multiple Ni plating layers and / or multiple Sn plating layers.

[0047] The drawing illustrates a structure in which the stacked electronic component 100 has two external electrodes 131 and 132, but it is not limited to this, and the number and shape of the external electrodes 131 and 132 can be changed depending on the form of the internal electrodes 121 and 122 or other purposes.

[0048] The average thickness td of the dielectric layer 111, the average thickness te of the internal electrodes 121 and 122, the average thickness tc of the cover portions 112 and 113, and the average thickness tm of the margin portions 114 and 115 are not particularly limited.

[0049] The average thickness td of the dielectric layer 111 can be, for example, 0.01 μm to 10 μm, 0.01 μm to 5 μm, 0.01 μm to 2 μm, or 0.01 μm to 0.4 μm. The average thickness te of the internal electrodes 121 and 122 can be, for example, 0.01 μm to 3.0 μm, 0.01 μm to 1.0 μm, or 0.01 μm to 0.4 μm.

[0050] The average thickness tc of the cover portions 112 and 113 may be, for example, 150 μm or less, 100 μm or less, 30 μm or less, or 20 μm or less. The average thickness of the cover portions 112 and 113 may be, for example, 5 μm or more, 10 μm or more, or 30 μm or more. Here, the average thickness tc of the cover portions 112 and 113 refers to the average thickness of the first cover portion 112 and the second cover portion 113, respectively.

[0051] The average thickness tm of the margin portions 114 and 115 may be, for example, 100 μm or less, 20 μm or less, or 15 μm or less. The average thickness of the margin portions 114 and 115 may be, for example, 5 μm or more, or 10 μm or more. Here, the average thickness tm of the margin portions 114 and 115 refers to the average thickness of the first margin portion 114 and the second margin portion 115, respectively.

[0052] The size of the stacked electronic component 100 is not particularly limited, but the maximum length of the stacked electronic component 100 in the second direction is 0.1 mm to 6.0 mm, the maximum width of the stacked electronic component 100 in the third direction is 0.1 mm to 5.0 mm, and the maximum thickness of the stacked electronic component 100 in the first direction may be 0.05 mm to 3.5 mm.

[0053] The average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can be measured by scanning the cross-sections of the main body 110 in the first and second directions with a scanning electron microscope (SEM) at 10,000x magnification. More specifically, the average thickness td of the dielectric layer 111 can be measured by measuring the thickness at multiple points on one dielectric layer 111, for example, five equally spaced points in the second direction, and then calculating the average value. Similarly, the average thickness te of the internal electrodes 121 and 122 can be measured by measuring the thickness at multiple points on one internal electrode 121 or 122, for example, five equally spaced points in the second direction, and then calculating the average value. The five equally spaced points can be specified in the capacitance forming section Ac. On the other hand, if such average value measurements are performed for 10 dielectric layers 111 and 10 internal electrodes 121 and 122, and then the average value is measured, the average thickness td of the dielectric layer 111 and the average thickness te of the internal electrodes 121 and 122 can be further generalized.

[0054] Similarly, the average thickness tc of the cover portions 112 and 113 may be the average of the thicknesses measured at five equally spaced points in the cross-section of the main body 110 in the first and second directions. The average thickness tm of the margin portions 114 and 115 may be the average of the thicknesses measured at five equally spaced points in the cross-section of the main body 110 in the first and third directions.

[0055] Hereinafter, with reference to Figures 5 to 8, a stacked electronic component according to another embodiment of the present disclosure will be described. For components identical or similar to those of the stacked electronic component 100 described in Figures 1 to 4, the same or similar reference numerals will be used, and redundant explanations will be omitted.

[0056] Figure 5 is a schematic cross-sectional view showing the microstructure of the dielectric layer 211 of a multilayer electronic component according to another embodiment of the present disclosure.

[0057] Referring to Figure 5, the thickness of the auxiliary layer T2 may be greater than the thickness of the perovskite layer C2. In this case, the capacitance of the multilayer electronic component may decrease slightly, but excellent reliability and temperature stability can be ensured.

[0058] Figure 6 is a schematic cross-sectional view showing the microstructure of the dielectric layer 311 of a multilayer electronic component according to another embodiment of the present disclosure.

[0059] Referring to Figure 6, the perovskite layer C3 may have a central region R1 in which the first crystal grain G1 is continuously arranged in a direction perpendicular to the first direction, and interface regions R2 and R3 located between the central region R1 and the auxiliary layer T3, having a third crystal grain G3, and the third crystal grain G3 may have a core-shell structure.

[0060] The third crystal grain G3 may include a core portion G3c and a shell portion G3s positioned on at least a part of the core portion G3c. The concentration of the first additive element in the shell portion G3s may be higher than the concentration of the first additive element in the core portion G3c. The third crystal grain G3 can be formed, for example, by the first additive element diffused from the auxiliary layer T3.

[0061] In this case as well, in order to prevent a decrease in the capacitance of the stacked electronic component, the ratio of the number of first crystal grains G1 to the total number of crystal grains arranged in the perovskite layer C3 may be, for example, 80% or more. The ratio of the number of first crystal grains G1 can be calculated by identifying a predetermined region in an image obtained by analyzing an arbitrary cross-section of the dielectric layer 311 with analytical equipment such as STEM-EDS, and then calculating from the total number of crystal grains and the number of first crystal grains G1 present in that region. The total number of crystal grains extracted from the predetermined region may be, for example, 10 to 200, but the present invention is not limited thereto.

[0062] Figure 7 is a schematic cross-sectional view showing the microstructure of the dielectric layer 411 of a multilayer electronic component according to another embodiment of the present disclosure.

[0063] Referring to Figure 7, at least one dielectric layer 411 may include a single-crystal perovskite layer C4 containing a perovskite compound represented by the general formula ABO3, and an auxiliary layer T4 containing a first doping element, disposed on both sides of the perovskite layer C4 facing a first direction.

[0064] The perovskite layer C4 may have a single-crystal structure of the first crystal grain G1. The perovskite layer C4 can be formed by thin-film synthesis using, for example, at least one of CVD, ALD, and sputtering.

[0065] Because the perovskite layer C4 has a single-crystal structure, firing of the perovskite layer C4 is unnecessary. This allows for free selection of the conductive metal contained in the internal electrodes 121 and 122 without considering the firing temperature.

[0066] The fact that the perovskite layer C4 has a single-crystal structure means that the entire perovskite layer C4 has a single-crystal structure. Although the perovskite layer C4 may contain defects such as cracks and electrical potentials, grain boundaries may not exist because it has a single-crystal structure.

[0067] However, not all of the dielectric layers 411 have a single-crystal perovskite layer C4; for example, some perovskite layers may not have a single-crystal structure. For example, the ratio of dielectric layers 411 having a single-crystal perovskite layer C4 among the multiple dielectric layers 411 may be 80% or more.

[0068] The auxiliary layer T4 may, for example, have a polycrystalline structure with a second crystal grain G2. By including the first doping element in the auxiliary layer T4, the reliability of the multilayer electronic component can be ensured.

[0069] The auxiliary layer T4 can be formed by thin-film synthesis using at least one of the following methods: CVD, ALD, and sputtering, similar to the perovskite layer C4. In this case, changes in composition due to interdiffusion between the perovskite layer C4 and the auxiliary layer T4 can be suppressed.

[0070] The auxiliary layer T4 preferably contains two or more first doping elements, for example, from the viewpoint of improving the reliability of the multilayer electronic component. The auxiliary layer T4 preferably contains two or more second doping elements, for example. When the auxiliary layer T4 contains two or more first doping elements and / or two or more second doping elements, the auxiliary layer T4 can have a polycrystalline structure even when formed by a process such as CVD, ALD, and / or sputtering.

[0071] Figure 8 is a schematic cross-sectional view showing the microstructure of the dielectric layer 511 of a multilayer electronic component according to another embodiment of the present disclosure.

[0072] Referring to Figure 8, at least one dielectric layer 511 can include a plurality of perovskite layers C5 arranged spaced apart from each other. That is, at least one dielectric layer 511 can have a structure in which a plurality of perovskite layers C5 and a plurality of auxiliary layers T5 are arranged alternately.

[0073] In the case of electronic components, the dielectric layer 511 must be formed to a certain thickness or higher to ensure reliability. In this case, the dielectric layer 511 can contain multiple perovskite layers C5. There is no particular limit to the number of perovskite layers C5 contained in a single dielectric layer 511, but considering the application and capacitance of the multilayer electronic component, the dielectric layer 511 can contain 2 to 50 perovskite layers C5.

[0074] The following describes an example of a method for manufacturing a stacked electronic component 100. An example of a method for forming the main body 110 will be described. However, the method for manufacturing the stacked electronic component 100 is not limited to this.

[0075] First, prepare a ceramic powder containing a perovskite compound. The ceramic powder may be, for example, BaTiO3, (Ba 1-x Ca x )TiO3(0 <x<1)、Ba(Ti 1-y Ca y )O3(0 <y<1)、(Ba 1-x Ca x)(Ti 1-y Zr y )O3(0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3(0 < y < 1), CaZrO3, and (Ca 1-x Sr x )(Zr 1-y Ti y )O3(0 < x ≤ 0.5, 0 < y ≤ 0.5) may contain one or more of them. BaTiO3 powder can be synthesized, for example, by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. As the method for synthesizing the ceramic powder, for example, there are a solid-phase method, a sol-gel method, a hydrothermal synthesis method, etc., but the present invention is not limited thereto. Next, after drying and pulverizing the prepared ceramic powder, an organic solvent such as ethanol and a binder such as polyvinyl butyral are mixed to produce a slurry for manufacturing a perovskite layer.

[0076] Next, prepare the first and second additive element powders. The first additive element powder may contain, for example, one or more oxides of Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si. The second additive element powder may contain, for example, one or more oxides of Ba, Ti, Ca, and Zr. The above first and second additive element powders, an organic solvent, and a binder are mixed to produce a slurry for manufacturing an auxiliary layer.

[0077] Next, apply and dry the above slurry for manufacturing an auxiliary layer on a carrier film to form an auxiliary layer before firing, apply and dry the above slurry for manufacturing a perovskite layer on the auxiliary layer before firing to form a perovskite layer before firing, and reapply and dry the above slurry for manufacturing an auxiliary layer on the perovskite layer before firing to form an auxiliary layer before firing. The perovskite layer before firing and the two auxiliary layers before firing formed on both sides thereof can be defined as a ceramic green sheet.

[0078] Next, an internal electrode pattern is formed by printing a conductive paste for internal electrodes, containing metal powder, binder, organic solvent, etc., onto a ceramic green sheet to a predetermined thickness using a screen printing method or gravure printing method.

[0079] After peeling the ceramic green sheet with the printed internal electrode pattern from the carrier film, a predetermined number of layers of the ceramic green sheet with the printed internal electrode pattern are laminated and pressed together to form a ceramic laminate. A predetermined number of cover sheets, which do not have the internal electrode pattern formed, may be laminated on the upper and lower parts of the ceramic laminate to form cover parts 112 and 113 after firing. After this, the ceramic laminate can be cut to have a predetermined chip size, and the cut chips can be fired at a temperature of, for example, 1000°C to 1400°C to form the main body 110.

[0080] Next, external electrodes 131 and 132 are formed. For example, if the base electrode layers 131a and 132a include a fired electrode layer, the main body 110 can be dipped in a conductive paste for external electrodes containing metal powder, glass frit, binder, and organic solvent, and then the conductive paste for external electrodes can be fired at a temperature of 500°C to 900°C to form a fired electrode layer.

[0081] For example, if the base electrode layers 131a and 132a include a resin electrode layer, the main body can be dipped in a conductive resin composition containing metal powder, resin, binder, and organic solvent, and then cured at a temperature of 250°C to 550°C to form the resin electrode layer.

[0082] Furthermore, electroplating and / or electroless plating may be performed to form plating layers 131b and 132b on the underlying electrode layers 131a and 132a.

[0083] On the other hand, the method for forming the dielectric layers 211, 311, 411, and 511 shown in Figures 5 to 8 is not particularly limited.

[0084] For example, the dielectric layer 211 can be manufactured by adjusting the amount of slurry applied for the auxiliary layer and the perovskite layer to make the thickness of the auxiliary layer T2 after firing greater than the thickness of the perovskite layer C2.

[0085] For example, the dielectric layer 311 can be manufactured by forming an auxiliary layer T3 using a rare earth element that diffuses relatively easily into the perovskite layer C3 as the first doping element.

[0086] For example, the dielectric layer 411 can be manufactured by forming a perovskite layer C4 by thin-film synthesis using at least one of CDV, ALD, and sputtering. The auxiliary layer T4 can be formed by thin-film synthesis using at least one of CVD, ALD, and sputtering, but the present invention is not limited thereto.

[0087] For example, the dielectric layer 511 can be manufactured by alternately performing the slurry coating step for manufacturing the auxiliary layer and the slurry coating step for manufacturing the perovskite layer multiple times.

[0088] Figure 9 shows the volumes of the examples and comparative examples measured using the COMSOL analysis program.

[0089] In Figure 9, Example (EXP) shows a dielectric layer having a perovskite layer and an auxiliary layer, while Comparative Example (REF) shows a dielectric layer having a conventional core-shell structure crystal grain.

[0090] Referring to Figure 9, it can be seen that when the dielectric layer thickness is the same, the capacitance of the example increases by approximately 50% compared to the comparative example. This is because, in the comparative example, it is difficult to secure a sufficient core area in the core-shell structure, whereas in the example, the perovskite layer and auxiliary layer are formed separately, allowing for a sufficient area of ​​the perovskite layer that contributes to capacitance formation.

[0091] This disclosure is not limited by the embodiments described above and the accompanying drawings, but is limited by the claims attached. Therefore, within the scope of the technical idea of ​​this disclosure as described in the claims, various forms of substitution, modification, and alteration are possible by a person with ordinary skill in the art, and these also fall within the scope of this disclosure.

[0092] Furthermore, the expression "one embodiment" does not mean that each embodiment is identical to the others, but is provided to highlight and explain the unique and distinct characteristics of each embodiment. However, the above-presented embodiments do not preclude their realization in combination with the characteristics of other embodiments. For example, even if a matter described in one embodiment is not described in another embodiment, it can be understood as a description related to the other embodiment, as long as there is no contradictory or contrary explanation of that matter in the other embodiment.

[0093] In this disclosure, the term "connected" includes not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, the term "electrically connected" includes both physically connected and non-connected cases. In addition, expressions such as "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, without departing from the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component. [Explanation of Symbols]

[0094] 100 Stacked Electronic Components 110 Main Unit 111, 211, 311, 411, 511 Dielectric layers C1, C2, C3, C4, C5 perovskite layers T1, T2, T3, T4, T5 auxiliary layer G1, G2, G3 grains 112, 113 Cover section 114, 115 Margin section 121, 122 Internal electrode 131, 132 External electrode 131a, 132a Base electrode layer 131b, 132b Plating layer

Claims

1. A body including a dielectric layer and internal electrodes arranged alternately with the dielectric layer in a first direction, Includes an external electrode disposed on the main body and connected to the internal electrode, At least one of the dielectric layers is of the general formula ABO ３ A perovskite layer comprising a perovskite compound represented by and including first crystal grains that do not have a core-shell structure, and an auxiliary layer disposed on both sides of the perovskite layer facing the first direction and containing a first doping element, The first additive element comprises one or more of Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si, in a multilayer electronic component.

2. The stacked electronic component according to claim 1, wherein the perovskite layer includes a plurality of first crystal grains arranged continuously in a direction perpendicular to the first direction.

3. The stacked electronic component according to claim 1, wherein the first crystal grain substantially does not contain the first additive element.

4. The stacked electronic component according to claim 1, wherein the auxiliary layer contains a second doping element comprising one or more of Ba, Ti, Ca, and Zr.

5. The stacked electronic component according to claim 1, wherein the thickness of the perovskite layer is greater than the thickness of the auxiliary layer.

6. The stacked electronic component according to claim 1, wherein the thickness of the auxiliary layer is greater than the thickness of the perovskite layer.

7. The perovskite layer includes a central region in which the first crystal grains are continuously arranged in a direction perpendicular to the first direction, and an interface region having a third crystal grain, which is located between the central region and the auxiliary layer. The stacked electronic component according to claim 1, wherein the third crystal grain has the core-shell structure.

8. The stacked electronic component according to claim 1, wherein the perovskite layer has a single crystal structure of the first crystal grain.

9. The stacked electronic component according to claim 8, wherein the auxiliary layer has a polycrystalline structure of second crystal grains.

10. The stacked electronic component according to claim 1, wherein the at least one dielectric layer includes a plurality of perovskite layers arranged spaced apart from each other.

11. A body including a dielectric layer and internal electrodes arranged alternately with the dielectric layer in a first direction, Includes an external electrode disposed on the main body and connected to the internal electrode, At least one of the dielectric layers is of the general formula ABO ３ A stacked electronic component comprising a single-crystal perovskite layer containing a perovskite compound represented by , and an auxiliary layer disposed on both sides of the perovskite layer facing the first direction and containing a first doping element.

12. The multilayer electronic component according to claim 11, wherein the first additive element comprises one or more of Dy, Ho, Y, Er, Gd, Tb, Mg, Mn, V, Al, and Si.

13. The stacked electronic component according to claim 11, wherein the auxiliary layer has a polycrystalline structure.

14. The stacked electronic component according to claim 11, wherein the auxiliary layer contains a second doping element comprising one or more of Ba, Ti, Ca, and Zr.

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