A / D converter

Abstract

This prevents deviations from the optimal operating conditions of the voltage comparator. [Solution] The A / D converter comprises a capacitive D / A converter 1Pa that generates a voltage corresponding to a positive-sequence signal VinP and a reference voltage Vr, a capacitive D / A converter 1Ma that generates a voltage corresponding to an inverse-sequence signal VinM and a reference voltage Vr, a voltage comparator 2 that performs a voltage comparison between the differential inputs of the signals output from the capacitive D / A converters 1Pa and 1Ma, a D / A converter 5 that applies voltage to the non-inverting input terminal and the inverting input terminal of the voltage comparator 2, a determination unit 4 that adjusts the output voltage of the D / A converter 5 according to the comparison result of the voltage comparator 2, and a successive comparison register 3 that outputs a digital value according to the comparison result of the voltage comparator 2. The determination unit 4 adjusts the output voltage of the D / A converter 5 according to the comparison result of the voltage comparator 2 so that the response speed of the voltage comparator 2 is as fast as possible.

Claims

1. A voltage comparator configured to compare the voltage of signals between differential inputs, A first capacitive D / A converter is configured to sample and hold the positive-sequence signal from the differential analog input signals when the voltage comparator is reset, and to input a voltage corresponding to the positive-sequence signal and the reference voltage to the non-inverting input terminal of the voltage comparator when the voltage comparator performs a voltage comparison. A second capacitive D / A converter is configured to sample and hold the inverted phase signal from the analog input signal during the reset, and to input a voltage corresponding to the inverted phase signal and the reference voltage to the inverting input terminal of the voltage comparator during the voltage comparison. A voltage controller configured to apply voltage to the non-inverting input terminal and the inverting input terminal of the voltage comparator, A determination device configured to adjust the output voltage of the voltage controller according to the comparison result of the voltage comparator, The system includes a successive comparison register configured to output a digital value corresponding to the comparison result of the voltage comparator, The A / D converter is characterized in that the determination device adjusts the output voltage of the voltage controller so that the response speed of the voltage comparator is as fast as possible, according to the comparison result of the voltage comparator.

2. In the A / D converter according to claim 1, The aforementioned determination device is A delay unit configured to output a signal that is a delay of the clock signal, An EXNOR circuit configured to take the negative exclusive OR of the positive-sequence output signal and the negative-sequence output signal of the voltage comparator, A flip-flop circuit configured to capture the output signal of the EXNOR circuit in synchronization with the signal output from the delay device, An A / D converter characterized by comprising a control circuit configured to adjust the output voltage of the voltage controller based on the output signal of the flip-flop circuit so that the response speed of the voltage comparator is as fast as possible.

3. In the A / D converter according to claim 2, The aforementioned control circuit is A first step is to monitor the output of the flip-flop circuit in synchronization with the clock signal, If the output of the flip-flop circuit indicates that the voltage comparator has a shorter delay than the delay circuit, the second step is to shorten the delay time of the delay circuit. If the repetition of the first and second steps indicates that the output of the flip-flop circuit is delayed longer by the voltage comparator than by the delay circuit, a third step is to increase the output voltage of the voltage controller. An A / D converter characterized by performing a fourth step of lowering the output voltage of the voltage controller to the previous level if, through the repetition of the first and third steps, the output of the flip-flop circuit shows that the voltage comparator has a longer delay than the delay device multiple times in a row.

4. In the A / D converter according to claim 2, The aforementioned control circuit is A first step is to monitor the output of the flip-flop circuit in synchronization with the clock signal, If the output of the flip-flop circuit indicates that the voltage comparator has a shorter delay than the delay circuit, the second step is to shorten the delay time of the delay circuit. If the repetition of the first and second steps indicates that the output of the flip-flop circuit is delayed longer by the voltage comparator than by the delay circuit, a third step is to increase the output voltage of the voltage controller. If, through the repetition of the first and third steps, the output of the flip-flop circuit shows that the voltage comparator has a longer delay than the delay circuit multiple times in a row, a fourth step is to reduce the output voltage of the voltage controller to the level of the previous step, A fifth step is to monitor the output of the flip-flop circuit in synchronization with the clock signal, following the fourth step described above. A sixth step is to increase the delay time of the delay circuit if the output of the flip-flop circuit indicates that the voltage comparator has a longer delay than the delay circuit, If the repetition of the fifth and sixth steps indicates that the output of the flip-flop circuit has a shorter delay than the output of the voltage comparator, then a seventh step is to monitor the output of the flip-flop circuit in synchronization with the clock signal, If the output of the flip-flop circuit indicates that the voltage comparator has a shorter delay than the delay circuit, an eighth step is performed in which the output voltage of the voltage controller is increased. An A / D converter characterized in that, if the repetition of the seventh and eighth steps indicates that the output of the flip-flop circuit has a longer delay when the voltage comparator is used than when the delay device is used, the process returns to the third step.

5. In the A / D converter according to claim 1, The system further includes a first switch that short-circuits the non-inverting input terminal and the inverting input terminal of the voltage comparator when the voltage comparator is reset. The first capacitive D / A converter is A plurality of first capacitors, one end of which is connected to the non-inverting input terminal of the voltage comparator, A plurality of second switches that selectively connect the other end of the plurality of first capacitors to one of the positive-sequence signal, the reference voltage, and ground among the analog input signals, It consists of a third switch provided between the output terminal of the voltage controller and the non-inverting input terminal of the voltage comparator, The second capacitive D / A converter is, A plurality of second capacitors, one end of which is connected to the inverting input terminal of the voltage comparator, A plurality of fourth switches that selectively connect the other end of the plurality of second capacitors to one of the inverted phase signal, the reference voltage, and the ground among the analog input signals, It consists of a fifth switch provided between the output terminal of the voltage controller and the inverting input terminal of the voltage comparator, The plurality of second switches select the positive-sequence signal from the analog input signal during the reset, and during the voltage comparison by the voltage comparator, they sequentially select the reference voltage in synchronization with the clock signal, while the second switches that do not select the reference voltage select the ground. The plurality of fourth switches select the inverted phase signal from the analog input signal during the reset, and during the voltage comparison by the voltage comparator, they sequentially select the ground in synchronization with the clock signal, while the fourth switch that does not select the ground selects the reference voltage. The third switch connects the output terminal of the voltage controller and the non-inverting input terminal of the voltage comparator when the reset is performed. The A / D converter is characterized in that the fifth switch connects the output terminal of the voltage controller and the inverting input terminal of the voltage comparator when the device is reset.

6. In the A / D converter according to claim 1, The voltage controller consists of two components: a first voltage controller provided for the first capacitive D / A converter and a second voltage controller provided for the second capacitive D / A converter. The first capacitive D / A converter is A plurality of first capacitors, one end of which is connected to the non-inverting input terminal of the voltage comparator, A plurality of first switches that selectively connect the other end of each of the plurality of first capacitors to either the reference voltage or ground, It consists of a second switch provided between the non-inverting input terminal of the A / D converter and the non-inverting input terminal of the voltage comparator, The second capacitive D / A converter is, A plurality of second capacitors, one end of which is connected to the inverting input terminal of the voltage comparator, A plurality of third switches that selectively connect the other end of the plurality of second capacitors to either the reference voltage or the ground, It consists of a fourth switch provided between the inverting input terminal of the A / D converter and the inverting input terminal of the voltage comparator, The plurality of first switches select the reference voltage when the voltage comparator is reset, and when the voltage comparator performs a voltage comparison, they sequentially select the reference voltage in synchronization with the clock signal, while the first switches that do not select the reference voltage select the ground. The plurality of third switches select the ground during the reset, and during the voltage comparison by the voltage comparator, they sequentially select the ground in synchronization with the clock signal, while the third switches that do not select the ground select the reference voltage. The second switch connects the non-inverting input terminal of the A / D converter to the non-inverting input terminal of the voltage comparator when the reset is performed. The A / D converter is characterized in that the fourth switch connects the inverting input terminal of the A / D converter and the inverting input terminal of the voltage comparator when the A / D converter is reset.

7. In the A / D converter according to claim 1, The A / D converter is characterized in that the voltage controller is a D / A converter configured to output a voltage corresponding to the digital value output from the determination device.

8. In the A / D converter according to claim 1, The aforementioned voltage comparator is A first NMOS transistor, to which the positive-sequence signal from the first capacitive D / A converter is input at the gate, A second NMOS transistor, to which an inverted phase signal from the second capacitive D / A converter is input to the gate, A clock signal is input to the gate of a third NMOS transistor, the drain of which is connected to the sources of the first and second NMOS transistors, and the source of which is connected to ground. A first PMOS transistor is provided, the gate of which is input to the clock signal, the drain of which is connected to the drain of the first NMOS transistor, and the source of which is connected to the power supply voltage. A second PMOS transistor has the clock signal input to its gate, its drain connected to the drain of the second NMOS transistor, and its source connected to the power supply voltage, A third PMOS transistor whose gate is connected to the non-inverting output terminal of a voltage comparator, whose drain is connected to the inverting output terminal of a voltage comparator, and whose source is connected to the power supply voltage, A fourth PMOS transistor whose gate is connected to the inverting output terminal of the voltage comparator, whose drain is connected to the non-inverting output terminal of the voltage comparator, and whose source is connected to the power supply voltage, A fourth NMOS transistor whose gate is connected to the non-inverting output terminal of the voltage comparator, whose drain is connected to the inverting output terminal of the voltage comparator, and whose source is connected to the drain of the first NMOS transistor, An A / D converter characterized by comprising a fifth NMOS transistor whose gate is connected to the inverting output terminal of a voltage comparator, whose drain is connected to the non-inverting output terminal of a voltage comparator, and whose source is connected to the drain of the second NMOS transistor.

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