Method for polishing semiconductor substrates
The method addresses quality deterioration in semiconductor substrate polishing by switching to a lower-etching abrasive with reduced operational parameters, effectively minimizing DIC and LPD defects during substrate movement between polishing stages.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- GLOBALWAFERS JAPAN
- Filing Date
- 2024-11-29
- Publication Date
- 2026-06-10
AI Technical Summary
Conventional multi-stage polishing of semiconductor substrates experiences quality deterioration due to long movement times between polishing tables, leading to high frequency occurrence of DIC defects and LPD ≥ 55 nm, primarily caused by localized etching from abrasives lacking surface protection polymers.
A method that switches from a high-etching first abrasive to a second abrasive with a lower polishing rate during substrate movement, accompanied by reducing platen pressure, polishing head rotation speed, and polishing platen rotation speed to minimize surface etching, using a water-soluble polymer with a molecular weight of 100,000 or less, and applying the same abrasive as the final polishing stage.
Effectively suppresses DIC and LPD ≥ 55 nm defects by ensuring sufficient time for abrasive replacement, maintaining polishing efficiency while reducing capital investment and surface protection.
Smart Images
Figure 2026094916000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for polishing a semiconductor substrate.
Background Art
[0002] In the multi-stage polishing process for polishing a semiconductor substrate, various techniques have been studied to solve problems such as surface roughness (haze unevenness) and DIC (Differential Interference Contrast) defects. For example, in Patent Document 1, in the first-stage polishing process, a first polishing step of polishing a wafer with an abrasive containing a water-soluble polymer, then a second polishing step of coarsely polishing the wafer with an abrasive not containing a water-soluble polymer, and then a third polishing step of polishing the wafer with an abrasive containing a water-soluble polymer are performed. A method for polishing a silicon wafer is disclosed.
[0003] Also, in Patent Document 2, in the secondary polishing which is the middle stage of three-stage polishing, a multi-stage polishing process is disclosed which is performed in three steps: [1] polishing with an alkaline abrasive not containing a water-soluble polymer → [2] rinse polishing with an abrasive containing a water-soluble polymer → [3] rinse polishing with an abrasive containing a water-soluble polymer having a molecular weight larger than that of the polymer in [2]. In Patent Document 3, for the purpose of improving the quality of the surface shape of a silicon wafer, a configuration is disclosed in which, in the rough polishing before the finish polishing, after polishing with an abrasive liquid containing abrasive grains, polishing is performed with an abrasive liquid not containing abrasive grains.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Patent Document 2
Patent Document 3
Summary of the Invention
[0005] Furthermore, the disclosures in the above-mentioned prior art documents are incorporated into this book by reference. The following analysis was conducted by the inventors.
[0006] Incidentally, conventional multi-stage polishing, such as the so-called three-stage polishing, is a process in which polishing is carried out while moving the semiconductor substrate between multiple polishing tables. Generally, such movement between tables is controlled to a certain time, but occasionally a waiting time occurs before movement, and the movement time of the semiconductor substrate between polishing tables may become long. In this invention, the movement time of the semiconductor substrate refers to the time from when the polishing process is completed on one polishing table until the substrate moves to the next polishing table and the polishing process begins on the next polishing table. The applicant has found that quality deterioration due to the occurrence of DIC defects, etc., occurs at a high frequency when the movement time of the semiconductor substrate is long, and has identified in particular that it occurs at a high frequency when the movement time of the semiconductor substrate is 15 seconds or more.
[0007] It is difficult to pinpoint the exact reason for increased transfer time due to various contributing factors, but examples include setting a longer polishing time on the subsequent polishing table, or experiencing time differences in the movement of the semiconductor substrate due to the equipment's configuration. DIC defects occur on the rough polishing table, among the multiple polishing stages. Rough polishing abrasives generally have high etchability and do not contain polymers to protect the semiconductor substrate surface. Therefore, it is presumed that localized etching progresses due to the abrasive adhering to the semiconductor substrate between the end of polishing and transport to the next polishing table, resulting in watermark-like defects that are detected as DIC defects and LPD (Light Point Defect) ≥ 55 nm. When performing final polishing, a rinsing step is usually performed to suppress the etchability of the slurry remaining on the polished surface by applying an appropriate amount of surfactant or surface protectant. However, when the rinsing step is performed outside of the final polishing stage, time loss occurs when replacing the surfactant or surface protectant with the abrasive and when replacing the rinsing solution adhering to the semiconductor substrate with the abrasive at the beginning of polishing in the next polishing stage.
[0008] In view of the above-mentioned problems, the object of the present invention is to provide a method for polishing a semiconductor substrate that suppresses the generation of DIC and LPD when moving the semiconductor substrate from one polishing table to the next. [Means for solving the problem]
[0009] To solve the above problems, the present invention provides a semiconductor substrate polishing method in which a semiconductor substrate held by a polishing head is pressed against a polishing cloth attached to a polishing platen, an abrasive is dropped onto the polishing cloth, and polishing is performed by sliding the semiconductor substrate, while moving the semiconductor substrate on multiple polishing tables, wherein during the polishing of the semiconductor substrate on the polishing table, the abrasive is changed from a first abrasive to a second abrasive having a lower polishing rate than the first abrasive, and at least one of the platen pressure, polishing head rotation speed, and polishing platen rotation speed is lowered compared to polishing with the first abrasive.
[0010] The semiconductor substrate polishing method of the present invention suppresses the residue of the first polishing agent on the surface of the semiconductor substrate by changing from a first polishing agent to a second polishing agent having a lower polishing rate than the first polishing agent during the polishing of the semiconductor substrate on the polishing table, thereby preventing the residue of the first polishing agent from locally etching the surface of the semiconductor substrate.
[0011] In the semiconductor substrate polishing method of the present invention, it is preferable to change from a first polishing agent to a second polishing agent having a lower polishing rate than the first polishing agent during polishing on the first of the plurality of polishing tables. This is because the first polishing agent used for polishing on the first polishing table has high etching properties and does not contain a polymer to protect the semiconductor substrate surface. Therefore, after polishing on the first polishing table and before being transported to the next polishing table, local etching is likely to occur due to the polishing agent adhering to the semiconductor substrate, resulting in the occurrence of DIC and LPD ≥ 55 nm.
[0012] In the semiconductor substrate polishing method of the present invention, when the travel time between polishing the semiconductor substrate on the plurality of polishing tables is 15 seconds or more, it is preferable to change from the first polishing agent to a second polishing agent having a lower polishing rate than the first polishing agent during the polishing of the semiconductor substrate on the polishing table. This is because DIC and LPD ≥ 55 nm occur at a high frequency when the travel time of the semiconductor substrate is 15 seconds or more.
[0013] In the semiconductor substrate polishing method of the present invention, it is preferable that the polishing time of the semiconductor substrate after switching to the second polishing agent is 3 seconds or more. This is because a time of 3 seconds or more required for the substitution from the first polishing agent to the second polishing agent is sufficient, as the effect is significant.
[0014] In the semiconductor substrate polishing method of the present invention, it is preferable that the second polishing agent is the same as the polishing agent used in the final polishing table among the polishing steps in the plurality of polishing tables. This is because by using the same polishing agent as the polishing agent used in the later polishing table of the multi-stage polishing process, the second polishing agent can be applied by changing the operating conditions of the polishing apparatus without incurring unnecessary capital investment.
[0015] In the semiconductor substrate polishing method of the present invention, the second polishing agent preferably contains a water-soluble polymer with a molecular weight of 100,000 or less. This is because, although a higher molecular weight of the water-soluble polymer increases the polishing rate, the higher the molecular weight, the more likely the polymer is to aggregate, which may lead to the occurrence of defects on the semiconductor substrate surface. [Effects of the Invention]
[0016] According to each aspect of the present invention, it is possible to provide a method for polishing a semiconductor substrate that suppresses the occurrence of DIC and LPD when moving the semiconductor substrate from one polishing table to the next. [Brief explanation of the drawing]
[0017] [Figure 1] Figure 1 is a schematic diagram of a polishing table used in a semiconductor substrate polishing method according to an embodiment of the present invention. [Figure 2] Figure 2 shows the polishing conditions for the comparative example and the example. [Figure 3] Figure 3 shows the properties of the first and second abrasives. [Figure 4] Figure 4 shows the measurement results of DIC generation for each dropping time of the second abrasive. [Figure 5] Figure 5 shows the measurement results of LPD ≥ 55 nm generation for each dropping time of the second abrasive. [Figure 6] Figure 6 shows the polishing conditions for a modified example of the semiconductor substrate polishing method according to an embodiment of the present invention. [Modes for carrying out the invention]
[0018] Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited to the embodiments described below. Also, in each drawing, the same or corresponding elements are appropriately assigned the same reference numerals. Furthermore, it should be noted that the drawings are schematic, and the dimensional relationships between elements, the ratios of elements, etc. may be different from the actual ones. There may also be parts where the dimensional relationships and ratios between the drawings are different from each other.
[0019] FIG. 1 is a schematic configuration diagram of a polishing table used in a method for polishing a semiconductor substrate according to an embodiment of the present invention. The method for polishing a semiconductor substrate according to an embodiment of the present invention is a multi-stage polishing process typified by so-called three-stage polishing, in which polishing is advanced while moving the semiconductor substrate between a plurality of polishing tables. Therefore, as shown in FIG. 1, the polishing table used in the method for polishing a semiconductor substrate is composed of a plurality of polishing tables 10A and 10B. Although only two polishing tables 10A and 10B are shown in FIG. 1, three polishing tables are used for three-stage polishing, and the number of polishing tables corresponding to the number of polishing stages is used for multi-stage polishing.
[0020] Each of the polishing tables 10A and 10B includes a polishing head 2, a polishing cloth 3, and a surface plate ④. In the polishing process of the semiconductor substrate, the semiconductor substrate 1 held by the polishing head 2 is pressed against the polishing cloth 3 attached to the polishing surface plate 4, and a polishing agent 5 is dropped onto the polishing cloth 3, and the semiconductor substrate 1 is slid to perform polishing.
[0021] And in the embodiment of the present invention, during the polishing of the semiconductor substrate on the polishing tables A and B, the first polishing agent is changed to a second polishing agent having a lower polishing rate than the first polishing agent. Here, in the polishing using the second polishing agent compared to the polishing using the first polishing agent, at least one or more of the surface plate pressure, the polishing head rotation speed, and the polishing surface plate rotation speed are lowered.
[0022] When switching from the first abrasive to the second abrasive, at least one of the following parameters of the polishing apparatus is reduced: the platen pressure, the polishing head rotation speed, and the polishing platen rotation speed. Particularly preferable is reducing the platen pressure and either or both of the polishing head rotation speed or the polishing platen rotation speed. In addition to using a second abrasive with a lower polishing rate, operating conditions are set to reduce polishing efficiency as much as possible. If the operating conditions are the same as when using the first abrasive, or operating conditions with higher polishing efficiency, for example, if the particle size of the second abrasive is finer than that of the first abrasive, heat generation can lead to surface roughness and DIC on the end faces. Therefore, it is preferable to set operating conditions to reduce polishing efficiency as much as possible.
[0023] Specific operating conditions need to be adjusted as appropriate depending on the equipment configuration, but generally, the platen pressure, polishing head rotation speed, polishing platen rotation speed, and polishing time are adjusted.
[0024] The platen pressure can usually be set to, for example, 100 to 300 hPa, taking into consideration polishing efficiency and processing capacity. When switching to a second abrasive, which has a lower polishing rate than the first abrasive, the pressure should be lower than the normal pressure used when using the first abrasive. In this invention, it is preferable to minimize the amount of polishing done by the second abrasive and to use a pressure that is sufficient to wash away the first abrasive adhering to the semiconductor substrate, which can usually be set to 30 to 80 hPa.
[0025] The rotation speed of the polishing head and the polishing platen can usually be set to, for example, 80 to 150 rpm, taking into consideration polishing efficiency and processing capacity. When switching to a second polishing compound, which has a lower polishing rate than the first polishing compound, the rotation speed of the polishing head and the polishing platen should be the same as or lower than the normal rotation speed when using the first polishing compound. In this invention, it is preferable to minimize the amount of polishing by the second polishing compound and to use a rotation speed that is sufficient to wash away the first polishing compound adhering to the silicon wafer, which can usually be set to 20 to 80 rpm.
[0026] The first abrasive is an abrasive commonly used in polishing, and can be appropriately selected from known abrasives without any particular restrictions. The second abrasive is one that has a lower polishing rate than the first abrasive. The polishing rate is determined by measuring the thickness of the center of the semiconductor substrate before and after processing using a flatness measuring instrument, with all other polishing conditions being the same, and using the difference as an indicator.
[0027] It is generally preferable to use silica particles as the free abrasive particles contained in the abrasive. The lower the concentration of abrasive particles in the abrasive, the lower the polishing rate.
[0028] The polymer contained in the abrasive can usually be a water-soluble polymer, and hydroxyethylcellulose (HEC) is preferred. The higher the concentration of the water-soluble polymer, the lower the polishing rate.
[0029] The higher the molecular weight of the water-soluble polymer, the greater the polishing rate. On the other hand, as the molecular weight increases, the polymer becomes more prone to aggregation, which may lead to the occurrence of defects on the semiconductor substrate surface. For this reason, in this invention, the molecular weight of the water-soluble polymer is preferably 100,000 or less. Conversely, the lower the molecular weight, the lower the polishing rate. For this reason, in this invention, an even lower molecular weight is preferable. However, if the molecular weight is, for example, less than 1,000, the function of protecting the wafer surface may be impaired.
[0030] The second abrasive is more preferably the same as the abrasive used for polishing on the polishing table in the later stages of the multi-stage polishing process (most preferably, the same as the abrasive used for polishing on the final polishing table). If a new abrasive is adopted as the second abrasive in addition to the abrasive used in the conventional multi-stage polishing process, it becomes necessary to set up dedicated piping and storage tanks, which increases costs. By using the same abrasive as the one used on the polishing table in the later stages of the multi-stage polishing process, which has a lower polishing rate, the second abrasive can be applied by changing the operating conditions of the polishing equipment without making any unnecessary capital investments.
[0031] The polishing time for the semiconductor substrate after switching to the second abrasive is adjusted as appropriate according to the platen pressure, rotation speed, slurry flow rate, etc. The polishing time for the semiconductor substrate after switching to the second abrasive can be determined by checking and adjusting the amount of DIC reduction in advance, and can usually be 1 second or more, and preferably 3 seconds or more. When the polishing time for the semiconductor substrate after switching to the second abrasive is 3 seconds or more, the generation of DIC and LPD can be suppressed more effectively.
[0032] The semiconductor substrate polishing method of this embodiment can be applied to so-called three-stage polishing, but is not limited to three stages; it can be applied regardless of the number of stages in the polishing table, for example, from two to ten stages. Polishing with the second polishing agent can be appropriately used in polishing on polishing tables where the movement time when moving the semiconductor substrate to the next polishing table is 15 seconds or more, except for polishing on the final polishing table.
[0033] Normally, the time it takes for a semiconductor substrate to move between polishing tables is within 10 seconds. Reasons for longer movement times include setting a longer polishing time on a subsequent polishing table, as well as the configuration of the equipment causing a time difference in the movement of the semiconductor substrate. The semiconductor substrate polishing method of this embodiment is preferably applied when the movement time when moving the semiconductor substrate to the next polishing table is 15 seconds or more, and it suppresses the occurrence of DIC and LPD with high frequency when the substrate movement time when moving the semiconductor substrate from one polishing table to the next is particularly 15 seconds or more. If the time for the semiconductor substrate to move between polishing tables is set to, for example, within 10 seconds, and there is a possibility that the movement time may exceed the set time for some reason as described above, the semiconductor substrate polishing method of the present invention can be used, and even if the movement time suddenly becomes, for example, 15 seconds or more, it can suppress the occurrence of DIC and LPD with high frequency.
[0034] The polishing to which the polishing agent is changed to the second polishing agent is preferably the polishing performed on the polishing table where the initial rough polishing is carried out among the polishing on multiple polishing tables. This is because the polishing agent used for polishing on the initial polishing table has high etching properties and does not contain polymers (water-soluble polymers) to protect the semiconductor substrate surface. Therefore, after polishing on the initial polishing table and before being transported to the next polishing table, local etching is likely to occur due to the polishing agent adhering to the semiconductor substrate, resulting in the occurrence of DIC and LPD ≥ 55 nm. In other words, when changing from the first polishing agent to a second polishing agent with a lower polishing rate than the first polishing agent in this invention, it is preferable that the first polishing agent is a polishing agent that does not contain water-soluble polymers, and the second polishing agent is a polishing agent that contains water-soluble polymers.
[0035] In the semiconductor substrate polishing method of this embodiment, the polishing cloth attached to the polishing platen on the polishing table can be a conventionally known polishing cloth. However, when using other polishing cloths such as polyurethane or nonwoven fabric, there is a risk of deterioration of surface roughness, so in this invention, it is preferable to use suede. Suede polishing cloths are generally used for finish polishing, and are softer than polyurethane or nonwoven fabric polishing cloths, and a good surface roughness can be obtained, so a suede-type nonwoven fabric can be suitably used in this invention.
[0036] In the semiconductor substrate polishing method of the present invention, it is preferable to use the polishing agent with the lowest polishing rate throughout the entire multi-stage polishing process for the final polishing table in the multi-stage polishing process, and to perform a rinsing process using a rinsing solution on the same polishing table after treatment with the polishing agent. The rinsing process can employ conventionally known methods and rinsing solutions, for example, the polishing time can be 1 to 30 seconds, the polishing platen pressure can be 30 to 100 hPa, and the polishing head rotation speed and polishing platen rotation speed can each be 20 to 100 rpm.
[0037] [Measurement results of the effect] Ten silicon wafers were polished in a multi-stage process using the polishing conditions of the comparative example and example shown in Figures 2 and 3. Figures 4 and 5 show the relationship between the polishing time with the second polishing agent and the measurement results of DIC and LPD ≥ 55 nm after polishing.
[0038] As can be seen from the measurement results shown in Figures 4 and 5, when the polishing time with the second abrasive was set to 3 seconds or more, DIC and LPD ≥ 55nm were significantly reduced compared to the comparative example (conventional conditions). Although DIC and LPD ≥ 55nm were also reduced compared to the comparative example (conventional conditions) when the polishing time was 1 second and 2 seconds, the effect was particularly pronounced when the polishing time was 3 seconds or more.
[0039] The reason why the effect is significant when the polishing time with the second abrasive is 3 seconds or more is thought to be because 3 seconds or more is sufficient time for the replacement of the first abrasive with the second abrasive. On the other hand, when the polishing time with the second abrasive is less than 3 seconds, the replacement of the first abrasive with the second abrasive is insufficient, and as a result, the remaining first abrasive locally etches the surface of the semiconductor substrate, causing DIC and LPD ≥ 55 nm.
[0040] [Differentiation] Figure 6 shows the polishing conditions for a modified example of the semiconductor substrate polishing method according to an embodiment of the present invention. As shown in Figure 6, in the modified example of the semiconductor substrate polishing method according to an embodiment of the present invention, polishing is performed while moving the semiconductor substrate in the order of polishing tables A, B, C, and D. Here, the time it takes to move the semiconductor substrate from polishing table A to polishing table B and the time it takes to move the semiconductor substrate from polishing table B to polishing table C are 15 to 50 seconds. Therefore, not only is the polishing agent changed from the first polishing agent X to the second polishing agent Y, which has a lower polishing rate than the first polishing agent X, during the polishing of the semiconductor substrate on polishing table A, but the polishing agent is also changed from the first polishing agent X to the second polishing agent Y, which has a lower polishing rate than the first polishing agent X, during the polishing of the semiconductor substrate on polishing table B. By doing so, it is possible to suppress the generation of DIC and LPD ≥ 55 nm, which occurs when the first polishing agent X locally etches the surface of the semiconductor substrate.
[0041] Furthermore, the disclosures of the above-mentioned patent documents and other materials cited are incorporated into this document by reference. Within the framework of the full disclosure of the present invention (including the claims), further modifications and adjustments to the embodiments or examples are possible based on the fundamental technical concept. Also, within the framework of the full disclosure of the present invention, various combinations or selections (including partial deletions) of various disclosure elements (including each element of each claim, each element of each embodiment or example, each element of each drawing, etc.) are possible. In other words, the present invention naturally includes the full disclosure, including the claims, and various modifications and alterations that a person skilled in the art could make in accordance with the technical concept. In particular, with respect to the numerical ranges described in this document, any numerical value or sub-range included within that range should be interpreted as being specifically described, even if not otherwise stated. Furthermore, the disclosures of the above-mentioned cited documents may, if necessary, be used in part or in whole as part of the disclosure of the present invention, in accordance with the spirit of the present invention, and these may also be considered to be included in the disclosures of this application. [Explanation of symbols]
[0042] 10A, 10B Polishing Table 1. Semiconductor substrate 2 polishing heads 3 Polishing cloth 4. Surface plate 5. Abrasive
Claims
1. A method for polishing a semiconductor substrate, comprising the steps of pressing a semiconductor substrate held by a polishing head against a polishing cloth attached to a polishing platen, dropping polishing agent onto the polishing cloth, and polishing by sliding the semiconductor substrate, while moving the semiconductor substrate across multiple polishing tables, During the polishing of the semiconductor substrate on the polishing table, the first polishing agent is changed to a second polishing agent having a lower polishing rate than the first polishing agent. A method for polishing a semiconductor substrate, wherein the polishing using the second abrasive reduces at least one of the following: the polishing platen pressure, the polishing head rotation speed, and the polishing platen rotation speed, compared to polishing using the first abrasive.
2. The method for polishing a semiconductor substrate according to claim 1, wherein, among the polishing on the plurality of polishing tables, the polishing agent is changed from a first polishing agent to a second polishing agent having a lower polishing rate than the first polishing agent during the polishing on the first polishing table.
3. The method for polishing a semiconductor substrate according to claim 1, wherein, among the polishing on the plurality of polishing tables, when the travel time when moving the semiconductor substrate to the next polishing table is 15 seconds or more, the polishing agent is changed from the first polishing agent to a second polishing agent having a lower polishing rate than the first polishing agent during the polishing of the semiconductor substrate on the polishing table.
4. The method for polishing a semiconductor substrate according to any one of claims 1 to 3, wherein the polishing time of the semiconductor substrate after changing to the second abrasive is 3 seconds or more.
5. The method for polishing a semiconductor substrate according to any one of claims 1 to 3, wherein the second polishing agent is the same as the polishing agent used in the final polishing table among the polishing steps in the plurality of polishing tables.
6. The method for polishing a semiconductor substrate according to any one of claims 1 to 3, wherein the second abrasive comprises a water-soluble polymer with a molecular weight of 100,000 or less.