Circuit board with embedded electronic components

Abstract

One of several objectives of the present invention is to provide an electronic component embedded substrate that includes a cavity for embedding electronic components in a glass layer, which can improve the matching capability of the electronic components, improve the degree of freedom in the size of the electronic components, reduce the influence on the angle of the cavity wall and the uniformity of the bottom surface, improve variations in the insulation thickness above the electronic components, and / or improve via reliability. [Solution] The present invention relates to an electronic component embedded substrate, comprising: a glass layer; a through cavity penetrating between the upper and lower surfaces of the glass layer; a blind member, at least a portion of which is disposed within the through cavity; an electronic component, at least a portion of which is disposed within the through cavity and attached to the upper surface of the blind member; and an insulating material that covers at least a portion of the glass layer, the blind member, and the electronic component, and fills at least a portion of the through cavity.

Description

Technical Field

[0001] The present invention relates to a substrate with built-in electronic components.

Background Art

[0002] In order to meet the high-performance and miniaturization strategies of semiconductors, the levels of miniaturization and high density required for printed circuit boards are increasing. For example, in order to produce high-end products such as server substrates, high-multi-layer and large substrates are required. However, the more wiring layers there are and the larger the size of the main body, the more vulnerable the substrate may be to warpage. Using a glass core has been considered to solve such problems. On the other hand, in order to incorporate electronic components into the glass core, blind cavities can be processed and electronic components can be placed therein. However, in the case of blind cavities formed in the glass core, the bottom surface and the wall surface may not be uniform due to the influence of lasers and etching. Therefore, problems may occur in the alignment ability of electronic components, variations in the upper insulation thickness, via connectivity, etc.

Summary of the Invention

Problems to be Solved by the Invention

[0003] One of several objects of the present invention is to provide a substrate with built-in electronic components including cavities for incorporating electronic components into a glass layer, which can improve the alignment ability of electronic components, improve the freedom in the size of electronic components, reduce the influence on the angle of the cavity wall surface and the uniformity of the bottom surface, improve the variation in the insulation thickness above the electronic components, and / or improve via reliability.

Means for Solving the Problems

[0004] One of several solutions of the present invention involves forming a through-cavity in a glass layer, placing a separate blind member below the through-cavity, and arranging and embedding electronic components on the blind member of the through-cavity. The blind member may, but is not limited to, a glass block, a metal block, or a combination thereof.

[0005] For example, an electronic component-embedded substrate according to one example may include a glass layer, a through-cavity penetrating between the upper and lower surfaces of the glass layer, a blind member at least partially disposed within the through-cavity, an electronic component at least partially disposed within the through-cavity and attached to the upper surface of the blind member, and an insulating material covering at least parts of the glass layer, the blind member, and the electronic component, and filling at least part of the through-cavity.

[0006] For example, an electronic component-embedded substrate according to one example may include a glass layer, a through-cavity penetrating between the upper and lower surfaces of the glass layer, a glass block with at least a portion of it positioned on the lower side of the through-cavity, an electronic component with at least a portion of it positioned on the upper side of the through-cavity, and an insulating material that covers at least a portion of the glass layer, the glass block, and the electronic component, and fills at least a portion of the through-cavity. [Effects of the Invention]

[0007] As one of the various effects of the present invention, an electronic component embedded substrate including a cavity for embedding electronic components in a glass layer can be provided that improves the matching capability of the electronic components, improves the degree of freedom in the size of the electronic components, reduces the influence on the angle of the cavity wall surface and the uniformity of the bottom surface, improves the variation in the insulation thickness above the electronic components, and / or improves via reliability. [Brief explanation of the drawing]

[0008] [Figure 1]This is a block diagram illustrating an example of an electronic equipment system. [Figure 2] This is a schematic cross-sectional view showing an example of a circuit board with embedded electronic components. [Figure 3] Figure 2 is a schematic cross-sectional plan view of the circuit board with embedded electronic components, taken from line A-A'. [Figure 4] This is a schematic cross-sectional view showing another example of a circuit board with embedded electronic components. [Figure 5] This is a schematic cross-sectional view showing yet another example of a circuit board with embedded electronic components. [Modes for carrying out the invention]

[0009] The present invention will be described below with reference to the attached drawings. The shapes and sizes of the elements in the drawings may be exaggerated or reduced for clearer explanation.

[0010] Figure 1 is a block diagram illustrating an example of an electronic equipment system.

[0011] Referring to the drawing, the electronic device 1000 houses the main board 1010. The main board 1010 is physically and / or electrically connected to chip-related components 1020, network-related components 1030, and other components 1040, etc. These are also coupled with other electronic components, which will be described later, to form various signal lines 1090.

[0012] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPUs), graphics processors (e.g., GPUs), digital signal processors, cryptographic processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). It goes without saying that other different forms of chip-related electronic components may also be included. Furthermore, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may also be in the form of a package that includes the chips and electronic components mentioned above.

[0013] Network-related component 1030 includes, but is not limited to, any other wireless and wired protocols designated as Wi-Fi (IEEE 802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and later. It also includes any other diverse wireless or wired standards and protocols. Furthermore, it goes without saying that network-related component 1030 may be combined with chip-related component 1020.

[0014] Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCCs (low-temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCCs (multi-layer ceramic condensers), etc. However, they are not limited to these, and may also include other passive elements in chip component form used for various other applications. It goes without saying that other components 1040 may be combined with chip-related components 1020 and / or network-related components 1030.

[0015] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that are physically and / or electrically connected to the main board 1010 or not. Examples of other electronic components include, but are not limited to, audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), CDs (compact disks), DVDs (digital versatile disks), etc. Needless to say, other electronic components used for various purposes may also be included depending on the type of electronic device 1000.

[0016] The electronic device 1000 may be a smartphone, personal digital assistant, digital video camera, digital still camera, network system, computer, monitor, tablet, laptop, netbook, television, video game, smartwatch, automobile, server, etc. However, it is not limited to these, and it goes without saying that it may be any other electronic device that processes data.

[0017] Figure 2 is a schematic cross-sectional view showing an example of a circuit board with embedded electronic components, and Figure 3 is a schematic plan view of the circuit board with embedded electronic components shown in Figure 2, cut along line A-A'.

[0018] Referring to the drawings, an example of an electronic component-embedded substrate 100 may include a glass layer 110, a through-cavity h penetrating between the upper and lower surfaces of the glass layer 110, a blind member 180 with at least a portion located on the lower side of the through-cavity h, an electronic component 191 with at least a portion located on the upper side of the through-cavity h, and an insulating material 115 that covers at least a portion of each of the glass layer 110, the blind member 180, and the electronic component 191, and fills at least a portion of the through-cavity h. The electronic component 191 can be mounted on the upper surface of the blind member 180. For example, the electronic component 191 may have a connecting electrode P on its upper surface, and its lower surface may be attached to the upper surface of the blind member 180 via an adhesive layer 192. The sides of the blind member 180, the electronic component 191, and the adhesive layer 192 can be separated from the wall surface of the through-cavity h. For example, the wall surface of the through-cavity h can, but is not limited to, continuously surround each of these sides. The insulating material 115 can fill at least a portion of the walls of the through cavity h and the spaces between each of these sides.

[0019] Thus, in this example, the printed circuit board 100A has a through-cavity h instead of a blind cavity in the glass layer 110, thereby preventing the above-mentioned problems that may occur during the formation process of a blind cavity. In this case, a separate blind member 180 can be placed below the through-cavity h, thereby making it possible to realize a structure similar to that of a blind cavity. For example, the blind member 180 can provide a bottom surface below the through-cavity h. Therefore, it is possible to complement the shortcomings of the blind cavity structure and secure its advantages. For example, it may be possible to improve the matching capability of the electronic component 191, improve the size freedom of the electronic component 191, reduce the influence on the angle of the wall surface and the uniformity of the bottom surface of the through-cavity h, improve the thickness variation of the region of the insulating material 115 placed above the electronic component 191, and / or improve the reliability of the third connection via 133 formed in the region of the insulating material 115 placed above the electronic component 191.

[0020] Referring to the drawings, an example of an electronic component-embedded substrate 100A may further include a metal via 130 penetrating at least a portion between the upper and lower surfaces of the glass layer 110, a first wiring layer 121 positioned on the upper surface of the insulating material 115, a second wiring layer 122 positioned on the lower surface of the insulating material 115, a first connecting via 131 penetrating at least a portion of the upper side of the insulating material 115 and connecting at least a portion of the first wiring layer 121 to the metal via 130, a second connecting via 132 penetrating at least a portion of the lower side of the insulating material 115 and connecting at least a portion of the second wiring layer 122 to the metal via 130, and a third connecting via 133 penetrating at least another portion of the upper side of the insulating material 115 and connecting at least another portion of the first wiring layer 121 to a connecting electrode P. The metal via 130 can fill at least a portion of a through hole formed in the glass layer 110, for example, a TGV (Through Glass Via). The upper and lower surfaces of the metal via 130 may have a step difference from the upper and lower surfaces of the glass layer 110, but are not limited to this. The first and second connecting vias 131 and 132 may be directly connected to the metal via 130, respectively. For example, they can be in direct contact with the metal via 130 without separate pads or lands. Therefore, the overall thickness of the substrate can be reduced, and the difficulty of the process can be lowered.

[0021] Referring to the drawings, the electronic component - embedded substrate 100A according to an example can further include a frame 105 and a through - hole H that penetrates between the upper and lower surfaces of the frame 105. The glass layer 110 may be at least partially disposed within the through - hole H. The insulating material 115 can further cover at least a part of the frame 105 and can further fill at least a part of the through - hole H. If necessary, at least a part of the through - hole H may be filled with a separate filling material. The frame 105 can include various materials with excellent rigidity. Such a frame 105 can be used as a jig in the process, so that the process can be performed at the panel level through the frame 105, and the warpage in the process can be easily controlled. Further, the frame 105 can remain in the final unit after singulation, and in this case, it can also be more advantageous for controlling the warpage of the final unit.

[0022] Referring to the drawings, an electronic component - embedded substrate 100A according to an example includes a plurality of first build - up insulating layers 141 disposed on the upper surface of an insulating material 115, a plurality of first build - up wiring layers 142 respectively disposed on or within the plurality of first build - up insulating layers 141, a plurality of first build - up via layers 143 respectively disposed within the plurality of first build - up insulating layers 141, a plurality of second build - up insulating layers 151 disposed on the lower surface of the insulating material 115, a plurality of second build - up wiring layers 152 respectively disposed on or within the plurality of second build - up insulating layers 151, and a plurality of second build - up via layers 153 respectively disposed within the plurality of second build - up insulating layers 151. Further, it can further include a first passivation layer 161 disposed on the plurality of first build - up insulating layers 161 and having a plurality of first openings for respectively exposing at least a part of the first build - up wiring layer disposed on the uppermost side among the plurality of first build - up wiring layers 142, and a second passivation layer 162 disposed on the plurality of second build - up insulating layers 151 and having a plurality of second openings for respectively exposing at least a part of the second build - up wiring layer disposed on the lowermost side among the plurality of second build - up wiring layers 152. For example, an electronic component - embedded substrate 100A according to an example can include a glass layer 110 as a core layer, and build - up layers or the like can be formed on one or both sides of the core layer. Therefore, it can be easily used as a package substrate or an interposer substrate, etc. In addition, it can be easily applied to other various types and / or various forms of printed circuit boards.

[0023] Hereinafter, referring to the drawings, the components of an electronic component - embedded substrate 100A according to an example will be described in more detail.

[0024] The frame 105 may include an organic insulating material. The organic insulating material may include a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or an inorganic filler, an organic filler, and / or glass fiber (glass cloth, glass fabric) together with the resin. For example, the organic insulating material may include, but is not limited to, CCL (copper clad laminate) or unclad CCL, and may also include other organic or inorganic materials with superior rigidity. The penetration H may penetrate between the upper and lower surfaces of the frame 105. The penetration H may, but is not limited to, continuously surround the perimeter of the side surface of the glass layer 110.

[0025] The glass layer 110 may include glass, which is an amorphous solid. The glass may include, for example, pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, aluminosilicate glass, etc. However, it is not limited to these, and alternative glass materials such as fluorine glass, phosphoric acid glass, and chalcogen glass can also be used. Furthermore, other additives may be included to form glass with specific physical properties. Such additives may include not only calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), but also magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, as well as carbonates and / or oxides of these elements and other elements. On the other hand, the glass layer 110 can be distinguished from organic insulating materials containing glass fibers (glass fiber, glass cloth, glass fabric), such as CCL (copper clad laminate) and PPG (prepreg). The glass layer 110 may be in the form of, for example, a glass plate. The through cavity h can penetrate between the upper and lower surfaces of the glass layer 110. The through cavity h can continuously surround the perimeter of each side of the electronic component 191, the adhesive layer 192, and the blind member 180.

[0026] The insulating material 115 may include an organic insulating material. The organic insulating material may include a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or an inorganic filler, an organic filler, and / or glass fiber (glass cloth, glass fabric) together with the resin. For example, the organic insulating material may include, but is not limited to, PPG (Prepreg), ABF (Ajinomoto Build-up Film), PID (Photo Imageable Dielectric), etc. The insulating material 115 may consist of multiple layers. Each of the multiple layers may be integrated without boundaries, or boundaries may be defined between the layers. The multiple layers may include, but are not limited to, substantially the same insulating material, and may also include different insulating materials.

[0027] The first and second wiring layers 121 and 122 can each contain a metal. The metal can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the first and second wiring layers 121 and 122 can each contain chemical copper formed by electroless plating as a seed layer, and electroplated copper formed by electroplating based on this as a plating layer. The first and second wiring layers 121 and 122 can each perform various functions depending on the design. For example, the first and second wiring layers 121 and 122 can each contain signal patterns, power patterns, ground patterns, etc. These patterns can each have various forms such as lines, traces, planes, lands, and pads.

[0028] The metal via 130 can contain metals such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the metal via 130 can contain a titanium layer and a copper layer formed by sputtering, i.e., sputtered titanium and sputtered copper, as seed layers, and based on this, it can contain electroplated copper formed by electroplating as a plating layer. If necessary, it may further contain chemical copper formed by electroless plating as a seed layer. The metal via 130 can perform various functions depending on the design. For example, the metal via 130 can include through-holes for signal transmission, through-holes for power transmission, through-holes for ground transmission, etc. The metal via 130 may also be a filled via with a metal through-hole filled. The metal via 130 may have a substantially cylindrical shape, but may also have a substantially hourglass shape. The upper and lower surfaces of the metal via 130 can be recessed inward from the upper and lower surfaces of the glass layer 110, respectively, so the upper and lower surfaces of the metal via 130 can have a step difference from the upper and lower surfaces of the glass layer 110, respectively, but are not limited to this. There may be multiple metal vias 130.

[0029] The first to third connection vias 131, 132, and 133 can each contain metal. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the first to third connection vias 131, 132, and 133 can each contain chemical copper formed by electroless plating as a seed layer, and electroplated copper formed by electroplating based on this seed layer. The first to third connection vias 131, 132, and 133 can each perform various functions depending on the design. For example, the first to third connection vias 131, 132, and 133 can each include signal transmission vias, power transmission vias, ground transmission vias, and so on. The first to third connecting vias 131, 132, and 133 may each include a filled via in which at least a portion of the via hole is filled with metal, or they may include a conformal via in which metal is arranged along the wall surface of the via hole. The first to third connecting vias 131, 132, and 133 may each have a substantially tapered shape. The first and second connecting vias 131 and 132 may be directly connected to the upper and lower surfaces of the metal via 130, respectively. For example, they may be in direct contact. If there are multiple metal vias 130, there may also be multiple first and second connecting vias 131 and 132, respectively. If there are multiple connecting electrodes P, there may also be multiple third connecting vias 133, corresponding to the number of connecting electrodes P.

[0030] Each of the multiple first and second build-up insulating layers 141, 151 may contain an organic insulating material. The organic insulating material may be a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or may contain an inorganic filler, an organic filler, and / or glass fiber (glass cloth, glass fabric) together with the resin. Examples of organic insulating materials include, but are not limited to, PPG (Prepreg), ABF (Ajinomoto Build-up Film), and PID (Photo Imageable Dielectric). Each of the multiple first and second build-up insulating layers 141, 151 may be integrated with each other without boundaries, or boundaries may be separated between the layers. Furthermore, each of the multiple first and second build-up insulating layers 141, 151 may contain substantially the same insulating material, but may also contain different insulating materials. The multiple first and second build-up insulating layers 141, 151 may have the same number of layers as the others, but are not limited to this, and the multiple first build-up insulating layers 141 may have a relatively larger number of layers. If necessary, the multiple second build-up insulating layers 151 may be omitted.

[0031] Multiple first and second build-up wiring layers 142, 152 can each contain a metal. The metal can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, multiple first and second build-up wiring layers 142, 152 can each contain chemical copper formed by electroless plating as a seed layer, and electroplated copper formed by electroplating based on this as a plating layer. Multiple first and second build-up wiring layers 142, 152 can each perform various functions depending on the design. For example, multiple first and second build-up wiring layers 142, 152 can each contain signal patterns, power patterns, ground patterns, etc. These patterns can each have various forms such as lines, traces, planes, lands, and pads. Multiple first and second build-up wiring layers 142, 152 may have the same number of layers, but multiple first build-up wiring layers 142 may have a relatively larger number of layers. If multiple second build-up insulating layers 151 are omitted, multiple second build-up wiring layers 152 may also be omitted.

[0032] Multiple first and second build-up via layers 143, 153 can each contain a metal. The metals can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, multiple first and second build-up via layers 143, 153 can each contain chemical copper formed by electroless plating as a seed layer, and electroplated copper formed by electroplating based on this as a plating layer. Multiple first and second build-up via layers 143, 153 can each perform various functions depending on the design. For example, multiple first and second build-up via layers 143, 153 can each contain signal transmission connection vias, power transmission connection vias, ground transmission connection vias, etc. Each of the multiple first and second build-up via layers 143, 153 may include filled vias in which at least a portion of the via hole is filled with metal, or it may include conformal vias in which metal is positioned along the wall of the via hole. Each of the multiple first and second build-up via layers 143, 153 may include multiple connection vias. The connection vias contained in each of the multiple first build-up via layers 143 and the connection vias contained in each of the multiple second build-up via layers 153 may have substantially opposite tapered shapes. The multiple first and second build-up via layers 143, 153 may have the same number of layers, although the multiple first build-up via layers 143 may have a relatively larger number of layers. If the multiple second build-up insulating layers 151 are omitted, the multiple second build-up via layers 153 may also be omitted.

[0033] The first and second passivation layers 161 and 162 may each contain an organic insulating material. The organic insulating material may be a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or may contain an inorganic filler and / or organic filler together with the resin. For example, the organic insulating material may be, but is not limited to, ABF (Ajinomoto Build-up Film), PID (Photo Imageable Dielectric), SR (Solder Resist), etc. The first and second passivation layers 161 and 162 may each consist of multiple layers. The first and second passivation layers 161 and 162 may each have multiple openings, and the patterns exposed through each opening may be, but are not limited to, SMD (Solder Mask Defined) and / or NSMD (Non Solder Mask Defined) types.

[0034] The blind member 180 is positioned within the through cavity h and can provide the bottom surface of the through cavity h. The blind member 180 can have various shapes and sizes. The blind member 180 may have a wider cross-sectional width and a larger planar area than the electronic component 191 and the adhesive layer 192, respectively. The blind member 180 can be spaced apart from the walls of the through cavity h. The blind member 180 can be made of various materials. For example, in one example, it can be made of the glass described above for the glass layer 110. For example, in one example, the blind member 180 may be a glass block 181. The glass block 181 can be made of substantially the same material as the glass layer 110, for example, substantially the same glass. By making the glass layer 110 and the glass block 181 that provides the bottom surface of the through cavity h from substantially the same material, the difference in thermal expansion coefficients can be reduced. This can be advantageous in warping control and the like.

[0035] The electronic component 191 can be mounted face-up on the bottom surface of the top surface of the glass block 181. For example, the electronic component 191 may include connecting electrodes P for electrical connection, and the connecting electrodes P may be placed on the top surface, i.e., the front surface, of the electronic component 191. The connecting electrodes P may include conductive materials, such as metals. The metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. The connecting electrodes P may include pads and may further include bumps or posts placed on the pads. There may be multiple connecting electrodes P. The bottom surface, i.e., the back surface, of the electronic component 191 can be mounted on the top surface of the glass block 181 via an adhesive layer 192, in which case a known adhesive film such as DAF (Die Attach Film) can be used as the adhesive layer 192. The electronic component 191 may be thicker than the adhesive layer 192. Such arrangement can further enhance the technical effects described above. The electronic component 191 may include various types of active and / or passive elements. For example, the electronic component 191 may include, but is not limited to, various types of integrated circuit dies or semiconductor chips.

[0036] Figure 4 is a schematic cross-sectional view showing another example of a circuit board with embedded electronic components.

[0037] Referring to the drawings, another example of a printed circuit board 100B is that, in the printed circuit board 100A described above, the blind member 180 may include a metal block 182. In this case, the heat dissipation effect may be better. The metal block 182 may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, and preferably, it may include copper (Cu). On the other hand, if necessary, a fourth connecting via 134 may be further included that penetrates at least the other part below the insulating material 115 and connects at least the other part of the second wiring layer 122 to the blind member 180, for example, the metal block 182. This allows heat to be more easily released to the bottom of the board. At least the other part of the second wiring layer 122 connected to the metal block 182 may include, but is not limited to, a ground pattern and / or a power pattern. For a specific explanation of the fourth connection via 134, the content described above for the first to third connection vias 131, 132, and 133 can be applied substantially similarly. Other explanations may be substantially the same as those described for the printed circuit board 100A in the example described above.

[0038] Figure 5 is a schematic cross-sectional view showing yet another example of a circuit board with embedded electronic components.

[0039] Referring to the drawings, another example of a printed circuit board 100C is that, in the printed circuit board 100A described above, the blind member 180 may include a glass block 183 and a metal block 184. In this case, both the technical effects of the glass block 183 and the technical effects of the metal block 184 can be obtained. The metal block 184 can be attached to the underside of the glass block 183, or, for example, directly connected to and in contact with the underside of the glass block 183. The metal block 184 may be thinner than the glass block 183. A specific description of the glass block 183 and the metal block 184 can be substantially applied in the same manner as the description of the glass block 181 and the metal block 182 described above. On the other hand, if necessary, a fourth connecting via 134 may be further included, which penetrates at least the other underside of the insulating material 115 and connects at least the other side of the second wiring layer 122 to the blind member 180, for example, the metal block 184. At least the remaining portion of the second wiring layer 122 connected to the metal block 184 may include, but is not limited to, a ground pattern and / or a power pattern. A specific description of the fourth connection via 134 can be applied substantially similarly to the descriptions given above for the first to third connection vias 131, 132, and 133. Other descriptions may be substantially the same as those given for printed circuit board 100A according to one example and printed circuit board 100B according to another example.

[0040] In this invention, the expression "cover" can include not only covering the entire object but also covering at least a part of it, and can include not only directly covering the object but also indirectly covering it. Furthermore, the expression "fill" can include not only completely filling the object but also filling at least a part of it, and can also include nearly filling the object. For example, it can include cases where there are some gaps or voids. Also, the expression "enclose" can include not only completely enclosing the object but also partially enclosing it and generally enclosing it. Furthermore, "expose" can include not only completely exposing the object but also partially exposing it, and "exposure" can mean that the component is exposed from what it is embedded in.

[0041] In this invention, "placed within a through cavity or through-hole" can include not only cases where the object is completely placed within a through cavity or through-hole, but also cases where a portion of it extends upward or downward in cross-section. For example, if the object is placed within a through cavity or through-hole on a plane, it can be interpreted in a broader sense.

[0042] In this invention, the determination can be made including process errors, positional deviations, and measurement errors that substantially occur during the manufacturing process. For example, "placed at substantially the same level" can include not only cases where they are placed at exactly the same level, but also cases where they are placed at approximately the same level. Similarly, "having substantially a specific shape" can include not only cases where they have exactly that shape, but also cases where they have approximately that shape. Furthermore, "substantially the same insulating material" can mean not only cases where the insulating material is completely identical, but also cases where it includes insulating materials of the same type. Therefore, even if the composition of the insulating material is substantially the same, their specific composition ratios may differ slightly.

[0043] In this invention, "on a cross-section" can mean the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is viewed from the side. "On a plane" can mean the planar shape when the object is cut horizontally, or the planar shape when the object is viewed from the top or bottom.

[0044] In this invention, terms such as "lower side," "lower part," and "bottom surface" are used for convenience to mean the downward direction relative to the cross-section in the drawing, while terms such as "upper side," "upper part," and "top surface" are used to mean the opposite direction. However, this is merely a definition of direction for explanatory purposes, and it goes without saying that the scope of rights in the patent claims is not particularly limited by such descriptions of direction, and the concepts of up / down can be changed at any time.

[0045] In this invention, "connected" is a concept that includes not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, "electrically connected" is a concept that includes both cases where they are physically connected and cases where they are not connected. In addition, expressions such as "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, within the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component.

[0046] In this invention, "thickness, width, length, depth, line width, spacing, pitch, separation distance, surface roughness," etc., can be measured using a scanning microscope or optical microscope, etc., based on a cross-section obtained by polishing or cutting the substrate containing the electronic components. The cut cross-section can be a vertical or horizontal cross-section, and each value can be measured based on the required cut cross-section. For example, the width of the upper and / or lower ends of a via can be measured on a cross-section cut along the central axis of the via. In this case, if the values ​​are not constant, the values ​​can be determined by the average value of the values ​​measured at any five points.

[0047] The expression "example" as used in this invention does not mean that each embodiment is the same as another, but is provided to highlight and illustrate the unique and distinct features of each. However, the examples presented above do not preclude their realization in combination with features of other examples. For example, even if a matter described in a particular example is not described in another example, it can be understood as a description related to that other example, unless there is a description in the other example that contradicts or is contrary to that description.

[0048] The terms used in this invention are for illustrative purposes only and are not intended to limit the invention. In this context, singular expressions include plural expressions unless the context clearly indicates a different meaning. [Explanation of symbols]

[0049] 1000:Electronic equipment 1010: Mainboard 1020: Chip-related components 1030: Network-related components 1040: Other parts 1050: Camera 1060: Antenna 1070: Display 1080: Battery 1090: Signal line 100A, 100B, 100C: Circuit boards with embedded electronic components 105: Frame 110: Glass layer 115: Insulating material 121, 122: Wiring layer 130: Metal Via 131, 132, 133, 134: Connection vias 141, 151: Build-up insulating layer 142, 152: Build-up wiring layer 143, 153: Build-up beer layer 161, 162: Passivation layer H: Penetration part h: Through-cavity P: Connecting electrode

Claims

1. A glass layer, A through cavity that penetrates between the upper and lower surfaces of the glass layer, A blind member, at least a portion of which is disposed within the aforementioned through cavity, At least a portion of the electronic component is located within the through cavity and is attached to the upper surface of the blind member, An electronic component substrate comprising an insulating material that covers at least a portion of the glass layer, the blind member, and the electronic component, and fills at least a portion of the through cavity.

2. The sides of the blind member and the electronic component are spaced apart from the wall surface of the through cavity. The electronic component embedded substrate according to claim 1, wherein the insulating material fills at least a portion of the space between the respective sides of the blind member and the electronic component and the wall surface of the through cavity.

3. The electronic component embedded substrate according to claim 1, wherein the blind member includes a glass block.

4. The electronic component substrate according to claim 3, wherein the glass block comprises substantially the same glass as the glass layer.

5. The electronic component embedded substrate according to claim 1, wherein the blind member includes a metal block.

6. The electronic component embedded substrate according to claim 5, wherein the metal block contains copper.

7. The electronic component embedded substrate according to claim 1, wherein the blind member includes a glass block and a metal block connected to the lower surface of the glass block and having a thinner thickness than the glass block.

8. The glass block comprises substantially the same glass as the glass layer, The electronic component embedded substrate according to claim 7, wherein the metal block contains copper.

9. A connecting electrode is placed on the upper surface of the aforementioned electronic component. The lower surface of the electronic component is attached to the upper surface of the blind member via an adhesive layer, as described in claim 1, for the electronic component embedded substrate.

10. A metal via that penetrates at least a portion of the space between the upper and lower surfaces of the glass layer, A first wiring layer disposed on the upper surface of the insulating material, A second wiring layer is placed on the lower surface of the insulating material, A first connecting via that penetrates at least a portion of the upper part of the insulating material and connects at least a portion of the first wiring layer to the metal via, A second connecting via penetrates at least a portion of the lower side of the insulating material and connects at least a portion of the second wiring layer to the metal via, The electronic component substrate according to claim 9, further comprising: a third connecting via that penetrates at least another portion of the upper part of the insulating material and connects at least another portion of the first wiring layer to the connecting electrode.

11. The electronic component substrate according to claim 10, wherein the first and second connecting vias are each directly connected to the metal vias.

12. The invention further includes a fourth connecting via that penetrates at least another portion of the lower side of the insulating material and connects at least another portion of the second wiring layer to the blind member, The electronic component embedded substrate according to claim 10, wherein the blind member includes a metal block connected to the second connecting via.

13. Frame and, It further includes a through portion that penetrates between the upper and lower surfaces of the frame, At least a portion of the glass layer is disposed within the penetration portion, The electronic component embedded substrate according to claim 10, wherein the insulating material further covers at least a portion of the frame and further fills at least a portion of the through-hole.

14. A plurality of first build-up insulating layers are arranged on the upper surface of the insulating material, A plurality of first build-up wiring layers, each disposed on or within the plurality of first build-up insulating layers, A plurality of first build-up via layers, each disposed within the plurality of first build-up insulating layers, A plurality of second build-up insulating layers are disposed on the lower surface of the insulating material, A plurality of second build-up wiring layers, each disposed on or within the plurality of second build-up insulating layers, The electronic component embedded substrate according to claim 10, further comprising a plurality of second build-up via layers, each disposed within the plurality of second build-up insulating layers.

15. A first passivation layer is disposed on the plurality of first build-up insulating layers and has a plurality of first openings that expose at least a portion of the uppermost of the plurality of first build-up wiring layers, The electronic component substrate according to claim 14, further comprising: a second passivation layer disposed on the plurality of second build-up insulating layers and having a plurality of second openings that each expose at least a portion of the second build-up wiring layer located on the lowest side of the plurality of second build-up wiring layers.

16. A glass layer, A through cavity that penetrates between the upper and lower surfaces of the glass layer, A glass block, at least a portion of which is positioned on the lower side within the aforementioned through cavity, An electronic component is located at least partially on the upper side of the through-cavity, An electronic component substrate comprising an insulating material that covers at least a portion of the glass layer, the glass block, and the electronic component, and fills at least a portion of the through-cavity.

17. The electronic component substrate according to claim 16, wherein the glass block comprises substantially the same glass as the glass layer.

18. A connecting electrode is placed on the upper surface of the aforementioned electronic component. The lower surface of the electronic component is attached to the upper surface of the glass block via an adhesive layer, as described in claim 16.

19. The respective sides of the electronic component, the adhesive layer, and the glass block are separated from the wall surface of the through cavity. The electronic component substrate according to claim 18, wherein the insulating material fills at least a portion of the space between the electronic component, the adhesive layer, the respective sides of the glass block, and the wall surface of the through cavity.

20. The electronic component embedded substrate according to claim 18, wherein the glass block has a cross-sectional width that is even wider than that of the electronic component.

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