Improvements to DC voltage control in power transmission networks

Abstract

This provides improvements to DC voltage controllers in power transmission networks using SGFM. [Solution] A method is provided which is carried out by a DC voltage controller for an HVDC converter, comprising: generating a synchronous angular velocity and a synchronous phase angle based on a DC voltage error signal; determining an AC grid phase angle from a composite signal, the composite signal being based on a function of the AC grid signal and the synchronous angular velocity; and generating a phase angle requirement for the HVDC converter, the phase angle requirement being based on the AC grid phase angle and the synchronous phase angle.

Description

[Technical Field]

[0001] The subject matter of this specification generally relates to the field of power transmission networks, and more specifically to direct current (DC) voltage control in power transmission networks. [Background technology]

[0002] In high-voltage direct current (HVDC) power transmission networks, alternating current (AC) power is typically converted to direct current (DC) power for transmission via overhead lines, submarine cables, and / or underground cables. This conversion eliminates the need to compensate for the AC reactive / capacitive load effects imposed by the power transmission medium, i.e., the transmission lines or cables, reducing the cost per kilometer of lines and / or cables, and thus becoming more cost-effective when power needs to be transmitted over long distances. DC power can also be transmitted directly, for example, from an offshore wind farm to an onshore AC power transmission network.

[0003] The conversion between DC power and AC power is used when it is necessary to interconnect DC networks and AC networks. In any such power transmission network, power conversion means, also known as converters (e.g., power converters or HVDC converters in converter stations), are required at each interface between AC power and DC power to perform the necessary conversions from AC to DC or DC to AC.

[0004] Power transmission networks can be operated using synchronous gridforming (SGFM). In SGFM, power converters behave as three-phase positive-sequence sequence AC voltage sources behind impedance, operating at a frequency synchronized with the SGFM source connected to the power transmission network.

[0005] The selection of the most appropriate HVDC power transmission network or system depends on the specific application and system characteristics. Examples of power transmission networks include monopole and bipole power transmission networks.

[0006] HVDC power transmission networks may be equipped with a DC voltage controller to adjust and maintain DC voltage levels for stable and efficient system operation.

[0007] A DC voltage controller is typically implemented in a converter station and manages the DC voltage of DC power by compensating for increases and decreases caused by fluctuations in load or disturbances in the network.

[0008] The examples described herein tend to offer improvements to DC voltage controllers in power transmission networks using SGFM. [Overview of the project]

[0009] A method is provided for a DC voltage controller for an HVDC converter, comprising: generating a synchronous angular velocity and a synchronous phase angle based on a DC voltage error signal; determining an AC grid phase angle from a composite signal, the composite signal being based on a function of the AC grid signal and the synchronous angular velocity; and generating a phase angle requirement for the HVDC converter, the phase angle requirement being based on the AC grid phase angle and the synchronous phase angle.

[0010] A DC voltage controller for an HVDC converter, comprising at least one memory and at least one processor coupled to the at least one memory, the DC voltage controller being configured to generate a synchronous angular velocity and a synchronous phase angle based on a DC voltage error signal, determine an AC grid phase angle from a composite signal, the composite signal being based on an AC grid signal and the synchronous angular velocity, and generate a phase angle demand value for the HVDC converter, the phase angle demand value being configured to be based on the AC grid phase angle and the synchronous phase angle.

[0011] Within the scope of the present application, it is clearly intended that the various aspects, embodiments, examples, and alternatives described in the previous paragraph, as well as in the claims and / or the following description and drawings, especially their individual features, can be interpreted independently or in any combination. That is, all embodiments and all features of any embodiment can be combined in any way and / or combination, provided that such features are not mutually incompatible.

[0012] Here, embodiments of the present invention will be described by way of example only, with reference to the accompanying drawings.

Brief Description of the Drawings

[0013] [Figure 1] A diagram schematically showing an example of a power transmission network. [Figure 2] A diagram showing an embodiment of a controller for a power converter. [Figure 3] A diagram showing a DC voltage controller according to an aspect of the present disclosure. [Figure 4] A plot showing system attenuation by a DC voltage controller according to an aspect of the present disclosure. [Figure 5] A diagram showing a DC voltage controller according to an aspect of the present disclosure. [Figure 6] A plot showing system attenuation by a DC voltage controller according to an aspect of the present disclosure. [Figure 7]This is a plot showing system attenuation by a DC voltage controller according to an aspect of this disclosure. [Figure 8] This figure shows an example of a processor according to the embodiments of this disclosure. [Figure 9] This figure shows an example of a DC voltage controller according to an aspect of the present disclosure. [Figure 10] This is a flowchart of a method implemented by a DC voltage controller in a power transmission network according to an aspect of the present disclosure. [Modes for carrying out the invention]

[0014] Figure 1 schematically illustrates an example of a power transmission network 100. The example is not intended to be limited to representing a specific power transmission system, such as a monopole or bipole HVDC transmission network, but is further provided as a general example illustrating the operating principles of a power transmission network useful for understanding the present invention. Thus, the power transmission network 100 can generally represent a monopole or bipole system, or, for example, a multi-terminal power transmission system. Therefore, while certain features in the example are shown connected to one another by a certain number of connections, this is not intended to be limiting, but rather to illustrate general connections between features / components. Related to this, the relative dimensions or distances between components perceived in the example are also not intended to be limiting. Therefore, it will be understood that the network 100 and the principles and features described herein can be applied, for example, to a network comprising the controller 200 in Figure 2. Furthermore, method 1000 in Figure 10.

[0015] The power transmission network 100 includes a first power conversion means 110 (also known as a converter station) and a second power conversion means 120. The power conversion means 110, 120 convert AC power to DC power (and vice versa) and essentially act as a rectifier (when converting AC power to DC power for transmission) and an inverter (when receiving DC power and converting it to AC power). Each of the power conversion means 110, 120 may comprise a single converter in the case of a monopole system or two converters in the case of a bipole system. The power conversion means 110, 120 may represent multiple converter stations arranged as a multi-terminal power transmission system. Generally, the first power conversion means 110 comprises a first AC side 110a and a first DC side 110b. Generally, the second power conversion means 120 comprises a second AC side 120a and a second DC side 120b.

[0016] The first power conversion means 110 is connected to the first AC network 140. The first AC network 140 is connected to the first AC side 110a of the first power conversion means 110.

[0017] The second power conversion means 120 is connected to the second AC network 150. The second AC network 150 is connected to the second AC side 120a of the second power conversion means 120. The first AC network 140 and / or the second AC network 150 may be a power transmission system comprising a power generator, a power transmission device, a power distribution device, and an electrical load. The first AC network 140 and / or the second AC network 150 may comprise a renewable power generation network such as a wind power network, a solar power network, or a bio-power generation network. The first AC network 140 or the second AC network 150 may be a consumer network. As a non-limiting example, for example, the first AC network 140 may be a power generation network and the second AC network 150 may be a consumer network.

[0018] Also shown is a power transmission medium 130 that interconnects the first power conversion means 110 and the second power conversion means 120. The power transmission medium 130 is connected between the first DC side 110b of the first power conversion means 110 and the second DC side 120b of the second power conversion means 120. The power transmission medium 130 may include electrical cables and other electrical components that interconnect the first and second power conversion means 110, 120. For example, the power transmission medium 130 may include a conductor providing a first electrode and / or a conductor providing a second electrode. A neutral configuration may also be provided that interconnects the first and second power conversion means 110, 120. The power transmission medium 130 is a medium for transmitting DC power between the power conversion means 110, 120.

[0019] The operation of the power transmission system 100 can be described in general terms as follows: The first AC power generation network 140 generates AC power which is supplied to the first power conversion means 110 on the first AC side 110a. The first power conversion means 110 converts the received AC power into DC power and transmits it to the second power conversion means 120. The DC power is transmitted from the first DC side 110b to the second DC side 120b of the second power conversion means 120 via the power transmission medium 130. The second power conversion means 120 converts the received DC power back into AC power. The AC power is then supplied, for example, from the second AC side 120a to the second AC network 150 for consumption. In a particular example, the power conversion means 110 and 120 may be geographically separated. For example, the first power conversion means 110 may be located at an offshore wind power plant, and the second power conversion means 120 may be located on land.

[0020] In Example 100, it will be understood that various other electrical components may be located in any particular place or with any particular feature / component. These may include switches, transformers, resistors, reactors, surge arresters, harmonic filters, and other components well known in the art.

[0021] It will be understood that converters or power conversion means can include several different technologies, such as voltage-supply converters (e.g., those using insulated-gate bipolar transistor (IGBT) valves). Such converters can generally be thought of as using "power electronics." Power electronics converters can include, for example, multilevel voltage-supply converters.

[0022] It will be understood that cables used as power transmission media may include the following non-limiting examples of cross-linked polyethylene (XLPE) and / or mass-impregnated (MI) insulated cables. Such cables may comprise a conductor (such as copper or aluminum) surrounded by an insulating layer. The dimensions of the cable and its associated layers may vary depending on the specific application (in particular, the operating voltage requirements). The cable may further include reinforcement or "armor" in applications such as underwater installation. The cable may further comprise a sheath / screen grounded at one or more locations.

[0023] Furthermore, it will be understood that the power transmission network 100 may be used in conjunction with a three-phase power system. In a three-phase power system, three conductors each supply the first, second, and third phases of AC power to the consumer. Each of the first, second, and third phases typically has a voltage or current of equal magnitude, with a phase difference of 120° from one another.

[0024] In a three-phase power system, phase currents and voltages can be represented by three single-phase components: a positive sequence component, a negative sequence component, and a zero sequence component. Depending on the power system, it is the positive sequence component that rotates in phase. Therefore, in an ideal scenario, only positive sequence voltages / currents exist. It will be understood that imbalances in the magnitude or phase angle of voltages or currents between the first, second, and third phases of a three-phase system can result in undesirable negative or zero sequence components. Such imbalances can be caused, for example, by fault conditions in AC networks 140, 150.

[0025] The power transmission network 100 can be operated using methods such as synchronous gridforming (SGFM), and either or both of the power converters 110, 120 behave as three-phase positive-sequence sequence AC voltage sources behind impedance, operating at a frequency synchronized with other SGFM sources connected to the power transmission network 100.

[0026] The power transmission network 100 may further include controllers for controlling the operation of its components. For example, a controller may be provided for performing the method described herein. Such a controller may, for example, control power conversion means 110, 120. Such a controller may be referred to as a controller means or control means. The controller may be the controller 200 in Figure 2.

[0027] Figure 2 shows one embodiment of the controller 200 that can be used when carrying out the present invention as described herein.

[0028] The controller 200 comprises a memory 210 and at least one processor 220. The memory 210, when executed by at least one processor 220, includes computer-readable instructions that cause the controller 200 to perform the methods described herein.

[0029] The controller 200 is shown to include a transceiver arrangement 230 which may comprise separate transmitters 231 and receivers 232. The transceiver arrangement 230 can be used to operably communicate with other components or features of the embodiments described herein, either directly or via a further interface such as a network interface. The transceiver arrangement 230 can, for example, send and receive control signals using the transmitters 231 and receivers 232. The control signals may include or define electrical control parameters such as a reference current or a reference voltage.

[0030] At least one processor 220 is capable of executing computer-readable instructions and / or performing logical operations. The at least one processor 220 may be a microcontroller, microprocessor, central processing unit (CPU), field-programmable gate array (FPGA), or similar programmable controller. The controller may further include user input devices and / or output devices. The processor 220 is communicatively coupled to memory 210 and, in certain embodiments, may be coupled to transceiver 230.

[0031] The memory 210 may be a computer-readable storage medium. For example, the memory 210 may include a non-volatile computer storage medium. For example, the memory 210 may include a hard disk drive, flash memory, etc.

[0032] Although not shown, the controller 200 may further include user input device interfaces and / or user output device interfaces that can enable visual, auditory, or tactile input / output. Examples include interfaces to electronic displays, touchscreens, keyboards, mice, speakers, and microphones.

[0033] FIG. 3 shows a DC voltage controller 300 according to an aspect of the present disclosure.

[0034] The DC voltage controller 300 includes a DC voltage controller module 310 that receives a DC voltage error signal and outputs a synchronous angular velocity Δω. The synchronous angular velocity Δω passes through an integrator 334 to generate a synchronous phase angle δ c . The synchronous phase angle δ c is added to the AC grid phase angle δ PLL to generate a phase angle requirement value δ m for adjusting the DC voltage signal of a HVDC converter (not shown).

[0035] The DC voltage error signal is generated by subtracting the required DC voltage signal u dc from the measured DC voltage signal u dc *. The AC grid phase angle δ PLL is generated by processing the AC grid signal V q using a phase-locked loop (PLL) 320.

[0036] The integrator 334 is defined by a base frequency ω c , a minimum phase angle δ Rmin , a maximum phase angle δ Rmax , and an integrator defined by 1 / s in the s domain.

[0037] A HVDC power transmission network (or HVDC system) tends to include at least one DC voltage controller 300 that maintains the DC voltage by adjusting its active power output to compensate for any imbalance in DC energy. This function can be achieved by the DC voltage controlled SGFM feature of the DC voltage controller 300. The SGFM feature can include generating a phase angle from a DC voltage regulator.

[0038] The bandwidth of the DC voltage controller module 310 is the DC voltage signal u dcThis can be adjusted and determined to compensate for AC or DC disturbances. The PLL320 may have a higher bandwidth than the DC voltage controller module 310 to reduce interactions and instability. However, the bandwidth of the PLL320 is limited by the AC grid signal V q It may be restricted to avoid high-speed AC voltage fluctuations and high-speed frequency and angular deviations associated with voltage noise amplification.

[0039] Figure 4 is plot 400 showing system attenuation by a DC voltage controller according to an embodiment of the present disclosure. Plot 400 shows the effect of PLL response time on DC voltage dynamics under weak grid conditions.

[0040] Plot 400 shows various response times (T) of the PLL in the DC voltage controller (which may be the PLL320 and DC voltage controller module 310 mentioned above in relation to Figure 3). R This shows the DC voltage for ). Plot 400 is T R = 10ms, T R =100ms, T R =200ms, and T R = indicates 500ms. For example, T R =10ms can represent a fast PLL response time, T R =500ms may represent a slow PLL response time.

[0041] Plot 400 shows that, in the case of a slow PLL response time and a fast DC voltage controller, the system tends to provide an insufficiently attenuated system due to interference between controllers.

[0042] Figure 5 shows a DC voltage controller 500 according to an embodiment of the present disclosure.

[0043] The DC voltage controller 500 includes a DC voltage controller module 510 that receives a DC voltage error signal and outputs a synchronous angular velocity Δω. The synchronous angular velocity Δω passes through the filter 534 to obtain the synchronous phase angle δ c Generates.

[0044] Furthermore, the synchronous angular velocity Δω is affected by the forward feed coefficient K. FF This is multiplied, and the AC grid signal V q These are added together to generate a composite signal. The composite signal is provided as input to the PLL520, which then processes the AC grid phase angle δ. PLL Outputs.

[0045] Synchronous phase angle δ c The AC grid phase angle δ PLL This is added to the phase angle requirement for adjusting the DC voltage signal of the HVDC converter (not shown). m Generates.

[0046] The DC voltage error signal is the measured DC voltage signal u dc DC voltage signal u requested from dc It is generated by subtracting *.

[0047] Filter 534 has a base frequency ω c , minimum phase angle δ Rmin , maximum phase angle δ Rmax , and defined by an integrator defined by 1 / s in the s domain.

[0048] The bandwidth of the DC voltage controller module 510 is the DC voltage signal u dc This can be adjusted and determined to compensate for AC or DC disturbances. The PLL520 may include a higher bandwidth than the DC voltage controller module 510 to reduce interactions and instability. However, the bandwidth of the PLL520 is limited by the AC grid signal V q It may be restricted to avoid high-speed AC voltage fluctuations and high-speed frequency and angular deviations associated with voltage noise amplification.

[0049] As mentioned above in relation to Figure 4, a low-speed PLL and a high-speed DC voltage controller tend to result in an insufficiently attenuated system due to interference between the controllers. To address this problem, the DC voltage controller 500 links the synchronous angular velocity Δω of the DC voltage controller module 510 with the input voltage of the PLL 520, and the forward coefficient K FF Set the appropriate value. The resulting DC voltage controller 500 tends to improve the system's attenuation and convergence to a stable equilibrium point.

[0050] Figure 6 is a plot 600 showing system attenuation by a DC voltage controller according to an embodiment of the present disclosure. Plot 600 shows the forward coefficient K for system attenuation and convergence in the DC voltage controller 500 described above in relation to Figure 5. FF This shows the impact.

[0051] Plot 600 shows the PLL response time T. R =200ms, short-circuit ratio (SCR)=2, and K FF Synchronous angular velocity Δω(pu) and phase angle requirement δ for =0 (per unit (pu)). m The value is shown in radians. SCR corresponds to the amount of power available in the AC grid versus the amount of power transferred to the DC grid.

[0052] Plot 600 shows the synchronous angular velocity Δω and the phase angle requirement δ based on the parameters described above. m The point is at x0 (i.e., (0,0)) and after several iterations (at least 10), the equilibrium point is near (0,0.7) x e This indicates that it converges to a certain point.

[0053] Figure 7 is a plot 700 showing system attenuation by a DC voltage controller according to an embodiment of the present disclosure. Plot 700 shows the forward coefficient K for system attenuation and convergence in the DC voltage controller 500 described above in relation to Figure 5. FF This shows the impact.

[0054] Plot 700 shows the PLL response time T. R =200ms, short-circuit ratio (SCR)=2, and K FF Synchronous angular velocity Δω(pu) and phase angle requirement δ for =20p.u m This indicates a unit in radians.

[0055] Plot 700 shows the synchronous angular velocity Δω and the phase angle requirement δ based on the parameters described above. m The point is at x0 (i.e., (0,0)), and after one iteration, the equilibrium point is near (0,0.7) x e This indicates that it converges to a certain point.

[0056] Figure 8 shows an example of a processor 800 according to an aspect of this disclosure.

[0057] The processor 800 may be an example of a processor configured to perform various operations according to the examples described herein. The processor 800 may include a controller 802 configured to perform various operations according to the examples described herein. The processor 800 may optionally include at least one memory 804, which may be, for example, an L1 / L2 / L3 cache. Additionally or alternatively, the processor 800 may optionally include one or more arithmetic logic units (ALUs) 806. One or more of these components may be coupled electronically or otherwise (for example, operationally, communicatively, functionally, electronically, electrically) via one or more interfaces (e.g., buses).

[0058] The processor 800 may be a processor chipset and may include a protocol stack (e.g., a software stack) executed by the processor chipset to perform various operations (e.g., receive, acquire, retrieve, transmit, output, transfer, store, determine, identify, access, write, read) in accordance with the examples described herein. The processor chipset may include one or more cores, one or more caches (e.g., memory local to or included in the processor chipset (e.g., processor 800)), or other memory (e.g., random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), static RAM (SRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase-change memory (PCM), and others).

[0059] The controller 802 can be configured to manage and coordinate various operations of the processor 800 (e.g., signaling, receiving, acquiring, searching, transmitting, outputting, transferring, storing, determining, identifying, accessing, writing, reading) in order to enable the processor 800 to support various operations according to the examples described herein. For example, the controller 802 can act as a control unit for the processor 800 and generate control signals that manage the operation of various components of the processor 800. These control signals include enabling or disabling functional units, selecting data paths, initiating memory access, and coordinating the timing of operations.

[0060] The controller 802 may be configured to fetch (e.g., acquire, retrieve, receive) instructions from memory 804 and determine subsequent instructions to be executed to enable the processor 800 to support various operations according to the examples described herein. The controller 802 may be configured to track the memory addresses of instructions related to memory 804. The controller 802 may be configured to decode instructions to determine the operations to be performed and the associated operands. For example, the controller 802 may be configured to interpret instructions, determine control signals to be output to other components of the processor 800, and enable the processor 800 to support various operations according to the examples described herein. Additionally or alternatively, the controller 802 may be configured to manage the flow of data within the processor 800. The controller 802 may be configured to control the transfer of data between registers, arithmetic logic units (ALUs), and other functional units of the processor 800.

[0061] Memory 804 may include one or more caches (e.g., memory local to or included in the processor 800, or other memory such as RAM, ROM, DRAM, SDRAM, SRAM, MRAM, flash memory, etc.). In some embodiments, memory 804 may reside in or on the processor chipset (e.g., local to the processor 800). In some other embodiments, memory 804 may reside outside the processor chipset (e.g., remote from the processor 800).

[0062] Memory 804 can store computer-readable computer-executable code, which, when executed by the processor 800, causes the processor 800 to perform various functions described herein. The code may be stored in a non-temporary computer-readable medium, such as system memory or another type of memory. The controller 802 and / or the processor 800 may be configured to execute the computer-readable instructions stored in memory 804, causing the processor 800 to perform various functions. For example, the processor 800 and / or the controller 802 may be coupled to memory 804, or coupled to memory 804, and the processor 800, controller 802, and memory 804 may be configured to perform various functions described herein. In some examples, the processor 800 may include multiple processors, and memory 804 may include multiple memories. One or more of the multiple processors may be coupled to one or more of the multiple memories, and one or more of the multiple memories may be configured individually or collectively to perform various functions described herein.

[0063] One or more ALU806s can be configured to support various operations according to the examples described herein. In some embodiments, one or more ALU806s may reside within or on a processor chipset (e.g., processor 800). In some other embodiments, one or more ALU806s may reside outside of a processor chipset (e.g., processor 800). One or more ALU806s can perform one or more calculations on data, such as addition, subtraction, multiplication, and division. For example, one or more ALU806s may receive input operands and an arithmetic code that determines the operation to be performed. One or more ALU806s consist of various logic and arithmetic circuits, including adders, subtractors, shifters, and logic gates, to process and manipulate data according to the operation. Additionally or alternatively, one or more ALU806s may support logical operations such as AND, OR, exclusive OR (XOR), non-OR (NOR), and non-AND (NAND), enabling one or more ALU806s to handle conditional operations, comparisons, and bitwise operations.

[0064] The processor 800 can support DC voltage control according to the examples described herein. The processor 800 may be configured to generate synchronous angular velocity and synchronous phase angle based on a DC voltage error signal, determine an AC grid phase angle from a composite signal, generate a phase angle requirement for the HVDC converter based on the AC grid signal and synchronous angular velocity, and support means for basing the phase angle requirement on the AC grid phase angle and synchronous phase angle.

[0065] Figure 9 shows an example of a DC voltage controller 900 according to an embodiment of the present disclosure.

[0066] The DC voltage controller 900 may include a processor 902 and a memory 904. The processor 902 and the memory 904 or various combinations thereof or various components thereof may be examples of means for carrying out various aspects of the present disclosure as described herein. These components may be coupled via one or more interfaces (e.g., operably, communicatively, functionally, electronically, or electrically).

[0067] Various combinations of the processor 902 and the memory 904, or their components, may be implemented in hardware (e.g., circuitry). The hardware may include a processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), or other programmable logic device, or any combination thereof configured as means for performing the functions described in this disclosure, or otherwise supporting means for performing the functions described in this disclosure.

[0068] The processor 902 may include intelligent hardware devices (e.g., a general-purpose processor, DSP, CPU, ASIC, FPGA, or any combination thereof). In some embodiments, the processor 902 may be configured to operate the memory 904. In some other embodiments, the memory 904 may be integrated into the processor 902. The processor 902 may be configured to execute computer-readable instructions stored in the memory 904 and to cause the DC voltage controller 900 to perform various functions of this disclosure.

[0069] Memory 904 may include volatile or non-volatile memory. Memory 904 may store computer-readable computer-executable code, which, when executed by processor 902, causes DC voltage controller 900 to perform various functions described herein. The code may be stored in memory 904 or in a non-temporary computer-readable medium such as another type of memory. The computer-readable medium includes both non-temporary computer storage mediums and communication mediums, which include any medium that facilitates the transmission of computer programs from one place to another. The non-temporary storage medium may be any available medium that can be accessed by a general-purpose or dedicated computer.

[0070] In some embodiments, the processor 902 and the memory 904 coupled to the processor 902 may be configured to cause the DC voltage controller 900 to perform one or more of the functions described herein (for example, the processor 902 executing instructions stored in the memory 904). The DC voltage controller 900 may be configured to generate a synchronous angular velocity and a synchronous phase angle based on a DC voltage error signal, determine an AC grid phase angle from a composite signal, generate a phase angle requirement for the HVDC converter based on the AC grid signal and the synchronous angular velocity, and support means for basing the phase angle requirement on the AC grid phase angle and the synchronous phase angle.

[0071] Figure 10 shows a flowchart of a method implemented by a DC voltage controller in a power transmission network according to an aspect of the present disclosure. The operation of Method 1000 can be implemented by a DC voltage controller described herein. In some embodiments, the DC voltage controller can execute a set of instructions for controlling the functional elements of the DC voltage controller to perform the functions described.

[0072] In 1002, method 1000 may include generating synchronous angular velocity and synchronous phase angle based on a DC voltage error signal. The operation of 1002 can be carried out according to the examples described herein. In some embodiments, the operation of 1002 can be carried out by a DC voltage controller as described with reference to Figure 9.

[0073] In 1004, method 1000 may include determining the AC grid phase angle from a composite signal, the composite signal being a function of the AC grid signal and the synchronous angular velocity. The operation of 1004 can be carried out according to the examples described herein. In some embodiments, the operation of 1004 can be carried out by a DC voltage controller as described with reference to Figure 9.

[0074] In 1006, method 1000 may include generating a phase angle requirement for an HVDC converter, the phase angle requirement being based on the AC grid phase angle and the synchronous phase angle. The operation of 1006 can be carried out according to the examples described herein. In some embodiments, the operation of 1006 can be carried out by a DC voltage controller as described with reference to Figure 9.

[0075] It should be noted that the method described herein 1000 describes possible embodiments, and the operations and steps may be rearranged or otherwise modified, and other embodiments are also possible.

[0076] Throughout this specification, any reference to an example of a particular method or apparatus, or to similar language, means that the particular features, structure, or characteristics described in relation to that example are included in at least one embodiment of the method and apparatus described herein. The terms “includes,” “equipment,” “has,” and their variations mean “includes, but not limited to,” unless otherwise specified. An enumerated list of items does not mean that any or all of the items are mutually exclusive unless otherwise specified. The terms “a,” “an,” and “the” also mean “one or more,” unless otherwise specified.

[0077] As used herein, a list containing the combination of "and / or" includes any single item in the list or any combination of items in the list. For example, the list A, B, and / or C includes A only, B only, C only, a combination of A and B, a combination of B and C, a combination of A and C, or a combination of A, B, and C. As used herein, a list using the technical term "one or more of" includes any single item in the list or any combination of items in the list. For example, one or more of A, B, and C includes A only, B only, C only, a combination of A and B, a combination of B and C, a combination of A and C, or a combination of A, B, and C. As used herein, a list using the technical term "one of" includes only one of any single items in the list. For example, "one of A, B, and C" includes A only, B only, or C only, and excludes the combination of A, B, and C. As used herein, “members selected from the group consisting of A, B, and C” includes only one of A, B, or C, and excludes combinations of A, B, and C. As used herein, “members selected from the group consisting of A, B, and C and combinations thereof” includes A only, B only, C only, a combination of A and B, a combination of B and C, a combination of A and C, or a combination of A, B, and C.

[0078] The embodiments of the disclosed methods and apparatus will be described with reference to schematic flowcharts and / or schematic block diagrams of the methods, apparatus, systems, and program products. It will be understood that each block in the schematic flowcharts and / or schematic block diagrams, as well as any combination of blocks in the schematic flowcharts and / or schematic block diagrams, can be implemented by code. This code can be provided to a processor of a general-purpose computer, a dedicated computer, or other programmable data processing device to manufacture a machine, and as a result, instructions executed via the computer or other programmable data processing device processor will create means for performing the functions / operations specified in the schematic flowcharts and / or schematic block diagrams.

[0079] The schematic flowcharts and / or schematic block diagrams in the figures illustrate the architecture, function, and operation of possible embodiments of the device, system, method, and program product. In this regard, each block in the schematic flowcharts and / or schematic block diagrams may represent a module, segment, or portion of code containing one or more executable instructions of code for implementing a specified logical function.

[0080] The numerical values ​​listed herein are intended solely to aid in illustrating the operation of the present invention and should be understood to vary depending on a given power transmission network, its components, or the requirements of the power transmission application.

[0081] Any enumeration or discussion in this specification of documents or information that are clearly previously published should not necessarily be construed as an endorsement that such documents or information are part of the latest technology or common general knowledge.

[0082] Any given aspect, feature, or parameter preference and choice of the present invention should be considered to be disclosed in conjunction with all other aspects, features, and parameter preferences and choices of the present invention, unless otherwise indicated in the context.

[0083] The disclosure herein provides a method implemented by a DC voltage controller for an HVDC converter, comprising: generating a synchronous angular velocity and a synchronous phase angle based on a DC voltage error signal; determining an AC grid phase angle from a composite signal, the composite signal being based on a function of the AC grid signal and the synchronous angular velocity; and generating a phase angle requirement for the HVDC converter, the phase angle requirement being based on the AC grid phase angle and the synchronous phase angle. Such a method tends to improve the stability of the HVDC converter.

[0084] The HVDC converter may be part of a power transmission network. The power transmission network may include a first AC network connected to a power transmission medium. The first AC network may be a first AC grid. The power transmission medium may be a DC network. The DC network may be a DC grid. The power transmission network may further include a second AC network connected to the power transmission medium. The second AC network may be a second AC grid.

[0085] The HVDC converter may also be a power conversion means. The HVDC converter may be configured to convert AC power to DC power. The HVDC converter may be configured to convert DC power to AC power. The HVDC converter may be configured as a rectifier. The HVDC converter may be configured as an inverter.

[0086] The HVDC converter may operate using synchronous gridforming (SGFM). The HVDC converter may have a three-phase positive-sequence sequence AC voltage source behind the impedance. The HVDC converter may operate at a frequency synchronized with the SGFM source connected to the power transmission network.

[0087] The synchronous angular velocity may correspond to the rotor frequency of the virtual synchronous generator control unit. The synchronous angular velocity may also correspond to the internal converter frequency deviation determined by the oscillation equation. The synchronous phase angle may be a synchronous phase angle signal. The synchronous phase angle may be the angle used to generate the instantaneous AC voltage of the HVDC converter. The AC grid phase angle may be an AC grid phase angle signal.

[0088] The synchronous phase angle may correspond to the phase angle of the DC grid. The AC grid phase angle may correspond to the phase angle of the AC grid. The AC grid phase angle may be determined using a phase angle estimator. The phase angle estimator may be a phase-locked loop (PLL).

[0089] The AC grid signal may be the grid AC voltage at the common junction. The AC grid signal may be measured using an AC voltage measurement unit.

[0090] The phase angle requirement may be an attenuated phase angle. The phase angle requirement may also be a phase angle requirement signal.

[0091] The DC voltage error signal may be generated from a DC voltage (Vdc) reference signal. The Vdc reference signal may correspond to a desired Vdc signal relative to a DC grid. The DC voltage error signal may be generated from a measured Vdc signal. The measured Vdc signal may be measured across an HVDC converter. The Vdc reference signal may be the DC voltage value set on the HVDC converter. The measured Vdc signal may be a modulated DC voltage signal sensed using a DC voltage measurement unit at the end of the HVDC converter. The DC voltage error signal may be the difference or deviation between the Vdc reference signal and the measured Vdc signal.

[0092] The phase angle requirement may correspond to the phase angle used to adjust the Vdc signal of the HVDC converter.

[0093] The synchronous angular velocity may be Δω as specified herein. The synchronous phase angle may be δ as specified herein. c The DC voltage error signal may be a udc-udc* as described herein. The udc* may be a requested DC voltage signal as described herein. The udc may be a measured DC voltage signal as described herein.

[0094] The AC grid phase angle is δ as specified herein. PLL The AC grid signal may be V as described herein. q It may also be the case that the phase angle requirement is the δ specified herein. m That's fine.

[0095] The combined signal is composed of the synchronous angular velocity and the forward coefficient K. FF The signal may be a function of the AC grid signal and at least one combination thereof. The composite signal may be based on the AC grid signal and the synchronous angular velocity multiplied by the forward coefficient. The forward coefficient may be a proportionality constant that acts as an additional PLL damper using the synchronous angular velocity. The forward coefficient is K FF This may also be the case. The method may further include determining the forward coefficient.

[0096] Determining the forward feed coefficient may include determining the forward feed coefficient based on at least one of the AC grid impedance, the AC grid stiffness, and the DC link cable length.

[0097] The method may further include modulating the synchronous phase angle based on the minimum and maximum phase angles. The maximum and minimum phase angles may be based on the overcurrent capability of the converter. The minimum phase angle may be -60 degrees. The maximum phase angle may be +60 degrees. The phase angle requirement may be based on the sum of the AC grid phase angle and the synchronous phase angle.

[0098] Generating synchronous angular velocity based on a DC voltage error signal from an HVDC converter may involve multiplying the DC voltage error signal by a DC gain. The DC gain may depend on the bandwidth of the HVDC converter. The DC gain may also depend on the DC system capacitance.

[0099] The method may further include receiving a Vdc reference signal and a measured Vdc signal. The method may further include generating a DC voltage error signal based on the Vdc reference signal and the measured Vdc signal. Generating the DC voltage error signal may include subtracting the measured Vdc signal from the Vdc reference signal. The method may further include receiving an AC grid signal from an AC grid.

[0100] A DC voltage controller for an HVDC converter is also provided, comprising at least one memory and at least one processor coupled to the memory, which causes the DC voltage controller to generate a synchronous angular velocity and a synchronous phase angle based on a DC voltage error signal, to determine an AC grid phase angle from a composite signal, and the composite signal, based on the AC grid signal and the synchronous angular velocity, to generate a phase angle requirement for the HVDC converter, the phase angle requirement being based on the AC grid phase angle and the synchronous phase angle. Such a DC voltage controller tends to improve the stability of the phase angle requirement.

[0101] The composite signal may be a function of the synchronous angular velocity, the forward coefficient, the AC grid signal, and at least one combination thereof. At least one processor coupled with at least one memory may be further configured to cause the DC voltage controller to determine the forward coefficient.

[0102] The at least one processor coupled to at least one memory and configured to cause a DC voltage controller to determine a forward coefficient may further comprise at least one processor coupled to at least one memory and configured to cause a DC voltage controller to determine a forward coefficient based on at least one of the impedance of the AC grid, the stiffness of the AC grid, and the length of the DC link cable.

[0103] At least one processor coupled with at least one memory may be further configured to cause a DC voltage controller to modulate the synchronous phase angle based on a minimum phase angle and a maximum phase angle. The maximum and minimum phase angles may be based on the overcurrent capability of the converter. The minimum phase angle may be -60 degrees and the maximum phase angle may be +60 degrees. The phase angle requirement may be based on the sum of the AC grid phase angle and the synchronous phase angle.

[0104] The system comprises at least one processor coupled to at least one memory and configured to cause a DC voltage controller to generate a synchronous angular velocity based on a DC voltage error signal from an HVDC converter, and at least one processor coupled to at least one memory and further configured to cause the DC voltage controller to multiply the DC voltage error signal by a DC gain. The DC gain may depend on the bandwidth of the HVDC converter. The DC gain may depend on the DC system capacitance.

[0105] At least one processor coupled with at least one memory may be further configured to cause a DC voltage controller to receive a Vdc reference signal and a measured Vdc signal.

[0106] At least one processor coupled with at least one memory may be further configured to cause a DC voltage controller to generate a DC voltage error signal based on a Vdc reference signal and a measured Vdc signal. Generating the DC voltage error signal may include subtracting the measured Vdc signal from the Vdc reference signal.

[0107] At least one processor coupled with at least one memory may be further configured to cause a DC voltage controller to receive an AC grid signal from the AC grid. [Explanation of symbols]

[0108] 100 Power transmission networks 110 First power conversion means 110a First AC side 110b First DC side 120 Second power conversion means 120a Second AC side 120b Second DC side 130 Power transmission medium 140 First AC Network 150 Second AC Network 200 controllers 210 memory 220 processors 230 transceiver configuration 231 Transmitter 232 Receiver 300 DC Voltage Controller 310 DC Voltage Controller Module 320 Phase-Locked Loop (PLL) 334 Integrator 400 plots 500 DC Voltage Controller 510 DC Voltage Controller Module 520 PLL 534 Filter 600 plots 700 plots 800 processors 802 Controller 804 memory 806 Arithmetic Logic Unit (ALU) 900 DC Voltage Controller 902 Processor 904 memory 1000 ways 1002 operation 1004 operation 1006 operation

Claims

1. A method (1000) implemented by a DC voltage controller (300, 500, 900) for an HVDC converter, (1002) Generating synchronous angular velocity and synchronous phase angle based on a DC voltage error signal, Determining the AC grid phase angle from the composite signal (1004), wherein the composite signal is based on a function of the AC grid signal and the synchronous angular velocity, For the HVDC converter, a phase angle requirement is generated (1006), wherein the phase angle requirement is based on the AC grid phase angle and the synchronization phase angle. A method (1000) including the following.

2. The method according to claim 1 (1000), wherein the composite signal is a function of at least one of the synchronous angular velocity, the forward coefficient, the AC grid signal, and combinations thereof.

3. The method according to claim 2 (1000), further comprising determining the forward coefficient.

4. The method according to claim 3 (1000), wherein determining the forward coefficient includes determining the forward coefficient based on at least one of the impedance of the AC grid, the stiffness of the AC grid, and the length of the DC link cable.

5. The method according to any one of claims 1 to 4 (1000), further comprising modulating the synchronization phase angle based on the minimum phase angle and the maximum phase angle.

6. The method according to any one of claims 1 to 5, wherein the phase angle requirement is based on the sum of the AC grid phase angle and the synchronization phase angle (1000).

7. The method according to any one of claims 1 to 6 (1000), wherein generating the synchronous angular velocity based on the DC voltage error signal from the HVDC converter includes multiplying the DC voltage error signal by the DC gain.

8. The method according to any one of claims 1 to 7 (1000), further comprising receiving a Vdc reference signal and a measured Vdc signal.

9. The method according to claim 8 (1000), further comprising generating the DC voltage error signal based on the Vdc reference signal and the measured Vdc signal.

10. The method according to any one of claims 1 to 9 (1000), further comprising receiving the AC grid signal from the AC grid.

11. DC voltage controllers (300, 500, 900) for HVDC converters, At least one memory (210, 804, 904) and Coupled with at least one of the aforementioned memories (210, 804, 904), and connected to the DC voltage controller (300, 500, 900), The synchronous angular velocity and synchronous phase angle are generated based on the DC voltage error signal. The AC grid phase angle is determined from the combined signal, and the combined signal is determined based on the AC grid signal and the synchronous angular velocity. For the HVDC converter, a phase angle requirement is generated, and the phase angle requirement is based on the AC grid phase angle and the synchronization phase angle. At least one processor (220, 800, 902) configured as follows: DC voltage controllers (300, 500, 900) equipped with the following.

12. The DC voltage controller (300, 500, 900) according to claim 11, wherein the composite signal is a function of at least one of the synchronous angular velocity, the forward coefficient, the AC grid signal, and combinations thereof.

13. The at least one processor (220, 800, 902) coupled with the at least one memory (210, 804, 904) provides the DC voltage controller (300, 500, 900) to Determine the forward coefficient. A DC voltage controller (300, 500, 900) according to claim 12, further configured as follows.

14. The at least one processor (220, 800, 902), coupled to the at least one memory (210, 804, 904) and configured to cause the DC voltage controller (300, 500, 900) to determine the forward coefficient, is coupled to the at least one memory (210, 804, 904) and configured to cause the DC voltage controller (300, 500, 900) to determine the forward coefficient, The forward coefficient is determined based on at least one of the impedance of the AC grid, the stiffness of the AC grid, and the length of the DC link cable. The DC voltage controller (300, 500, 900) according to claim 13, further comprising the at least one processor (220, 800, 902) configured as described above.

15. The at least one processor (220, 800, 902) coupled with the at least one memory (210, 804, 904) provides the DC voltage controller (300, 500, 900) to The synchronization phase angle is modulated based on the minimum and maximum phase angles. A DC voltage controller (300, 500, 900) according to any one of claims 11 to 14, further configured as follows.

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