Silicon etching with dopant-type selectivity
A specialized etching solution with specific surfactants and solvents selectively etches p-type silicon faster than n-type silicon, addressing the challenge of dopant-type differentiation in wet etching, enhancing semiconductor manufacturing efficiency.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- TOKYO OHKA KOGYO CO LTD
- Filing Date
- 2025-12-10
- Publication Date
- 2026-07-10
AI Technical Summary
Existing wet etching processes struggle to selectively etch silicon regions that differ only in dopant type, such as n-type and p-type silicon, due to similar chemical properties, making precise selective removal challenging.
An etching solution composition comprising a water-soluble etching solution, water-miscible organic solvents, and surfactants, particularly cationic surfactants with eight or more carbon atoms, provides differential etching rates based on silicon dopant type, selectively etching p-type silicon faster than n-type silicon.
The solution achieves selective etching of p-type silicon over n-type silicon, reducing the need for precise mask alignment and enabling cleaner, more efficient semiconductor manufacturing processes.
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Figure 2026116705000001_ABST
Abstract
Description
[Technical Field]
[0001] Cross-references to related applications This application claims priority to U.S. Patent Provisional Application 63 / 740,164, filed with the U.S. Patent and Trademark Office on 30 December 2024, which is incorporated herein by reference in its entirety.
[0002] This disclosure relates generally to the technical field of semiconductor device manufacturing, and more particularly to wet etching processes for semiconductors. [Background technology]
[0003] Semiconductor photolithography is a mature and sophisticated technique used to fabricate highly advanced, small-scale integrated electronic devices. The fundamental process in most photolithography operations is mask etching of semiconductor or dielectric structures. In mask etching, a resinous photoresist is applied to a semiconductor wafer and exposed to ultraviolet (UV) light projected through a carefully aligned optical mask. Selected areas of the photoresist layer either harden within a pattern defined by the optical mask or degrade due to UV light. A solvent is then used to remove the uncured or degraded portions of the photoresist, leaving a pattern consisting of protected and unprotected areas.
[0004] Subsequent processing may vary depending on the embodiment. In plasma etching, an unprotected area of the semiconductor wafer or die is exposed to high-energy reactants formed in the plasma. Such reactants convert the unprotected solid material into a gaseous residue. In wet (i.e., liquid-phase) etching, the unprotected area is exposed to a corrosive solution that dissolves unwanted materials, after which the soluble residue is washed away. In both embodiments, subsequent processing typically requires the removal of the entire hardened photoresist from the surface of the wafer or die. For this purpose, a well-formulated solvent composition can be used in the wet etching process.
[0005] For example, Patent Document 1 discloses an etching solution suitable for selective removal of polysilicon from silicon dioxide from microelectronic devices, comprising water; about 1% by mass of tetramethylammonium hydroxide (TMAH); about 15% to about 20% by mass of monoethanolamine (MEA); about 50% to about 59.5% by mass of ethylene glycol (EG); about 0.5% by mass of 8-hydroxyquinoline (8-HQ); and optionally a surfactant. [Prior art documents] [Patent Documents]
[0006] [Patent Document 1] United States Patent Publication No. 11,180,697 [Overview of the project]
[0007] One aspect of the present disclosure relates to an etching solution composition for silicon that provides an etching rate corresponding to the silicon dopant type. The etching solution composition comprises a water-soluble etching solution, one or more water-miscible organic solvents, and one or more surfactants.
[0008] Another aspect of the present disclosure relates to a method for etching a surface having a first silicon region which is n-type and a second silicon region which is different from the first silicon region with respect to the dopant type. The method comprises exposing the surface to an etching solution composition which provides an etching rate corresponding to the dopant type for silicon, the etching solution composition comprising a water-soluble etching solution, one or more water-miscible organic solvents, and one or more surfactants.
[0009] This summary is provided to introduce, in a simplified form, a selection of concepts that will be further described in embodiments for carrying out the invention. This summary is not intended to identify any important or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. The claimed subject matter is not limited to embodiments that resolve any or all of the defects described in any part of this disclosure. [Brief explanation of the drawing]
[0010] [Figure 1] This diagram schematically shows an exemplary lateral resection of a p-type silicon (p-Si) layer. [Figure 2] This diagram schematically illustrates the removal of an exemplary p-type Si layer. [Figure 3] Tables 1A and 1B of this disclosure show some of the molecular structures of the compounds found therein. [Figure 4] This describes an exemplary method for etching a surface having a first silicon region (n-Si) which is n-type and a second silicon region which is different from the first silicon region in terms of dopant type or dopant density. [Figure 5] Figure 4 illustrates an application of the method to semiconductors. [Figure 6] Figure 5 shows an application of the method in Figure 4 to a semiconductor that differs from that in terms of layer structure and dry etching patterning. [Figure 7]Figures 5 and 6 show different applications of the method in Figure 4 to semiconductors with respect to layer structure and dry etching patterning. [Modes for carrying out the invention]
[0011] The following describes in detail embodiments for carrying out the present invention (hereinafter simply referred to as "these embodiments"). These embodiments are illustrative for explaining the present invention and are not intended to limit the present invention to the following content. The present invention can be appropriately modified and implemented within the scope of its gist. Furthermore, the configurations and parameters disclosed herein can be any combination unless otherwise specified. Moreover, the upper and lower limits of the values disclosed herein can be any combination unless otherwise specified.
[0012] Wet etching can offer certain advantages over plasma etching for several applications in semiconductor manufacturing. For example, wet etching tools and chemicals are typically less expensive than those for plasma etching, resulting in lower operating costs. In contrast to plasma etching, wet etching is performed at lower temperatures, simplifying the processing of heat-sensitive materials and structures. Wet etching can also result in cleaner surfaces with less residue compared to plasma etching, which may require additional cleaning protocols due to residues and by-products from the etching gas. Furthermore, wet etching is inherently more isotropic, which can be advantageous in applications where isotropic etching is the most efficient process route to a particular form and / or device configuration, or in applications for undercutting sacrificial layers.
[0013] Finally, wet etching processes can provide high etching selectivity for one material compared to another in situations where multiple different materials are simultaneously exposed to the same etching conditions. Available etching solutions can, for example, etch silicon and silicon oxide at significantly different rates. This feature provides functional selectivity regarding semiconductor etching versus dielectric etching. Other etching solutions can distinguish between dissimilar semiconductors (e.g., germanium (Ge) vs. silicon (Si)) with high selectivity. Yet another available etching solution results in a 17-fold difference in etching rate for silicon's 100 plane compared to its 111 plane. Such selectivity can be utilized to reduce the number of mask alignment and curing steps required in a given manufacturing process and / or enable the selective removal of unprotected structures such as undercuts.
[0014] Here, the inventors of the present invention have attempted to extend the selectivity of wet etching processes to semiconductor systems where the material differences between separate unprotected regions of a wafer or die are extremely slight. This includes semiconductor materials that expose the same crystal plane and differ only in dopant type. An exemplary approach using silicon as the semiconductor is presented herein.
[0015] Doping introduces impurities into a semiconductor. The impurities can generate space charges within the doped semiconductor, which change the Fermi level of electrons within the semiconductor relative to the valence band edge and the conduction band edge.
[0016] The n-type doping process adds a chemical element with more than four valence electrons to the silicon lattice. Common n-type dopants include phosphorus (P) and arsenic (As), both of which have five valence electrons per atom. In fact, each n-type dopant atom adds one electron to silicon's conduction band.
[0017] Typical dopant densities for n-type Si at low to moderate dopant levels are 1 cubic centimeter (cm3 ) Per 10 15 ~10 17 atoms. In many semiconductor applications such as integrated circuits and transistors, n-type silicon is doped in this range. The typical dopant density of n-type Si at high dopant levels is 1 cm 3 Per 10 18 ~10 20 atoms. In applications that require high electron conductivity, such as certain types of power devices or certain high-speed transistors, doping concentrations in this range can be used.
[0018] The p-type doping process adds an element with fewer than 4 valence electrons to the silicon lattice. Common p-type dopants include boron (B), gallium (Ga), and indium (In), each of which has 3 valence electrons per atom. In fact, each p-type dopant atom adds one hole to the valence band of silicon.
[0019] The typical dopant density of p-type Si at low to medium dopant levels is 1 cm 3 Per 10 15 ~10 17 atoms. In many semiconductor applications such as integrated circuits and transistors, p-type silicon is doped in this range. The typical dopant density of p-type Si at high dopant levels is 1 cm 3 Per 10 18 ~10 20 atoms. In applications that require high hole conductivity, such as certain types of power devices or certain high-speed transistors, doping concentrations in this range can be used.
[0020] Dopants can be added to silicon by diffusion or ion implantation. In diffusion, the wafer is exposed to a gas containing dopant atoms at a high temperature (typically between 800 and 1200°C). The dopant diffuses into the silicon wafer, gradually penetrating the surface and being incorporated into the silicon lattice. In ion implantation, dopant ions are accelerated in an electric field and directed towards the silicon wafer. The ions penetrate the surface and are embedded in the silicon lattice. This method allows for more precise control of doping concentration and depth compared to diffusion. After the doping process, the wafer is typically subjected to a thermal annealing process. Thermal annealing helps repair damage caused by ion implantation and involves a heating process that activates the dopant by allowing it to occupy its expected position within the silicon lattice.
[0021] Certain parts of semiconductor devices may include intrinsic silicon (i-Si) in which the concentration of conduction band electrons is equal to the concentration of valence band holes. In some examples, this type of silicon may be extremely pure and may not undergo any n-type or p-type doping process (i.e., undoped or "undoped"). In other examples, i-Si may be "intrinsically doped," meaning that the Fermi level of electrons in silicon may be approximately the same as that of undoped silicon, due to the presence of approximately equal (and typically low) concentrations of n-type and p-type dopants. As used herein, the term "dopant-type" includes p-type, n-type, i-type, and undoped silicon.
[0022] Polycrystalline silicon (poly-Si) contains multiple relatively small silicon crystals, in contrast to wafers cut from single-crystal booleans. In some cases, poly-Si can be used to form thin-film transistors and solar cells as gate materials for metal-oxide-semiconductor (MOS) devices or flexible microelectronics.
[0023] Amorphous silicon (a-Si) is an crystalline form of silicon that differs from crystalline silicon, which is used in the majority of semiconductor applications. Amorphous silicon lacks long-range periodic atomic arrangements and exhibits somewhat different electrical properties compared to crystalline silicon. For example, amorphous silicon has a larger band gap than crystalline silicon. Amorphous silicon is typically deposited as thin films using techniques such as chemical vapor deposition (CVD) (e.g., plasma CVD (PECVD)). Amorphous silicon is often deposited in thin layers and is therefore suitable for use in flexible substrates and various electronic devices. Generally speaking, it is possible to dope a-Si. However, in the studies reported in this disclosure, a-Si was intrinsic (i-Si).
[0024] Those skilled in the art will understand that the dopant density in silicon for the manufacture of integrated circuits rarely exceeds 0.01 mass%. Therefore, selective etching of p-type silicon (p-Si) in the presence of n-type silicon (n-Si), for example, is more difficult than selective etching of materials in which all atoms being etched are chemically different. Referring here to the drawings, Figures 1 and 2 illustrate exemplary applications of the etching solution compositions and methods disclosed herein.
[0025] Figure 1 shows an exemplary lateral resection of an epitaxial p-Si layer 102 formed on a SiGe layer 104. An epitaxial n-Si layer 106 is formed on top of the epitaxial p-Si layer. Etching is achieved by a wet etching process in which the surfaces of the p-Si and n-Si are simultaneously exposed to the etching solution composition. As shown in the figure, the n-Si withstands etching with only very slight dimensional changes, while the width of the p-Si layer is significantly reduced.
[0026] Figure 2 shows an embodiment of the complete removal of an epitaxial p-Si layer 202 formed over an epitaxial n-Si layer 206 formed on a SiGe layer 204. Since the etching solution composition etches p-Si much faster than it etches n-Si, layer 206 is preserved in this process. While Figures 1 and 2 illustrate selective etching of epitaxial layers, this embodiment is not entirely necessary. In other examples, some, some, or all of the layers subjected to selective etching may be deposited non-epitaxially on a glassy layer, such as amorphous SiO2.
[0027] As described above, wet etching uses a specific etching solution composition to remove material from unprotected areas of a wafer or die. The etching solution composition is selected based on the etching rate of the target material against one or more coexisting materials that may also be present on the surface to be etched. Unless otherwise specified, “coexisting materials” as used herein refer to materials different from n-type silicon. Coexisting materials only need to be present on the surface to be etched and may be materials adjacent to n-type silicon or materials not adjacent to n-type silicon. In this disclosure, the target material can be exemplified, for example, a semiconductor of a specific dopant type or dopant level. Exemplary coexisting materials may be the same semiconductor with different dopant types, or with the same dopant type but with higher or lower dopant densities. Other coexisting materials include the same semiconductor exhibiting different crystal planes (e.g., (100) vs. (111)), different semiconductors (e.g., Ge vs. Si), dielectrics such as silicon oxide (SiO2) and silicon nitride (Si3N4), cured photoresists (containing one or more crosslinked polymers), and various additional structures formed on the semiconductor wafer or die surface (e.g., metals, metal oxides, or epitaxial semiconductor structures). Such structures may include, among others, aluminum, copper, tungsten, molybdenum, cobalt, tantalum, and gold.
[0028] [Table 1A]
[0029] [Table 1B]
[0030] Table 1A shows embodiments of etching solution compositions C1 to C9 of a series of comparative examples. Table 1B shows embodiments of etching solution compositions 1 to 12 of a series of examples. Each of the etching solution compositions of the examples and comparative examples is an aqueous solution. In some examples, the amount of water in the etching solution composition may exceed 90% by mass.
[0031] Several etching solutions that are fully compatible with this disclosure may also contain one or more solvents other than water. Examples of organic solvents that can be used in etching solutions include alcohols (e.g., methanol, ethanol, n-butanol, and 2-propanol), cyclic ethers, and alcohol ethers. Etching solutions that are compatible with this disclosure may also contain one or more surfactants, such as neutral, cationic, or anionic surfactants (see below).
[0032] Therefore, the etching solution compositions in Tables 1A and 1B contain specific chemical compounds as solutes in aqueous solutions. Figure 3 shows the molecular structures of some of the compounds used in the etching solution compositions of the examples and comparative examples. In particular, TMAH represents tetramethylammonium hydroxide, DDPyCl represents 1-dodecylpyridinium chloride, and C16-TMAS represents hexadecyltrimethylammonium hydrogen sulfate. Not shown in Figure 3 are dodecyltrimethylammonium chloride (C12-TMACl) (having four fewer methylene units than C16-TMAS and having chloride instead of hydrogen sulfate counterions), octyltrimethylammonium chloride (C8-TMACl) (having four fewer methylene units than C12-TMACl), and hexyltrimethylammonium chloride (C6-TMACl) (having two fewer methylene units than C8-TMACl). In some examples, two or more surfactants may be combined in the same etching solution composition.
[0033] Each of the exemplary etching solution compositions in Table 1B comprises a water-soluble etching solution, a water-miscible organic solvent, and a surfactant.
[0034] In some examples, the water-soluble etching solution is a basic etching solution. More specifically, the water-soluble etching solution may contain quaternary ammonium hydroxides such as tetramethylammonium hydroxide (TMAH), tetraethylammonium hydroxide (TEAH), and tetra-n-butylammonium hydroxide. In some examples, the water-soluble etching solution may contain alkali metal hydroxides such as sodium hydroxide (NaOH) or potassium hydroxide (KOH), alkaline earth metal hydroxides such as magnesium hydroxide (Mg(OH)2), calcium hydroxide (Ca(OH)2), strontium hydroxide (Sr(OH)2), and barium hydroxide (Ba(OH)2), and / or ammonium hydroxide.
[0035] In some examples, at least one of the one or more water-miscible organic solvents in the etching solution composition is a polar solvent. More specifically, at least one water-miscible organic solvent may be a polar aprotic solvent. Non-limiting examples include dimethyl sulfoxide (DMSO), propylene carbonate (PC), and propylene glycol methyl ether acetate (PGMEA). Other polar aprotic solvents include dimethylformamide (DMF), acetonitrile, acetone, and tetrahydrofuran (THF). In some examples, at least a small amount of a protic solvent such as an alcohol, diol, polyol, or amine may be used. Examples include methanol, ethanol, 2-propanol, ethylene glycol, and ethylenediamine. In some examples, two or more organic solvents may be combined in the same etching solution composition.
[0036] In some exemplary etching solution compositions, at least one of the one or more surfactants may contain eight or more carbon atoms per molecule. In basic etching solution compositions (i.e., alkaline, where the silicon surface is negatively charged), at least one surfactant may be a cationic surfactant. In more specific examples, at least one surfactant may include a quaternary ammonium salt. A suitable quaternary ammonium salt, though not limited, has an octyl, dodecyl, or hexadecyl substituent on the nitrogen, thereby forming an amphiphilic substance with a cationic nitrogen head group. The nitrogen head group may be further substituted with up to three shorter (e.g., alkyl) groups, such as methyl or ethyl. Alternatively, a cationic nitrogen heterocycle, such as a dodecylpyridinium salt, may be used. The one or more anions suitable for a cationic surfactant are not particularly limited. Suitable stable anions include chlorides, bromides, hydrides, dihydrogen phosphates, and hydrides. One example of a preferred quaternary ammonium salt is one containing one or more of the following: chloride salts, bromide salts, acetate salts, methyl sulfate salts, or bisulfate salts.
[0037] Each of the etching solution compositions 1 to 12 in the examples yields an etching rate for silicon corresponding to the silicon dopant type. The sensitivity to dopant types is shown in columns 6 to 10 of Table 1B. Column 6 lists the etching rates in nm / min for p-Si, column 7 lists the etching rates for poly-Si, column 8 lists the etching rates for n-Si, and columns 9 and 10 list the relative rates.
[0038] Under conventional wet etching chemical reactions, n-type Si is etched somewhat more rapidly than other dopant-type silicon. This is confirmed in the comparative examples in Table 1A. However, it is clear that etching compositions 1-12 of the examples provide the opposite effect, namely lower etching rates for n-type Si than for p-Si and poly-Si. Therefore, using the etching compositions of the examples herein, the etching rate is lower for n-type silicon than for p-type silicon or poly-Si.
[0039] While this disclosure is not intended to tie to any particular theory, surfactants having eight or more carbon atoms per molecule can adsorb considerably (via London forces) onto newly etched silicon of various dopant types. Adsorption of surfactants may reduce the subsequent etching rate, but the effect is not uniform because surface charge also affects the etching rate. Therefore, retardation of the etching rate by high molecular weight surfactants amplifies dopant type selectivity.
[0040] The etching rates shown in Tables 1A and 1B were determined as follows: Epitaxial films of n-Si and p-Si were grown on silicon germanium (SiGe) wafers by chemical vapor deposition (CVD). Poly-Si films were grown on SiO2 substrates by CVD. Wafers coated with each film were divided into multiple test samples of approximately 1 to 10 square centimeters. The film thickness of each test sample was measured by ellipsometry or XRF.
[0041] For each test sample, 100 ml (mL) of aqueous hydrofluoric acid solution (HF, 0.5 mass%) was poured into the first plastic cup and magnetically stirred at 300 rpm at 25°C. The same volume of etching solution composition was poured into the second plastic cup and magnetically stirred at 300 rpm at the temperatures shown in Table 1A or Table 1B. 100 mL of deionized water was poured into the third and fourth plastic cups and magnetically stirred at 300 rpm at 25°C. Each test sample was placed in the first cup for 60 seconds, then transferred to the third cup for 5 seconds, then to the second cup for 60 seconds, and then to the fourth cup for 5 seconds. The samples were then dried, and the film thickness was measured repeatedly using an ellipsometer or XRF.
[0042] Furthermore, regarding the etching solution composition of this embodiment, more specific examples of preferred embodiments from the viewpoint of p-Si, poly-Si, and n-Si selectivity are illustrated below.
[0043] The etching solution preferably contains at least one selected from the group consisting of, for example, TMAH and KOH. The content of the etching solution in the etching solution composition is not particularly limited, but it may be preferably 1% by mass or more and 20% by mass. In this case, the lower limit of the content is more preferably 3% by mass or more. In this case, the upper limit of the content is more preferably 15% by mass or less, and even more preferably 13% by mass or less.
[0044] The organic solvent preferably contains at least one selected from the group consisting of DMSO, PGMEA, and PC. The content of the organic solvent in the etching solution composition is not particularly limited, but it may be preferably 1% by mass or more and 50% by mass or less. In this case, the lower limit of the content is more preferably 2% by mass or more. In this case, the upper limit of the content is more preferably 45% by mass or less.
[0045] For example, if DMSO is included as an organic solvent, the DMSO content is preferably 10% by mass or more and 50% by mass or less. The upper limit of this DMSO content is more preferably 45% by mass or less, and even more preferably 40% by mass or less.
[0046] For example, if the organic solvent contains PGMEA, the PGMEA content is preferably 5% by mass or more and 20% by mass or less. The upper limit of this PGMEA content is more preferably 15% by mass or less, and even more preferably 10% by mass or less.
[0047] For example, when PC is included as an organic solvent, the PC content is preferably 0.5% by mass or more and 10% by mass or less. The lower limit of this PC content is more preferably 1% by mass or more. Furthermore, the upper limit of this PC content is even more preferably 5% by mass or less.
[0048] The surfactant preferably contains at least one selected from the group consisting of C8-TMACl, C12-TMACl, C16-TMAS, and DDPyCl. The surfactant content in the etching solution composition is not particularly limited, but is preferably 1 ppm by mass or more and 10k ppm by mass or less (10,000 ppm by mass). The upper limit of this content may be 5,000 ppm by mass or less, 4,000 ppm by mass or less, 3,000 ppm by mass or less, 2,000 ppm by mass or less, 1,000 ppm by mass or less, 900 ppm by mass or less, 800 ppm by mass or less, 700 ppm by mass or less, 600 ppm by mass or less, 500 ppm by mass or less, 400 ppm by mass or less, 300 ppm by mass or less, or 200 ppm by mass or less.
[0049] A preferred example of the etching solution composition of this embodiment is an etching solution composition comprising at least one selected from the group consisting of TMAH and KOH in a total amount of 1% to 10% by mass, at least one selected from the group consisting of DMSO, PGMEA, and PC in a total amount of 5% to 40% by mass, and at least one selected from the group consisting of C8-TMACl, C12-TMACl, C16-TMAS, and DDPyCl in a total amount of 1 ppm to 10,000 ppm by mass (it goes without saying that preferred examples of this embodiment are not limited to these).
[0050] Figure 4 shows an exemplary embodiment of method 400 for etching a surface having a first silicon region that is n-type and a second silicon region that is dopant-type or different in terms of dopant density from the first silicon region.
[0051] In method 400, step 401A, a photoresist is applied to the surface. In step 401B, a mask is positioned on the surface. In step 401C, the photoresist is cured by UV exposure through the mask, such that the cured photoresist does not extend over the first or second silicon region. In step 401D, the uncured photoresist is removed from the surface.
[0052] In 401E, the surface is exposed to an etching solution composition that provides an etching rate corresponding to the dopant type for silicon.
[0053] In some examples, the etching rate of the composition is lower for the first n-type silicon than for another dopant type of silicon, such as the second region. Such other dopant types may include one or more of p-type silicon or poly-Si.
[0054] In a series of examples, the etching solution composition comprises a water-soluble etching solution, one or more water-miscible organic solvents, and one or more surfactants. As shown by the exemplary etching solution compositions herein, at least one of the one or more surfactants may be present in an amount of 1 to 10,000 ppm by mass of the etching solution composition, and at least one of the one or more organic solvents may be present in an amount of 1 to 40% by mass of the etching solution composition. In some examples, the etching rate for n-type silicon may be lower than that for silicon of another dopant type. In some examples, the surfactant may contain eight or more carbon atoms per molecule, as described above. In some examples, the surfactant may be a cationic surfactant. In some examples, the solvent is a polar aprotic solvent. In some examples, the surfactant preferably contains a quaternary ammonium salt. Furthermore, in some examples, the etching solution is a basic etching solution such as a quaternary ammonium hydroxide, an alkali metal or alkaline earth metal hydroxide, or ammonium hydroxide.
[0055] In step 401F, the surface is rinsed. In some examples, the rinse agent may contain water. In some examples, the rinse agent may contain an alcohol such as isopropyl alcohol. Optionally, after rinsing and properly drying the surface, one or more dry etching processes may be performed as needed. Optionally, the cured photoresist may be removed at this point.
[0056] Method 400 can be used to form various types of microstructures on semiconductor surfaces, such as layered and / or patterned semiconductor surfaces. In some situations, the results of applying Method 400 depend on the initial layer structure and whether any additional etching processes, such as dry etching, are also used. Figures 5–7 illustrate this feature as an example. In each figure, the initial structure includes a pattern of cured photoresist (shown in black), as present following step 401D of Method 400.
[0057] In the structure shown in Figure 5, an n-Si layer 506 is formed on a SiGe layer 504. A p-Si layer 502 is formed on top of the n-Si layer. Due to the etching solution composition used in 401E, which exhibits dopant-type selectivity (e.g., promoting p-Si etching over n-Si etching), wet etching penetrates the p-Si layer and effectively stops at the p-Si / n-Si boundary. As etching progresses vertically downward, n-Si is exposed to the etching solution composition, but etching of n-Si occurs very limitedly.
[0058] In the structure shown in Figure 6, a p-Si layer 602 is formed on a SiGe layer 604. An n-Si layer 606 is formed on top of the p-Si layer. The etching solution composition used in 401E exhibits dopant-type selectivity (for example, it promotes p-Si etching over n-Si etching). However, since none of the p-Si layers are exposed to the etching solution composition, etching occurs very limitedly.
[0059] The initial structure in Figure 7 is the same as in Figure 6, with a p-Si layer 702 formed on a SiGe layer 704. An n-Si layer 706 is formed on top of the p-Si layer. However, in this example, anisotropic dry etching is performed before dopant-selective wet etching. Anisotropic dry etching etches the layer structure into the SiGe layer 704. Due to the etching solution composition used in 401E, which exhibits dopant-type selectivity (e.g., promoting p-Si etching over n-Si etching), wet etching acts laterally on the exposed p-Si, preferentially over the exposed n-Si.
[0060] It is speculated that the etching rate selectivity achieved in the aforementioned example is due to the relative affinity of various surfactants to silicon, which varies depending on the dopant type.
[0061] No aspect of this disclosure should be construed as restrictive, as numerous modifications, extensions, and omissions are equally likely. For example, while the method in Figure 4 demonstrates selective etching after circuit patterning, selective etching by the methods herein may also be useful before patterning or between separate patterning steps. The foregoing description specifically refers to etching compositions having selectivity based on dopant type, but the same or similar etching compositions may exhibit selectivity of etching rate based on dopant density, such as normal dopant density versus high dopant density versus degenerate doping. Furthermore, the same or similar etching compositions may exhibit sensitivity of etching rate based on dopant depth, such as deep doping versus shallow doping.
[0062] Again, while the aspects of this disclosure are not intended to be tied to any particular theory, the main chemical effect of dopant type and dopant density may be that it affects the space charge generated within the semiconductor material when the semiconductor surface reaches electrostatic equilibrium with the etching solution composition. Such equilibrium causes charge to accumulate at the interface between the semiconductor surface and the solution, depending on the dopant type, dopant density, and dopant depth. The relative etching rate reported in this disclosure as a function of dopant type is likely to be attributable to the changes in surface chemistry resulting from the accumulated surface charge and is therefore likely to be extendable to dopant depth and dopant density.
[0063] This disclosure is presented with reference, by example, to the attached drawings. Components, process stages, and other elements that may be substantially identical in one or more of the drawings are synchronously identified and described with minimal repetition. However, it should be noted that synchronously identified elements may differ to some extent. Furthermore, it should be noted that the drawings are schematic and not generally drawn to scale. Rather, the various drawing scales, aspect ratios, and number of components shown in the drawings may be intentionally distorted to make certain features or relationships easier to understand. Also, redundant explanations have been omitted in the descriptions of the drawings.
[0064] The configurations and / or methods described herein are illustrative in nature and numerous variations are possible; therefore, it will be understood that these particular embodiments or examples should not be considered limiting. The specific routines or methods described herein may represent one or more of any number of processing strategies. Thus, the various operations illustrated and / or described may be performed in the order illustrated and / or described, in other orders, in parallel, or omitted. Similarly, the order of the processes described above may be changed. In some examples, the terms “about” and “approximately” extend x to include any value within the range of 0.9x to 1.1x when applied to a numerical value x; and in some examples, these terms extend x to include any value within the range of 0.95x to 1.05x.
[0065] Furthermore, unless otherwise specified, each composition and parameter disclosed herein may be in any combination. Furthermore, unless otherwise specified, the upper and lower limits of the values disclosed herein may be in any combination. In addition, in this specification, "comprise" may be replaced with "consist essentially of" and "consist of" as needed. Furthermore, unless otherwise specified, "A and / or B" or "A and / or B" means "A, B, or both." In addition, unless otherwise specified, in this specification, amounts are in parts by mass or mass percent. In this specification, the amount used may be the content, and the content may be the amount used.
[0066] The subject matter of this disclosure includes all novel, non-obvious, and partial combinations of the various processes, systems, and configurations disclosed herein, as well as other features, functions, operations, and / or characteristics, and all of their equivalents.
[0067] In this specification, "doing or to do" such as "doing..." may be replaced with "process" or "step," and "process" may be replaced with "doing or to do" or "step," and "step" may be replaced with "doing" or "process." Furthermore, in this specification, "process" such as "process" may be "an apparatus or part configured to perform a process," "apparatus" may be "a mechanism or part," and "part" may be "a part or apparatus to be provided in a mechanism, apparatus, or system, etc."
[0068] Furthermore, this disclosure also discloses embodiments as illustrated below. <1> An etching solution composition that provides an etching rate corresponding to the dopant type of silicon, Water-soluble etching solution, One or more water-miscible organic solvents, One or more surfactants and This is an etching solution composition containing [a specific ingredient]. <2> At least one of the one or more surfactants contains eight or more carbon atoms per molecule. <1> This is the etching solution composition described above. <3> At least one of the one or more surfactants is a cationic surfactant. <1> This is the etching solution composition described above. <4> At least one of the one or more surfactants includes a quaternary amine salt. <1> This is the etching solution composition described above. <5> At least one of the one or more surfactants includes a trimethylammonium salt having an octyl, dodecyl, or hexadecyl substituent on the nitrogen. <1> This is the etching solution composition described above. <6> The salt comprises one or more of the following: chloride salts, bromide salts, acetate salts, methyl sulfate salts, or bisulfate salts. <4> The etching solution composition described above. <7> At least one of the one or more water-miscible solvents is a polar aprotic solvent. <1> This is the etching solution composition described above. <8> At least one of the one or more water-miscible solvents includes dimethyl sulfoxide, propylene carbonate, or propylene glycol methyl ether acetate. <1> This is the etching solution composition described above. <9> The etching solution is a basic etching solution. <1> This is the etching solution composition described above. <10> The etching solution contains a quaternary ammonium hydroxide, <1> This is the etching solution composition described above. <11> A method for etching a surface having a first silicon region which is n-type and a second silicon region which is different from the first silicon region in terms of dopant type, The surface is exposed to an etching solution composition that provides an etching rate for silicon according to the dopant type, the etching solution composition comprising a water-soluble etching solution, one or more water-miscible organic solvents, and one or more surfactants. This method includes [something]. <12> At least one of the one or more surfactants is present in an amount of 1 to 10,000 ppm by mass of the etching solution composition, and the organic solvent is present in an amount of 1 to 40% by mass of the etching solution composition. <11> This is the method used. <13> The etching rate for the n-type silicon is lower than that of other dopant-type silicon. <11> This is the method used. <14> The surfactant contains 8 or more carbon atoms per molecule. <11> This is the method used. <15> The aforementioned surfactant is a cationic surfactant. <11> This is the method used. <16> The aforementioned solvent is a polar aprotic solvent. <11> This is the method used. <17> The surfactant comprises a quaternary ammonium salt. <11> This is the method used. <18> The etching solution is a basic etching solution. <11> This is the method used. <19> The etching solution contains a quaternary ammonium hydroxide, <11> This is the method used. <20> An etching solution composition that provides an etching rate corresponding to the dopant type of silicon, Basic water-soluble etching solution, One or more water-miscible polar aprotic organic solvents, One or more cationic surfactants containing 8 or more carbon atoms per molecule and This is an etching solution composition containing [a specific ingredient]. [Explanation of Symbols]
[0069] 102 Epitaxial p-Si layer 10⁴ SiGe layer 106 Epitaxial n-Si layer 202 Epitaxial p-Si layer 204 SiGe layer 206 Epitaxial n-Si layer 502 p-Si layer 504 SiGe layer 506 n-Si layer 602 p-Si layer 604 SiGe layer 606 n-Si layer 702 p-Si layer 704 SiGe layer 706 n-Si layer
Claims
1. An etching solution composition that provides an etching rate corresponding to the dopant type of silicon, Water-soluble etching solution, One or more water-miscible organic solvents, One or more surfactants and An etching solution composition containing the following:
2. At least one of the one or more surfactants contains eight or more carbon atoms per molecule. The etching solution composition according to claim 1.
3. At least one of the one or more surfactants is a cationic surfactant. The etching solution composition according to claim 1.
4. At least one of the one or more surfactants includes a quaternary amine salt. The etching solution composition according to claim 1.
5. At least one of the one or more surfactants includes a trimethylammonium salt having an octyl, dodecyl, or hexadecyl substituent on the nitrogen. The etching solution composition according to claim 1.
6. The salt comprises one or more of the following: chloride salts, bromide salts, acetate salts, methyl sulfate salts, or bisulfate salts. The etching solution composition according to claim 4.
7. At least one of the one or more water-miscible solvents is a polar aprotic solvent. The etching solution composition according to claim 1.
8. At least one of the one or more water-miscible solvents includes dimethyl sulfoxide, propylene carbonate, or propylene glycol methyl ether acetate. The etching solution composition according to claim 1.
9. The etching solution is a basic etching solution. The etching solution composition according to claim 1.
10. The etching solution contains a quaternary ammonium hydroxide, The etching solution composition according to claim 1.
11. A method for etching a surface having a first silicon region which is n-type and a second silicon region which is different from the first silicon region in terms of dopant type, The surface is exposed to an etching solution composition that provides an etching rate for silicon according to the dopant type, the etching solution composition comprising a water-soluble etching solution, one or more water-miscible organic solvents, and one or more surfactants. Methods that include...
12. At least one of the one or more surfactants is present in an amount of 1 to 10,000 ppm by mass of the etching solution composition, and the organic solvent is present in an amount of 1 to 40% by mass of the etching solution composition. The method according to claim 11.
13. The etching rate for the n-type silicon is lower than that of other dopant-type silicon. The method according to claim 11.
14. The surfactant contains eight or more carbon atoms per molecule. The method according to claim 11.
15. The aforementioned surfactant is a cationic surfactant. The method according to claim 11.
16. The aforementioned solvent is a polar aprotic solvent. The method according to claim 11.
17. The surfactant comprises a quaternary ammonium salt. The method according to claim 11.
18. The etching solution is a basic etching solution. The method according to claim 11.
19. The etching solution contains a quaternary ammonium hydroxide, The method according to claim 11.
20. An etching solution composition that provides an etching rate corresponding to the dopant type of silicon, Basic water-soluble etching solution, One or more water-miscible polar aprotic organic solvents, One or more cationic surfactants containing eight or more carbon atoms per molecule and An etching solution composition containing the following:
Citation Information
Patent Citations
US11,180,697