Circuit device and display device

Abstract

A circuit device is provided, the circuit device including a flexible printed circuit portion and an antenna portion. The circuit device includes a base substrate having an integral structure extending from an area of ​​the antenna portion to an area of ​​the flexible printed circuit portion, and a first conductive layer located on a first side of the base substrate. The first conductive layer includes one or more coil wires in the antenna portion and one or more first conductors in the flexible printed circuit portion.

Description

[Technical Field]

[0001] The present invention relates to display technology, and more particularly to circuit devices and display devices. [Background technology]

[0002] A flexible display device is a bendable or deformable display device having a flexible display panel. Examples of flexible display devices include flexible organic light-emitting diode (OLED) displays, flexible electrophoretic display (EPD) devices, and flexible liquid crystal display (LCD) devices. Flexible display devices, which are next-generation display devices, are thinner and lighter, and have high contrast, response, and brightness. Flexible display devices also provide full color and wide viewing angles. Flexible display devices are widely used in mobile phones, personal digital assistants (PDAs), digital cameras, in-vehicle displays, laptops, wall-mounted TVs, various military applications, and the like. The flexible display device includes a flexible array substrate. The base substrate of the flexible array substrate may be made of a flexible material such as plastic. Summary of the Invention

[0003] In one aspect, the present disclosure provides a circuit device comprising a flexible printed circuit portion and an antenna portion, the circuit device comprising: a base substrate having an integral structure extending from an area of ​​the antenna portion to an area of ​​the flexible printed circuit portion; and a first conductive layer located on a first side of the base substrate, the first conductive layer comprising one or more coil wires in the antenna portion and one or more first conductors in the flexible printed circuit portion.

[0004] Optionally, the circuit device further comprises a connector configured to connect the circuit device to a motherboard of a display device, and the one or more coil wires in the antenna portion may be directly connected to the connector.

[0005] Optionally, the circuit device may further comprise a first coverlay layer located on a side of the first conductive layer away from the base substrate, wherein an orthogonal projection of the first coverlay layer onto the base substrate at least partially overlaps with an orthogonal projection of the one or more coil wires onto the base substrate and at least partially overlaps with an orthogonal projection of the one or more first conductors onto the base substrate.

[0006] Optionally, the circuit device may further comprise a magnetic field enhancement layer located on the first side of the base substrate and configured to enhance a magnetic field generated by the one or more coil wires, the one or more coil wires substantially surrounding the magnetic field enhancement layer.

[0007] Optionally, the magnetic field enhancing layer comprises a magnetic field enhancing material, which may comprise a metal or an alloy.

[0008] Optionally, the circuit device may further comprise a first electromagnetic interference shielding layer located on a side of the first coverlay layer away from the base substrate and configured to shield the flexible printed circuit portion from electromagnetic waves, wherein an orthogonal projection of the first electromagnetic interference shielding layer onto the base substrate at least partially overlaps with an orthogonal projection of the one or more first conductors in the flexible printed circuit portion onto the base substrate.

[0009] Optionally, the circuit device may further comprise an adhesive layer located on a side of the first coverlay layer and the first electromagnetic interference shielding layer away from the base substrate, the adhesive layer configured to adhere the circuit device to a display panel, and the adhesive layer may have an integral structure extending from the area of ​​the antenna portion to the area of ​​the flexible printed circuit portion.

[0010] Optionally, the circuit device further comprises a second conductive layer located on a second side of the base substrate opposite the first side, the second conductive layer being configured to shield the flexible printed circuit portion from electromagnetic waves, and an orthogonal projection of the second conductive layer onto the base substrate may at least partially overlap with an orthogonal projection of the one or more first conductors in the flexible printed circuit portion onto the base substrate.

[0011] Optionally, the circuit device further comprises a magnetic material layer located on a second side of the base substrate opposite the first side, the magnetic material layer configured to guide magnetic flux generated by the one or more coil wires, and an orthogonal projection of the magnetic material layer onto the base substrate may at least partially overlap with an orthogonal projection of the one or more coil wires and / or magnetic field enhancement layer onto the base substrate.

[0012] Optionally, the magnetic material layer may include a ferrimagnetic material.

[0013] Optionally, the circuit device may further comprise a second coverlay layer located on a side of the second conductive layer away from the base substrate, wherein an orthogonal projection of the second coverlay layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more first conductive lines onto the base substrate.

[0014] Optionally, the second coverlay layer has a monolithic structure extending from the area of ​​the antenna portion to the area of ​​the flexible printed circuit portion, and an orthogonal projection of the second coverlay layer onto the base substrate may at least partially overlap with an orthogonal projection of the one or more coil wires onto the base substrate.

[0015] Optionally, the circuit device may further comprise a second electromagnetic interference shielding layer located on a side of the second coverlay layer away from the base substrate and configured to shield the flexible printed circuit portion from electromagnetic waves, wherein an orthogonal projection of the second electromagnetic interference shielding layer onto the base substrate at least partially overlaps with an orthogonal projection of the one or more first conductors in the flexible printed circuit portion onto the base substrate.

[0016] Optionally, the second electromagnetic interference shielding layer may have an integral structure extending from the area of ​​the antenna portion to the area of ​​the flexible printed circuit portion, and an orthogonal projection of the second electromagnetic interference shielding layer onto the base substrate may at least partially overlap with an orthogonal projection of the one or more coil wires in the antenna portion onto the base substrate.

[0017] Optionally, the circuit device may further comprise a shielding layer located on a side of the second coverlay layer away from the base substrate and configured to shield the flexible printed circuit portion from electromagnetic waves, wherein an orthogonal projection of the shielding layer onto the base substrate at least partially overlaps with an orthogonal projection of the one or more first conductors in the flexible printed circuit portion onto the base substrate, and the shielding layer has an integral structure extending from a region of the antenna portion to a region of the flexible printed circuit portion, and wherein the orthogonal projection of the shielding layer onto the base substrate at least partially overlaps with an orthogonal projection of the one or more coil wires in the antenna portion onto the base substrate.

[0018] Optionally, the circuit device may further comprise a second electromagnetic interference shielding layer or a protective layer located on a side of the shielding layer remote from the base substrate.

[0019] Optionally, a first thickness of the one or more coil wires may be greater than a second thickness of the one or more first conductor wires.

[0020] Optionally, the one or more coil wires have a first average line width, the one or more first conducting wires have a second average line width, the first average line width being greater than the second average line width, the coil wires of the one or more coil wires being spaced apart by a first average distance, and the first conducting wires of the one or more first conducting wires being spaced apart by a second average distance, the first average distance being greater than the second average distance.

[0021] In another aspect, the present disclosure provides a display device comprising a circuit device as described herein and a display panel connected to the circuit device. Optionally, the display device may have a laminated structure including a cover, the display panel located on the cover, an adhesive layer located on a side of the display panel away from the cover, a first electromagnetic interference shielding layer located on a side of the adhesive layer away from the cover, a first coverlay layer located on a side of the first electromagnetic interference shielding layer away from the cover, a first conductive layer located on a side of the first coverlay layer away from the cover, and a base substrate located on a side of the first conductive layer away from the cover. [Brief explanation of the drawings]

[0022] The following drawings are merely examples for illustrative purposes according to various disclosed embodiments and are not intended to limit the scope of the invention. [Figure 1] 1A and 1B are schematic diagrams illustrating the configuration of a circuit device according to some embodiments of the present disclosure. [Figure 2A] 1 is a cross-sectional view of a circuit device in accordance with some embodiments of the present disclosure. [Figure 2B] 1 is a cross-sectional view of a circuit device in accordance with some embodiments of the present disclosure. [Figure 2C] 1 illustrates a layout of one or more coil wires and one or more first conductor wires in some embodiments of the present disclosure. [Figure 3] 1 is a cross-sectional view of a circuit device in accordance with some embodiments of the present disclosure. [Figure 4] 1 is a cross-sectional view of a circuit device in accordance with some embodiments of the present disclosure. [Figure 5] 1 is a cross-sectional view of a circuit device in accordance with some embodiments of the present disclosure. [Figure 6] 1 is a cross-sectional view of a circuit device in accordance with some embodiments of the present disclosure. [Figure 7] 1 is a cross-sectional view of a circuit device in accordance with some embodiments of the present disclosure. [Figure 8] 1 is a cross-sectional view of a circuit device in accordance with some embodiments of the present disclosure. [Figure 9] 1 is a schematic diagram illustrating a configuration of a display device according to some embodiments of the present disclosure. [Figure 10] 1 is a cross-sectional view of a display device according to some embodiments of the present disclosure. [Figure 11] 1 is a cross-sectional view of a display device according to some embodiments of the present disclosure. [Figure 12] 1 is a cross-sectional view of a display device according to some embodiments of the present disclosure. [Figure 13] 1 is a cross-sectional view of a display device according to some embodiments of the present disclosure. [Figure 14] 1 is a cross-sectional view of a display device according to some embodiments of the present disclosure. [Figure 15] 1 is a cross-sectional view of a display device according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0023] The present disclosure will be described in more detail below with reference to embodiments. Note that the following description of some embodiments shown in the present specification is merely exemplary and explanatory and is not intended to be exhaustive or limited to the precise forms disclosed.

[0024] When manufacturing a related display device (e.g., a smart watch), a flexible printed circuit and an antenna (e.g., a near-field communication chip) are assembled to a display panel (e.g., a flexible display panel). Typically, in related display devices, an antenna is first soldered to a flexible printed circuit, and then the soldered assembly is assembled to a display panel to form the display device. The inventors of the present disclosure have discovered several problems associated with the related manufacturing process. The soldered joints are prone to breakage or failure, resulting in poor connections. The soldering process generates dust and dirt, making it unsuitable for use in display panel manufacturing sites, where clean environments are stringent. Commercial antennas generally have a large surface area. When an antenna is soldered to a flexible printed circuit, a portion of the flexible printed circuit is typically covered by the antenna. The magnetic field generated by the antenna adversely affects the flexible printed circuit. To prevent flickering on the display panel during wireless charging, a layer of metal foil is typically applied to the antenna and flexible printed circuit. Commercial antennas and flexible printed circuits typically have different thicknesses, making it difficult to apply metal foil to the soldered units. The metal foil is often loosely attached and prone to wrinkling.

[0025] Therefore, the present disclosure provides, inter alia, a circuit device and a display device that substantially overcome one or more problems resulting from limitations and shortcomings in the related art. In one aspect, the present disclosure provides a circuit device. In some embodiments, the circuit device includes a flexible printed circuit portion and an antenna portion. Optionally, the circuit device may include a base substrate having an overall structure extending from a region of the antenna portion to a region of the flexible printed circuit portion, and a first conductive layer located on a first side of the base substrate. Optionally, the first conductive layer may include one or more coil wires in the antenna portion and one or more first conductors in the flexible printed circuit portion.

[0026] FIG. 1 is a schematic diagram illustrating the configuration of a circuit device according to some embodiments of the present disclosure. Referring to FIG. 1 , in some embodiments, the circuit device includes, for example, a flexible printed circuit portion FPCP and an antenna portion ATP integrated together. As used herein, the term "integrated" means that at least one layer of the flexible printed circuit portion FPCP and at least one layer of the antenna portion ATP are formed using the same material in the same process. In one example, the flexible printed circuit portion FPCP includes multiple layers, and the antenna portion ATP includes multiple layers. Each of the multiple layers of the flexible printed circuit portion FPCP is formed using the same material in the same process as a corresponding layer of the multiple layers of the antenna portion ATP. The antenna portion ATP includes an antenna such as a near-field wireless communication circuit. Optionally, the antenna portion ATP may include one or more coil wires COL. The flexible printed circuit portion FPCP includes multiple circuit pins CPIN for connecting to one or more integrated circuits of a display panel. Optionally, the flexible printed circuit portion FPCP may include one or more electromagnetic interference shielding layers configured to shield the circuit device from electromagnetic waves (e.g., the second electromagnetic interference shielding layer EMI2 shown in FIG. 1 ). For example, the one or more electromagnetic interference shielding layers may be configured to shield the circuit device from electromagnetic waves generated during wireless charging of the display panel.

[0027] In some embodiments, the circuit device further includes a connector CN configured to connect the circuit device to a motherboard of a display device. The motherboard includes various components, including a processor, a microcontroller unit, or an integrated circuit. The connector CN is integrated with the antenna portion ATP and the flexible printed circuit portion FPCP. As shown in FIG. 1 , one or more coil wires COL in the antenna portion ATP are directly connected to the connector CN. For example, the one or more coil wires COL in the antenna portion ATP are formed using the same material and in the same process as one or more signal lines in the connector CN. Since soldering of the antenna portion is not required, poor connection due to breakage or defects in the soldered portion is avoided.

[0028] In some embodiments, the circuit device further comprises a sensor SE integrated with the flexible printed circuit part FPCP. In one example, the sensor SE is a photoelectric sensor.

[0029] FIG. 2A is a cross-sectional view of a circuit device according to some embodiments of the present disclosure. For example, FIG. 2A may be a cross-sectional view taken along line A-A' in FIG. 1. Referring to FIGS. 1 and 2A, in some embodiments, the circuit device includes a base substrate BS, a first conductive layer CDL1 located on a first side S1 of the base substrate BS, and a first coverlay layer CVL1 located on a side of the first conductive layer CDL1 away from the base substrate BS. The base substrate BS is a monolithic structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP. Optionally, the first coverlay layer CVL1 may be a monolithic structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP.

[0030] In some embodiments, the first conductive layer CDL1 includes one or more coil wires COL in the antenna portion ATP and one or more first conductors CL1 in the flexible printed circuit portion FPCP. The one or more coil wires COL in the antenna portion ATP and the one or more first conductors CL1 in the flexible printed circuit portion FPCP are located in the same layer. As used herein, the term "same layer" refers to layers formed simultaneously in the same process. In one example, the one or more coil wires COL and the one or more first conductors CL1 are located in the same layer when the one or more steps of the same patterning process are performed on material deposited in the same deposition process to form the one or more coil wires COL and the one or more first conductors CL1. In another example, the one or more coil wires COL and the one or more first conductors CL1 can be formed in the same layer by simultaneously performing the step of forming the one or more coil wires COL and the step of forming the one or more first conductors CL. "Same layer" does not necessarily mean that the layer thickness or layer height is the same in cross section.

[0031] The inventors of the present disclosure have discovered that by positioning one or more coil wires COL in the antenna portion ATP and one or more first conductors CL1 in the flexible printed circuit portion FPCP on the same layer, the influence of the magnetic field generated by one or more coil wires COL in the antenna portion ATP on the flexible printed circuit portion FPCP can be reduced or minimized.

[0032] The first conductive layer CDL1 may be fabricated using a variety of suitable conductive materials and a variety of suitable fabrication methods. For example, a conductive metal material may be deposited on the substrate by magnetron sputtering, vapor deposition (e.g., plasma-enhanced chemical vapor deposition), or vacuum evaporation. Suitable conductive metal materials for fabricating the first conductive layer CDL1 include, but are not limited to, copper, titanium, tantalum, aluminum, molybdenum, chromium, and alloys or laminates thereof.

[0033] 2B is a cross-sectional view of a circuit device according to some embodiments of the present disclosure. Referring to FIGS. 1, 2A, and 2B, one or more coil wires COL in the antenna portion ATP have multiple turns to generate inductance.

[0034] 2B, the one or more coil wires COL in the antenna portion ATP are equally spaced. For example, the one or more coil wires COL have multiple turns around the center. The distance between adjacent coil wires of the one or more coil wires COL on the same side of the center is substantially equal.

[0035] 2A, the one or more coil wires COL have multiple turns around a center, and at least two inter-coil distances between at least two pairs of adjacent coil wires of the one or more coil wires COL on the same side of the center are different from each other.

[0036] A variety of suitable materials may be used to fabricate the base substrate. Suitable materials for fabricating the base substrate include polyimide, polyester, glass, quartz, silicon oxide (SiOy), silicon nitride (SiN y , e.g., Si3N4) and silicon oxynitride (SiO x N y ), but are not limited to these.

[0037] Various suitable insulating materials and various suitable manufacturing methods may be used to fabricate the first coverlay layer CVL1. In some embodiments, the first coverlay layer CVL1 comprises multiple sub-layers. Optionally, the multiple sub-layers may comprise insulating material sub-layers and adhesive sub-layers. The adhesive sub-layers adhere the insulating material sub-layers to adjacent layers (e.g., the first conductive layer CDL1).

[0038] In some embodiments, the orthogonal projection of the first coverlay layer CVL1 onto the base substrate BS at least partially overlaps the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS. Optionally, the orthogonal projection of the first coverlay layer CVL1 onto the base substrate BS may cover the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS.

[0039] In some embodiments, the circuit device further includes a first electromagnetic interference shielding layer EMI1 located on a side of the first coverlay layer CVL1 away from the base substrate BS. The first electromagnetic interference shielding layer EMI1 is configured to shield the circuit device (e.g., the flexible printed circuit part FPCP) from electromagnetic waves. For example, the first electromagnetic interference shielding layer EMI1 may be configured to shield the flexible printed circuit part FPCP from electromagnetic waves generated during wireless charging of the display panel.

[0040] Optionally, the first electromagnetic interference shielding layer EMI1 may be at least partially located in the flexible printed circuit portion FPCP. Optionally, the first electromagnetic interference shielding layer EMI1 may be at least partially absent from the antenna portion ATP. Optionally, the first electromagnetic interference shielding layer EMI1 may not be present at all in the antenna portion ATP.

[0041] In some embodiments, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS at least partially overlaps the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS. Optionally, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS may cover the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS.

[0042] In some embodiments, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS does not at least partially overlap with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS may not overlap at all with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0043] In another embodiment, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS at least partially overlaps with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS may cover the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0044] Various suitable electromagnetic interference shielding materials and various suitable manufacturing methods may be used to fabricate the first electromagnetic interference shielding layer EMI1. For example, the electromagnetic interference shielding material may be deposited on the substrate by magnetron sputtering, vapor deposition (e.g., plasma-enhanced chemical vapor deposition), or vacuum deposition. Suitable electromagnetic interference shielding materials for fabricating the first electromagnetic interference shielding layer EMI1 include, but are not limited to, metals, alloys, carbon, ceramics, conductive polymers, and composites thereof.

[0045] In some embodiments, the circuit device further includes an adhesive layer AHL located on a side of the first coverlay layer CVL1 away from the base substrate BS. Optionally, the adhesive layer AHL may be located on sides of the first coverlay layer CVL1 and the first electromagnetic interference shielding layer EMI1 away from the base substrate BS. The adhesive layer AHL is configured to adhere the circuit device to a display panel (e.g., a rear surface of the display panel). Optionally, the adhesive layer AHL may be an integral structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP.

[0046] A variety of suitable materials and manufacturing methods may be used to prepare the adhesive layer AHL. Suitable pressure-sensitive adhesive materials include, but are not limited to, acrylate-based adhesive materials (e.g., homopolymers and copolymers of acrylic acid, methacrylic acid, isooctyl acrylate, acrylamide, methacrylamide, acrylonitrile, methacrylonitrile, methyl isoamyl acrylate, 2-ethylhexyl acrylate, and butyl acrylate), polyacrylic-based adhesive materials (e.g., polymethyl methacrylate (PMMA)), cycloolefin copolymers, polycarbonates, epoxy resins, silicone-based adhesive materials, or combinations thereof.

[0047] In some embodiments, the first conductive layer CDL1, the first coverlay layer CVL1, the first electromagnetic interference shielding layer EMI1, and the adhesive layer AHL are located on a first side S1 of the base substrate BS.

[0048] In some embodiments, the circuit device further includes a second conductive layer CDL2 located on the second side S2 of the base substrate BS. Optionally, the second conductive layer CDL2 may include one or more second conductive lines CL2.

[0049] Optionally, the second conductive layer CDL2 may be at least partially located in the flexible printed circuit portion FPCP. Optionally, the second conductive layer CDL2 may be at least partially absent from the antenna portion ATP. Optionally, the second conductive layer CDL2 may not be present at all in the antenna portion ATP.

[0050] In some embodiments, the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS at least partially overlaps with the orthogonal projection of one or more first conductive lines CL1 in the flexible printed circuit part FPCP onto the base substrate BS.

[0051] In some embodiments, the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS does not at least partially overlap with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS may not overlap at all with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0052] The second conductive layer CDL2 may be fabricated using a variety of suitable conductive materials and fabrication methods. For example, a conductive metal material may be deposited on the substrate by magnetron sputtering, vapor deposition (e.g., plasma-enhanced chemical vapor deposition), or vacuum evaporation. Suitable conductive metal materials for fabricating the second conductive layer CDL2 include, but are not limited to, copper, titanium, tantalum, aluminum, molybdenum, chromium, and alloys or laminates thereof.

[0053] In some embodiments, the circuit device includes a magnetic material layer MML located on the second side S2 of the base substrate BS. Optionally, the magnetic material layer MML may be configured to guide magnetic flux generated by one or more coil wires COL. By concentrating the magnetic flux generated by the one or more coil wires COL by the magnetic material layer MML, the read / write capability of the antenna portion ATP can be significantly improved.

[0054] In some embodiments, the orthogonal projection of the magnetic material layer MML onto the base substrate BS at least partially overlaps with the orthogonal projection of the one or more coil wires COL onto the base substrate BS. Optionally, the orthogonal projection of the magnetic material layer MML onto the base substrate BS may cover the orthogonal projection of the one or more coil wires COL onto the base substrate BS.

[0055] Various suitable magnetic materials may be used to fabricate the magnetic material layer MML. Suitable magnetic materials for fabricating the magnetic material layer MML include ferrimagnetic materials. Ferrimagnetic materials include ferrites. Ferrites include AO·B2O3, where A and B are two metal elements. Optionally, A and B may be selected from the group consisting of Fe, Mn, Zn, Ni, Mg, Co, Cu, Ba, Sr, etc. In one example, A and B are different from each other. In another example, A and B represent the same metal element. Optionally, A may be a mixture of two different metal elements, such as Ni and Zn, or Mn and Zn. Another example of a ferrite is Mn-Zn ferrite (Mn a Zn (1-a) BO4, optionally B is elemental iron) and Ni-Zn ferrite (Ni a Zn (1-a) BO4, optionally where B is elemental iron).

[0056] In some embodiments, the circuit device further includes a second coverlay layer CVL2 located on a side of the second conductive layer CDL2 away from the base substrate BS. A variety of suitable insulating materials and manufacturing methods may be used to fabricate the second coverlay layer CVL2. In some embodiments, the second coverlay layer CVL2 includes multiple sub-layers. Optionally, the multiple sub-layers may include an insulating material sub-layer and an adhesive sub-layer. The adhesive sub-layer bonds the insulating material sub-layer to an adjacent layer (e.g., the second conductive layer CDL2).

[0057] In some embodiments, the orthogonal projection of the second coverlay layer CVL2 onto the base substrate BS at least partially overlaps the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS. Optionally, the orthogonal projection of the second coverlay layer CVL2 onto the base substrate BS may cover the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS.

[0058] In some embodiments, the circuit device further includes a second electromagnetic interference shielding layer EMI2 located on a side of the second coverlay layer CVL2 away from the base substrate BS. The second electromagnetic interference shielding layer EMI2 is configured to shield the circuit device (e.g., the flexible printed circuit part FPCP) from electromagnetic waves. For example, the second electromagnetic interference shielding layer EMI2 may be configured to shield the flexible printed circuit part FPCP from electromagnetic waves generated during wireless charging of the display panel.

[0059] Optionally, the second electromagnetic interference shielding layer EMI2 may be at least partially located in the flexible printed circuit portion FPCP. Optionally, the second electromagnetic interference shielding layer EMI2 may be at least partially absent from the antenna portion ATP. Optionally, the second electromagnetic interference shielding layer EMI2 may not be present at all in the antenna portion ATP.

[0060] In some embodiments, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS at least partially overlaps the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS. Optionally, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS may cover the orthogonal projection of the one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS.

[0061] In some embodiments, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS does not at least partially overlap with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS may not overlap at all with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0062] In another embodiment, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS at least partially overlaps with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS may cover the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0063] A variety of suitable electromagnetic interference shielding materials and a variety of suitable manufacturing methods may be used to fabricate the second electromagnetic interference shielding layer EMI2. For example, the electromagnetic interference shielding material may be deposited on the substrate by magnetron sputtering, vapor deposition (e.g., plasma-enhanced chemical vapor deposition), or vacuum deposition. Suitable electromagnetic interference shielding materials for fabricating the second electromagnetic interference shielding layer EMI2 include, but are not limited to, metals, alloys, carbon, ceramics, conductive polymers, and composites thereof.

[0064] In some embodiments, the magnetic material layer MML, the second conductive layer CDL2, the second coverlay layer CVL2 and the second electromagnetic interference shielding layer EMI2 are located on the second side S2 of the base substrate BS.

[0065] 2C illustrates a layout of one or more coil wires and one or more first conductors according to some embodiments of the present disclosure. In some embodiments, a first average wire width w1 of one or more coil wires COL is in a range of 0.08 mm to 1.20 mm, such as 0.08 mm to 0.40 mm, 0.40 mm to 0.80 mm, or 0.80 mm to 1.20 mm. Optionally, the coil wires of one or more coil wires COL are spaced apart by a first average distance d1, such as 0.10 mm to 0.30 mm, such as 0.10 mm to 0.15 mm, 0.15 mm to 0.20 mm, 0.20 mm to 0.25 mm, or 0.25 mm to 0.30 mm.

[0066] In some embodiments, the second average line width w2 of the one or more first conductive wires CL1 is in the range of 0.05 mm to 0.20 mm, such as 0.05 mm to 0.10 mm, 0.10 mm to 0.15 mm, or 0.15 mm to 0.20 mm. Optionally, the first conductive wires of the one or more first conductive wires CL1 are spaced apart by a second average distance d2, which may be in the range of 0.05 mm to 0.08 mm, such as 0.05 mm to 0.06 mm, 0.06 mm to 0.07 mm, or 0.07 mm to 0.08 mm.

[0067] In some embodiments, the first average line width w1 is greater than the second average line width w2, and in some embodiments, the first average distance d1 is greater than the second average distance d2.

[0068] In some embodiments, the one or more coil wires COL are spaced apart from the nearest edge of the base substrate BS by an average distance in the range of 0.10 mm to 0.20 mm, for example, 0.10 mm to 0.15 mm or 0.15 mm to 0.20 mm.

[0069] In some embodiments, the average thickness of the base substrate BS is 15 μm to 30 μm, for example, 15 μm to 20 μm, 20 μm to 25 μm, or 25 μm to 30 μm. In some embodiments, the average thickness of the first coverlay layer CVL1 or the second coverlay layer CVL2 is 10 μm to 20 μm, for example, 10 μm to 15 μm or 15 μm to 20 μm. In some embodiments, the average thickness of the first electromagnetic interference shielding layer or the second electromagnetic interference shielding layer is 5 μm to 15 μm, for example, 5 μm to 10 μm or 10 μm to 15 μm. In some embodiments, the average thickness of the adhesive layer AHL is 40 μm to 60 μm, for example, 40 μm to 50 μm or 50 μm to 60 μm. In some embodiments, the average thickness of the magnetic material layer MML is 50 μm to 70 μm, for example, 50 μm to 60 μm or 60 μm to 70 μm.

[0070] FIG. 3 is a cross-sectional view of a circuit device according to some embodiments of the present disclosure. For example, FIG. 3 may be a cross-sectional view taken along line A-A' in FIG. 1. Referring to FIGS. 1 and 3, in some embodiments, the circuit device includes a base substrate BS, a first conductive layer CDL1 located on a first side S1 of the base substrate BS, and a first coverlay layer CVL1 located on a side of the first conductive layer CDL1 away from the base substrate BS. The base substrate BS is a monolithic structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP. Optionally, the first coverlay layer CVL1 may be a monolithic structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP.

[0071] In some embodiments, the first conductive layer CDL1 includes one or more coil wires COL in the antenna portion ATP and one or more first conductors CL1 in the flexible printed circuit portion FPCP. The one or more coil wires COL in the antenna portion ATP and the one or more first conductors CL1 in the flexible printed circuit portion FPCP are located on the same layer. The inventors of the present disclosure have found that by locating the one or more coil wires COL in the antenna portion ATP and the one or more first conductors CL1 in the flexible printed circuit portion FPCP on the same layer, the influence of the magnetic field generated by the one or more coil wires COL in the antenna portion ATP on the flexible printed circuit portion FPCP can be reduced or minimized.

[0072] 1 and 3, in some embodiments, the circuit device further includes a magnetic field strengthening layer MEL located on the first side S1 of the base substrate BS. The magnetic field strengthening layer MEL is configured to strengthen a magnetic field generated by one or more coil wires COL of the antenna portion ATP. In some embodiments, the one or more coil wires COL substantially surround the magnetic field strengthening layer MEL. The one or more coil wires COL in the antenna portion ATP have multiple turns for generating inductance. The multiple turns substantially surround the magnetic field strengthening layer MEL.

[0073] In some embodiments, the orthogonal projection of the first coverlay layer CVL1 onto the base substrate BS at least partially overlaps the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS. Optionally, the orthogonal projection of the first coverlay layer CVL1 onto the base substrate BS may cover the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS.

[0074] In some embodiments, the circuit device further includes a first electromagnetic interference shielding layer EMI1 located on a side of the first coverlay layer CVL1 away from the base substrate BS. The first electromagnetic interference shielding layer EMI1 is configured to shield the circuit device (e.g., the flexible printed circuit part FPCP) from electromagnetic waves. For example, the first electromagnetic interference shielding layer EMI1 may be configured to shield the flexible printed circuit part FPCP from electromagnetic waves generated during wireless charging of the display panel.

[0075] Optionally, the first electromagnetic interference shielding layer EMI1 may be at least partially located in the flexible printed circuit portion FPCP. Optionally, the first electromagnetic interference shielding layer EMI1 may be at least partially absent from the antenna portion ATP. Optionally, the first electromagnetic interference shielding layer EMI1 may not be present at all in the antenna portion ATP.

[0076] In some embodiments, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS at least partially overlaps the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS. Optionally, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS may cover the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS.

[0077] In some embodiments, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS does not at least partially overlap with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS may not overlap at all with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0078] In another embodiment, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS at least partially overlaps with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS may cover the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0079] In some embodiments, the circuit device further includes an adhesive layer AHL located on a side of the first coverlay layer CVL1 away from the base substrate BS. Optionally, the adhesive layer AHL may be located on sides of the first coverlay layer CVL1 and the first electromagnetic interference shielding layer EMI1 away from the base substrate BS. The adhesive layer AHL is configured to adhere the circuit device to a display panel (e.g., a rear surface of the display panel). Optionally, the adhesive layer AHL may be an integral structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP.

[0080] In some embodiments, the first conductive layer CDL1, the first coverlay layer CVL1, the first electromagnetic interference shielding layer EMI1, and the adhesive layer AHL are located on a first side S1 of the base substrate BS.

[0081] In some embodiments, one side of the magnetic field enhancing layer MEL is in direct contact with the base substrate BS, and the other side is in direct contact with the adhesive layer AHL.

[0082] In some embodiments, the circuit device further includes a second conductive layer CDL2 located on the second side S2 of the base substrate BS. Optionally, the second conductive layer CDL2 may include one or more second conductive lines CL2.

[0083] Optionally, the second conductive layer CDL2 may be at least partially located in the flexible printed circuit portion FPCP. Optionally, the second conductive layer CDL2 may be at least partially absent from the antenna portion ATP. Optionally, the second conductive layer CDL2 may not be present at all in the antenna portion ATP.

[0084] In some embodiments, the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS at least partially overlaps with the orthogonal projection of one or more first conductive lines CL1 in the flexible printed circuit part FPCP onto the base substrate BS.

[0085] In some embodiments, the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS does not at least partially overlap with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS may not overlap at all with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0086] In some embodiments, the circuit device further includes a magnetic material layer MML located on the second side S2 of the base substrate BS. Optionally, the magnetic material layer MML may be configured to guide magnetic flux generated by one or more coil wires COL. By concentrating the magnetic flux generated by the one or more coil wires COL by the magnetic material layer MML, the read / write capability of the antenna portion ATP can be significantly improved.

[0087] In some embodiments, the orthogonal projection of the magnetic material layer MML onto the base substrate BS at least partially overlaps with the orthogonal projection of the one or more coil wires COL onto the base substrate BS. Optionally, the orthogonal projection of the magnetic material layer MML onto the base substrate BS may cover the orthogonal projection of the one or more coil wires COL onto the base substrate BS.

[0088] In some embodiments, the orthogonal projection of the magnetic material layer MML onto the base substrate BS at least partially overlaps with the orthogonal projection of the magnetic field strengthening layer MEL onto the base substrate BS. Optionally, the orthogonal projection of the magnetic material layer MML onto the base substrate BS may cover the orthogonal projection of the magnetic field strengthening layer MEL onto the base substrate BS.

[0089] In some embodiments, the circuit device further includes a second coverlay layer CVL2 located on a side of the second conductive layer CDL2 away from the base substrate BS. A variety of suitable insulating materials and manufacturing methods may be used to fabricate the second coverlay layer CVL2. In some embodiments, the second coverlay layer CVL2 includes multiple sub-layers. Optionally, the multiple sub-layers may include an insulating material sub-layer and an adhesive sub-layer. The adhesive sub-layer bonds the insulating material sub-layer to an adjacent layer (e.g., the second conductive layer CDL2).

[0090] In some embodiments, the orthogonal projection of the second coverlay layer CVL2 onto the base substrate BS at least partially overlaps the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS. Optionally, the orthogonal projection of the second coverlay layer CVL2 onto the base substrate BS may cover the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS.

[0091] In some embodiments, the circuit device further includes a second electromagnetic interference shielding layer EMI2 located on a side of the second coverlay layer CVL2 away from the base substrate BS. The second electromagnetic interference shielding layer EMI2 is configured to shield the circuit device (e.g., the flexible printed circuit part FPCP) from electromagnetic waves. For example, the second electromagnetic interference shielding layer EMI2 may be configured to shield the flexible printed circuit part FPCP from electromagnetic waves generated during wireless charging of the display panel.

[0092] Optionally, the second electromagnetic interference shielding layer EMI2 may be at least partially located in the flexible printed circuit portion FPCP. Optionally, the second electromagnetic interference shielding layer EMI2 may be at least partially absent from the antenna portion ATP. Optionally, the second electromagnetic interference shielding layer EMI2 may not be present at all in the antenna portion ATP.

[0093] In some embodiments, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS at least partially overlaps the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS. Optionally, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS may cover the orthogonal projection of the one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS.

[0094] In some embodiments, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS does not at least partially overlap with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS may not overlap at all with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0095] In another embodiment, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS at least partially overlaps with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the second electromagnetic interference shielding layer EMI2 onto the base substrate BS may cover the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0096] In some embodiments, the magnetic material layer MML, the second conductive layer CDL2, the second coverlay layer CVL2 and the second electromagnetic interference shielding layer EMI2 are located on the second side S2 of the base substrate BS.

[0097] In some embodiments, a first average wire width of the one or more coil wires COL is in the range of 0.08 mm to 1.20 mm, e.g., 0.08 mm to 0.40 mm, 0.40 mm to 0.80 mm, and 0.80 mm to 1.20 mm. Optionally, the coil wires of the one or more coil wires COL are spaced apart by a first average distance, which may be in the range of 0.10 mm to 0.30 mm, e.g., 0.10 mm to 0.15 mm, 0.15 mm to 0.20 mm, 0.20 mm to 0.25 mm, or 0.25 mm to 0.30 mm.

[0098] In some embodiments, the second average line width of the one or more first conductive wires CL1 is in the range of 0.05 mm to 0.20 mm, for example, 0.05 mm to 0.10 mm, 0.10 mm to 0.15 mm, and 0.15 mm to 0.20 mm. Optionally, the first conductive wires in the one or more first conductive wires CL1 are spaced apart by a second average distance, which may be in the range of 0.05 mm to 0.08 mm, for example, 0.05 mm to 0.06 mm, 0.06 mm to 0.07 mm, or 0.07 mm to 0.08 mm.

[0099] In some embodiments, the first average line width is greater than the second average line width. In some embodiments, the first average distance is greater than the second average distance.

[0100] In some embodiments, the one or more coil wires COL are spaced apart from the nearest edge of the base substrate BS by an average distance in the range of 0.10 mm to 0.20 mm, for example, 0.10 mm to 0.15 mm or 0.15 mm to 0.20 mm.

[0101] In some embodiments, the average thickness of the base substrate BS is 15 μm to 30 μm, for example, 15 μm to 20 μm, 20 μm to 25 μm, or 25 μm to 30 μm. In some embodiments, the average thickness of the first coverlay layer CVL1 or the second coverlay layer CVL2 is 10 μm to 20 μm, for example, 10 μm to 15 μm or 15 μm to 20 μm. In some embodiments, the average thickness of the first electromagnetic interference shielding layer EMI1 or the second electromagnetic interference shielding layer EMI2 is 5 μm to 15 μm, for example, 5 μm to 10 μm or 10 μm to 15 μm. In some embodiments, the average thickness of the adhesive layer AHL is 40 μm to 60 μm, for example, 40 μm to 50 μm or 50 μm to 60 μm. In some embodiments, the average thickness of the magnetic field enhancement layer MEL is 20 μm to 45 μm, for example, 20 μm to 25 μm, 25 μm to 30 μm, 30 μm to 35 μm, 35 μm to 40 μm, or 40 μm to 45 μm. In some embodiments, the average thickness of the magnetic material layer MML is 50 μm to 70 μm, for example, 50 μm to 60 μm, or 60 μm to 70 μm.

[0102] The magnetic field enhancing layer MEL may be fabricated using a variety of suitable magnetic field enhancing materials. Suitable magnetic field enhancing materials include various magnetically permeable materials such as various metals and various alloys. Specific examples of magnetic field enhancing materials include stainless steel, iron, silicon steel, various ferrite materials, various permalloys (e.g., iron-aluminum alloy, iron-nickel alloy, iron-cobalt alloy, neodymium-iron-boron alloy), etc.

[0103] In one example, the circuit device does not include a magnetic field enhancing layer MEL (see, e.g., FIGS. 2A and 2B ), and the magnetic field generated by the one or more coil wires COL is 3.45 A / m. In another example, the circuit device includes a magnetic field enhancing layer MEL including stainless steel (see, e.g., FIG. 3 ), and the magnetic field generated by the one or more coil wires COL is enhanced to 8.51 A / m. In another example, the circuit device includes a magnetic field enhancing layer MEL including iron (see, e.g., FIG. 3 ), and the magnetic field generated by the one or more coil wires COL is enhanced to 6.86 A / m. In another example, the circuit device includes a magnetic field enhancing layer MEL including an iron-aluminum alloy (see, e.g., FIG. 3 ), and the magnetic field generated by the one or more coil wires COL is enhanced to 7.84 A / m.

[0104] Figure 4 is a cross-sectional view of a circuit device according to some embodiments of the present disclosure. The circuit device shown in Figure 4 differs from the circuit device shown in Figure 2A in that the thickness of one or more coil wires COL is different from the thickness of one or more first conductor wires CL1. Figure 5 is a cross-sectional view of a circuit device according to some embodiments of the present disclosure. The circuit device shown in Figure 5 differs from the circuit device shown in Figure 3 in that the thickness of one or more coil wires COL is different from the thickness of one or more first conductor wires CL1.

[0105] 4 and 5, in some embodiments, the first thickness of the one or more coil wires COL is greater than the second thickness of the one or more first conductive wires CL, e.g., by at least 10%, at least 20%, at least 30%, at least 40%, at least 50%, at least 60%, at least 70%, at least 80%, at least 90%, at least 100%, at least 110%, at least 120%, at least 130%, at least 140%, at least 150%, at least 160%, at least 170%, at least 180%, at least 190%, or at least 200% greater.

[0106] In another embodiment, the second thickness of the one or more first conductive wires CL1 is greater than the first thickness of the one or more coil wires COL, for example, by at least 10%, at least 20%, at least 30%, at least 40%, at least 50%, at least 60%, at least 70%, at least 80%, at least 90%, at least 100%, at least 110%, at least 120%, at least 130%, at least 140%, at least 150%, at least 160%, at least 170%, at least 180%, at least 190% or at least 200% greater.

[0107] FIG. 6 is a cross-sectional view of a circuit device according to some embodiments of the present disclosure. For example, FIG. 6 may be a cross-sectional view taken along line A-A' in FIG. 1. Referring to FIGS. 1 and 6, in some embodiments, the circuit device includes a base substrate BS, a first conductive layer CDL1 located on a first side S1 of the base substrate BS, and a first coverlay layer CVL1 located on a side of the first conductive layer CDL1 away from the base substrate BS. The base substrate BS is a monolithic structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP. Optionally, the first coverlay layer CVL1 may be a monolithic structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP.

[0108] In some embodiments, the first conductive layer CDL1 includes one or more coil wires COL in the antenna portion ATP and one or more first conductors CL1 in the flexible printed circuit portion FPCP. The one or more coil wires COL in the antenna portion ATP and the one or more first conductors CL1 in the flexible printed circuit portion FPCP are located on the same layer. The inventors of the present disclosure have found that by locating the one or more coil wires COL in the antenna portion ATP and the one or more first conductors CL1 in the flexible printed circuit portion FPCP on the same layer, the influence of the magnetic field generated by the one or more coil wires COL in the antenna portion ATP on the flexible printed circuit portion FPCP can be reduced or minimized.

[0109] 1 and 6, in some embodiments, the circuit device further includes a magnetic field strengthening layer MEL located on the first side S1 of the base substrate BS. The magnetic field strengthening layer MEL is configured to strengthen a magnetic field generated by one or more coil wires COL of the antenna portion ATP. In some embodiments, the one or more coil wires COL substantially surround the magnetic field strengthening layer MEL. The one or more coil wires COL in the antenna portion ATP have multiple turns for generating inductance. The multiple turns substantially surround the magnetic field strengthening layer MEL.

[0110] In some embodiments, the orthogonal projection of the first coverlay layer CVL1 onto the base substrate BS at least partially overlaps the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS. Optionally, the orthogonal projection of the first coverlay layer CVL1 onto the base substrate BS may cover the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS.

[0111] In some embodiments, the circuit device further includes a first electromagnetic interference shielding layer EMI1 located on a side of the first coverlay layer CVL1 away from the base substrate BS. The first electromagnetic interference shielding layer EMI1 is configured to shield the circuit device (e.g., the flexible printed circuit part FPCP) from electromagnetic waves. For example, the first electromagnetic interference shielding layer EMI1 may be configured to shield the flexible printed circuit part FPCP from electromagnetic waves generated during wireless charging of the display panel.

[0112] Optionally, the first electromagnetic interference shielding layer EMI1 may be at least partially located in the flexible printed circuit portion FPCP. Optionally, the first electromagnetic interference shielding layer EMI1 may be at least partially absent from the antenna portion ATP. Optionally, the first electromagnetic interference shielding layer EMI1 may not be present at all in the antenna portion ATP.

[0113] In some embodiments, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS at least partially overlaps the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS. Optionally, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS may cover the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS.

[0114] In some embodiments, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS does not at least partially overlap with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS may not overlap at all with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0115] In another embodiment, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS at least partially overlaps with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the first electromagnetic interference shielding layer EMI1 onto the base substrate BS may cover the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0116] In some embodiments, the circuit device further includes an adhesive layer AHL located on a side of the first coverlay layer CVL1 away from the base substrate BS. Optionally, the adhesive layer AHL may be located on sides of the first coverlay layer CVL1 and the first electromagnetic interference shielding layer EMI1 away from the base substrate BS. The adhesive layer AHL is configured to adhere the circuit device to a display panel (e.g., a rear surface of the display panel). Optionally, the adhesive layer AHL may be an integral structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP.

[0117] In some embodiments, the first conductive layer CDL1, the first coverlay layer CVL1, the first electromagnetic interference shielding layer EMI1, and the adhesive layer AHL are located on a first side S1 of the base substrate BS.

[0118] In some embodiments, one side of the magnetic field enhancing layer MEL is in direct contact with the base substrate BS, and the other side is in direct contact with the adhesive layer AHL.

[0119] In some embodiments, the circuit device further includes a second conductive layer CDL2 located on the second side S2 of the base substrate BS. Optionally, the second conductive layer CDL2 may include one or more second conductive lines CL2.

[0120] Optionally, the second conductive layer CDL2 may be at least partially located in the flexible printed circuit portion FPCP. Optionally, the second conductive layer CDL2 may be at least partially absent from the antenna portion ATP. Optionally, the second conductive layer CDL2 may not be present at all in the antenna portion ATP.

[0121] In some embodiments, the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS at least partially overlaps with the orthogonal projection of one or more first conductive lines CL1 in the flexible printed circuit part FPCP onto the base substrate BS.

[0122] In some embodiments, the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS does not at least partially overlap with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS may not overlap at all with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0123] In some embodiments, the circuit device further includes a magnetic material layer MML located on the second side S2 of the base substrate BS. Optionally, the magnetic material layer MML may be configured to guide magnetic flux generated by one or more coil wires COL. By concentrating the magnetic flux generated by the one or more coil wires COL by the magnetic material layer MML, the read / write capability of the antenna portion ATP can be significantly improved.

[0124] In some embodiments, the orthogonal projection of the magnetic material layer MML onto the base substrate BS at least partially overlaps with the orthogonal projection of the one or more coil wires COL onto the base substrate BS. Optionally, the orthogonal projection of the magnetic material layer MML onto the base substrate BS may cover the orthogonal projection of the one or more coil wires COL onto the base substrate BS.

[0125] In some embodiments, the orthogonal projection of the magnetic material layer MML onto the base substrate BS at least partially overlaps with the orthogonal projection of the magnetic field strengthening layer MEL onto the base substrate BS. Optionally, the orthogonal projection of the magnetic material layer MML onto the base substrate BS may cover the orthogonal projection of the magnetic field strengthening layer MEL onto the base substrate BS.

[0126] In some embodiments, the circuit device further includes a second coverlay layer CVL2 located on a side of the second conductive layer CDL2 and the magnetic material layer MML away from the base substrate BS. The second coverlay layer CVL21 is an integral structure extending from the region of the antenna portion ATP to the region of the flexible printed circuit portion FPCP. In some embodiments, the second coverlay layer CVL2 includes multiple sublayers. Optionally, the multiple sublayers may include an insulating material sublayer and an adhesive sublayer. The adhesive sublayer bonds the insulating material sublayer to an adjacent layer (e.g., the second conductive layer CDL2 or the magnetic material layer MML).

[0127] In some embodiments, the orthogonal projection of the second coverlay layer CVL2 onto the base substrate BS at least partially overlaps the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS. Optionally, the orthogonal projection of the second coverlay layer CVL2 onto the base substrate BS may cover the orthogonal projection of the first conductive layer CDL1 onto the base substrate BS.

[0128] In some embodiments, the orthogonal projection of the second coverlay layer CVL2 onto the base substrate BS at least partially overlaps the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS and at least partially overlaps the orthogonal projection of the magnetic material layer MML onto the base substrate BS. Optionally, the orthogonal projection of the second coverlay layer CVL2 onto the base substrate BS may cover the orthogonal projection of the second conductive layer CDL2 onto the base substrate BS and may cover the orthogonal projection of the magnetic material layer MML onto the base substrate BS.

[0129] In some embodiments, the circuit device further includes a shielding layer SDL located on a side of the second coverlay layer CVL2 away from the base substrate BS. The shielding layer SDL is configured to shield the circuit device (e.g., the flexible printed circuit part FPCP) from electromagnetic waves. For example, the shielding layer SDL may be configured to shield the flexible printed circuit part FPCP from electromagnetic waves generated during wireless charging of the display panel.

[0130] Optionally, the shielding layer SDL may be at least partially located on the flexible printed circuit portion FPCP and at least partially located on the antenna portion ATP.

[0131] In some embodiments, the orthogonal projection of the shielding layer SDL onto the base substrate BS at least partially overlaps the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS. Optionally, the orthogonal projection of the shielding layer SDL onto the base substrate BS may cover the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS.

[0132] In some embodiments, the orthogonal projection of the shielding layer SDL onto the base substrate BS at least partially overlaps with the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS. Optionally, the orthogonal projection of the shielding layer SDL onto the base substrate BS may cover the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0133] In some embodiments, the orthogonal projection of the shielding layer SDL onto the base substrate BS covers the orthogonal projection of one or more first conductors CL1 in the flexible printed circuit portion FPCP onto the base substrate BS, and covers the orthogonal projection of one or more coil wires COL in the antenna portion ATP onto the base substrate BS.

[0134] In some embodiments, the circuit device further comprises a protective layer PL located on a side of the shielding layer SDL away from the base substrate BS. In one example, the protective layer PL is an ink material layer.

[0135] The inventors of the present disclosure have found that the problem of moire patterns appearing on a display panel during wireless charging can be reduced or eliminated by providing a shielding layer SDL and a protective layer PL.

[0136] In some embodiments, the magnetic material layer MML, the second conductive layer CDL2, the second coverlay layer CVL2, the shielding layer SDL, and the protective layer PL are located on the second side S2 of the base substrate BS.

[0137] In some embodiments, a first average wire width of the one or more coil wires COL is in the range of 0.08 mm to 1.20 mm, e.g., 0.08 mm to 0.40 mm, 0.40 mm to 0.80 mm, and 0.80 mm to 1.20 mm. Optionally, the coil wires of the one or more coil wires COL are spaced apart by a first average distance, which may be in the range of 0.10 mm to 0.30 mm, e.g., 0.10 mm to 0.15 mm, 0.15 mm to 0.20 mm, 0.20 mm to 0.25 mm, or 0.25 mm to 0.30 mm.

[0138] In some embodiments, the second average line width of the one or more first conductive wires CL1 is in the range of 0.05 mm to 0.20 mm, for example, 0.05 mm to 0.10 mm, 0.10 mm to 0.15 mm, and 0.15 mm to 0.20 mm. Optionally, the first conductive wires in the one or more first conductive wires CL1 are spaced apart by a second average distance, which may be in the range of 0.05 mm to 0.08 mm, for example, 0.05 mm to 0.06 mm, 0.06 mm to 0.07 mm, or 0.07 mm to 0.08 mm.

[0139] In some embodiments, the first average line width is greater than the second average line width. In some embodiments, the first average distance is greater than the second average distance.

[0140] In some embodiments, the one or more coil wires COL are spaced apart from the nearest edge of the base substrate BS by an average distance in the range of 0.10 mm to 0.20 mm, for example, 0.10 mm to 0.15 mm or 0.15 mm to 0.20 mm.

[0141] In some embodiments, the average thickness of the base substrate BS is 15 μm to 30 μm, for example, 15 μm to 20 μm, 20 μm to 25 μm, or 25 μm to 30 μm. In some embodiments, the average thickness of the first coverlay layer CVL1 or the second coverlay layer CVL2 is 10 μm to 20 μm, for example, 10 μm to 15 μm or 15 μm to 20 μm. In some embodiments, the average thickness of the first electromagnetic interference shielding layer EMI1 is 5 μm to 15 μm, for example, 5 μm to 10 μm or 10 μm to 15 μm. In some embodiments, the average thickness of the adhesive layer AHL is 40 μm to 60 μm, for example, 40 μm to 50 μm or 50 μm to 60 μm. In some embodiments, the average thickness of the magnetic field enhancement layer MEL is 20 μm to 45 μm, for example, 20 μm to 25 μm, 25 μm to 30 μm, 30 μm to 35 μm, 35 μm to 40 μm, or 40 μm to 45 μm. In some embodiments, the average thickness of the magnetic material layer MML is 50 μm to 70 μm, for example, 50 μm to 60 μm or 60 μm to 70 μm. In some embodiments, the average thickness of the shielding layer SDL is 50 μm to 100 μm, for example, 50 μm to 60 μm, 60 μm to 70 μm, 70 μm to 80 μm, 80 μm to 90 μm, or 90 μm to 100 μm. In some embodiments, the average thickness of the protective layer PL is 50 μm to 100 μm, for example, 50 μm to 60 μm, 60 μm to 70 μm, 70 μm to 80 μm, 80 μm to 90 μm, or 90 μm to 100 μm.

[0142] 7 is a cross-sectional view of a circuit device according to some embodiments of the present disclosure. The circuit device shown in FIG. 7 differs from the circuit device shown in FIG. 6 in that it includes a second electromagnetic interference shielding layer EMI2 instead of the shielding layer SDL shown in FIG. 6.

[0143] 8 is a cross-sectional view of a circuit device according to some embodiments of the present disclosure. The circuit device shown in Fig. 8 differs from the circuit device shown in Fig. 6 in that it does not include a magnetic field enhancing layer MEL.

[0144] In another aspect, the present disclosure provides a display device including the circuit device described herein and a display panel connected to the circuit device. Examples of suitable display devices include, but are not limited to, electronic paper, mobile phones, tablet computers, televisions, monitors, notebook computers, digital albums, GPS, etc. In one example, the display device is a smart watch.

[0145] 9 is a schematic diagram showing the configuration of a display device according to some embodiments of the present disclosure. Referring to FIG. 9, in some embodiments, the display device includes, for example, a flexible printed circuit portion FPCP and an antenna portion ATP integrated together as a circuit device. The circuit device further includes a connector CN. The circuit device is connected to a motherboard of the display device via the connector CN. The connector CN is integrated with the antenna portion ATP and the flexible printed circuit portion FPCP. The antenna portion ATP includes an antenna such as a near-field wireless communication circuit.

[0146] 9, in some embodiments, the display device further includes one or more integrated circuits IC. The flexible printed circuit portion FPCP includes a plurality of circuit pins CPIN for bonding with the one or more integrated circuits IC.

[0147] In some embodiments, the flexible printed circuit portion FPCP may include one or more electromagnetic interference shielding layers configured to shield the circuit device from electromagnetic waves (e.g., the second electromagnetic interference shielding layer EMI2 shown in FIG. 9). For example, the one or more electromagnetic interference shielding layers may be configured to shield the circuit device from electromagnetic waves generated during wireless charging of the display panel.

[0148] In some embodiments, the circuit device further comprises a sensor SE integrated with the flexible printed circuit part FPCP. In one example, the sensor SE is a photoelectric sensor.

[0149] FIG. 10 is a cross-sectional view of a display device according to some embodiments of the present disclosure. For example, FIG. 10 may be a cross-sectional view taken along line B-B' in FIG. 9. Referring to FIGS. 9 and 10, in some embodiments, the display device includes a circuit device CD and a display panel DP connected to the circuit device CD. The circuit device CD is adhered to the rear surface of the display panel DP via an adhesive layer AHL of the circuit device CD. In some embodiments, the display device further includes a cover C located on the light-emitting side of the display panel DP.

[0150] 11 is a cross-sectional view of a display device according to some embodiments of the present disclosure. Fig. 11 is a cross-sectional view of the circuit device shown in Fig. 2A. Referring to Fig. 11, a display panel DP and a cover C are located on a first side S1 of a base substrate BS. The display panel DP is located on the side of the adhesive layer AHL that is farther from the base substrate BS, and the cover C is located on the side of the display panel DP that is farther from the base substrate BS.

[0151] In some embodiments, the display device has a laminate structure including a cover C, a display panel DP located on the cover C, an adhesive layer AHL located on a side of the display panel DP away from the cover C, a first electromagnetic interference shielding layer EMI1 located on a side of the adhesive layer AHL away from the cover C, a first coverlay layer CVL1 located on a side of the first electromagnetic interference shielding layer EMI1 away from the cover C, a first conductive layer CDL1 located on a side of the first coverlay layer CVL1 away from the cover C, a base substrate BS located on a side of the first conductive layer CDL1 away from the cover C, a magnetic material layer MML and a second conductive layer CDL2 located on a side of the base substrate BS away from the cover C, a second coverlay layer CVL2 located on a side of the second conductive layer CDL2 away from the cover C, and a second electromagnetic interference shielding layer EMI2 located on a side of the second coverlay layer CVL2 away from the cover C.

[0152] 12 is a cross-sectional view of a display device according to some embodiments of the present disclosure, and corresponds to a cross-sectional view of the circuit device shown in FIG. Referring to Figure 12, the display device has a laminated structure including a cover C, a display panel DP located on the cover C, an adhesive layer AHL located on the side of the display panel DP away from the cover C, a first electromagnetic interference shielding layer EMI1 located on the side of the adhesive layer AHL away from the cover C, a first coverlay layer CVL1 located on the side of the first electromagnetic interference shielding layer EMI1 away from the cover C, a first conductive layer CDL1 and a magnetic field enhancement layer MEL located on the side of the first coverlay layer CVL1 away from the cover C, a base substrate BS located on the side of the first conductive layer CDL1 and the magnetic field enhancement layer MEL away from the cover C, a magnetic material layer MML and a second conductive layer CDL2 located on the side of the base substrate BS away from the cover C, a second coverlay layer CVL2 located on the side of the second conductive layer CDL2 away from the cover C, and a second electromagnetic interference shielding layer EMI2 located on the side of the second coverlay layer CVL2 away from the cover C.

[0153] Fig. 13 is a cross-sectional view of a display device according to some embodiments of the present disclosure. Fig. 13 corresponds to a cross-sectional view of the circuit device shown in Fig. 6. Referring to Fig. 13, the display device includes a cover C, a display panel DP located on the cover C, an adhesive layer AHL located on the side of the display panel DP away from the cover C, a first electromagnetic interference shielding layer EMI1 located on the side of the adhesive layer AHL away from the cover C, a first coverlay layer CVL1 located on the side of the first electromagnetic interference shielding layer EMI1 away from the cover C, a first conductive layer CDL1 and a magnetic field enhancing layer MEL located on the side of the first coverlay layer CVL1 away from the cover C, and a first conductive layer The device has a laminated structure including a base substrate BS located on the side of CDL1 and magnetic field enhancement layer MEL away from cover C, a magnetic material layer MML and a second conductive layer CDL2 located on the side of base substrate BS away from cover C, a second coverlay layer CVL2 located on the side of magnetic material layer MML and second conductive layer CDL2 away from cover C, a shielding layer SDL located on the side of second coverlay layer CVL2 away from cover C, and a protective layer PL located on the side of shielding layer SDL away from cover C.

[0154] Fig. 14 is a cross-sectional view of a display device according to some embodiments of the present disclosure. Fig. 14 corresponds to a cross-sectional view of the circuit device shown in Fig. 7. Referring to Fig. 14, the display device includes a cover C, a display panel DP located on the cover C, an adhesive layer AHL located on the side of the display panel DP away from the cover C, a first electromagnetic interference shielding layer EMI1 located on the side of the adhesive layer AHL away from the cover C, a first coverlay layer CVL1 located on the side of the first electromagnetic interference shielding layer EMI1 away from the cover C, a first conductive layer CDL1 and a magnetic field strengthening layer MEL located on the side of the first coverlay layer CVL1 away from the cover C, and The laminated structure includes a base substrate BS located on the side of the reinforcing layer MEL away from the cover C, a magnetic material layer MML and a second conductive layer CDL2 located on the side of the base substrate BS away from the cover C, a second coverlay layer CVL2 located on the side of the magnetic material layer MML and the second conductive layer CDL2 away from the cover C, a second electromagnetic interference shielding layer EMI2 located on the side of the second coverlay layer CVL2 away from the cover C, and a protective layer PL located on the side of the second electromagnetic interference shielding layer EMI2 away from the cover C.

[0155] 15 is a cross-sectional view of a display device according to some embodiments of the present disclosure, and corresponds to a cross-sectional view of the circuit device shown in FIG. Referring to Figure 15, the display device has a laminated structure including a cover C, a display panel DP located on the cover C, an adhesive layer AHL located on the side of the display panel DP away from the cover C, a first electromagnetic interference shielding layer EMI1 located on the side of the adhesive layer AHL away from the cover C, a first coverlay layer CVL1 located on the side of the first electromagnetic interference shielding layer EMI1 away from the cover C, a first conductive layer CDL1 located on the side of the first coverlay layer CVL1 away from the cover C, a base substrate BS located on the side of the first conductive layer CDL1 away from the cover C, a magnetic material layer MML and a second conductive layer CDL2 located on the side of the base substrate BS away from the cover C, a second coverlay layer CVL2 located on the side of the magnetic material layer MML and the second conductive layer CDL2 away from the cover C, a shielding layer SDL located on the side of the second coverlay layer CVL2 away from the cover C, and a protective layer PL located on the side of the shielding layer SDL away from the cover C.

[0156] The foregoing description of embodiments of the present invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form or exemplary embodiments disclosed. Therefore, the foregoing description should be considered illustrative and not limiting, and many modifications and variations will be apparent to those skilled in the art. These embodiments have been chosen and described in order to explain the principles of the invention and practical application of its best mode, thereby enabling those skilled in the art to appreciate that the invention is adaptable to various embodiments and variations of the particular applications or contemplated embodiments. The scope of the present invention is intended to be defined by the claims appended to this disclosure and their equivalents, and all terms are to be interpreted in the broadest reasonable manner unless otherwise indicated. Accordingly, the use of terms such as "the present invention," "the disclosure," or similar terms does not necessarily limit the claims to any particular embodiment, and reference to exemplary embodiments of the present invention does not suggest, and no limitation to, the present invention should be inferred. The present invention is limited only by the spirit and scope of the appended claims. Furthermore, these claims may use terms such as "first," "second," etc., followed by a noun or element. Unless a specific quantity is indicated, such terms should be understood as specialized terms, and the quantity of the modified element should not be construed as being limited by the specialized terms. Not all of the effects and advantages described apply to all embodiments of the present invention. Those skilled in the art will understand that modifications can be made to the described embodiments without departing from the scope of the present invention, as defined by the following claims. Furthermore, none of the elements and components of the present disclosure, whether or not explicitly recited in the following claims, are intended to be dedicated to the public.

Claims

1. A circuit device comprising a flexible printed circuit portion and an antenna portion, a base substrate having an integral structure extending from the area of ​​the antenna portion to the area of ​​the flexible printed circuit portion; a first conductive layer located on a first side of the base substrate; The first conductive layer includes one or more coil wires in the antenna portion and one or more first conductors in the flexible printed circuit portion. Circuit devices.

2. a connector configured to connect the circuit device to a motherboard of a display device; The one or more coil wires in the antenna portion are directly connected to the connector. The circuit device according to claim 1 .

3. a first coverlay layer located on a side of the first conductive layer away from the base substrate; an orthogonal projection of the first coverlay layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more coil wires onto the base substrate and at least partially overlaps an orthogonal projection of the one or more first conductors onto the base substrate; The circuit device according to claim 1 .

4. a magnetic field enhancing layer located on the first side of the base substrate and configured to enhance a magnetic field generated by the one or more coil wires; The one or more coil wires substantially surround the magnetic field enhancing layer. The circuit device according to claim 1 .

5. the magnetic field enhancing layer includes a magnetic field enhancing material; The magnetic field enhancing material comprises a metal or alloy. The circuit device according to claim 4 .

6. a first electromagnetic interference shielding layer located on a side of the first coverlay layer away from the base substrate and configured to shield the flexible printed circuit portion from electromagnetic waves; an orthogonal projection of the first electromagnetic interference shielding layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more first conductors of the flexible printed circuit portion onto the base substrate; The circuit device according to claim 1 .

7. an adhesive layer located on a side of the first coverlay layer and the first electromagnetic interference shielding layer away from the base substrate; the adhesive layer is configured to adhere the circuit device to a display panel; The adhesive layer has a unitary structure extending from the area of ​​the antenna portion to the area of ​​the flexible printed circuit portion. The circuit device according to claim 1 .

8. a second conductive layer located on a second side of the base substrate opposite the first side; the second conductive layer is configured to shield the flexible printed circuit portion from electromagnetic waves; an orthogonal projection of the second conductive layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more first conductors of the flexible printed circuit portion onto the base substrate; The circuit device according to claim 1 .

9. a layer of magnetic material located on a second side of the base substrate opposite the first side; the magnetic material layer is configured to guide magnetic flux generated by the one or more coil wires; An orthogonal projection of the magnetic material layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more coil wires and / or magnetic field enhancing layer onto the base substrate. The circuit device according to claim 1 .

10. The magnetic material layer includes a ferrimagnetic material. The circuit device according to claim 9 .

11. a second coverlay layer located on a side of the second conductive layer away from the base substrate; an orthogonal projection of the second coverlay layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more first conductors onto the base substrate; The circuit device according to claim 1 .

12. the second coverlay layer has a unitary structure extending from a region of the antenna portion to a region of the flexible printed circuit portion; an orthogonal projection of the second coverlay layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more coil lines onto the base substrate; The circuit device of claim 11 .

13. a second electromagnetic interference shielding layer located on a side of the second coverlay layer away from the base substrate and configured to shield the flexible printed circuit portion from electromagnetic waves; an orthogonal projection of the second electromagnetic interference shielding layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more first conductors of the flexible printed circuit portion onto the base substrate; The circuit device according to claim 1 .

14. a shielding layer located on a side of the second coverlay layer away from the base substrate and configured to shield the flexible printed circuit portion from electromagnetic waves; an orthogonal projection of the shielding layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more first conductors of the flexible printed circuit portion onto the base substrate; the shielding layer has a unitary structure extending from the region of the antenna portion to the region of the flexible printed circuit portion; An orthogonal projection of the shielding layer onto the base substrate at least partially overlaps an orthogonal projection of the one or more coil wires in the antenna portion onto the base substrate. The circuit device according to claim 1 .

15. a second electromagnetic interference shielding layer or a protective layer located on the side of the shielding layer remote from the base substrate; The circuit device according to claim 1 .

16. A first thickness of the one or more coil wires is greater than a second thickness of the one or more first conductor wires. The circuit device according to claim 1 .

17. the one or more coil wires have a first average wire width; the one or more first conductive lines have a second average line width; The first average line width is greater than the second average line width. The circuit device according to claim 1 .

18. the coil wires in the one or more coil wires are spaced apart by a first average distance; the first conductors in the one or more first conductors are spaced apart by a second average distance; The first average distance is greater than the second average distance. The circuit device according to claim 1 .

19. A circuit device according to any one of claims 1 to 18; a display panel connected to the circuit device; Display device.

20. It has a laminated structure, The laminated structure is Cover and the display panel located on the cover; an adhesive layer located on a side of the display panel away from the cover; a first electromagnetic interference shielding layer located on a side of the adhesive layer away from the cover; a first coverlay layer located on a side of the first electromagnetic interference shielding layer away from the cover; a first conductive layer located on a side of the first coverlay layer away from the cover; a base substrate located on a side of the first conductive layer away from the cover.

20. The display device according to claim 19.

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