Method for manufacturing an optoelectronic device comprising an LED and a photodiode

Abstract

The present disclosure provides a method for manufacturing an optoelectronic device comprising an LED and a photodiode. The present disclosure relates to a method for manufacturing an optoelectronic device comprising at least one LED (L) and at least one photodiode (P). The method comprises the following successive steps: a) epitaxially forming an active semiconductor light-emitting / receiving stack (103) common to the LED and the photodiode; and b) forming trenches (120) extending vertically through the active stack (103) and laterally defining the LED (L) and the photodiode (P), the trenches being arranged such that the lateral dimensions of the LED (L) are smaller than the lateral dimensions of the photodiode (P).

Description

[Technical Field]

[0001] The present disclosure relates generally to the field of optoelectronic devices. More specifically, the present disclosure relates to packaging optoelectronic devices including at least one light emitting diode (LED) and at least one photodiode. In particular, the present disclosure relates to simultaneously packaging the active light-emitting stack of an LED and the active light-receiving stack of a photodiode, intended to operate in the same wavelength range, by a common epitaxy step. [Background technology]

[0002] For example, in the field of optical communication systems, devices have already been proposed that comprise one or more LEDs configured to emit optical signals and one or more photodiodes configured to receive and measure the signals emitted by the LEDs.

[0003] It would be desirable to be able to at least partially improve some aspects of these systems.

[0004] In particular, it would be desirable to be able to implement the active light-emitting stack of an LED and the active light-receiving stack of a photodiode simultaneously through a common epitaxy step. Summary of the Invention

[0005] To this end, one embodiment provides a method for manufacturing an optoelectronic device comprising at least one LED and at least one photodiode, the method comprising the following successive steps: a) epitaxially forming an active semiconductor light emitting / receiving stack common to the LED and the photodiode; b) forming trenches extending vertically through the active stack and laterally defining the LEDs and photodiodes; Including, The trench is positioned so that the lateral dimensions of the LED are smaller than the lateral dimensions of the photodiode.

[0006] According to one embodiment, the trench is positioned so that the lateral dimension of the LED is at least half the lateral dimension of the photodiode.

[0007] According to one embodiment, the trench is positioned so that the lateral dimensions of the LED are at least one-quarter as large as the lateral dimensions of the photodiode.

[0008] According to one embodiment, the trenches are positioned so that the lateral dimensions of the LED are less than 4 μm.

[0009] According to one embodiment, the method comprises, between steps a) and b), a step of transferring and attaching an active stack to the surface of a control integrated circuit pre-formed in and on the semiconductor substrate.

[0010] According to one embodiment, during the transferring and attaching step, the active stack is attached to said face of the control integrated circuit by molecular bonding.

[0011] According to one embodiment, at the end of the transferring and mounting steps, the active stack extends continuously over the entire surface of the control integrated circuit.

[0012] According to one embodiment, the active semiconductor stack includes one or more III-V or II-VI semiconductor alloys.

[0013] Another embodiment provides an optoelectronic device including at least one LED and at least one photodiode, the LED and the photodiode each comprising an active semiconductor light-emitting and receiving stack of the same nature and composition, and wherein the lateral dimensions of the LED are smaller than the lateral dimensions of the photodiode.

[0014] According to one embodiment, the device further comprises a control integrated circuit having the LED and photodiode mounted on one side thereof, the control integrated circuit adapted to drive the LED at a current density higher than the current density of the photodiode.

[0015] According to one embodiment, the control integrated circuit is adapted to drive the LED at a current density at least ten times higher than the current density of the photodiode.

[0016] Another embodiment provides a method for manufacturing an optoelectronic device including at least one LED and at least one photodiode, the method comprising the following steps: a) forming a semiconductor support stack comprising at least one doped semiconductor layer; b) simultaneously forming the active semiconductor light emitting stack of the LED and the active semiconductor light receiving stack of the photodiode in a co-epitaxy step; c) forming a trench extending vertically through the support stack and laterally defining at least one first support pad and at least one second support pad; Including, At the end of steps b) and c), the LED active semiconductor light emitting stack covers the first support pad and the photodiode active light receiving stack covers the second support pad; The method further includes, after step c), step d) of porosifying the doped semiconductor layer in the first support pad without porosifying the doped semiconductor layer in the second support pad, or porosifying the doped semiconductor layer in the second support pad without porosifying the doped semiconductor layer in the first support pad.

[0017] According to one embodiment, step c) of forming a trench through the support stack and step d) of porosifying the doped semiconductor layer are performed before step b) of epitaxially growing the active light-emitting semiconductor stack of the LED and the active light-receiving semiconductor stack of the photodiode, wherein in step d) the doped semiconductor layer is porosified in the second support pad but not in the first support pad.

[0018] According to one embodiment, step c) of forming a trench through the support stack is performed after step b) of epitaxially growing the light-emitting semiconductor active stack of the LED and the light-receiving semiconductor active stack of the photodiode, and in step d) the doped semiconductor layer is made porous in the first support pad but not in the second support pad.

[0019] According to one embodiment, in step d), the side of the doped semiconductor layer in the second pad is in contact with the electrolyte, while the side of the doped semiconductor layer in the first pad is protected from contact with the electrolyte by the protective layer.

[0020] According to one embodiment, in step d), the side of the doped semiconductor layer in the first pad is in contact with the electrolyte, and the side of the doped semiconductor layer in the second pad is protected from contact with the electrolyte by a protective layer.

[0021] According to one embodiment, in step d) a bias current is applied through said doped semiconductor layer.

[0022] According to one embodiment, the method includes, after steps b) and d), transferring and mounting an LED and a photodiode onto one side of a control integrated circuit pre-formed in and on the semiconductor substrate.

[0023] According to one embodiment, during the transferring and mounting step, the LEDs and photodiodes are attached to the face of the control integrated circuit by molecular bonding.

[0024] According to one embodiment, the trench is positioned so that the lateral dimensions of the LED are smaller than the lateral dimensions of the photodiode.

[0025] According to one embodiment, the active semiconductor light emitting stack of the LED and the active semiconductor light receiving stack of the photodiode comprise one or more III-V or II-VI semiconductor alloys.

[0026] Another embodiment provides an optoelectronic device comprising at least one LED comprising an active semiconductor light emitting stack and at least one photodiode comprising an active semiconductor light receiving stack, the optoelectronic device further comprising a doped semiconductor layer on an opposite side of the LED and the photodiode, the doped semiconductor layer being porous on an opposite side of the LED and non-porous on an opposite side of the photodiode, or the doped semiconductor layer being porous on an opposite side of the photodiode and non-porous on an opposite side of the LED.

[0027] According to one embodiment, the device further comprises a control integrated circuit having the LED and photodiode mounted on one side thereof, the control integrated circuit adapted to drive the LED at a current density higher than the current density of the photodiode.

[0028] According to one embodiment, the control integrated circuit is adapted to drive the LED at a current density at least ten times higher than the current density of the photodiode. [Brief explanation of the drawings]

[0029] The foregoing and other features and advantages will be explained in detail in the following description of particular embodiments, given by way of example and not limitation with reference to the accompanying drawings, in which: FIG.

[0030] [Figure 1A] 1A-1D are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a first embodiment. [Figure 1B] 1A-1D are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a first embodiment. [Figure 1C] 1A-1D are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a first embodiment. [Figure 1D] 1A-1D are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a first embodiment. [Figure 2A]5A-5C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2B] 5A-5C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2C] 5A-5C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2D] 5A-5C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2E] 5A-5C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 2F] 5A-5C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a second embodiment. [Figure 3A] 10A-10C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 3B] 10A-10C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 3C] 10A-10C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 3D] 10A-10C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 3E] 10A-10C are cross-sectional views illustrating steps in an exemplary implementation of a method for manufacturing an optoelectronic device according to a third embodiment. [Figure 4] FIG. 1 shows the response of the active light-emitting stack of an LED and the active light-receiving stack of a photodiode created by a common epitaxy step. DETAILED DESCRIPTION OF THE INVENTION

[0031] Similar features are designated by similar reference numerals in the various figures, and in particular, structural and / or functional features that are common among various embodiments may have the same reference numerals and may have identical structural, dimensional, and material characteristics.

[0032] For clarity, only operations and elements useful for understanding the embodiments described herein are shown and described in detail. In particular, the electrical connections of the described devices and the implementation of the LED and photodiode control circuits are not described in detail, as the described embodiments are compatible with conventional implementations of these elements or the implementation of these elements is within the scope of one skilled in the art from the teachings of this specification. Furthermore, applications likely to benefit from the described embodiments are not described in detail, as the described embodiments can be advantageously used in any application involving one or more LEDs and one or more photodiodes intended to operate in the same wavelength range, e.g., visible, ultraviolet, or near-infrared wavelength ranges.

[0033] Unless otherwise specified, when referring to two elements connected to each other, this means a direct connection without any intermediate elements other than conductors, and when referring to two elements coupled to each other, this means that the two elements may be connected or that the two elements may be coupled via one or more other elements.

[0034] In the following disclosure, unless otherwise specified, references to absolute position modifiers such as terms such as "front," "back," "top," "bottom," "left," "right," etc., or relative position modifiers such as terms such as "above," "below," "higher," "lower," etc., or orientation modifiers such as "horizontal," "vertical," etc., refer to the orientation as shown in the drawings.

[0035] Unless otherwise specified, the terms "about," "approximately," "substantially," and "on the order of" mean within 10%, preferably within 5%.

[0036] According to one aspect of the described embodiments, there is provided a method for manufacturing an optoelectronic device in which the active light emitting stack of an LED and the active photosensitive stack of a photodiode are implemented simultaneously in a single epitaxy step.

[0037] One advantage is reduced costs compared to methods that involve separate specific epitaxy steps to successively create the active light-emitting stack of the LED and the active light-receiving stack of the photodiode.

[0038] The LED and photodiode can be monolithically integrated on a single optoelectronic chip, or can be separated by cutting at the end of the integration process, integrated on separate chips, and assembled into the same optoelectronic device.

[0039] The active light-emitting stack of the LED and the active light-receiving stack of the photodiode may, for example, be an inorganic semiconductor stack, such as one based on III-V semiconductor materials, such as III-nitrides, e.g., gallium, aluminum, indium, or alloys based on one or more of these materials. Alternatively, the active light-emitting stack of the LED and the active light-receiving stack of the photodiode may be based on II-VI semiconductor materials, such as ZnCdSe (zinc-cadmium-selenium).

[0040] The same gallium nitride-based active stack can be used, for example, as the active stack of an LED when emitting light, or as the active stack of a photodiode when receiving light, which has a very low dark current and a narrow optical bandwidth when receiving light, making it possible to obtain a very good signal-to-noise ratio.

[0041] However, one challenge is that the optimum emission wavelength (emission peak) of an LED, compared to the optimum absorption wavelength (absorption peak) of a photodiode, is shifted upward by several tens of nanometers, typically about 20 nm, for example in gallium nitride (GaN)-based active stacks based on indium gallium nitride (InGaN). This is known as the Stokes shift and is caused in particular by the binding energy of electron-hole pairs. This affects the sensitivity of the photodiode in the LED emission wavelength range and therefore the efficiency of the LED-photodiode system.

[0042] This phenomenon is particularly illustrated in FIG.

[0043] FIG. 4 shows the evolution of the quantum efficiency Q in receiving (curve 401) and emitting (curve 403) light of an active stack of a diode based on gallium nitride (GaN), for example based on indium gallium nitride (InGaN), as a function of wavelength W (x-axis).

[0044] According to one aspect of the first embodiment, an active semiconductor stack common to the LED and photodiode is formed by epitaxy, followed by forming a trench extending vertically through the active stack and laterally defining the LED and photodiode. According to the first embodiment, the lateral dimensions of the LED are smaller than those of the photodiode. This allows mechanical stress in the LED's active stack to be significantly reduced compared to that in the photodiode's active stack. This reduces the internal electric field in the LED's active stack compared to that in the photodiode's active stack. This reduction in the internal electric field in the LED's active stack results in a downward shift of the LED's emission peak (a so-called blue shift). This at least partially compensates for the Stokes shift between the emission and absorption peaks of the active stack. This brings the LED's emission peak closer to the absorption peak of the photodiode, improving system efficiency.

[0045] 1A to 1D are cross-sectional views that schematically illustrate steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to a first embodiment.

[0046] FIG. 1A shows a structure including an active semiconductor light-emitting / receiving stack 103 disposed on top of a supporting substrate 101 .

[0047] The active stack 103 comprises, for example, a semiconductor layer 103a doped with a first conductivity type, for example N-type, covering the top surface of the substrate 101, an active layer 103b covering the side of layer 103a opposite to the substrate 101, i.e., the top surface of layer 103a in the orientation shown in Figure 1A, and a semiconductor layer 103c doped with a second conductivity type, for example P-type, covering the side of layer 103b opposite to layer 103a, i.e., the top surface of layer 103b in the orientation shown in Figure 1A. By way of example, layer 103b contacts the top surface of layer 103a via its bottom surface and contacts the bottom surface of layer 103c via its top surface.

[0048] For example, layers 103a, 103b, and 103c of active stack 103 each extend continuously and with a substantially uniform thickness across the entire surface of substrate 101.

[0049] The layers 103a, 103b and 103c are formed successively on the upper surface of the support substrate 101, for example by epitaxy.

[0050] By way of example, the support substrate 101 is made of sapphire or silicon. The semiconductor layers 103a and 103c of the active stack 103 are made of, for example, gallium nitride. For example, the active layer 103b comprises a stack of layers each forming a quantum well, for example based on indium gallium nitride (InGaN).

[0051] A buffer layer, not shown, may form an interface between the top surface of substrate 101 and the bottom surface of underlayer 103a.

[0052] 1A further illustrates the step of depositing a metal layer 105 on the top surface of the active stack 103. In the illustrated example, layer 105 extends continuously and with a substantially uniform thickness across the entire top surface of the active stack 103. By way of example, layer 105 contacts, via its bottom surface, the top surface of the top layer 103c of the active stack.

[0053] 1B shows a schematic representation of an integrated control circuit 110 pre-formed in and on a semiconductor substrate 111, for example a silicon substrate. In this example, the control circuit 110 comprises, on its top side, metal connection pads 113L intended for connection to one of the electrodes (anode or cathode) of each of the LEDs of the device in order to be able to control the current through the LED and / or apply a voltage across the terminals of the LED. In this example, the control circuit 110 further comprises, on its top side, metal connection pads 113P intended for connection to one of the electrodes (anode or cathode) of each of the photodiodes of the device in order to be able to read an electrical signal representative of the intensity of the optical radiation received by the photodiode in its wavelength range of sensitivity.

[0054] The control circuitry comprises, for example, for each LED connected to the metal pad 113L dedicated to the LED, a basic control cell comprising one or more transistors that allows the current through the LED and / or the voltage applied across the terminals of the LED to be controlled, and for each photodiode connected to the metal pad 113P dedicated to the photodiode, a basic sensing cell comprising one or more transistors that allows an electrical signal representative of the intensity of the optical radiation received by the photodiode in its sensitivity wavelength range to be read. The readout circuitry comprises, for example, a transimpedance amplifier used to amplify the photodiode current.

[0055] The control circuit 110 is based, for example, on CMOS technology. The metal pads 113L, 113P can be laterally surrounded by an insulating material 114, for example silicon oxide, so that the control circuit 110 has a substantially flat top surface comprising alternating metal regions 113 and insulating regions 114. Contact to the electrodes of the LEDs or photodiodes not connected to the pads 113L, 113P can be made via one or more connection pads (not visible in the figure) of the control circuit 110, for example collectively in the peripheral area of ​​the control circuit 110. By way of example, the control circuit 110 comprises, on the side of the top surface of the substrate 111, a stack of insulating and conductive levels forming an interconnect network 112 comprising, in particular, the connection pads 113L, 113P, the top surface of which defines the top surface of the circuit 110.

[0056] 1B further illustrates the step of depositing a metal layer 115 deposited on the top surface of control integrated circuit 110. In the illustrated example, layer 115 extends continuously and with a substantially uniform thickness across the entire top surface of circuit 110. By way of example, layer 115 contacts the top surface of interconnect network 112 of control circuit 110 via its bottom surface.

[0057] For example, layer 115 is made of the same material as layer 105. By way of example, layers 105 and 115 each include a top layer called a bonding layer. The bonding layers of layers 105 and 115 are preferably made of the same material, for example titanium.

[0058] 1C shows the structure obtained at the end of the step of transferring the active stack 103 of LEDs and photodiodes onto the top surface of the control circuit 110. For this purpose, the structure shown in FIG. 1A can be turned upside down and then transferred to the structure shown in FIG. 1B so that the side of the metal layer 105 facing away from the substrate 101 (i.e., its bottom side in the orientation shown in FIG. 1C, which corresponds to its top side in the orientation shown in FIG. 1A) is in contact with the side of the metal layer 115 facing away from the substrate 111 (i.e., its top side in the orientation shown in FIGS. 1B and 1C). During this step, the active stack 103 is bonded to the control circuit 110. By way of example, the attachment of the active stack 103 to the control circuit 110 can be obtained by molecular bonding between the two surfaces brought into contact. Alternatively, the attachment of the two surfaces can be achieved by thermocompression bonding, eutectic bonding, or any other suitable bonding method.

[0059] Once bonding is complete, the support substrate 101 is removed to expose the top surface (in the orientation shown in FIG. 1C ) of the semiconductor layer 103c of the active stack 103. The substrate 101 is removed, for example, by grinding and / or etching from the side of the substrate 101 opposite the active stack 103. Alternatively, in the case of a transparent substrate 101, such as a sapphire substrate, the substrate 101 can be detached from the active stack 103 by a laser beam projected through the substrate 101 from the side of the substrate 101 opposite the active stack 103 (laser lift-off method). More generally, any other method that allows the substrate 101 to be removed can be used. After the substrate is removed, an additional etching step can be performed to remove the buffer layer remaining on the top side of the semiconductor layer 103c. Furthermore, part of the thickness of the layer 103c can be removed, for example, by etching. At the end of this step, the active stack 103 covers substantially the entire surface of the control circuit 110 without discontinuities. By way of example, at the end of the step shown in FIG. 1D, the thickness of the active stack 103 is 0.5-2 μm.

[0060] At the end of this step, the mechanical stress of the epitaxially grown active stack 103 is partially transferred to the substrate 111 of the control circuit 110 .

[0061] 1C , during which trenches 120 are formed in the active stack 103 from its top surface, for example by lithography followed by etching, to define one or more LEDs L and one or more photodiodes P, each corresponding to an island- or mesa-shaped portion of the active stack 103. In the illustrated example, the trenches 120 extend vertically across the entire height of the active stack 103 and open to the top surface of the metal layer 105. The trenches 120 can be aligned with pre-formed marks on the control circuit 110. In the illustrated example, each LED L is located opposite a single metal pad 113L on the control circuit 110 in vertical projection, and each photodiode P is located opposite a single metal pad 113P on the control circuit 110 in vertical projection. By way of example, each LED L and each photodiode P has a substantially square or rectangular shape in plan view. For example, when viewed from above, the trenches 120 form a grid or grid pattern that laterally separates the LEDs L and photodiodes P of the device from each other.

[0062] Trenches can then be extended through the metal layers 105 and 115 to individualize the electrical connections on the lower semiconductor layer 103c of the active stack 103 of each LED L and each photodiode P. Subsequent steps can then be performed to reestablish individual or common electrical contacts on the upper semiconductor layer 103a of the active stack 103 of each LED L and each photodiode P. These steps are not described in detail and are within the scope of those skilled in the art from the instructions herein. By way of example, these steps are similar to those described in patent application WO 2017194845 or patent application WO 2019092357 previously filed by the applicant.

[0063] During the step of etching the active stack 103 shown in FIG. 1D , further relaxation of the mechanical stress present in the epitaxially grown active stack 103 occurs through the edges of the etched islands or mesas. This relaxation depends on the size of the islands or mesas. In particular, islands or mesas with small dimensions exhibit high stress relaxation, while islands or mesas with larger dimensions retain relatively high mechanical stress. The relaxation may further depend on the nature of the substrate, which may include, for example, a stack of gallium nitride layers on a silicon layer, a stack of gallium nitride layers on a sapphire layer, or a stack of porous gallium nitride layers on a silicon layer.

[0064] According to one aspect of the first embodiment, the following is defined: LEDs L with relatively small lateral dimensions so as to obtain a significant relaxation of the mechanical stresses in the active stack 103 and, as a result, a relatively large downward shift of the emission peak; and a photodiode P with relatively large lateral dimensions so that there is less relaxation of the mechanical stresses in the active stack 103 and, as a result, a relatively low downward shift of the absorption peak is achieved.

[0065] This makes it possible to at least partially compensate for the Stokes shift that inevitably exists between the emission and absorption peaks of the active stack 103 .

[0066] By way of example, the islands or mesas forming the LEDs L have lateral dimensions of 5 μm or less, e.g., 4 μm or less, e.g., 2 μm or less, which allows for near-complete relaxation of the active stack during etching of the LEDs. Correspondingly, the islands or mesas forming the photodiodes P have lateral dimensions larger than the lateral dimensions of the LEDs, e.g., at least twice the lateral dimensions of the LEDs, e.g., at least four times the lateral dimensions of the LEDs, in order to maintain relatively high mechanical stresses within the active stack 103 of the photodiodes P.

[0067] As a non-limiting example, for a square LED L with a GaN-based active stack and sides of about 1 μm, and a photodiode P with sides of 8-10 μm, alignment of the emission peak of the LED L with the absorption peak of the photodiode P is observed.

[0068] The described embodiments are not limited to the example arrangement of LEDs L and photodiodes P shown in FIG. 1D . For example, the device may include a plurality of LEDs L arranged in a matrix, e.g., according to rows and columns, with, e.g., the same (excluding manufacturing variations) and, e.g., a constant inter-LED pitch, in a first portion of the surface of the integrated control circuit 110. The device may further include a plurality of photodiodes P arranged in a matrix, e.g., according to rows and columns, with, e.g., the same (excluding manufacturing variations) and, e.g., a constant inter-photodiode pitch, in a second portion of the surface of the integrated control circuit 110. The inter-LED pitch in the first region is, for example, the same as the inter-photodiode pitch in the second region. Meanwhile, the lateral dimensions of the LEDs in the first region are smaller than the lateral dimensions of the photodiodes in the second region.

[0069] In addition to the different sizes of the LED L and the photodiode P, another parameter that allows the wavelength shift between the LED emission peak and the photodiode absorption peak to be reduced is the charge carrier density in the active stack, in particular in the quantum wells of the active layer 103b. More specifically, a high carrier density leads to shielding of the electric field present in the active stack, which results in a downward shift in the optimal operating wavelength of the active stack.

[0070] Thus, advantageously, the control circuit 110 is configured to drive the LED L at a higher voltage than the photodiode P. This results in a higher carrier density in the LED L than in the photodiode P, thereby reducing the shift between the emission peak of the LED L and the absorption peak of the photodiode P. By way of example, the drive voltage is selected so that the carrier density in the LED L is at least twice as high as the carrier density in the photodiode P, for example at least five times or even ten times as high.

[0071] The value of the wavelength shift associated with an increase in current density in an LED depends on the structure of the active stack, in particular the width of the quantum wells in the active layer 103b. In particular, the wider the well, the greater the electric field screening associated with an increase in carrier density, and consequently the greater the downward shift of the LED's optimum emission wavelength associated with an increase in carrier density. On the other hand, increasing the well width means a longer radiative recombination time, which may be disadvantageous for communication applications requiring short recombination times. Those skilled in the art can select an appropriate compromise depending on the needs of the application. As an illustrative, non-limiting example, for an LED including a 4 nm thick InGaN quantum well with an indium content of 14.3%, a wavelength shift of 100 A / cm 2 When driving an LED at a current density of about 10A / cm 2 This results in a blue shift of the emission peak of approximately 6 nm compared to when the same LED is driven at a current density of about 1000 uV.

[0072] To fully compensate for the Stokes shift, one can combine the aforementioned mechanical relaxation effect, for example, by using a smaller LED than the photodiode, with the effect of field screening by carriers, by using a higher current density in the LED than in the photodiode. As an illustrative, non-limiting example, for a gallium nitride-based LED containing InGaN quantum wells, a current density of 200 A / cm 2 A 4 μm wide LED driven at a current density of about 10 A / cm 2 There is a wavelength shift of the emission peak of about 30 nm between 25 μm-wide LEDs of the same type driven at current densities of about 1000 Å. Of this 30 nm shift, about 20 nm is due to size differences, and the remainder (about 10 nm) is due to current density differences. This shift is typically on the same order of magnitude as the Stokes shift between light emission and reception in the active stack.

[0073] It should be noted that compensation due to the carrier density difference between the LED and the photodiode can be achieved in a device having an LED L with the same lateral dimensions as the photodiode P, or even in a device having an LED L with lateral dimensions larger than the lateral dimensions of the photodiode P.

[0074] According to one second embodiment, prior to the co-epitaxy step in which the active light-emitting and light-receiving stacks are simultaneously formed, a support layer of semiconductor material is locally porosified on the side opposite the device's photodiode (on which the active stack is epitaxially grown). This results in a relaxation of mechanical stresses within the active stack of the photodiode during epitaxy, particularly during the formation of the stack's active layer 103b. This relaxation leads to a difference in the proportion of semiconductor alloy species forming the active layer 103b between the photodiode and the LED. In particular, when the active layer comprises InGaN quantum wells, this results in a higher indium incorporation in the photodiode quantum wells than in the LED quantum wells. This leads to a red-shift, i.e., an upward shift, of the photodiode's absorption peak, thereby at least partially compensating for the Stokes shift between the emission and absorption peaks of the active stack.

[0075] 2A to 2F are cross-sectional views that schematically illustrate steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to the second embodiment.

[0076] 2A shows a structure including a semiconductor support stack 210 on one side of a support substrate 101. The support substrate 101 may be, for example, the same as or similar to that described above. The semiconductor support stack 210 may be made of, for example, a III-V semiconductor material such as gallium nitride. The semiconductor support stack 210 comprises at least one doped semiconductor layer 210b having a doping level selected to allow the layer 210b to be made porous during a subsequent electrolytic porosification step. By way of example, the layer 210b is N-type doped. For example, the layer 210b may be 10 19 ~1.5×10 19 atoms / cm3 The GaN substrate is made of N-type doped gallium nitride with a doping level of 0.01%.

[0077] In the illustrated example, the support stack 210 further comprises a semiconductor layer 210a on, for example in contact with, the bottom surface of the layer 210b. The layer 210a is, for example, made of the same material as the layer 210b but has a lower doping level than the doping level of the layer 210b, for example, at least 10 times lower than the doping level of the layer 210b. Alternatively, the layer 210a is made of a different material than the layer 210b.

[0078] In the illustrated example, the support stack 210 further comprises a semiconductor layer 210c on the top surface of the layer 210b, e.g., in contact with the top surface of the layer 210b. The layer 210c is, for example, made of the same material as the layer 210b, but has a lower doping level than the layer 210b, e.g., at least 10 times lower, preferably at least 100 times lower than the layer 210b. Alternatively, the layer 210c is made of a different material than the layer 210b.

[0079] Layers 210a, 210b, and 210c of support stack 210 each extend, for example, continuously across the entire surface of substrate 101 and with a substantially uniform thickness.

[0080] The layers 210a, 210b, and 210c are formed successively on the top surface of the support substrate 101, for example by epitaxy.

[0081] By way of example, the support substrate 101 is made of sapphire or silicon. A buffer layer, not shown, may optionally form an interface between the top surface of the substrate 101 and the bottom surface of the lower layer 210a of the support stack 210.

[0082] 2B shows the step of forming trenches 220 in support stack 210 from its top surface, for example by lithography followed by etching, so as to define a plurality of island- or mesa-shaped support pads SL and SP within stack 210. Each support pad SL is intended to receive an LED L of a device on its top surface, and each support pad SP is intended to receive a photodiode P of a device on its top surface.

[0083] In the illustrated example, trench 220 extends vertically from the top surface of the stack, passing completely through layers 210c and 210b, and opening into layer 210a without passing completely through layer 210a. Alternatively, trench 220 passes completely through layer 210.

[0084] For example, when viewed from above, the trenches 220 form a grid or grid pattern that laterally separates from each other the support pads SL and SP intended to receive the LEDs L and photodiodes P of the device.

[0085] For example, the support pads SP and SL all have the same lateral dimensions, for example 1 μm to 25 μm, for example 2 μm to 8 μm.For example, when viewed from above, the support pads SP and SL have a square or rectangular shape.

[0086] At this point, at each support pad SL and SP, the side surface of the doped semiconductor layer 210b of the support stack is exposed.

[0087] 2C shows the structure obtained at the end of the step of selectively porosifying the layer 210b located only in the support pads SP of the device's photodiodes P. During this step, the layer 210b of the support pads SP is made porous by electrolytic etching or electrolytic porosification, while the layer 210b of the support pads SL remains non-porous.

[0088] For this purpose, the side surfaces of the support pads can be pre-coated with a protective layer (not visible in the figures) made of an insulating material, for example silicon oxide or silicon nitride, which is, for example, first deposited over the entire top surface and then locally removed, for example by photolithography and etching, so as to expose the side surfaces of the support pads SP without exposing the side surfaces of the support pads SL.

[0089] The structure can then be immersed in an electrolytic bath (not visible), for example an oxalic acid based solution such as an aqueous solution of oxalic acid.

[0090] A bias voltage is then applied to cause current to flow through doped semiconductor layer 210b. By way of example, the voltage is applied between a first electrode (not visible) connected to layer 210a and an electrolyte (not visible) connected by the wafer to layer 210c.

[0091] Under the influence of a bias current, the parts of layer 210b that are in contact with the electrolyte through their sides, i.e., the parts of layer 210b that are included in the support pads SP of the photodiodes P of the device, become porous, while the parts of layer 210b that are protected from contact with the electrolyte, i.e., the parts of layer 210b that are included in the support pads SL of the LEDs L of the device, remain intact (non-porous).

[0092] It should be noted that in this example, the doping levels of layers 210a, 210b and 210c of the support stack are selected such that only layer 210b is porosified during the electrolytic porosification step.

[0093] At the end of this step, the protective layer covering the sides of the support pads SL can be removed.

[0094] 2D shows the structure obtained at the end of a common epitaxy step in which an active semiconductor stack 103 is formed on each support pad SL and each support pad SP, for example in openings previously etched in a dielectric layer, not shown.

[0095] On each support pad SL and SP, for example, active stack 103 covers the entire top surface of the pad. The portion of active stack 103 covering each SL pad defines the LED of the device. The portion of active stack 103 covering each SP pad defines the photodiode of the device.

[0096] On each support pad SP and SL, the active stack 103 comprises, starting from the top surface of the pad, a semiconductor layer 103a, a semiconductor layer 103b, and a semiconductor layer 103c, which are identical or similar to those described above in relation to Figures 1A to 1D, for example. The layers 103a, 103b, and 103c are formed successively, for example by epitaxy, from the top surface of the pad SP and SL. By way of example, in each pad SP and SL, the lower semiconductor layer 103a of the active stack 103 is in contact with the top surface of layer 210c via its bottom surface.

[0097] The presence of the porous layer 210b in the support pad SP results in greater mechanical relaxation in the active stack of the photodiode P than in the active stack of the LED L. This leads to different species being incorporated during epitaxy in the active layers 103b of the active stacks of the LED L and the photodiode P. In particular, for an InGaN-based active layer 103b, this leads to a higher indium incorporation in the active layer 103b of the photodiode P than in the active layer 103b of the LED L. Thus, the presence of the porous layer 210b in the support pad SP of the photodiode P shifts the wavelength of the absorption peak of the photodiode P upwards (towards red), and thus closer to the emission peak of the LED L.

[0098] FIG. 2E shows the structure obtained at the end of the steps of forming, on each LED L, a contact metallization 232L in top contact with the top surface of the top semiconductor layer 103c of the LED's active stack 103, and forming, on each photodiode P, a contact metallization 232P in top contact with the top surface of the top semiconductor layer 103c of the photodiode's active stack 103.

[0099] FIG. 2E further illustrates filling the trench 220 and the space between the LED L and the photodiode P with an electrically insulating material 234, for example silicon oxide.

[0100] After filling, a planarization step, for example by chemical mechanical polishing (CMP), can be performed so that the contact metallization 232L, 232P is flush with the top surface of the fill material 234.

[0101] FIG. 2F illustrates steps for transferring and attaching the structure shown in FIG. 2E to a control integrated circuit 110, for example similar to that shown in FIG. 1B.

[0102] During this step, the contact metallizations 232L, 232P of the structure shown in FIG. 2E contact, with their faces facing away from the support substrate 101, the faces of the contact metallizations 113L, 113P of the control circuit 110 facing away from the substrate 111.

[0103] By way of example, the structure shown in FIG. 2E is attached and electrically connected to the control integrated circuit 110 by molecular bonding, for example by hybrid metal-metal / oxide-oxide bonding.

[0104] Once the two structures are assembled, the support substrate 101 of the structure shown in Figure 2E can be removed. Additionally, all or part of the semiconductor support stack 210 can be removed, for example, by grinding or etching.

[0105] In the illustrated example, layer 210a of support stack 210 is completely removed, while layers 210b and 210c are retained, although the described embodiments are not limited to this example.

[0106] Subsequent steps can then be performed to make individual or common electrical contacts on the top semiconductor layer 103a of the active stack 103 of each LED L and each photodiode P. For example, a layer of a transparent conductive material such as a transparent conductive oxide, e.g., indium tin oxide (ITO), is deposited on and in contact with the top surface of the structure shown in Figure 2F. These steps will not be described in detail and are within the purview of those skilled in the art from the teachings herein.

[0107] Similar to that described above, the control circuitry can optionally be configured to drive the LED and photodiode at a carrier density adapted to reduce the shift between the emission peak of the LED and the absorption peak of the photodiode.

[0108] According to one aspect of the third embodiment, the support pads SP and SL are formed in a manner similar to that described above with reference to FIGS. 2A through 2F , but the layer 210b of the support pads is selectively made porous only after the co-epitaxy step in which the active stacks 103 of the LED L and photodiode P are simultaneously formed. In this third embodiment, the layer 210b is made porous near the LED L and remains intact (non-porous) near the photodiode P. This results in at least partial relaxation of mechanical stress in the active stack of the LED L without applying this relaxation to the photodiode P. This reduces the internal electric field in the active stack of the LED compared to the active stack of the photodiode. This reduction in the internal electric field in the active stack of the LED leads to a downward shift of the LED's emission peak. Again, this at least partially compensates for the Stokes shift between the emission and absorption peaks of the active stack. This brings the LED's emission peak closer to the absorption peak of the photodiode, improving system efficiency.

[0109] 3A to 3E are cross-sectional views that schematically illustrate steps in an exemplary embodiment of a method for manufacturing an optoelectronic device according to the third embodiment.

[0110] Figure 3A shows a structure including a semiconductor support stack 210 on one side of a support substrate 101. The support stack 210 and support substrate 101 may be the same as or similar to those described above in connection with Figure 2A, for example.

[0111] 3A further illustrates the step of forming an active stack 103 for the LEDs and photodiodes on the top surface of the semiconductor support stack 210. The active stack 103 may be, for example, the same as or similar to that described above, particularly with reference to FIG. 1A. Layers 103a, 103b, and 103c are formed successively, for example, by epitaxy, from the top surface of the support stack 210. By way of example, the lower semiconductor layer 103a of the active stack 103 is in contact with the top surface of layer 210c through its bottom surface.

[0112] At this point, the layers of support stack 210 and active stack 103 each extend continuously and with uniform thickness across the entire surface of support substrate 101 .

[0113] FIG. 3B shows a step of forming trenches 320, for example by lithography and etching, from the top surface of the active stack 103 into the active stack 103 and into the support stack 210, so as to define a plurality of island- or mesa-shaped support pads SL and SP in the stack 210, each support pad SL being covered on its top surface by a portion of the active stack 103 that defines an LED L of the device, and each support pad SP being covered on its top surface by a portion of the active stack 103 that defines a photodiode P of the device.

[0114] In the illustrated example, trench 320 extends vertically from the top surface of active stack 103, passing completely through layers 103c, 103b, 103a, 210c, and 210b, and opening into layer 210a without passing completely through layer 210a. Alternatively, trench 220 passes completely through layer 210.

[0115] For example, when viewed from above, the trenches 320 form a grid or grid pattern that laterally separates the LEDs L and photodiodes P from the support pads SL and SP.

[0116] The LED L and photodiode P, and the underlying support pads SP and SL, for example, all have the same lateral dimensions, for example, 1 μm to 25 μm, for example, 2 μm to 8 μm. By way of example, the LED L and photodiode P, and the support pads SP and SL, have a square or rectangular shape in plan view. More generally, the LED L and photodiode P can have any shape, for example, a circle or a hexagon.

[0117] At this point, at each support pad SL and SP, the side surface of the doped semiconductor layer 210b of the support stack is exposed.

[0118] Figure 3C shows the structure obtained at the end of the step of selectively porousifying layer 210b located only in the support pads SL of the device's LEDs L. This step is similar to that described above in connection with Figure 2C, except that in the example of Figure 3C, layer 210b of support pads SL has been porousified, while layer 210b of support pads SP remains intact (non-porous).

[0119] For this purpose, during the electrolytic porosification step, the sides of the support pad SP can be protected from contact with the electrolyte by a protective layer (not visible in the figure), while the sides of the support pad SL are in contact with the electrolyte.

[0120] In the example shown in FIG. 3C, the bias voltage used to force current through layer 210b is applied, for example, between a first electrode (not visible) connected to layer 210a and an electrolyte (not visible) connected by an edge to layer 103c.

[0121] As a result of the porosification of layer 210b in the support pad SL, the mechanical relaxation is greater in the active stack of the LED L than in the active stack of the photodiode P. This causes the emission peak of the LED to shift downwards, thus closer to the absorption peak of the photodiode P.

[0122] FIG. 3D shows the structure obtained at the end of steps similar to those described above in connection with FIG. 2E, in which a contact metallization 232L is formed on each LED L in top contact with the top surface of the top semiconductor layer 103c of the LED's active stack 103, and a contact metallization 232P is formed on each photodiode P in top contact with the top surface of the top semiconductor layer 103c of the photodiode's active stack 103.

[0123] FIG. 2E further illustrates filling the trench 320 and the space between the LED L and the photodiode P with an electrically insulating material 234, for example silicon oxide.

[0124] After filling, a planarization step, for example by chemical mechanical polishing (CMP), can be performed so that the contact metallization 232L, 232P is flush with the top surface of the fill material 234.

[0125] FIG. 3E illustrates steps similar to those described above in connection with FIG. 2F, in which the structure of FIG. 3D is transferred and mounted onto control integrated circuit 110, support substrate 101 is removed, and optionally, all or part of semiconductor support stack 210 is removed.

[0126] Similar to those described above, subsequent steps can then be performed to make individual or common electrical contacts on the top semiconductor layer 103a of the active stack 103 of each LED L and each photodiode P.

[0127] Similar to that described above, the control circuitry can optionally be configured to drive the LED and photodiode at a carrier density adapted to reduce the shift between the emission peak of the LED and the absorption peak of the photodiode.

[0128] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these embodiments can be combined, and other variations will readily occur to those skilled in the art. In particular, the described embodiments are not limited to the exemplary materials and dimensions mentioned herein.

[0129] Furthermore, although example embodiments have been described above in which the LED and photodiode active stack 103 is attached to the control integrated circuit by a direct full-plate metal-to-metal bond or a direct hybrid metal-to-metal / dielectric-to-electric bond, the described embodiments are not limited to these specific examples. More generally, the LED and photodiode active stack 103 can be attached to the control integrated circuit by any other means, for example, by a full-plate direct oxide-to-oxide bond.

[0130] It should also be noted that the first and third embodiments can be combined.

[0131] Finally, the actual implementation of the embodiments and variations described herein is within the capabilities of those skilled in the art based on the functional descriptions provided above.

[0132] This application claims priority from French Patent Application No. 2212871, filed December 7, 2022, entitled "Procede de fabrication d'un dispositif optoelectronique comprenant une LED et une photodiode", which is hereby deemed an integral part of this specification within the scope of law.

Claims

1. A method for manufacturing an optoelectronic device comprising at least one LED (L) and at least one photodiode (P), comprising the following successive steps: a) epitaxially forming an active semiconductor light emitting / receiving stack (103) common to the LED and the photodiode; b) forming trenches (120) extending vertically through the active stack (103) and laterally defining the LEDs (L) and the photodiodes (P); Including, The method wherein the trench is positioned such that the lateral dimensions of the LED (L) are smaller than the lateral dimensions of the photodiode (P).

2. 2. The method of claim 1, wherein the trench (120) is positioned such that the lateral dimension of the LED (L) is at least half of the lateral dimension of the photodiode (P).

3. 3. The method of claim 1, wherein the trenches (120) are arranged such that the lateral dimensions of the LEDs (L) are at least a quarter of the lateral dimensions of the photodiodes (P).

4. 4. The method of claim 1, wherein the trenches (120) are arranged such that the lateral dimensions of the LEDs (L) are less than 4 μm.

5. 5. The method according to claim 1, further comprising, between steps a) and b), transferring and attaching said active stack (103) to a surface of a control integrated circuit (110) pre-formed in and on a semiconductor substrate (101).

6. 6. The method of claim 5, wherein during the transferring and attaching step, the active stack (103) is attached to the face of the control integrated circuit (110) by molecular bonding.

7. 7. The method of claim 5 or 6, wherein at the end of the transferring and mounting step, the active stack (103) extends continuously over the entire surface of the control integrated circuit (110).

8. The method of any one of claims 1 to 7, wherein the active semiconductor stack (103) comprises one or more III-V or II-VI semiconductor alloys.

9. An optoelectronic device comprising at least one LED (L) and at least one photodiode (P), each having an active semiconductor light-emitting / receiving stack (103) of the same nature and composition, wherein the lateral dimensions of the LED (L) are smaller than the lateral dimensions of the photodiode (P).

10. 10. The device of claim 9, further comprising a control integrated circuit (110) having the LED (L) and the photodiode (P) mounted on one side thereof, the control integrated circuit (110) adapted to drive the LED at a current density higher than the current density of the photodiode (P).

11. 11. The device of claim 10, wherein the control integrated circuit (110) is adapted to drive the LED (L) with a current density at least 10 times higher than the current density of the photodiode (P).

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