Method for blocking dielectric surfaces using blocking molecules to enable selective epi-deposition

Abstract

Implementations described herein generally relate to processes for the fabrication of semiconductor devices in which a molecular blocking layer is used to achieve selective epitaxial deposition. In one implementation, a method for processing a mixed-surface substrate including an exposed dielectric material and an exposed silicon-based material is provided. The method includes depositing a blocking layer on the exposed dielectric material and epitaxially and selectively depositing a silicon-containing material layer on the exposed silicon-based material at a temperature of 400 degrees Celsius or greater. The method further includes removing the blocking layer from the dielectric material.

Description

[Technical Field]

[0001] SUMMARY OF THE INVENTION Embodiments of the present disclosure generally relate to processes for the manufacture of semiconductor devices in which a blocking layer of blocking molecules is used to achieve selective epitaxial deposition. [Background technology]

[0002] A common technological advancement in today's electronics is miniaturization. As electronics technology develops and advances, transistors and interconnects become smaller and smaller. This miniaturization allows for the production of higher circuit densities on semiconductor silicon wafers. Circuit miniaturization has further led to lateral improvements, including reduced cost and power consumption, and increased speed. To continue the miniaturization of transistors and to provide higher performance, lower power consumption devices, new architectures and production techniques will need to be developed.

[0003] One miniaturization technique for reducing semiconductor surface area involves adding vertical layers. Each layer must be highly uniform, extremely smooth, and have sufficient adhesion to adjacent layers. Production techniques for stacked electronics become increasingly challenging as the number of layers increases, which creates increased complexity during subsequent processing steps. Stacking multiple layers often requires selective epitaxial deposition, where deposition on dielectric surfaces must be reduced or prevented. Blocking layers may be employed to enable selective deposition; however, the blocking layer must be able to withstand the deposition process conditions. Some epitaxial deposition processes require relatively high temperatures, including temperatures ranging from 400 to 650 degrees Celsius. Therefore, there is a need in the semiconductor industry for selective epitaxial process blocking chemistries that can withstand higher temperatures. Summary of the Invention

[0004]

[0003] Implementations described herein generally relate to processes for manufacturing semiconductor devices in which a blocking layer is selectively applied over a substrate and used to guide selective epitaxial deposition. In one implementation, a method for selectively and epitaxially depositing a silicon-containing material layer on a substrate is provided. The method includes providing a substrate including an exposed dielectric material and an exposed silicon-based material, depositing a blocking layer on the exposed dielectric material, epitaxially and selectively depositing a silicon-containing material layer on the exposed silicon-based material, and removing the blocking layer from the exposed dielectric material.

[0005] In another implementation, a method for selectively and epitaxially depositing a silicon-containing material layer on a substrate is provided, the method including exposing a substrate including exposed dielectric material and exposed silicon-based material to a pre-cleaning process, depositing a blocking layer on the exposed dielectric material, epitaxially and selectively depositing a silicon-containing material layer on the exposed silicon-based material, and removing the blocking layer from the exposed dielectric material.

[0006] In yet another implementation, a method for selectively and epitaxially depositing a silicon-containing material layer on a substrate is provided, the method including exposing a substrate including exposed dielectric material and exposed silicon-based material to a plasma pre-cleaning process and depositing a blocking layer on the exposed dielectric material, the blocking layer having a chemical formula I: X z -Si-Y (4-z) I where X is a substituted or unsubstituted alkyl having 1 to 30 carbon atoms, a substituted or unsubstituted aryl having 1 to 30 carbon atoms, or a substituted or unsubstituted aralkyl having 1 to 30 carbon atoms, Y is a halide, alkyl, or alkoxy, and z is an integer from 1 to 3. The method further includes epitaxially and selectively depositing a silicon-containing material layer on the exposed silicon-based material at a temperature of 400 degrees Celsius or greater, and removing the blocking layer from the exposed dielectric material.

[0007] Thus, the manner in which the above-mentioned features of the present disclosure may be understood in detail, a more particular description of the present disclosure, the foregoing briefly summarized, can be had by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that, since the present disclosure may admit of other equally effective embodiments, the accompanying drawings illustrate only exemplary embodiments of the present disclosure and therefore should not be considered as limiting its scope. [Brief explanation of the drawings]

[0008] [Figure 1A] 1 is a cross-sectional schematic view of a workpiece processed according to implementations described herein. [Figure 1B] 1 is a cross-sectional schematic view of a workpiece processed according to implementations described herein. [Figure 1C] 1 is a cross-sectional schematic view of a workpiece processed according to implementations described herein. [Figure 1D] 1 is a cross-sectional schematic view of a workpiece processed according to implementations described herein. [Figure 1E] 1 is a cross-sectional schematic view of a workpiece processed according to implementations described herein. [Figure 1F] 1 is a cross-sectional schematic view of a workpiece processed according to implementations described herein. [Figure 2] FIG. 1 is a process flow diagram illustrating one method of selective deposition according to implementations described herein. [Figure 3] FIG. 10 includes an exemplary blocking molecule, according to implementations described herein. [Figure 4] FIG. 10 includes an exemplary blocking molecule, according to implementations described herein. DETAILED DESCRIPTION OF THE INVENTION

[0009] For ease of understanding, the same reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further elaboration.

[0010] The following disclosure describes a process for the fabrication of semiconductor devices in which self-assembled monolayers are used to achieve selective deposition at lower temperatures, including ambient temperatures. Certain details are set forth in the following description and in FIGS. 1A-1G and 2 to provide a thorough understanding of various implementations of the present disclosure. Other details describing well-known structures and systems often associated with semiconductor devices, self-assembled monolayers, epitaxial deposition, and surface pretreatment are not set forth in the following disclosure to avoid unnecessarily obscuring the description of various implementations.

[0011] Many of the details, dimensions, angles, and other features shown in the figures are merely illustrative of particular implementations. Thus, other implementations may have other details, components, dimensions, angles, and features without departing from the spirit or scope of the present disclosure. Furthermore, further implementations of the present disclosure may be practiced without some of the details described below.

[0012] The implementations shown herein will be described below with respect to cleaning and deposition processes that may be performed using systems available from Applied Materials, Inc., Santa Clara, California. Other tools capable of performing these cleaning and deposition processes may be adapted to benefit from the implementations described herein. Furthermore, any system that enables the cleaning and deposition processes described herein may be effectively used. The apparatus descriptions described herein are exemplary and should not be construed or interpreted as limiting the scope of the implementations described herein.

[0013] The epitaxial silicon deposition process is a process in which crystalline silicon is deposited on a silicon seed layer of a substrate. Some substrates are mixed-surface substrates that contain both silicon and dielectric material surfaces. Upon exposure to epitaxial deposition conditions, silicon will deposit not only on the silicon surface but also on the dielectric material surface.

[0014] A selective epitaxial silicon deposition process is a selective process in which crystalline silicon is selectively deposited on a silicon seed layer. Some selective epitaxial silicon deposition processes involve providing a layer of molecules on the surface of a dielectric material to prevent or inhibit silicon deposition on the dielectric surface. However, these processes are not applicable to higher temperature silicon deposition because the molecules cannot withstand temperatures above 400°C. The inventors have developed a method that enables selective epitaxial silicon deposition at temperatures above 400°C. This method provides a means for selective epitaxial silicon deposition on mixed surface substrates at temperatures ranging from 400°C to approximately 650°C. This method may involve the deposition of blocking molecules in the liquid or vapor phase. The ability to deposit blocking molecules in the vapor phase allows this process to be scaled to larger substrates. In some embodiments, providing a blocking layer of blocking molecules on a substrate enables selective epitaxial silicon deposition at temperatures less than, greater than, or between any one of 400, 410, 420, 430, 440, 450, 460, 470, 480, 490, 500, 510, 520, 530, 540, 550, 560, 570, 580, 590, 600, 610, 620, 630, 640, and 650 degrees Celsius.

[0015] In some implementations of the present disclosure, epitaxial deposition of silicon on a dielectric material is inhibited or prevented by providing a molecular blocking layer on the dielectric material, the molecular blocking layer being capable of withstanding epitaxial deposition temperatures of 400 degrees Celsius to 650 degrees Celsius.

[0016] In some implementations of the present disclosure, blocking molecules from a blocking layer on a substrate surface are deposited on the substrate. In some embodiments, the substrate surface comprises SiO, SiOH, SiN, or a combination thereof. In some implementations, the blocking layer has a chemical formula I: X z -Si-Y(1-z) I wherein X is a substituted or unsubstituted alkyl having 1 to 30 carbon atoms, a substituted or unsubstituted aryl having 1 to 30 carbon atoms, or a substituted or unsubstituted aralkyl having 1 to 30 carbon atoms; Y is a halide, alkyl, or alkoxy; and z is an integer from 1 to 3. In some implementations, the substituted or unsubstituted alkyl optionally includes at least one heteroatom selected from N, O, Si, and S in the alkyl group chain. In some embodiments, X may include one or more olefinic groups. In some implementations, the substituted or unsubstituted aralkyl group optionally includes at least one heteroatom selected from N, O, Si, and S in the alkyl group chain. In some implementations, the substituted or unsubstituted aralkyl group optionally includes at least one heteroatom selected from N, O, Si, and S in the aryl group ring. In some implementations, the substituted or unsubstituted aryl group optionally contains at least one heteroatom selected from N, O, Si, and S within the ring of the aryl group. In some embodiments, the molecule of Formula I contains at least one halide or alkoxy group chemically bonded to the silicon atom. In some embodiments, the at least one halide or alkoxy group functions as a leaving group, allowing the silicon atom of the molecule to bond with a functional group on the substrate surface. The blocking molecule can be deposited in either a liquid or gas phase under suitable process conditions. Liquid deposition can be performed using a solvent suitable for the blocking molecule. Non-limiting examples of suitable solvents include nonpolar solvents such as toluene and benzene, alcohols such as ethanol, butanol, and isopropanol, ethers such as tetrahydrofuran and diethyl ether, ketones such as acetone, aprotic solvents such as acetonitrile, and combinations thereof.

[0017] In some implementations of the present disclosure, the substrate is pre-cleaned before depositing a blocking layer of blocking molecules on the substrate surface. In some implementations that can be combined with other implementations, the substrate surface is pre-cleaned with hydrogen fluoride (HF). In some embodiments, the hydrogen fluoride is provided as an aqueous solution of hydrogen fluoride. Aqueous solutions of hydrogen fluoride are also known as hydrofluoric acid. The aqueous hydrofluoric acid solution can have a concentration ranging from 0.5% to 48% by weight. In some implementations, the hydrofluoric acid can have a concentration of 1% by weight in water to 2% by weight in water.

[0018] In some embodiments, the substrate is pre-cleaned by contact with hydrofluoric acid. In some embodiments, the substrate is pre-cleaned by contacting with the hydrofluoric acid solution for a time ranging from 5 seconds to 5 minutes, preferably from 30 seconds to 2 minutes, and more preferably from 45 seconds to 90 seconds. In some embodiments, the substrate is pre-cleaned by contacting with the hydrofluoric acid solution for 60 seconds.

[0019] In some implementations, the substrate is pre-cleaned by immersion in hydrofluoric acid. The immersion time may vary depending on the hydrofluoric acid concentration and the amount of SiOx, SiOH, or SiN present on the surface of the workpiece 100. In some embodiments, a 1% hydrofluoric acid solution is used to pre-clean the substrate, the 1% solution comprising 1 wt. % hydrofluoric acid in water. After pre-cleaning, the cleaned substrate may be immersed in a solution of a molecule of Formula I to apply a blocking layer.

[0020] The phrase "blocking molecule" refers to a molecule of Formula I. A "blocking layer" generally refers to a layer of molecules of Formula I attached to a substrate surface through chemical bonds. In some embodiments, the molecules in the blocking layer are arranged in a preferred orientation relative to the substrate surface and each other. A molecule of Formula I comprises a "head group" and a "tail end." The head group includes at least one leaving group chemically bonded to a silicon atom. In some embodiments, the head group includes at least one halide or alkoxy group. Upon bonding to the substrate surface, a functional group on the substrate surface bonds to the silicon atom in the molecule of Formula I, displacing the leaving group within the head group. The choice of head group will depend on the substrate composition and epitaxial deposition conditions. The tail end includes a substituted or unsubstituted alkyl having 1 to 30 carbon atoms, a substituted or unsubstituted aryl having 1 to 30 carbon atoms, or a substituted or unsubstituted aralkyl having 1 to 30 carbon atoms. Non-limiting examples of alkyl groups containing at least one heteroatom in the alkyl group chain include -(CH)NHCH, -(CH)O(CH)CH, and -(CH)S(CH)CH. Non-limiting examples of aryl groups containing at least one heteroatom in the aryl ring include pyridyl and furyl. Non-limiting examples of aralkyl groups containing at least one heteroatom in the aralkyl ring include -(CH)-pyridine and -(CH)-furan. Non-limiting examples of aralkyl groups containing at least one heteroatom in the aryl group include -(CH)-O-(CH)-phenyl, -(CH)-SiMe((CH))CH, and -(CH)-NH-(CH)-phenyl. Functional groups attached to substituted alkyl, aryl, or aralkyl groups may be selected to tailor the wetting or interfacial properties of the blocking layer. In some embodiments, the molecules of Formula I will selectively bind to one material in preference to another (e.g., silicon versus a dielectric), and in some embodiments, the layer of blocking molecules will successfully block deposition, thereby allowing selective deposition onto materials not coated with the layer of blocking molecules.

[0021] "Alkyl" refers to and includes saturated linear, branched, or cyclic monovalent hydrocarbon structures and combinations thereof. This term is exemplified by groups such as methyl, t-butyl, n-heptyl, octyl, cyclohexylmethyl, and cyclopropyl. Cycloalkyl is a subset of alkyl and can consist of a single ring, such as cyclohexyl, or multiple rings, such as adamantyl. Cycloalkyls containing two or more rings can be fused, spiro, or bridged, or combinations thereof. Non-limiting examples of cycloalkyl groups include decahydronaphthalenyl, cyclopropyl, cyclobutyl, cyclopentyl, and cyclohexyl. "Substituted alkyl" refers to an alkyl group having at least one substituent attached to a carbon atom of the alkyl group.

[0022] "Aryl" refers to an unsaturated aromatic carbocyclic group having at least one ring. Non-limiting examples of aryl groups include phenyl, naphthyl, and anthryl. "Substituted aryl" refers to an aryl group having at least one substituent bonded to a carbon atom of the aryl group.

[0023] "Aralkyl" refers to a moiety in which an aryl group is attached to an alkyl group, and the aralkyl moiety can be attached to the silicon atom at either the aryl group or the alkyl group. "Substituted aralkyl" refers to an aralkyl moiety having at least one substituent bonded to a carbon atom in the aralkyl moiety.

[0024] Non-limiting examples of substituents include alkoxy, substituted alkoxy, acyl, acyloxy, carbonylalkoxy, acylamino, substituted or unsubstituted amino, aminoacyl, aminocarbonylamino, aminocarbonyloxy, aryl, substituted aryl, heteroaryl, substituted heteroaryl, allyloxy, substituted allyloxy, cyano, halide, hydroxyl, nitro, carboxyl, thiol, thioalkyl, substituted or unsubstituted silyl, substituted or unsubstituted alkenyl, substituted or unsubstituted alkynyl, substituted or unsubstituted heterocyclyl, substituted or unsubstituted aralkyl, aminosulfonyl, sulfonylamino, sulfonyl, oxo, and carbonylalkylenealkoxy.

[0025] "Alkoxy" refers to an -O-alkyl group, examples of which include methoxy, ethoxy, n-propoxy, isopropoxy, n-butoxy, tert-butoxy, sec-butoxy, n-pentoxy, n-hexoxy, and 1,2-dimethylbutoxy. "Halide" refers to elements of Group 17, including fluoride, chloride, bromide, and iodide.

[0026] 1A-1F, a substrate 110 having at least an exposed first material and an exposed second material is provided. In one implementation, the substrate 110 can include silicon-based materials, which can include crystalline silicon, silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers, patterned or unpatterned wafers, silicon-on-insulator (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, and combinations thereof. The substrate 110 can have various dimensions, such as 200 mm, 300 mm, 450 mm, or other diameters, as well as be a rectangular or square panel. In the implementation depicted herein, the substrate 110 can be a crystalline silicon substrate. Furthermore, the substrate 110 is not limited to any particular size or shape. Substrate 110 may be, among others, a circular substrate having a diameter of 200 mm, a diameter of 300 mm, or other diameter such as 450 mm, etc. Substrate 110 may also be any polygonal, square, rectangular, curved, or otherwise non-circular workpiece, such as a polygonal glass substrate used in the manufacture of flat panel displays.

[0027] The substrate 110 may include features 112. The features 112 may include, for example, trenches, vias, holes, openings, lines, the like, and combinations thereof. A first material layer 114 (e.g., a dielectric material) having an exposed surface 116 is formed on the surface of the substrate 110. A second material layer 118 (e.g., a dielectric material) having an exposed surface 120 is also formed on the surface of the substrate 110. In one implementation, the feature 112 has an opening 122 filled with a third material 124 (e.g., a silicon-based material) having an exposed surface 126 disposed on the substrate 110, as shown in FIG. 1A. It should be understood that both the first material layer 114 and the second material layer 118 can be dielectric materials. In some implementations, the first material layer 114 is a silicon oxide layer, and the second material layer 118 is a silicon nitride layer. In some implementations, the first material layer 114 and the second material layer are formed from the same dielectric material (e.g., both silicon nitride or silicon oxide). In some implementations, the feature 112 is not present and the exposed surface 126 is the surface of the substrate 110.

[0028] An exemplary blocking layer deposition process may require a pre-cleaning process prior to blocking layer deposition. The pre-cleaning process may be any pre-cleaning process capable of removing native oxides, contaminants, or both from exposed surfaces. The pre-cleaning process may be a dry chemical cleaning process, a wet chemical cleaning process, or both. The pre-cleaning process may be a remote plasma cleaning or an in-situ plasma cleaning adapted to perform a dry etching process. One exemplary dry cleaning process is the SICONI™ pre-cleaning process available from Applied Materials, which removes native oxides through a low-temperature, two-part dry chemical cleaning process using NF3 and NH3. The pre-cleaning process may be an ex-situ pre-cleaning process (e.g., no exposure to air between cleaning and further processing of the substrate) or an in-situ pre-cleaning process.

[0029] In one implementation, the pre-cleaning process includes exposing the workpiece 100 to an ex-situ organic wet clean. In one implementation, the ex-situ organic wet clean process is a sonication process in the presence of an organic liquid. In one implementation, the ex-situ organic wet clean includes at least one of sonication in acetone, sonication in isopropanol (IPA), and sonication in water. In one implementation, the ex-situ organic wet clean includes 10 minutes of sonication in acetone, followed by 10 minutes of sonication in IPA, followed by 10 minutes of sonication in water.

[0030] In one implementation, the pre-cleaning process includes exposing the workpiece 100 to a hydrofluoric acid (HF) solution. The hydrofluoric acid solution can be in a liquid or vapor phase. The hydrofluoric acid solution can be a diluted hydrofluoric acid (DHF) solution. The hydrofluoric acid can be buffered hydrofluoric acid (BHF) or unbuffered hydrofluoric acid (BHF). An exemplary buffer for buffering HF is ammonium fluoride (NH4F). The hydrofluoric acid solution may be selected because it is believed to remove specific oxides from the surface of the workpiece 100. Factors such as the concentration of the diluted hydrofluoric acid solution and the time duration for exposing the workpiece 100 to the diluted HF will affect the amount of specific oxides removed from the surface of the workpiece 100.

[0031] The workpiece 100 can be immersed in the diluted acid solution for a time period of, for example, about 30 seconds to about 800 seconds. In some implementations, the diluted acid solution can be sprayed onto the workpiece 100. Optionally, after exposing the workpiece 100 to the hydrofluoric acid solution, a post-exposure rinse process, for example, using DI water, can be used to clean the substrate surface. The optional cleaning process can be followed by an optional drying process using drying methods known in the art.

[0032] In one implementation, the workpiece 100 is subjected to an ex-situ wet organic clean by sonicating in acetone for 10 minutes, followed by sonicating in IPA for 10 minutes, followed by sonicating in water for 10 minutes. The workpiece 100 is then immersed for 1 minute in a beaker containing a 2% HF / water solution with a layer of toluene on top. After 1 minute, the sample is drawn through the toluene layer and quickly transferred into an octadecyltrichlorosilane (ODTS) solution before the toluene layer evaporates from the surface of the workpiece 100.

[0033] As depicted in FIG. 1B , a method for forming a blocking layer on a substrate 110 involves exposing the substrate 110 to molecules of Formula I to achieve selective bonding of the molecules of Formula I on the exposed surface 116 of the first material layer 114 and on the exposed surface 120 of the second material layer 118, with minimal to no bonding to the exposed surface 126 of the third material 124. Depending on the materials and molecules used, the molecules of Formula I may be provided in liquid or gaseous form. The substrate 110 may be exposed to the molecules of Formula I in a gas-phase process (e.g., a chemical vapor deposition (CVD) process) or in a liquid-phase process (e.g., a dip-coating process) in which the substrate 110 is immersed in a solution containing the molecules of Formula I. The substrate 110 may be exposed to molecules of Formula I 130, precursors that form the molecules of Formula I 130, or both. Molecules of Formula I bond to exposed surface 116 of first material layer 114 and exposed surface 120 of second material layer 118 to form blocking layer 140 .

[0034] The blocking layer 140 includes an organized layer of molecules 130 of Formula I, in which the head groups 132 exhibit selective and reversible affinity for the first material layer 114 and the second material layer 118 of the feature 112. The head groups 132 may include halide or alkoxy leaving groups bonded to silicon atoms. The silicon atoms may be bonded to tail groups including substituted or unsubstituted alkyl groups, substituted or unsubstituted aralkyl groups, or substituted or unsubstituted aryl groups. The blocking layer 140 is formed by covalent bonding of the head groups 132 to the first material layer 114 and the second material layer 118 of the feature 112, followed by two-dimensional organization of the hydrophobic tail groups. Covalent bonding between the blocking molecules and the substrate may occur in a liquid phase by immersing the substrate 110 in a solution containing the blocking molecules. In one implementation, the blocking layer 140 is deposited via spin-coating from solution. Covalent bonding between the blocking molecules and the substrate can also occur through vapor deposition by exposing the substrate 110 to a gaseous blocking molecule or blocking molecule precursor. The blocking molecules initially form disordered molecular agglomerates and then begin to form crystalline or semi-crystalline structures on the first and second material layers 114, 118 of the workpiece 100. The thickness of the blocking layer 140 can be adjusted by adjusting the length of the blocking molecules 130. For example, a layer of blocking molecules 20 atoms long will achieve a thicker layer than a layer of blocking molecules 10 atoms long. Generally, the blocking layer 140 selectively appears on surfaces that can chemically react with and covalently bond to the molecules of Formula I 130.

[0035] 1B , the blocking molecules 130 utilized to form the blocking layer 140 are selected to selectively react with the exposed surface 116 of the first material layer 114 (e.g., a silicon oxide material) and the exposed surface 120 of the second material layer 118, but not with the exposed surface 126 of the third material 124 (e.g., a silicon-based material). By doing so, the blocking layer 140 is preferentially formed on the exposed surface 116 of the first material layer 114 and the exposed surface 120 of the second material, leaving the exposed surface 126 of the third material 124 free of the blocking layer 140.

[0036] In one implementation, blocking layer 140 is formed at a pressure of about 50 mTorr to about 10 Torr (e.g., about 50 mTorr to about 1 Torr, about 50 mTorr to about 500 mTorr, about 1 Torr to about 10 Torr, or about 5 Torr to about 10 Torr). In one implementation, blocking layer 140 is formed for a time period of between about 50 milliseconds and about 10 minutes (about 50 milliseconds to about 200 milliseconds, about 50 milliseconds to about 100 milliseconds, about 1 minute to about 5 minutes, or about 5 minutes to about 10 minutes).

[0037] In another implementation, the molecule 130 of Formula I is methyltrichlorosilane, ethyltrichlorosilane, propyltrichlorosilane, butyltrichlorosilane, pentyltrichlorosilane, hexyltrichlorosilane, heptyltrichlorosilane, octyltrichlorosilane, nonyltrichlorosilane, decyltrichlorosilane, undecyltrichlorosilane, dodecyltrichlorosilane, tridecyltrichlorosilane, tetradecyltrichlorosilane, pentadecyltrichlorosilane, hexadecyltrichlorosilane, heptadecyltrichlorosilane, The chlorosilane molecule can be, for example, N-cyclohexylsilane, octadecyltrichlorosilane (ODTS), 2-(3-cyclohexenyl)ethyltrimethoxysilane, nonadecyltrichlorosilane, (cyclohexylmethyl)trichlorosilane, 2-(di-n-octylmethylsilyl)ethyltrichlorosilane, 13-(chlorodimethylsilylmethyl)heptacosane, N-cyclohexyl(aminomethyl)triethoxysilane, N-cyclohexyl(aminopropyl)trimethoxysilane, trichlorocyclopentylsilane, and combinations thereof. Further, non-limiting examples of molecules of Formula I are depicted in Figures 3 and 4.

[0038] 1C, a low-temperature deposition process, which is highly sensitive to surface conditions with selective precursors, is then performed to selectively form structures 150 on the exposed surfaces 126 of the third material 124. In one implementation, the structures 150 are formed from a silicon-containing material. In one implementation, the structures 150 are formed from polycrystalline silicon.

[0039] The structure 150 may be formed by various deposition techniques, including, for example, CVD, such as plasma-enhanced chemical vapor deposition (PE-CVD), pulsed chemical vapor deposition (CVD), low-pressure chemical vapor deposition (LPCVD), epitaxial growth, atomic layer deposition (ALD), hot-wire chemical vapor deposition (HWCVD), a hydride vapor phase epitaxy (HVPE) process, an atomic layer deposition (ALD) process, atomic layer epitaxy (ALE), and / or any other suitable process. In one implementation, the deposition process is a CVD process, for example, a hot-wire chemical vapor deposition (HWCVD) process. The deposition process may be a high-temperature deposition process. High-temperature deposition processes are typically performed at temperatures ranging from 400 degrees Celsius to 650 degrees Celsius. The material selected for deposition may be affected by the surface characteristics of the substrate. The thickness of the structure 150 will vary depending on the material and the particular device being formed. Blocking layer 140 prevents deposition of the material of structure 150 on exposed surface 116 of first material layer 114 and exposed surface 120 of second material layer 118. In this manner, the selective deposition process can selectively deposit different materials at different locations on the substrate.

[0040] In one implementation, the silicon-containing material is formed from a process gas. The process gas can include at least one of a silicon-containing precursor gas, a boron-containing precursor gas, a hydrogen-based precursor gas, and an inert gas. Exemplary silicon-containing precursor gases for forming structure 150 include, but are not limited to, silane-containing precursor gases, including monosilane (SiH), disilane (SiH), and higher silanes. Exemplary boron-based precursor gases for forming structure 150 include, but are not limited to, trimethylboron ((B(CH)) or TMB), diborane (BH), boron trifluoride (BF), and triethylboron ((B(CH)) or TEB), and combinations thereof. Suitable hydrogen-based precursor gases include, but are not limited to, H, HO, HO, and combinations thereof.

[0041] In one implementation, the silicon-containing material deposition process is an ALD process. Because the ALD process is sensitive to surface conditions, ALD is suitable for selectively depositing materials on specific regions of a substrate. The ALD process is a CVD process with self-terminating / limited growth. The ALD process produces thicknesses of only a few angstroms or monolayer levels. The ALD process is controlled by dividing the chemical reaction into two separate half-reactions, which are repeated in cycles. The thickness of the material formed by the ALD process depends on the number of reaction cycles. The first reaction causes a first atomic layer of a molecular layer to be absorbed on the substrate, and the second reaction causes a second atomic layer of a molecular layer to be absorbed on the first atomic layer. Thus, the ordered structure of the material serves as a template for the growth of the material layer.

[0042] 1C , in some implementations, after deposition of structure 150, blocking layer 140 may be damaged. This damage may take the form of holes or pinholes 160a, 160b (collectively 160) that expose a portion of at least one of exposed surface 116 and exposed surface 120. During a subsequent deposition process, these exposed or unprotected portions may have material deposited thereon. Thus, in some implementations, substrate 110 is subjected to a repair process.

[0043] As depicted in FIG. 1D , the workpiece 100 may be subjected to a blocking layer repair process to repair damage to the blocking layer 140 that occurred during the epitaxial deposition process depicted in FIG. 1C . This damage may include pinholes present in the blocking layer 140 after the formation of the structure 150. The repair process depicted in FIG. 1D may include repeating the blocking layer formation process. In one implementation, the repair process of FIG. 1D may include at least one of the following: chemical treatment of the blocking layer to close the pinholes through steric hindrance; plasma treatment of the blocking layer to form a continuous layer on the blocking layer; exposing the blocking layer to a chemical precursor to form a continuous layer on the blocking layer; or a combination thereof. In one implementation, repairing the pinholes may include repeating the process depicted in FIG. 1B .

[0044] In one implementation, the repair process depicted in FIG. 1D includes exposing the deposited blocking layer 140 to a plasma treatment process. While not wishing to be bound by theory, it is believed that the plasma treatment process densifies the deposited blocking layer 140 and reduces the number of pinholes formed during the deposition process depicted in FIG. 1C . Depending on the type of deposition and plasma pinhole reduction technique used, one or more of the power sources connected to the substrate may be a DC source, a pulsed DC (pDC) source, an RF source, a pulsed RF source, or the like. Similarly, one or more of the target power sources may be a DC source, a pDC source, an RF source, a pulsed RF source, or the like. Post-deposition treatments may involve inducing and maintaining a plasma above the workpiece 100 to ion-bombard the deposited blocking layer 140. This type of post-deposition treatment may reconstruct the surface texture of the blocking layer 140 and / or modify the composition of the blocking layer 140 itself.

[0045] In one implementation, the blocking layer 140 is densified by exposing the workpiece 100 to an RF plasma. In this type of process, essentially no additional material is deposited on the blocking layer 140; rather, the bombardment of accelerated ionic species densifies the blocking layer 140.

[0046] Referring to FIG. 1E, the deposition process of FIG. 1B may be repeated to selectively deposit additional material 170 on the structure 150.

[0047] 1F, following the deposition processes of 1C, 1D, and 1E, blocking layer 140 is removed from exposed surface 116 of first material layer 114 and exposed surface 120 of second material layer 118. Blocking layer 140 may be removed by any process that does not adversely affect structure 150 or exposed surfaces 116 and 120. The process for removing blocking layer 140 depends on the selection of blocking molecules. Blocking layer 140 can be removed by a wet etching process, a dry etching process, or a high-temperature annealing process (e.g., 400 degrees Celsius or higher) to release blocking layer 140 from exposed surface 116 of first material layer 114 and exposed surface 120 of second material layer 118.

[0048] FIG. 2 is a flowchart depicting a process flow diagram illustrating one method 200 of a selective deposition process performed using a molecular blocking layer according to implementations described herein. Method 200 may be used to form structures such as those depicted in the sequence of fabrication steps discussed above and depicted in FIGS. 1A-1F. In operation 210, a workpiece substrate is provided, including at least one exposed dielectric material and an exposed silicon-based material. In operation 220, the substrate is pre-cleaned to remove specific oxide portions on the substrate surface. In operation 230, the substrate is exposed to a blocking molecule to selectively form a molecular blocking layer on the dielectric material. In operation 240, silicon is epitaxially deposited on the exposed silicon-based material. In optional operation 250, the substrate may be exposed to a blocking molecule to repair pinholes in the molecular blocking layer. In optional operation 260, a subsequent layer of silicon may be epitaxially deposited on the exposed silicon-based material. In operation 270, the molecular blocking layer is removed from the workpiece.

[0049] In summary, some advantages of some implementations of the present disclosure provide a method for achieving selective epitaxial deposition at temperatures ranging from 400 degrees Celsius to 650 degrees Celsius. This ability to perform epitaxial deposition at higher temperatures improves available temperature processing opportunities, enabling the fabrication of multiple devices. In some implementations, this selective epitaxial deposition is achieved through the use of a blocking material that is deposited on a dielectric material (e.g., silicon oxide, silicon nitride, and silicon oxynitride) while leaving the silicon-based material surface exposed. The blocking material may be deposited in the same chamber as the subsequently deposited epitaxial layer, thereby reducing the formation of unwanted oxide on the exposed silicon-based material.

[0050] When introducing elements of the present disclosure or exemplary aspects or implementations thereof, the articles "a," "an," "the," and "said" are intended to mean that there are one or more of the element.

[0051] The terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements other than the listed elements.

[0052] While the foregoing description is directed to implementations of the present disclosure, other and further implementations of the present disclosure may be devised without departing from the basic scope thereof, which scope is determined by the following claims.

Claims

1. 1. A method for selectively and epitaxially depositing a silicon-containing material layer on a substrate, comprising: providing a substrate including exposed dielectric material and exposed silicon-based material; depositing a blocking layer over the exposed dielectric material; epitaxially and selectively depositing a silicon-containing material layer on the exposed silicon-based material; removing the blocking layer from the exposed dielectric material; and A method comprising:

2. The method of claim 1 , further comprising cleaning the substrate prior to depositing the blocking layer.

3. The method of claim 2 , wherein cleaning the substrate comprises treating the substrate with hydrofluoric acid.

4. The blocking layer has Formula I: X ｚ -Si-Y （１－ｚ） (I) containing molecules of X is a substituted or unsubstituted alkyl having 1 to 30 carbon atoms, a substituted or unsubstituted aryl having 1 to 30 carbon atoms, or a substituted or unsubstituted aralkyl having 1 to 30 carbon atoms; Y is a halide, alkyl, or alkoxy; The method of claim 1 , wherein z is an integer from 1 to 3.

5. 5. The method of claim 4, wherein depositing a blocking layer on the exposed dielectric material comprises exposing the substrate to a solution containing molecules of Formula I.

6. 5. The method of claim 4, wherein depositing a blocking layer on the exposed dielectric material comprises exposing the substrate to a gas comprising molecules of Formula I:

7. 10. The method of claim 1, wherein the blocking layer has one or more pinholes formed therein after epitaxially and selectively depositing the silicon-containing material layer on the exposed silicon-based material.

8. 8. The method of claim 7, further comprising exposing the substrate to a gas or solution comprising molecules of Formula I to repair the one or more pinholes.

9. The method of claim 1 , wherein the epitaxial deposition is performed at a temperature of 400 degrees Celsius to 650 degrees Celsius.

10. 1. A method for selectively and epitaxially depositing a silicon-containing material layer on a substrate, comprising: exposing the substrate including the exposed dielectric material and the exposed silicon-based material to a pre-cleaning process; depositing a blocking layer over the exposed dielectric material; epitaxially and selectively depositing a silicon-containing material layer on the exposed silicon-based material; removing the blocking layer from the exposed dielectric material; and A method comprising:

11. The method of claim 10 , wherein cleaning the substrate comprises treating the substrate with hydrofluoric acid.

12. The blocking layer has Formula I: X ｚ -Si-Y （１－ｚ） I containing molecules of X is a substituted or unsubstituted alkyl having 1 to 30 carbon atoms, a substituted or unsubstituted aryl having 1 to 30 carbon atoms, or a substituted or unsubstituted aralkyl having 1 to 30 carbon atoms; Y is a halide, alkyl, or alkoxy; The method of claim 1 , wherein z is an integer from 1 to 3.

13. 13. The method of claim 12, wherein depositing a blocking layer on the exposed dielectric material comprises exposing the substrate to a solution comprising molecules of Formula I.

14. 13. The method of claim 12, wherein depositing a blocking layer on the exposed dielectric material comprises exposing the substrate to a gas comprising molecules of Formula I:

15. 1. A method for selectively and epitaxially depositing a silicon-containing material layer on a substrate, comprising: exposing the substrate including the exposed dielectric material and the exposed silicon-based material to a plasma pre-cleaning process; depositing a blocking layer over the exposed dielectric material, the blocking layer having a chemical formula I: X ｚ -Si-Y （１－ｚ） I containing molecules of X is a substituted or unsubstituted alkyl having 1 to 30 carbon atoms, a substituted or unsubstituted aryl having 1 to 30 carbon atoms, or a substituted or unsubstituted aralkyl having 1 to 30 carbon atoms; Y is a halide, alkyl, or alkoxy; depositing a blocking layer, wherein z is an integer from 1 to 3; epitaxially and selectively depositing a silicon-containing material layer on the exposed silicon-based material at a temperature of 400 degrees Celsius or greater; removing the blocking layer from the exposed dielectric material; and A method comprising:

16. 16. The method of claim 15, wherein depositing a blocking layer on the exposed dielectric material comprises exposing the substrate to a solution comprising a molecule of Formula I.

17. 16. The method of claim 15, wherein depositing a blocking layer on the exposed dielectric material comprises exposing the substrate to a gas comprising a molecule of Formula I:

18. 16. The method of claim 15, wherein the epitaxial deposition is performed at a temperature of 400 degrees Celsius to 650 degrees Celsius.

19. 16. The method of claim 15, wherein the blocking layer has one or more pinholes formed therein after epitaxially and selectively depositing the silicon-containing material layer on the exposed silicon-based material.

20. 20. The method of claim 19, further comprising exposing the substrate to a gas or solution comprising molecules of Formula I to repair the one or more pinholes.

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