Planar devices and switching function circuits

Abstract

The present application relates to the technical field of power electronics and discloses a planar device and a switching function circuit for shielding high-frequency jumping potentials on a chip in the planar device to reduce electromagnetic interference caused by high-frequency jumping potentials on the chip. The planar device includes at least one chip and a substrate, the chip includes a base, the base is provided on a side of the chip close to the substrate and electrically connected to the substrate, at least one source and at least one gate are provided on a side of the chip away from the substrate, the at least one source and at least one gate are both electrically connected to the chip, and the substrate is connected to a target potential point, which is used to maintain the potential of the substrate in a low-frequency changing state or a steady state.

Description

[Technical Field]

[0001] This application relates to the technical field of power electronics, and in particular to planar devices and switching function circuits.

[0002] This application claims priority to a Chinese patent application filed with the China Patent Office on December 4, 2023, bearing application number 202311686472.2 and entitled "Planar Device and Switching Function Circuit," the entire contents of which are incorporated herein by reference. [Background technology]

[0003] Planar devices, especially GaN-based planar devices, have a wide application prospect in power electronics. However, in a typical planar device, the chip (either unidirectional or bidirectional) is attached to the heat sink via an insulating medium, and the potential of the chip jumps at high frequencies. There is parasitic capacitance between the chip and the heat sink, and the high-frequency jump in the potential on the chip generates a corresponding current flowing between the chip and the heat sink due to the parasitic capacitance, which ultimately leads to the problem of electromagnetic interference. Summary of the Invention [Problem to be solved by the invention]

[0004] The present application provides a planar device and a switching function circuit that shields high frequency jumping potentials on a chip in a planar device to reduce electromagnetic interference caused by high frequency jumping potentials on the chip. [Means for solving the problem]

[0005] A first aspect of an embodiment of the present application provides a planar device, comprising at least one chip and a substrate, the chip comprising a base, the base being provided on a side of the chip closer to the substrate and electrically connected to the substrate, at least one source and at least one gate being provided on a side of the chip away from the substrate, the at least one source and the at least one gate being both electrically connected to the chip, respectively, the substrate being connected to a target potential point, the target potential point being used to maintain the potential of the substrate in a low frequency changing state.

[0006] Preferably, in the first embodiment of the first aspect, the substrate is electrically connected to either the source or the drain, and either the source or the drain is at the same potential as the substrate.

[0007] Preferably, in the second embodiment of the first aspect, the substrate is a copper substrate, or copper on one side of a direct bonded copper ceramic substrate.

[0008] Preferably, in the third embodiment of the first aspect, the target potential point is a static potential point or a low frequency potential point.

[0009] Preferably, in a fourth embodiment of the first aspect, the target potential point is an AC phase / line voltage potential point or a DC bus voltage potential point.

[0010] Preferably, in a fifth embodiment of the first aspect, the at least one chip is a planar single-tube chip, and the planar single-tube chip has one source, one gate and one drain on a side thereof away from the substrate.

[0011] Preferably, in a sixth embodiment of the first aspect, the at least one chip is a half-bridge unidirectional chip, and the planar device further includes a half-bridge midpoint, and a first source, a first drain, a first gate, and a second gate are provided on a side of the half-bridge unidirectional chip away from the substrate, and the first source, the first drain, the first gate, the second gate, and the half-bridge midpoint are respectively connected to the half-bridge unidirectional chip.

[0012] Preferably, in a seventh embodiment of the first aspect, the at least one chip is a planar bidirectional chip, and a first source, a second source, a first gate and a second gate are provided on a side of the planar bidirectional chip away from the substrate, and the first source, the second source, the first gate and the second gate are respectively connected to the planar bidirectional chip.

[0013] Preferably, in an eighth embodiment of the first aspect, the at least one chip includes a first planar bidirectional chip and a second planar bidirectional chip, and the planar device further includes a half-bridge midpoint, wherein the first planar bidirectional chip has a first source, a first gate, and a second gate on a side away from the substrate, and the second planar bidirectional chip has a second source, a third gate, and a fourth gate on a side away from the substrate, the first source, the first gate, and the second gate are respectively connected to a first side of the first planar bidirectional chip, the second source, the third gate, and the fourth gate are respectively connected to a first side of the second planar bidirectional chip, and the second side of the first planar bidirectional chip and the second side of the second planar bidirectional chip are connected and led out to the half-bridge midpoint.

[0014] A second aspect of an embodiment of the present application provides a switching function circuit, comprising: at least two planar devices according to the fifth embodiment of the first aspect and a DC bus, wherein the at least two planar devices include a first planar device in a first bridge arm upper tube and a second planar device in a first bridge arm lower tube, wherein a drain of the first planar device is connected to a positive pole of the DC bus, a source of the second planar device is connected to a negative pole of the DC bus, and a source of the first planar device is connected to a drain of the second planar device.

[0015] Preferably, in the first embodiment of the second aspect, the at least two planar devices further include a third planar device in the upper tube of the second bridge arm and a fourth planar device in the lower tube of the second bridge arm, wherein the drain of the third planar device is connected to the positive pole of the DC bus, the source of the fourth planar device is connected to the negative pole of the DC bus, and the source of the third planar device is connected to the drain of the fourth planar device.

[0016] A third aspect of an embodiment of the present application provides a switching function circuit, comprising at least one planar device according to the sixth embodiment of the first aspect and a DC bus, wherein a drain of each planar device is connected to a positive terminal of the DC bus and a source of each planar device is connected to a negative terminal of the DC bus.

[0017] A fourth aspect of an embodiment of the present application provides a switching function circuit, comprising: at least two planar devices according to the seventh embodiment of the first aspect and a filter unit, wherein the filter unit comprises at least one capacitor; the at least two planar devices comprise a first planar device in a first bridge arm upper tube and a second planar device in a first bridge arm lower tube, a first source of the first planar device connected to a first end of the filter unit, which is one end of two single-phase AC lines; a first source of the second planar device connected to a second end of the filter unit, which is the other end of two single-phase AC lines; and a second source of the first planar device connected to a second source of the second planar device.

[0018] Preferably, in the first embodiment of the fourth aspect, the at least two planar devices further include a third planar device on the upper tube of the second bridge arm and a fourth planar device on the lower tube of the second bridge arm, a first source of the third planar device connected to a first end of the filter unit, i.e., one end of the two single-phase AC lines, a first source of the fourth planar device connected to a second end of the filter unit, i.e., the other end of the two single-phase AC lines, and a second source of the third planar device connected to a second source of the fourth planar device.

[0019] A fifth aspect of the present application provides a switching function circuit, comprising three planar devices according to the seventh embodiment of the first aspect: a first impedance element, a second impedance element, a third impedance element, a first capacitor, a second capacitor, and a third capacitor, wherein the three planar devices include a first planar device in a first bridge arm, a second planar device in a second bridge arm, and a third planar device in a third bridge arm, wherein a first AC phase line is connected to a second source of the first planar device and a first end of the first capacitor via the first impedance element, a second AC phase line is connected to a second source of the second planar device and a first end of the second capacitor via the second impedance element, and a third AC phase line is connected to a second source of the third planar device and a first end of the third capacitor via the third impedance element, a first source of the first planar device is connected to a first source of the second planar device and a first source of the third planar device, and the second end of the first capacitor, the second end of the second capacitor, and the second end of the third capacitor are connected.

[0020] A sixth aspect of the embodiment of the present application provides a switching function circuit, comprising six planar devices according to the seventh embodiment of the first aspect, a first impedance element, a second impedance element, a third impedance element, a first capacitor, a second capacitor and a third capacitor, wherein the six planar devices include a first planar device on a first bridge arm upper tube, a second planar device on a second bridge arm upper tube, a third planar device on a third bridge arm upper tube, a fourth planar device on a first bridge arm lower tube, a fifth planar device on a second bridge arm lower tube and a sixth planar device on a third bridge arm lower tube, wherein a first AC phase line is connected to a second source of the fourth planar device and a second source of the first planar device via the first impedance element, and a second AC phase line is connected to the a third AC phase line is connected to the second source of the fifth planar device and the second source of the second planar device via a second impedance element; a third AC phase line is connected to the second source of the sixth planar device and the second source of the third planar device via the third impedance element; a first source of the first planar device is connected to the first source of the second planar device and the first source of the third planar device; a first source of the fourth planar device is connected to the first source of the fifth planar device and the first source of the sixth planar device; a first end of a first capacitor is connected to the first AC phase line; a first end of a second capacitor is connected to the second AC phase line; a first end of a third capacitor is connected to the third AC phase line; and the second end of the first capacitor, the second end of the second capacitor, and the second end of the third capacitor are connected.

[0021] A seventh aspect of the present application provides a switching function circuit, comprising: at least one planar device according to the eighth embodiment of the first aspect; and a filter unit, wherein the filter unit comprises at least one capacitor; a first source of each planar device is connected to a first end of the filter unit, which is one end of the two single-phase AC lines; and a second source of each planar device is connected to a second end of the filter unit, which is the other end of the two single-phase AC lines. [Effects of the Invention]

[0022] In the technical solution provided by the embodiments of the present application, the planar device includes at least one chip and a substrate, the chip includes a base, the base is disposed on a side of the chip closer to the substrate and electrically connected to the substrate, the chip is disposed on a side away from the substrate with at least one source and at least one gate, the at least one source and the at least one gate are both electrically connected to the chip, and the substrate is connected to a target potential point, which is used to maintain the potential of the substrate in a low-frequency changing state or a steady state. In the embodiments of the present application, connecting the substrate in the planar device to the target potential point can shield the high-frequency changing potential on the chip in the planar device and reduce the electromagnetic interference between the chip and the heat sink. [Brief explanation of the drawings]

[0023] [Figure 1] FIG. 1 is a schematic diagram of parasitic capacitance in a planar device. [Figure 2] FIG. 1 is a schematic diagram of a planar device in an embodiment of the present application. [Figure 3] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 4] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 5] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 6] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 7] 1 is an equivalent circuit symbol of a planar device including a planar single-tube chip in an embodiment of the present application. [Figure 8] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 9] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 10] FIG. 10 is a diagram showing an equivalent circuit symbol of a planar device including a half-bridge unidirectional chip in an embodiment of the present application. [Figure 11] Schematic diagram of combining unidirectional tubes as a bidirectional switching device. [Figure 12] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 13] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 14] FIG. 1 is a diagram showing an equivalent circuit symbol for a planar device including a planar bidirectional chip in an embodiment of the present application. [Figure 15] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 16] FIG. 2 is another schematic diagram of a planar device in an embodiment of the present application. [Figure 17] FIG. 1 shows an equivalent circuit symbol for a planar device including two planar bidirectional chips in an embodiment of the present application. [Figure 18] FIG. 1 is a schematic diagram of a planar device attached to a heat sink in an embodiment of the present application. [Figure 19] FIG. 10 is another schematic diagram of a planar device attached to a heat sink according to an embodiment of the present application. [Figure 20] 1 is a schematic diagram showing a planar device including a planar single-tube chip applied to a single-phase half-bridge circuit in an embodiment of the present application. [Figure 21] 1 is a schematic diagram showing a planar device including a half-bridge unidirectional chip applied to a single-phase half-bridge circuit in an embodiment of the present application. [Figure 22] 1 is a schematic diagram illustrating a planar device including a planar bidirectional chip applied to a single-phase half-bridge circuit in an embodiment of the present application. [Figure 23] 1 is a schematic diagram illustrating a planar device including a planar bidirectional chip applied to a single-phase full-bridge circuit in an embodiment of the present application. [Figure 24] 1 is a schematic diagram showing a planar device including a planar bidirectional chip applied to a three-phase half-controlled bridge circuit in an embodiment of the present application. [Figure 25] 1 is a schematic diagram showing a planar device including a planar bidirectional chip applied to a three-phase fully controlled bridge circuit in an embodiment of the present application. [Figure 26] 1 is a schematic diagram illustrating a planar device including two planar bidirectional chips applied to a single-phase full-bridge circuit in an embodiment of the present application. DETAILED DESCRIPTION OF THE INVENTION

[0024] The present application provides a planar device and a switching function circuit that shields high frequency jumping potentials on a chip in a planar device to reduce electromagnetic interference caused by high frequency jumping potentials on the chip.

[0025] The terms "first," "second," "third," "fourth," etc. (when present) in the specification, claims, and drawings of this application do not dictate a particular order or sequential order, but are intended to distinguish between similar objects. Where appropriate, the terms so used may be substituted for one another, whereby the embodiments of this application described herein may, for example, be performed in an order other than that shown or described. Furthermore, the terms "comprise," "have," and any variations thereof are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus comprising a series of steps or units is not limited to those steps or units expressly recited, but may also include those not expressly recited or other steps or units inherent in the process, method, product, or apparatus.

[0026] When a conventional planar switching device is applied to a circuit after being fitted with an external heat sink, the potential on the chip in the switching device jumps at high frequency. As shown in FIG. 1, there is a parasitic capacitance C1 between the chip and the copper substrate (i.e., the substrate), and there is a parasitic capacitance C2 between the copper substrate and the heat sink. When the chip switches at high frequency in the circuit, it generates a potential that changes at high frequency. The high-frequency jumping potential of the chip generates a corresponding current that flows between the chip and the heat sink due to the parasitic capacitance. A high-frequency changing current flows through the parasitic capacitance, which ultimately leads to the problem of electromagnetic interference.

[0027] In order to solve the problem of electromagnetic interference, an embodiment of the present application provides a planar device, and referring to FIG. 2, specifically: at least one chip 110 and a substrate 120; The chip 110 includes a base 111; The base 111 is provided on the chip 110 on a side closer to the substrate 120 and is electrically connected to the substrate 120; At least one source 130 and at least one gate 140 are provided on the side of the chip 110 away from the substrate 120; The at least one source 130 and the at least one gate 140 are both electrically connected to the chip 110, The substrate 120 is connected to a target potential point, which is used to maintain the potential of the substrate 120 in a low frequency varying state.

[0028] The chip in the planar device may be a gallium nitride GaN chip, for example, a Cascade type GaN chip, or an enhanced type GaN chip, and there is no specific limitation here.

[0029] The present application provides a planar device, in which the substrate in the planar device is connected to a target potential point where the potential changes at a low frequency, and high-frequency current in the chip caused by the high-frequency change in potential is limited between the chip and the substrate, and no high-frequency changing voltage exists between the substrate and the external heat sink, so that the high-frequency changing current does not flow between the chip and the external heat sink through the parasitic capacitance, thereby reducing the impact of electromagnetic interference.

[0030] In a possible embodiment, the substrate 120 is electrically connected to either the source 130 or the drain 150, and either the source 130 or the drain 150 is at the same potential as the substrate 120, and FIG. 3 only shows the connection between the substrate 120 and the drain 150.

[0031] Specifically, the substrate 120 is connected to either the source 130 or the drain 150 within the planar device.

[0032] As shown in FIG. 3, the drain 150 connected to the substrate 120 is connected to a target potential point, and its potential is the same as that of the target potential point and is maintained so as to change at a low frequency.

[0033] As shown in Figure 3, the structural diagram of the electrical connection between the substrate 120 and the drain 150, in which S is the source, connected to the chip 110, G is the gate, connected to the chip 110, and D is the drain, connected to the chip 110. The drain D is electrically connected to the substrate 120, in this case, the potential of the drain D is also maintained to change at low frequency, and the base 111 is located below the chip, and Figure 3 is just an example.

[0034] 4 shows a structural diagram of the electrical connection between the substrate 120 and the first source 130. In the drawing, S1 and S2 are the first source and the second source, respectively, both connected to the planar bidirectional chip 110, and G1 and G2 are the first gate and the second gate, respectively, both connected to the planar bidirectional chip 110. The first source S1 is electrically connected to the substrate 120. In this case, the potential of the first source S1 is also maintained to change at a low frequency, and the base 111 is located below the bidirectional chip. FIG. 4 is merely an example.

[0035] In a possible embodiment, the substrate is a copper substrate or the copper on one side of a direct bond copper ceramic substrate.

[0036] 3 or 4, the substrate 120 is a copper substrate or a copper substrate on one side of a direct bond copper (DBC) ceramic substrate. The copper substrate may be a copper frame or a single copper metal.

[0037] It should be noted that other materials that meet the requirements may be used for the substrate, and no specific limitations are imposed here.

[0038] In a possible embodiment, the target potential point is a static potential point or a low frequency potential point.

[0039] The potential of the target potential point changes at a low frequency relative to the potential at the heat sink, or does not change.

[0040] In a possible embodiment, the target potential point is an AC phase / line voltage potential point or a DC bus voltage potential point.

[0041] In a possible embodiment, as shown in FIG. 5, said at least one tip 110 is a planar mono-tube tip; The planar single-tube chip 110 has a source 130 , a gate 140 and a drain 150 on the side away from the substrate 120 .

[0042] For example, as shown in FIG. 6, a planar single-tube chip 110 has one source 130, one gate 140 and one drain 150 on the side away from the substrate 120.

[0043] The equivalent circuit symbols corresponding to a planar device with a planar single-tube chip are shown in Figure 7, where G is the gate, S is the source, D is the drain, and BS is the substrate. When the substrate 120 is connected to the drain within the planar device, the equivalent circuit symbol is shown in Figure 7(a), and when the substrate 120 is connected to the source within the planar device, the equivalent circuit symbol is shown in Figure 7(b).

[0044] In a possible embodiment, as shown in FIG. 8, the at least one chip 110 is a half-bridge unidirectional chip, and the planar device further includes a half-bridge midpoint 160; As shown in FIG. 9, the half-bridge type unidirectional chip 110 is provided with a first source 130 (S1), a first drain 150 (D1), a first gate 140 (G1), and a second gate 140 (G2) on the side away from the substrate 120. The first source 130 (S1), the first drain 150 (D1), the first gate 140 (G1), the second gate 140 (G2), and the half-bridge midpoint 160 (HN) are respectively connected to the half-bridge unidirectional chip.

[0045] The equivalent circuit symbol for a planar device with a half-bridge unidirectional chip is shown in Figure 10, where G1 is the first gate, G2 is the second gate, S is the source, D is the drain, BS is the substrate, and HN is the half-bridge midpoint.

[0046] In the embodiment of the present application, two planar single-tube chips are grown on one base to form a half-bridge unidirectional chip, and the two planar single-tube chips are electrically connected and extended to the midpoint pole of the half-bridge, and the substrate is connected to the low-frequency potential point, thereby realizing shielding of the high-frequency changing potential on the chip, reducing the electromagnetic interference between each planar single-tube chip and the heat sink, and further improving the integration degree of the application circuit.

[0047] However, the combination of two unidirectional tubes cannot achieve the maximum bidirectional switching performance. For example, as shown in FIG. 11(a), the bidirectional switching function is realized by two insulated gate bipolar transistors (IGBTs). When an anti-parallel diode is attached to the IGBT, the bidirectional switching function needs to be realized by series connection. The first IGBT has a gate G1, an emitter E1, and a collector C1, and the second IGBT has a gate G2, an emitter E2, and a collector C2. The emitter E2 of the second IGBT is connected to the collector C1 of the first IGBT to realize bidirectional switching. Or, as shown in FIG. 11(b), the IGBT If there is no anti-parallel diode attached to the first IGBT, they need to be connected in parallel to achieve the bidirectional switching function. The first IGBT has a gate G1, an emitter E1 and a collector C1, and the second IGBT has a gate G2, an emitter E2 and a collector C2. The emitter E1 of the first IGBT is connected to the collector C2 of the second IGBT, and the emitter E2 of the second IGBT is connected to the collector C1 of the first IGBT to achieve the bidirectional switching function. Alternatively, the bidirectional switching function can be achieved by connecting two enhancement type metal oxide semiconductor field effect transistors (MOTFETs). As shown in FIG. 11(c), the bidirectional switching function is realized by two N-channel enhancement type MOS tubes, the first N-channel enhancement type MOS tube having a gate G1, a source S1 and a drain D1, and the second N-channel enhancement type MOS tube having a gate G2, a source S2 and a drain D2, and the source S1 of the first N-channel enhancement type MOS tube is connected to the source S2 of the second N-channel enhancement type MOS tube to realize the bidirectional switching function.In contrast to the solution of achieving bidirectional switching by combining two unidirectional tubes, the embodiments of the present application integrate two planar single-tube chips on the same base to provide a planar bidirectional chip that achieves bidirectional blocking and conducting functions. Compared to the combination of two planar devices (each planar device is provided with one planar single-tube chip, for example, a GaN chip), the planar device provided with the planar bidirectional chip can effectively reduce the size, cost, and parasitic parameters.

[0048] In a possible embodiment, the at least one chip 110 is a planar bidirectional chip, as shown in FIG. 12, The planar bidirectional chip has a first source 130, a second source 130, a first gate 140, and a second gate 140 on a side of the chip away from the substrate 120; The first source 130 (S1), the second source 130 (S2), the first gate 140 (G1), and the second gate 140 (G2) are respectively connected to the planar bidirectional chip.

[0049] As shown in FIG. 13, the planar bidirectional chip has a first source S1, a second source S2, a first gate G1, and a second gate G2 on the side away from the substrate 120; The first source S1, the second source S2, the first gate G1, and the second gate G2 are respectively connected to the planar bidirectional chip. The equivalent circuit symbol corresponding to the planar device provided with the planar bidirectional chip is shown in Figure 14, where G1 is the first gate, G2 is the second gate, S1 is the first source, S2 is the second source, and BS is the substrate.

[0050] In a possible embodiment, as shown in FIG. 15, the at least one chip includes a first planar bidirectional chip and a second planar bidirectional chip, and the planar device further includes a half-bridge midpoint 160; The first planar bidirectional chip has a first source 130 (S1), a first gate 140 (G1), and a second gate 140 (G2) on a side thereof away from the substrate 120; The second planar bidirectional chip has a second source 130 (S2), a third gate 140 (G3), and a fourth gate 140 (G4) on a side thereof away from the substrate 120; The first source S1, the first gate G1, and the second gate G2 are respectively connected to a first side of the first planar bidirectional chip, the second source S2, the third gate G3, and the fourth gate G4 are respectively connected to a first side of the second planar bidirectional chip, and the second side of the first planar bidirectional chip and the second side of the second planar bidirectional chip are connected and led to the half-bridge midpoint 160.

[0051] As shown in FIG. 16, the first planar bidirectional chip has a first source S1, a first gate G1, and a second gate G2 on the side away from the substrate 120. The second planar bidirectional chip has a second source S2, a third gate G3, and a fourth gate G4 on a side thereof away from the substrate 120; The first source S1, the first gate G1, and the second gate G2 are respectively connected to a first side of the first planar bidirectional chip, the second source S2, the third gate G3, and the fourth gate G4 are respectively connected to a first side of the second planar bidirectional chip, and the second side of the first planar bidirectional chip and the second side of the second planar bidirectional chip are connected and led to the half-bridge midpoint 160.

[0052] The equivalent circuit symbol corresponding to a planar device equipped with two planar bidirectional chips is shown in Figure 17, where G1 is the first gate, G2 is the second gate, G3 is the third gate, G4 is the fourth gate, S1 is the first source, S2 is the second source, BS is the substrate, and HN is the half-bridge midpoint.

[0053] In the embodiment of the present application, two planar bidirectional chips are grown on two bases, and the two planar bidirectional chips are electrically connected and extended to the midpoint pole of the half-bridge. The substrate is connected to the low-frequency potential point or the static potential point, thereby realizing shielding of the high-frequency changing potential on the chip, reducing the electromagnetic interference between each planar bidirectional chip and the heat sink, and thus improving the integration density of the application circuit.

[0054] Here, in actual application, any of the above planar devices needs to dissipate heat, and the heat must be dissipated using an insulating medium 170 and a heat sink 180. For example, as shown in FIG. 18, the insulating medium 170 is disposed between the substrate 120 and the heat sink 180, i.e., below the substrate 120, and the heat sink 180 is disposed below the insulating medium 170.

[0055] In this embodiment, when the substrate 120 is connected to a target potential point where the potential changes at low frequency or does not change, the high-frequency current generated by the high-frequency change in the potential on the chip 110 simply exists between the chip and the substrate 120, and no high-frequency changing voltage exists between the substrate 120 and the heat sink 180. As a result, the high-frequency changing current does not flow between the substrate 120 and the heat sink 180 via parasitic capacitance, thereby achieving the effect of eliminating or reducing the effects of electromagnetic interference.

[0056] Here, when the substrate 120 uses copper 121 on one side of the DBC, the ceramic plate 122 in the DBC can provide insulation, and the copper on the other side of the DBC can provide heat dissipation, forming a heat dissipation copper substrate 123 as shown in FIG. 19. The ceramic plate 122 is disposed in the middle of the DBC, and both sides of the DBC are made of metallic copper, i.e., the copper 121 on one side of the DBC in the DBC substrate, the ceramic plate 122, and the heat dissipation copper substrate 123 can simultaneously achieve the functions of insulation and heat dissipation. When the substrate 120 uses a DBC substrate, it does not need to be attached to the heat sink 180 via the insulating medium 170, but the DBC substrate is directly attached to the heat sink 180.

[0057] In an embodiment of the present application, the substrate in the planar device is connected to a target potential point to shield the high frequency changing potential on the chip in the planar device and reduce electromagnetic interference between the chip and the heat sink.

[0058] Referring to Figures 20 to 26, different planar devices have different connection methods applied to the circuits, and different circuits have different bidirectional switching wiring connection methods. For example, when using the planar devices of Figures 7, 10, 14, or 17 for a single-phase half-bridge circuit, a single-phase full-bridge circuit, and a three-phase bridge circuit, the corresponding wiring connection methods are all different.

[0059] An embodiment of the present application provides a switching function circuit, wherein the planar device uses a planar single-tube chip as shown in FIG. 8, and includes at least two planar devices and a DC bus, the at least two planar devices including a first planar device in the upper tube of a first bridge arm and a second planar device in the lower tube of the first bridge arm, the drain of the first planar device is connected to the positive pole of the DC bus, the source of the second planar device is connected to the negative pole of the DC bus, and the source of the first planar device is connected to the drain of the second planar device.

[0060] For example, when the single-phase half-bridge circuit uses the planar device shown in FIG. 7 (i.e., the planar device is provided with a planar single-tube chip), in one planar device, the internal substrate is connected to the drain, and in the other planar device, the internal substrate is connected to the source, and the corresponding circuit is shown in FIG. 20, in the two planar devices, the source or drain that is not connected to the DC bus positive pole BUS+ or the DC bus negative pole BUS- is connected to each other to draw the potential at point x, and the DC bus positive pole BUS+ is connected to the first bridge arm. The DC bus positive terminal BUS+ and the DC bus negative terminal BUS- are connected to the drain D of the first planar device in the upper tube of the bridge arm, and the DC bus negative terminal BUS- is connected to the source S of the second planar device in the lower tube of the first bridge arm. A DC bus consisting of a first capacitor C1 and a second capacitor C2 is provided between the DC bus positive terminal BUS+ and the DC bus negative terminal BUS-. The substrate BS of the first planar device is connected to the drain D of the first planar device, and the substrate of the second planar device is connected to the source S of the second planar device. The potential at point x shows a high-frequency change in potential, and the potential at point o is unchanged.

[0061] Preferably, when the planar device shown in FIG. 7 is applied to a single-phase full-bridge circuit, the at least two planar devices further include a third planar device on an upper tube of a second bridge arm and a fourth planar device on a lower tube of a second bridge arm, wherein the drain of the third planar device is connected to the positive pole of the DC bus, the source of the fourth planar device is connected to the negative pole of the DC bus, and the source of the third planar device is connected to the drain of the fourth planar device.

[0062] An embodiment of the present application provides a switching function circuit, in which the planar device uses a half-bridge unidirectional chip as shown in FIG. 10, and includes at least one planar device and a DC bus, wherein the drain of each planar device is connected to the positive terminal of the DC bus, and the source of each planar device is connected to the negative terminal of the DC bus.

[0063] For example, when the single-phase half-bridge circuit uses the planar device shown in FIG. 10 (i.e., the planar device is provided with a half-bridge single-tube chip), the corresponding circuit is shown in FIG. 21, in which the x-point potential is drawn from the midpoint of the half-bridge of the planar device, the DC bus positive pole BUS+ is connected to the drain D of the planar device, the DC bus negative pole BUS- is connected to the source S of the planar device, and a DC bus consisting of a first capacitor C1 and a second capacitor C2 is provided between the DC bus positive pole BUS+ and the DC bus negative pole BUS-, and inside the planar device, the substrate BS of the planar device is electrically connected to the source S, the x-point potential exhibits high-frequency potential changes, and the o-point potential is unchanged.

[0064] An embodiment of the present application provides a switching function circuit, wherein the planar device uses the planar bidirectional chip shown in FIG. 14 , and includes at least two planar devices and a filter unit, and the filter unit includes at least one capacitor, and the at least two planar devices include a first planar device on a first bridge arm upper tube and a second planar device on a first bridge arm lower tube, a first source of the first planar device is connected to a first end of the filter unit, which is one end of the two single-phase AC lines, a first source of the second planar device is connected to a second end of the filter unit, which is the other end of the two single-phase AC lines, and a second source of the first planar device is connected to a second source of the second planar device.

[0065] For example, when the single-phase half-bridge circuit uses the planar device shown in FIG. 14 (i.e., the planar device is provided with a planar bidirectional chip), the corresponding circuit is shown in FIG. 22(a). In each planar device, the substrate BS inside the planar device is electrically connected to a first source S1, the first source S1 of the first planar device is connected to a first end of the filter unit, which is one end of the single-phase AC two-wire, the first source S1 of the second planar device is connected to a second end of the filter unit, which is the other end of the single-phase AC two-wire, and the second source S2 of the first planar device is connected to a second source S2 of the second planar device to extract the x-point potential. A filter unit consisting of a first capacitor C1 is provided between the single-phase AC two-wire (phase line L and zero line N), and one end of the first capacitor C1 is determined as the potential point o. The x-point potential represents a high-frequency change in potential, and the o-point potential changes at a low frequency according to the L / N AC power.

[0066] In addition, the filter unit may further include two or more capacitors. For example, the filter unit includes a first capacitor and a second capacitor, the first end of the first capacitor is the first end of the filter unit, the first end of the second capacitor is the second end of the filter unit, and the second end of the first capacitor is connected to the second end of the second capacitor.

[0067] For example, when the single-phase half-bridge circuit uses the planar devices shown in FIG. 14 (i.e., the planar devices are provided with planar bidirectional chips), the corresponding circuit is shown in FIG. 22(b), where in each planar device, the substrate BS inside the planar device is electrically connected to a first source S1, the first source S1 of the first planar device is connected to a first end of the filter unit, one end of the single-phase AC two-wire, and the first source S1 of the second planar device is connected to the filter The second end of the unit is connected to the other end of the two single-phase AC lines, and the second source S2 of the first planar device is connected to the second source S2 of the second planar device to extract the x-point potential. A filter unit consisting of a first capacitor C1 and a second capacitor C2 is provided between the phase line L and the zero line N, and the midpoint between the first capacitor C1 and the second capacitor C2 is determined as the potential point o. The x-point potential indicates a high-frequency change in potential, and the o-point potential changes or remains unchanged at low frequencies according to the L / N AC power.

[0068] An embodiment of the present application provides a switching function circuit, in which the planar device uses the planar bidirectional chip shown in FIG. 14 , and based on FIG. 22(b), the at least two planar devices further include a third planar device located on the upper tube of the second bridge arm and a fourth planar device located on the lower tube of the second bridge arm, wherein a first source of the third planar device is connected to a first end of the filter unit, which is one end of the two single-phase AC lines, a first source of the fourth planar device is connected to a second end of the filter unit, which is the other end of the two single-phase AC lines, and a second source of the third planar device is connected to a second source of the fourth planar device.

[0069] For example, when the single-phase full-bridge circuit uses the planar devices of FIG. 14, the corresponding circuit is shown in FIG. 23, which includes a first bridge arm and a second bridge arm. In the first bridge arm, the second sources S2 of the two planar devices (the first planar device and the third planar device) are connected to each other to draw the x-point potential. In the second bridge arm, the second sources S2 of the two planar devices (the second planar device and the fourth planar device) are connected to each other to draw the y-point potential. One end (phase line L) of the single-phase AC two-wire is connected to the first planar device on the upper tube of the first bridge arm and the second planar device on the upper tube of the second bridge arm. The other end (zero potential line N) of the single-phase AC two-wire is connected to the first source S1 of the third planar device, and the other end (zero potential line N) of the single-phase AC two-wire is connected to the second planar device in the first bridge arm lower tube and the first source S1 of the fourth planar device in the second bridge arm lower tube. A filter unit consisting of a first capacitor C1 and a second capacitor C2 is provided between the single-phase AC two-wire (phase line L and zero potential line N). The midpoint between the first capacitor C1 and the second capacitor C2 is determined as the potential point o. Inside the planar device, the substrate of each planar device is electrically connected to the first source, and the potential at x / y point shows a high-frequency change in potential, and the potential at o point changes or remains unchanged at low frequency with the L / N AC power.

[0070] An embodiment of the present application provides a switching function circuit, in which the planar device uses a planar bidirectional chip as shown in FIG. 14, and includes three planar devices, a first impedance element, a second impedance element, a third impedance element, a first capacitor, a second capacitor, and a third capacitor, the three planar devices including a first planar device in a first bridge arm, a second planar device in a second bridge arm, and a third planar device in a third bridge arm, and a first AC phase line is connected to the first planar device through the first impedance element. a second source of the second planar device and a first end of the first capacitor, a second AC phase line is connected via the second impedance element to the second source of the second planar device and the first end of the second capacitor, a third AC phase line is connected via the third impedance element to the second source of the third planar device and the first end of the third capacitor, the first source of the first planar device is connected to the first source of the second planar device and the first source of the third planar device, and the second end of the first capacitor, the second end of the second capacitor, and the second end of the third capacitor are connected.

[0071] For example, when a three-phase half-controlled bridge circuit uses the planar device of FIG. 14, the corresponding circuit is shown in FIG. 24, which includes a first bridge arm, a second bridge arm, and a third bridge arm, in which the second source S2 in the first planar device on the first bridge arm is connected to a first end of a first capacitor C1 and is led from the connection point to the A-phase AC phase line (i.e., the first AC phase line) through a first impedance element Z1, in the second planar device on the second bridge arm, the second source S2 is connected to a first end of a second capacitor C2 and is led from the connection point to the B-phase AC phase line (i.e., the second AC phase line) through a second impedance element Z2, and in the third bridge arm In the third planar device, the second source S2 is connected to the first end of the third capacitor C3 and is drawn from the connection point to the C-phase AC phase line (i.e., the third AC phase line) through the third impedance element Z3. The first sources S1 of the first, second, and third planar devices are connected to draw the potential at point x. The second ends of the first, second, and third capacitors C1, C2, and C3 are connected to draw the potential at point o. Within the planar devices, the substrates of each planar device are electrically connected to the first source. The potential at point x exhibits high-frequency changes in potential, and the potential at point o changes at low frequencies with the A / B / C AC power or does not change.

[0072] An embodiment of the present application provides a switching function circuit, in which the planar device uses a planar bidirectional chip as shown in FIG. 14, and includes six planar devices, a first impedance element, a second impedance element, a third impedance element, a first capacitor, a second capacitor and a third capacitor, the six planar devices including a first planar device on a first bridge arm upper tube, a second planar device on a second bridge arm upper tube, a third planar device on a third bridge arm upper tube, a fourth planar device on a first bridge arm lower tube, a fifth planar device on a second bridge arm lower tube and a sixth planar device on a third bridge arm lower tube, a first AC phase line is connected to a second source of the fourth planar device and a second source of the first planar device through the first impedance element, and a second AC phase line is connected to a second source of the fourth planar device and a second source of the first planar device through the first impedance element. a phase wire is connected to the second source of the fifth planar device and the second source of the second planar device via the second impedance element; a third AC phase wire is connected to the second source of the sixth planar device and the second source of the third planar device via the third impedance element; a first source of the first planar device is connected to the first source of the second planar device and the first source of the third planar device; a first source of the fourth planar device is connected to the first source of the fifth planar device and the first source of the sixth planar device; a first end of a first capacitor is connected to the first AC phase wire; a first end of a second capacitor is connected to the second AC phase wire; a first end of a third capacitor is connected to the third AC phase wire; and the second end of the first capacitor, the second end of the second capacitor, and the second end of the third capacitor are connected.

[0073] For example, when a three-phase fully controlled bridge circuit uses the planar devices of FIG. 14, the corresponding circuit is shown in FIG. 25, which includes a first bridge arm, a second bridge arm, and a third bridge arm, in which the second sources S2 of the two planar devices (the first and fourth planar devices) on the first bridge arm are connected to each other and are drawn from the connection point to the A-phase AC phase line (i.e., the first AC phase line) through a first impedance element Z1, the second sources S2 of the two planar devices (the second and fifth planar devices) on the second bridge arm are connected to each other and are drawn from the connection point to the B-phase AC phase line (i.e., the second AC phase line) through a second impedance element Z2, and the second sources S2 of the two planar devices (the third and sixth planar devices) on the third bridge arm are connected to each other and are drawn from the connection point to the B-phase AC phase line (i.e., the second AC phase line) through a third impedance element Z3. A first end of the first capacitor C1 is connected to the first AC phase line (A-phase AC phase line), and a first end of the second capacitor C2 is connected to the second AC phase line (B-phase AC phase line). The first sources S1 of the first planar device, the third planar device, and the fifth planar device are connected to each other to draw an x-point potential. The first sources S1 of the second planar device, the fourth planar device, and the sixth planar device are connected to each other to draw an y-point potential. The first end of the third capacitor C3 is connected to the third AC phase line (phase C AC phase line), the second end of the first capacitor C1, the second end of the second capacitor C2 and the second end of the third capacitor C3 are connected to obtain a common connection point o, the substrate BS and the first source S1 of each planar device are connected to each other, in the planar device, the potential at point x / y shows a high-frequency change of potential, and the potential at point o changes or does not change with the A / B / C AC power at a low frequency.

[0074] An embodiment of the present application provides a switching function circuit, in which the planar device uses a planar bidirectional chip as shown in FIG. 17, and includes at least one planar device and a filter unit, the filter unit including at least one capacitor, a first source of each planar device connected to a first end of the filter unit, which is one end of the two single-phase AC lines, and a second source of each planar device connected to a second end of the filter unit, which is the other end of the two single-phase AC lines.

[0075] For example, when the single-phase full-bridge circuit uses the planar device of FIG. 17, the corresponding circuit is shown in FIG. 26(a), which includes a first planar device and a second planar device, where the y-point potential is derived from the midpoint of the half-bridge of the first planar device and the x-point potential is derived from the midpoint of the half-bridge of the second planar device, the first source S1 of each planar device is connected to the first end of the filter unit, which is one end of the two single-phase AC lines, and the second source S2 of each planar device is connected to the second end of the filter unit, which is the other end of the two single-phase AC lines, and a filter unit consisting of a first capacitor C1 is provided between the two single-phase AC lines (phase line L and zero line N), and the substrate BS of each planar device is connected to the first source S1, and in the planar devices, the x-point potential shows high-frequency changes in potential, and the o-point potential changes at low frequency according to the L / N AC power.

[0076] In addition, the filter unit may further include two capacitors, for example, the filter unit includes a first capacitor and a second capacitor, in which case the first end of the first capacitor is the first end of the filter unit, the first end of the second capacitor is the second end of the filter unit, and the second end of the first capacitor is connected to the second end of the second capacitor.

[0077] For example, when the single-phase full-bridge circuit uses the planar device shown in FIG. 17, the corresponding circuit is shown in FIG. 26(b), which includes a first planar device and a second planar device. The y-point potential is derived from the midpoint of the half-bridge of the first planar device, and the x-point potential is derived from the midpoint of the half-bridge of the second planar device. The first source S1 of each planar device is connected to the first end of the filter unit, which is one end of the two single-phase AC lines. The second source S2 of each planar device is connected to the second end of the filter unit, which is the other end of the two single-phase AC lines. A filter unit consisting of a first capacitor C1 and a second capacitor C2 is provided between the two single-phase AC lines (phase line L and zero line N). The substrate BS of each planar device is connected to the first source S1. In the planar devices, the x-point potential exhibits high-frequency changes in potential, and the o-point potential changes at low frequency according to the L / N AC power, or does not change.

[0078] As those skilled in the art will clearly know, for the convenience and brevity of description, the specific operation steps of the above-described systems, devices and units may be referred to the corresponding steps in the above-described method embodiments, and will not be repeated here.

[0079] Furthermore, in the description of the embodiments of the present application, unless otherwise expressly specified or limited, the terms "attached," "coupled," "connected," etc. should be understood in a broad sense, and may refer to, for example, a fixed connection, a detachable connection, or an integral connection, a mechanical connection, an electrical connection, a direct connection, an indirect connection via an intermediate medium, or even internal communication between two elements. Those skilled in the art can understand the specific meanings of the above terms in the present application according to specific circumstances.

[0080] The functions may be realized in the form of a software functional unit and stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the essence of the technical solution of the present application, or a part of the technical solution that contributes to the prior art, may be embodied in the form of a software product, and the computer software product is stored in a storage medium and includes several instructions for causing a computer device (such as a personal computer, a server, or a network device) to perform all or some of the steps of the methods described in each embodiment of the present application. The above-mentioned storage medium includes media that can store program code, such as a U disk, a portable hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0081] In the description of this application, the orientations or positional relationships indicated by terms such as "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer" are orientations or positional relationships according to the drawings, and do not indicate or imply that the indicated devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are merely used for the convenience and simplification of the description of this application, and do not limit the application. Furthermore, the terms "first," "second," and "third" do not indicate or imply relative importance, and are merely used for description purposes.

[0082] Finally, the above examples are only specific embodiments of the present application, do not limit the technical solutions of the present application, and are used to explain the technical solutions of the present application, but do not limit the scope of protection of the present application. Although the present application has been described in detail with reference to the above examples, it is understood by those skilled in the art that, within the technical scope disclosed in the present application, those skilled in the art may still make amendments or modifications to the technical solutions described in the above examples, or may make equivalent substitutions for some technical features, and these amendments, modifications or substitutions shall not deviate from the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the examples of the present application, and all fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined based on the scope of protection of the claims.

Claims

1. A planar device, at least one chip and a substrate; the tip includes a base; the base is provided on a side of the chip that is closer to the substrate and is electrically connected to the substrate; At least one source and at least one gate are provided on the side of the chip away from the substrate; the at least one source and the at least one gate are both electrically connected to the chip; 1. A planar device, wherein the substrate is connected to a target potential point, the target potential point being used to maintain the potential of the substrate in a low-frequency varying state or in a steady state.

2. 2. The planar device of claim 1, wherein the substrate is electrically connected to either the source or the drain, and the either the source or the drain is at the same potential as the substrate.

3. 2. The planar device of claim 1, wherein the substrate is a copper substrate or a copper on one side of a direct bond copper ceramic substrate.

4. 2. The planar device according to claim 1, wherein the target potential point is a static potential point or a low-frequency potential point.

5. 2. The planar device of claim 1, wherein the target potential point is an AC phase / line voltage potential point or a DC bus voltage potential point.

6. the at least one chip is a planar mono-tube chip; A planar device according to any one of claims 2 to 5, characterized in that one source, one gate and one drain are provided on the side of the planar single-tube chip away from the substrate.

7. the at least one chip is a half-bridge unidirectional chip, and the planar device further includes a half-bridge midpoint; a first source, a first drain, a first gate, and a second gate are provided on a side of the half-bridge unidirectional chip away from the substrate; The planar device of any one of claims 2 to 5, wherein the first source, the first drain, the first gate, the second gate and the half-bridge midpoint are each connected to the half-bridge unidirectional chip.

8. the at least one chip is a planar bidirectional chip; a first source, a second source, a first gate, and a second gate are provided on a side of the planar bidirectional chip away from the substrate; 6. The planar device of claim 2, wherein the first source, the second source, the first gate and the second gate are each connected to the planar bidirectional chip.

9. the at least one chip includes a first planar bidirectional chip and a second planar bidirectional chip, the planar device further including a half-bridge midpoint; a first source, a first gate, and a second gate are provided on a side of the first planar bidirectional chip away from the substrate; a second source, a third gate, and a fourth gate are provided on a side of the second planar bidirectional chip away from the substrate; A planar device as described in any one of claims 2 to 5, characterized in that the first source, the first gate, and the second gate are each connected to a first side of the first planar bidirectional chip, the second source, the third gate, and the fourth gate are each connected to a first side of the second planar bidirectional chip, and the second side of the first planar bidirectional chip and the second side of the second planar bidirectional chip are connected and led out to the half-bridge midpoint.

10. A switching function circuit, 7. A circuit comprising at least two planar devices according to claim 6 and a DC bus, the at least two planar devices include a first planar device on the first bridge arm upper tube and a second planar device on the first bridge arm lower tube; the drain of the first planar device is connected to the positive terminal of the DC bus; the source of the second planar device is connected to the negative terminal of the DC bus; A switching function circuit, wherein the source of the first planar device is connected to the drain of the second planar device.

11. the at least two planar devices further include a third planar device on the second bridge arm upper tube and a fourth planar device on the second bridge arm lower tube; the drain of the third planar device is connected to the positive terminal of the DC bus; the source of the fourth planar device is connected to the negative terminal of the DC bus; 11. The switching function circuit of claim 10, wherein the source of the third planar device is connected to the drain of the fourth planar device.

12. A switching function circuit, 8. A circuit comprising at least one planar device according to claim 7 and a DC bus, the drain of each planar device is connected to the positive terminal of the DC bus; A switching function circuit, characterized in that the source of each planar device is connected to the negative terminal of said DC bus.

13. A switching function circuit, 9. A filter unit comprising at least two planar devices according to claim 8, the filter unit comprising at least one capacitor; the at least two planar devices include a first planar device on the first bridge arm upper tube and a second planar device on the first bridge arm lower tube; a first source of the first planar device is connected to a first end of the filter unit, one end of two single-phase AC lines; a first source of the second planar device connected to the second end of the filter unit and the other end of the two single-phase AC lines; A switching function circuit, wherein a second source of the first planar device is connected to a second source of the second planar device.

14. the at least two planar devices further include a third planar device on the second bridge arm upper tube and a fourth planar device on the second bridge arm lower tube; a first source of the third planar device is connected to a first end of the filter unit, one end of two single-phase AC lines; a first source of the fourth planar device connected to the second end of the filter unit and the other end of the two single-phase AC lines; 14. The switching function circuit of claim 13, wherein a second source of the third planar device is connected to a second source of the fourth planar device.

15. A switching function circuit, 9. A planar device according to claim 8, comprising: a first impedance element, a second impedance element, a third impedance element, a first capacitor, a second capacitor, and a third capacitor; the three planar devices include a first planar device on a first bridge arm, a second planar device on a second bridge arm, and a third planar device on a third bridge arm; a first AC phase line connected to the second source of the first planar device and the first end of the first capacitor via the first impedance element; a second AC phase line connected to a second source of the second planar device and a first end of the second capacitor via the second impedance element; a third AC phase line connected to the second source of the third planar device and the first end of the third capacitor via the third impedance element; a first source of the first planar device is connected to a first source of the second planar device and a first source of the third planar device; A switching function circuit, comprising: a second end of the first capacitor, a second end of the second capacitor, and a second end of the third capacitor, the second end being connected together.

16. A switching function circuit, 9. The planar device according to claim 8, comprising: a first impedance element, a second impedance element, a third impedance element, a first capacitor, a second capacitor, and a third capacitor; the six planar devices include a first planar device on the first bridge arm upper tube, a second planar device on the second bridge arm upper tube, a third planar device on the third bridge arm upper tube, a fourth planar device on the first bridge arm lower tube, a fifth planar device on the second bridge arm lower tube, and a sixth planar device on the third bridge arm lower tube; a first AC phase line connected to the second source of the fourth planar device and the second source of the first planar device via the first impedance element; a second AC phase line connected to the second source of the fifth planar device and the second source of the second planar device via the second impedance element; a third AC phase line connected to the second source of the sixth planar device and the second source of the third planar device via the third impedance element; a first source of the first planar device is connected to a first source of the second planar device and a first source of the third planar device; a first source of the fourth planar device is connected to a first source of the fifth planar device and a first source of the sixth planar device; A switching function circuit, characterized in that a first end of a first capacitor is connected to a first AC phase line, a first end of a second capacitor is connected to a second AC phase line, a first end of a third capacitor is connected to a third AC phase line, and a second end of the first capacitor, a second end of the second capacitor, and a second end of the third capacitor are connected.

17. A switching function circuit, 10. A filter unit comprising at least one planar device according to claim 9, wherein the filter unit comprises at least one capacitor; A first source of each planar device is connected to a first end of the filter unit, that is, one end of the two single-phase AC lines; A switching function circuit, characterized in that a second source of each planar device is connected to a second end of the filter unit and the other end of the two single-phase AC lines.

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