Method for reducing micro- and macro-scalloping in semiconductor devices
A three-step etching process with oxidation and post-etching reduces sidewall thickness variations in semiconductor devices, enhancing production efficiency and reliability.
Patent Information
- Application Number
- JP2025543035
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-01-24
- Filing Date
- 2023-11-03
- Publication Date
- 2026-02-06
AI Technical Summary
Existing etching methods for through vias and trenches in semiconductor devices result in large sidewall thickness variations, leading to ineffective filling and reduced yield, and are impractical for mass production, with high plasma etching costs.
A three-step etching process involving a first etching process, an oxidation process to form an oxide layer on sidewalls, and a second etching process to reduce sidewall thickness variations, using specific gases and conditions to achieve high etch rates and uniformity.
The method enables the formation of features with reduced sidewall thickness variations, improving device reliability and enabling mass production with controlled costs.
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Figure 2026504680000001_ABST
Abstract
Description
[Technical Field]
[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure generally relate to etching processes for structures in semiconductor applications. In particular, embodiments of the present disclosure provide methods for etching multi-material layers to form features therein having sidewalls with reduced sidewall thickness variation. [Background technology]
[0002] Smaller and lighter electronic devices with higher performance and improved functionality are adopting three-dimensional (3D) integrated circuits (ICs) designed with through vias and trenches. Through vias and trenches are used for electrical connections through multiple material layers formed on a semiconductor substrate. The adoption of through vias and trenches has faced high costs and challenges associated with mass production. One such challenge includes creating through vias and trenches with sidewalls that have reduced sidewall thickness variation. Through vias and trenches with reduced sidewall thickness variation are generally more robust and can be effectively filled with materials such as dielectrics and metals. In contrast, through vias and trenches with large sidewall thickness variations (e.g., scalloped sidewalls) can result in ineffective filling, leading to reduced yield and long-term device reliability issues. Unfortunately, existing etching methods create through vias and trenches with large sidewall thickness variations and / or are impractical for mass production. Another factor affecting the adoption of through vias and trenches includes the cost of performing plasma etching, which is affected, for example, by the overall etch rate. Summary of the Invention [Problem to be solved by the invention]
[0003] Therefore, there is a need for a method for performing an etching process to form features in multi-material layers with high etch rates and reduced sidewall thickness variation. [Means for solving the problem]
[0004] An embodiment of the present disclosure provides a method for patterning a material layer on a substrate. The method includes forming a hard mask layer on a material layer disposed on the substrate. The material layer includes a plurality of first layers and a plurality of second layers formed alternately on the substrate. The method further includes performing a first etching process to form features in the material layer through the hard mask layer by supplying a first etching gas, performing an oxidation process to oxidize sidewalls of the features by supplying an oxidizing gas, and performing a second etching process to etch sidewalls of the features formed in the material layer by supplying a second etching gas.
[0005]
[0009] Embodiments of the present disclosure also provide a method for etching a material layer on a substrate through a hard mask in a processing chamber. The method includes supplying a first etching gas to a material layer having a hard mask formed thereon in the processing chamber to form features in the material layer. The material layer includes a plurality of first layers and a plurality of second layers formed alternately on the substrate. The method further includes, following the supplying of the first etching gas, supplying an oxidizing gas to oxidize sidewalls of the features, and following the supplying of the oxidizing gas, exposing the features to a second etching gas.
[0006] Embodiments of the present disclosure also provide a method for reducing sidewall thickness variation of a feature etched into a material layer, the method including: flowing an oxidizing gas through a material layer in a processing chamber, the material layer including a plurality of first layers and a plurality of second layers formed alternatingly on a substrate; and forming an oxide layer on the sidewall of the feature, the oxide layer having a first side and a second side, the first side of the oxide layer being disposed over and conformal to a contour of the feature, and the second side of the oxide layer having a second-side variation of about 1 nm to about 2 nm, the second-side variation being the difference between a maximum point on the second side and a minimum point on the second side.
[0007] So that the above-recited features of the present disclosure may be achieved and understood in detail, a more particular description of the present disclosure briefly summarized above may be had by reference to embodiments of the disclosure that are illustrated in the accompanying drawings. [Brief explanation of the drawings]
[0008] [Figure 1] 1 is a flow diagram of a method for patterning a layer of material on a substrate in accordance with one or more embodiments of the present disclosure. [Figure 2A] FIG. 1 is a schematic cross-sectional view of a structure prior to a main etch process, in accordance with one or more embodiments of the present disclosure. [Figure 2B] FIG. 1 is a schematic cross-sectional view of a structure having a hard mask layer and an adhesion layer disposed thereon prior to a main etching process, in accordance with one or more embodiments of the present disclosure. [Figure 2C] 1 is a schematic cross-sectional view of a feature formed in a multi-material layer prior to an oxidation process, in accordance with one or more embodiments of the present disclosure. [Figure 2D] 2 is a schematic cross-sectional view of a feature formed in a multi-material layer 204 after a post-etching process in accordance with one or more embodiments of the present disclosure. [Figure 3A] 1 is a schematic cross-sectional view of a portion of a structure prior to oxidation, according to one or more embodiments of the present disclosure. [Figure 3B] 1 is a schematic cross-sectional view of a portion of a structure after oxidation, according to one or more embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION
[0009] For ease of understanding, identical reference numerals have been used, where possible, to designate identical elements common to the figures. It is intended that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.
[0010] It should be noted, however, that the attached drawings illustrate only exemplary embodiments of the present disclosure and therefore should not be considered as limiting the scope of the present disclosure, as the present disclosure may admit of other equally effective embodiments.
[0011] A method is provided for patterning features in a multi-material layer with reduced sidewall thickness variation, the method utilizing a first etching process to form features in the material layer through a hard mask layer by supplying a first etching gas, performing an oxidation process to oxidize the sidewalls of the features by supplying an oxidizing gas, and performing a second etching process to etch the sidewalls of the features formed in the material layer by supplying a second etching gas, thereby forming features with reduced sidewall thickness variation at a high overall etch rate.
[0012] A processing chamber that may be adapted to benefit from the present disclosure is the CENTRIS® Sym3™ processing chamber available from Applied Materials, Inc., Santa Clara, Calif. It is contemplated that other process chambers, including those from other manufacturers, may be adapted to carry out embodiments of the present disclosure.
[0013] Figure 1 is a flow diagram of a method 100 for patterning a material layer disposed on a substrate. Figures 2A-2D are cross-sectional views of a structure 200 formed on a substrate 202 corresponding to various stages of the method 100. The method 100 can be utilized to etch high aspect ratio features, for example, features with a ratio greater than 10:1, into a material layer.
[0014] The substrate 202 can be a silicon-based material, a suitable insulating material, or a conductive material, depending on the desired implementation. The substrate 202 can be crystalline silicon (e.g., Si <100> or Si <111> The substrate 202 may include materials such as silicon dioxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers and patterned or unpatterned wafers, silicon-on-insulator (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, or sapphire. The substrate 202 may have various diameters, such as 200 mm, 300 mm, 450 mm, or other diameters, as well as rectangular or square substrates. Unless otherwise noted, the embodiments and examples described herein are performed on substrates with a 200 mm diameter, 300 mm diameter, or 450 mm diameter substrate. In embodiments in which an SOI structure is utilized for the substrate 202, the substrate 202 may include a buried dielectric layer disposed on a silicon crystalline substrate. In the example shown herein, the substrate 202 is a crystalline silicon substrate.
[0015] As shown in FIG. 2A, structure 200 can include a multi-material layer 204 formed of a conductive material and utilized as part of an integrated circuit, such as gate electrodes, interconnect lines, and contact plugs. In some embodiments, multi-material layer 204 includes several stacked layers formed on substrate 202. Multi-material layer 204 can include first layers 206 and second layers 208 formed in alternating order on substrate 202. While FIG. 2A shows six repeating layers of first layers 206 and second layers 208 formed in alternating order on substrate 202, any desired number of repeating pairs of first layers 206 and second layers 208 can be utilized.
[0016] In some examples, the multi-material layer 204 may be formed of a refractory metal such as tungsten (W), molybdenum (Mo), tantalum (Ta), titanium (Ti), hafnium (Hf), vanadium (V), chromium (Cr), manganese (Mn), ruthenium (Ru), alloys thereof, suicide compounds thereof, nitride compounds thereof, or combinations thereof. In other examples, the first layer 206 and the second layer 208 may be other metals such as copper (Cu), nickel (Ni), cobalt (Co), iron (Fe), aluminum (Al), palladium (Pd), gold (Au), silver (Au), platinum (Pt), alloys thereof, nitride compounds thereof, or combinations thereof. In one embodiment, the first layer 206 is formed of silicon germanium (SiGe), and the second layer 208 is formed of silicon (Si). The multi-material layer 204 can have a total thickness of about 0.2 μm to about 25 μm. The first layers 206 can each have a thickness of about 10 nm to about 100 nm. The second layers 208 can each have a thickness of about 10 nm to about 100 nm.
[0017] In step 101, prior to the etching process, an etch-resist hard mask layer 210 is formed on a multi-material layer 204 disposed over a substrate in a processing chamber. As shown in FIG. 2B, structure 200 includes a hard mask layer 210 formed in a desired pattern on multi-material layer 204. The pattern of hard mask layer 210 can have openings 214 with dimensions of about 1.0 μm to about 1.3 μm to form features with a high aspect ratio (e.g., greater than about 5:1) and a pitch between adjacent openings 214 that is between about 50 nm and about 180 nm. Structure 200 can include an adhesion layer 212 formed between multi-material layer 204 and hard mask layer 210. Adhesion layer 212 can function as a barrier layer between multi-material layer 204 and hard mask layer 210. Adhesion layer 212 can also function as a polish stop for a subsequent chemical-mechanical polishing (CMP) step.
[0018] The hard mask layer 210 may be formed of tetraethyl orthosilicate (TEOS) or silicon oxynitride (SiON) and have a thickness of about 0.5 μm and about 2 μm. The adhesion layer 212 may be formed of any dielectric material, such as silicon nitride (SiN), and have a thickness of less than about 100 nm. The hard mask layer 210 and the adhesion layer 212 may be deposited by any suitable deposition process, such as a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, an atomic layer deposition (ALD) process, or a spin-on process. The hard mask layer 210 and / or the adhesion layer 212 are subsequently patterned by a photolithography process using a patterned photoresist layer (not shown) covering the hard mask layer 210.
[0019] In some embodiments, additional layers, such as an advanced patterned film (APF), a dielectric antireflective coating (DARC), a bottom antireflective coating (BARC), a top antireflective coating (TARC), a photoresist (PR) layer, a carbon layer, or other suitable layers, may be disposed on the hard mask layer 210. The APF may include a carbon film, an amorphous carbon film, or other suitable APF. The APF layer may have a thickness of about 250 nm to about 750 nm, such as about 500 nm. The DARC may have a thickness of about 25 nm to about 100 nm, such as about 80 nm. The BARC may have a thickness of about 10 nm to about 50 nm, such as about 25 nm. The TARC may have a thickness of about 10 nm to about 50 nm, such as about 25 nm. The PR layer may include a photosensitive material, such as a polymer, a sensitizer, or a baked solvent. The PR layer may have a thickness of about 50 nm to about 500 nm, such as about 150 nm.
[0020] In step 102, as shown in FIG. 2C, a first etching process (also referred to as a "main etch" process) is performed to form features 218 (e.g., trenches or vias) in the multi-material layer 204 through the hard mask layer 210. The features 218 may be formed using plasma-excited species or radicals in a plasma processing chamber. In the main etch process in step 104, the multi-material layer 204 is etched to a predetermined depth using an etching gas. In some embodiments, a process gas may be flowed along with the etching gas. In one embodiment, an HBr process gas / Cl 2 etching gas mixture may be used because a chlorine-containing etching gas provides a fast etch rate for the multi-material layer 204. In some embodiments, the fast etch rate is between about 100 nm / min and about 200 nm / min. In other embodiments, the fast etch rate is greater than about 200 nm / min. The main etch process may continue until the depth of the features 218 in the multi-material layer 204 reaches the predetermined depth. In some embodiments, the determined depth of feature 218 in multi-material layer 204 is between about 0.2 μm and about 4.5 μm. In other embodiments, the depth of the main etch process is between one first layer 206 and one second layer 208, for example, between about 20 nm and about 60 nm, and can be repeated until the depth of feature 218 reaches the predetermined depth.
[0021] During the main etch process in step 102, due to the difference between the etch rates of the first layer 206 and the second layer 208, the features 218 (e.g., trenches or vias) etched into the multi-material layer 204 may have rough sidewalls with scallop-like shapes (referred to as "scallops"), protrusions, and recesses, or other rough feature profiles. In the example shown in Figure 2C, the first layer 206 has a slower etch rate than the second layer 208 during the main etch process in step 104 using the etchant gas mixture.
[0022] FIG. 3A is a schematic cross-sectional view of a portion of structure 200 prior to an oxidation process. As a result of the etch rate variations, as shown in FIG. 3A, first layer 206 includes recesses 340 that are recessed relative to second layer 208, and second layer 208 includes protrusions 350 that protrude relative to first layer 206. The combination of recesses 340 and protrusions 350 is collectively referred to as "scalloping." In some embodiments, protrusions 350 and recesses 340 may not be directly aligned with first layer 206 and second layer 208, respectively. For example, recesses 340 may occur in portions of first layer 206 and second layer 208, or protrusions 350 may occur in portions of first layer 206 and second layer 208. Protrusions 350 and recesses 340 increase the surface area compared to the desired planar surface of the trench or via.
[0023] Suitable examples of process gases include, but are not limited to, hydrocarbon-containing gases such as methane (CH), sulfur hexafluoride (SF), silicon chloride (SiCl), carbon tetrafluoride (CF), hydrogen bromide (HBr), argon gas (Ar), chlorine (Cl), nitrogen (N), helium (He), and oxygen gas (O). Additionally, process gases can include nitrogen-, chlorine-, fluorine-, oxygen-, and hydrogen-containing gases, such as BCl, C2F4, C4F8, C4F6, CHF3, CH2F2, CH3F, NF3, NH3, CO2, SO2, CO, N2, NO2, NO, and H2. Suitable examples of etching gases include SF6, or chlorine-containing gases such as Cl2, SiCl4, BCl3, SiHCl3, SiH2Cl2, SiH3Cl, Si2Cl6, or combinations thereof. In one embodiment, the chlorine-containing etching gas includes SiCl4, Cl2, and BCl3.
[0024] During the main etching process in step 104, several process parameters can be further adjusted. In one embodiment, an etching gas, such as chlorine, is supplied at a flow rate between about 10 sccm and about 1000 sccm, such as between about 30 sccm and about 800 sccm, such as between about 100 sccm and about 500 sccm. A process gas, such as HBr, can be supplied at a flow rate between about 50 sccm and about 1000 sccm, such as about 300 sccm. In one embodiment, the ratio of process gas to etching gas (P:E ratio), such as HBr:Cl, can be between about 1:10 and about 10:1, such as about 3:2 (e.g., about 300 sccm HBr to about 200 sccm Cl). Increasing the process gas in the P:E ratio can drive the scallops deeper into the trench or via. Too little process gas can result in less bowing of the scallops, but can also result in greater lateral loss due to the high amount of etching gas. If the amount of processing gas is too much, the etching rate will decrease due to a lack of etching gas, and warping will increase.
[0025] In one embodiment, the process pressure in the plasma processing chamber is adjusted to about 3 mTorr to about 100 mTorr, such as about 10 mTorr to about 50 mTorr, such as about 15 mTorr. Lowering the chamber pressure can achieve more directional etching, minimize lateral etching, and create less bowing.
[0026] In one embodiment, a second etching gas can be flowed into the chamber using the process gas and the etching gas. The second etching gas can include a silicon-containing etching gas. Suitable examples of the silicon-containing etching gas include SiCl4, SiHCl3, SiH2Cl2, SiH3Cl, and Si2Cl6. The silicon-containing etching gas can contribute to silicon oxide passivation of the sidewalls, thereby reducing scalloping. The silicon-containing etching gas can be flowed into the chamber at a flow rate between about 0 sccm and about 100 sccm, for example, between about 5 sccm and about 50 sccm, such as about 20 sccm. However, a larger amount of silicon-containing etching gas can contribute to a slower etch rate.
[0027] RF source and / or bias power can be utilized during the main etching process in step 104. The RF bias power applied when supplying the etching gas helps form a reactive etchant with a desired directionality to migrate downward from the hard mask layer 210 to the exposed surface of the multi-material layer 204 and preferentially etch the multi-material layer 204. In contrast, removing the RF bias power can help distribute the reactive species in the plasma more uniformly across the hard mask layer 210. For example, an RF source power of about 500 Watts to about 2000 Watts can be applied to maintain the plasma inside the processing chamber. An RF bias power of about 500 Watts to about 6000 Watts, such as about 1500 Watts, can be applied.
[0028] The substrate support pedestal for supporting the substrate 202 is maintained at a temperature between about 50° C. and about 290° C., for example, about 110° C., during the main etching process in step 104 .
[0029] In step 103, an oxidation process is performed to reduce sidewall thickness variations of the features 218 etched in the main etch process in step 104. The oxidation process includes flowing an oxidizing gas into the chamber to form an oxide layer 360, as shown in FIG. 3B. In one embodiment, between about 50 sccm and about 250 sccm, such as about 180 sccm, of the oxidizing gas is flowed into the chamber. The oxidizing gas may include O, HO, O (ozone), or a combination thereof. In some embodiments, the chamber pressure during the oxidation process is between about 10 mTorr and about 50 mTorr, such as about 20 mTorr. RF bias power may be applied to maintain a plasma inside the processing chamber. The RF bias power may be applied between about 500 watts and about 600 watts, such as about 2500 watts. In embodiments using O, a dry oxidation process is performed. In embodiments using HO, a wet oxidation process is performed. In one embodiment, the first layer 206 is formed of silicon germanium (SiGe) and the second layer 208 is formed of silicon (Si). An oxidation process forms a silicon oxide material (e.g., SiO) on the surfaces of the first layer 206 and the second layer 208.
[0030] FIG. 3B is a schematic cross-sectional view of a portion of structure 200 after an oxidation process. The increased surface area of scalloped recesses 340 and protrusions 350 promotes the growth of oxide layer 360. Oxide layer 360 further includes first side 362 and second side 364. First side 362 of oxide layer 360 is disposed on the sidewall of feature 218. In some embodiments, oxide layer 360 is disposed on and conformal to the contour of the sidewall of feature 218. Second side 364 of oxide layer 360 is substantially linear; for example, second side 364 has a second-side variation of between about 0 nm and about 5 nm, e.g., between about 1 nm and about 2 nm. The second-side variation is defined as the difference between the maximum point of second side 364 and the minimum point of second side 362. The growth of oxide layer 360 on the sidewalls of feature 218 results in reduced sidewall variation within the trench or via. Sidewall variation is defined as the difference between the maximum point of protrusion 350 and the minimum point of recess 340. The sidewall variation due to the oxidation process is between about 0 nm and about 5 nm, for example, between about 1 nm and about 2 nm.
[0031] In step 104, a second etching process (also referred to as a "post-etch" process) is performed to further reduce sidewall thickness variations of feature 218 etched in the main etching process in step 104. FIG. 2D is a schematic cross-sectional view of feature 218 formed in multi-material layer 204 after the post-etch process in step 104. A fluorine-containing etching gas can be used to remove the by-products of the oxidation process, thereby removing remaining sidewall variations from the oxidation process. As a result, protrusions 350 and recesses 340 formed on the sidewalls of feature 218 are removed or reduced to scallops having dimensions of less than about 1.5 nm. Suitable examples of fluorine-containing etching gases include SF, CHF, CF, CF, CHF, CF, CF, NF, HF, or combinations thereof.
[0032] In some embodiments, the post-etch process is performed by simultaneously supplying a fluorine-containing etching gas, a passivation gas, and an inert gas, such as argon (Ar), into the plasma processing chamber.
[0033] The passivation gas selectively passivates the sidewalls of the feature 218 to reduce the bow profile of the sidewalls of the feature 218. Suitable examples of passivation gases include HBr, BCl, SF, or H2S. In one embodiment, the fluorine-containing etch gas includes SF, and the passivation gas includes HBr.
[0034] An inert gas, such as argon (Ar), is delivered at a high flow rate to create a low pressure at or near the bottom of the feature 218 of the multi-material layer 204 so that the second etching gas reaches the bottom of the feature 218 of the multi-material layer 204. In this way, sidewall thickness variations of the feature 218 can be reduced.
[0035] During the post-etching process in step 104, several process parameters may be further adjusted. In one example, SF and HBr gases may be supplied at a flow rate of about 25 sccm to about 150 sccm, e.g., about 50 sccm, and about 10 sccm to about 1000 sccm, e.g., about 50 sccm, respectively. An inert gas such as argon (Ar) may be supplied at a flow rate of about 100 sccm to about 1000 sccm, e.g., about 900 sccm. The fluorine-containing etching gas may be supplied in pulses with a pulse duration of about 1 second to about 10 seconds, e.g., about 5 seconds. The duty cycle (i.e., the ratio of the "on" period during which the fluorine-containing etching gas is supplied to the "off" period during which the fluorine-containing etching gas is not supplied) may be about 1:3 to about 3:1, e.g., about 1:1. The post-etch process in step 104 can be repeated for about 6 seconds to about 1800 seconds, such as about 40 seconds, corresponding to about four pulse cycles, depending on the total thickness of the multi-material layer 304. In one embodiment, the process pressure in the plasma processing chamber is adjusted to about 10 mTorr to about 5000 mTorr, such as about 20 mTorr to about 500 mTorr.
[0036] RF source and / or bias power can be utilized during the etching process. For example, RF source power of less than about 2000 Watts can be applied to maintain a plasma inside the processing chamber. When a fluorine-containing etching gas is provided, RF bias power of less than about 6000 Watts can be applied, and RF bias power of between about 1000 Watts and about 6000 Watts can be applied.
[0037] The plasma processing chamber is maintained at a temperature between about 75° C. and about 150° C., for example, about 110° C., during the post-etch process in step 104 .
[0038] In some embodiments, the flow rate of SF6, the number of SF6 pulse periods, and the temperature in the plasma processing chamber are adjusted to tailor the thickness variation (eg, the magnitude of the scalloping) of the sidewalls of the feature 118.
[0039] In some embodiments, the trenches or vias are formed by main etching the multi-material layer 204, oxidizing the multi-material layer 204, and post-etching the multi-material layer 204. In other embodiments, the trenches or vias are formed by main etching a single first layer 206 and a single second layer 208, oxidizing the first layer 206 and the second layer 208, post-etching the first layer 206 and the second layer 208, and repeating the main etch, oxidation, and post-etch for each subsequent first layer 206 and second layer 208. In other embodiments, the trench or via is formed by main etching one or more first layers 206 and one or more second layers 208, oxidizing one or more first layers 206 and one or more second layers 208, post-etching one or more first layers 206 and one or more second layers 208, and repeating the main etch, oxidation, and post-etch for each subsequent one or more first layers 206 and one or more second layers 208.
[0040] Advantages of the present disclosure include improvements in patterning features with precise and uniform profiles for three-dimensional (3D) semiconductor device structures. Methods according to embodiments disclosed herein utilize a three-step etch process including a main etch process for forming features through a multi-material layer by continuously supplying an etch gas, an oxidation process for oxidizing the sidewalls of the features and reducing the sidewall thickness variation of the features, and a post-etch process for reducing the sidewall thickness variation of the features through the multi-material layer by pulsing the etch gas. The main etch process provides a fast etch rate through the multi-material layer, while the oxidation and post-etch processes are adjusted to reduce the sidewall thickness variation of the features to a desired sidewall thickness variation. By doing so, features with reduced sidewall thickness variation can be formed at a high overall etch rate.
[0041] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, the scope of which is determined by the claims that follow.
Claims
1. 1. A method for patterning a layer of material on a substrate, comprising: forming a hard mask layer on a material layer disposed on a substrate, the material layer including a plurality of first layers and a plurality of second layers alternately formed on the substrate; performing a first etching process to form features in the material layer through the hard mask layer by supplying a first etching gas; performing an oxidation process to oxidize sidewalls of the feature by supplying an oxidizing gas; performing a second etching process to etch the sidewalls of the feature formed in the material layer by supplying a second etching gas; A method comprising:
2. 2. The method of claim 1, wherein the plurality of first layers and the plurality of second layers comprise tungsten (W), molybdenum (Mo), tantalum (Ta), titanium (Ti), hafnium (Hf), vanadium (V), chromium (Cr), manganese (Mn), ruthenium (Ru), alloys thereof, suicide compounds thereof, nitride compounds thereof, copper (Cu), nickel (Ni), cobalt (Co), iron (Fe), aluminum (Al), palladium (Pd), gold (Au), silver (Au), platinum (Pt), alloys thereof, nitride compounds thereof, silicon germanium (SiGe), silicon (Si), or combinations thereof.
3. the material layer has a thickness between 0.2 μm and 25 μm; The method of claim 1 , wherein each layer of the plurality of first layers and the plurality of second layers each has a thickness between 10 nm and 30 nm.
4. 2. The method of claim 1, wherein a sidewall variation is between about 1 nm and about 2 nm, said sidewall variation being the difference between a maximum point of a convex portion of said sidewall and a minimum point of a concave portion of said sidewall.
5. The first etching gas is Cl 2 , SiCl 4 , BCl 3 , SiHCl 3 , SiH 2 Cl 2 , SiH 3 Cl, Si 2 Cl 6 or a combination thereof, The second etching gas is SF 6 , C.H. 2 F 4 , C 4 F 8 , C.F. 4 , CHF 3 , C 2 F 6 , C 3 F 8 , N.F. 3 , HF, or a combination thereof.
6. The oxidizing gas is O 2 , H 2 O, O 3 or a combination thereof.
7. The method of claim 1 , wherein the oxidizing gas is flowed at a flow rate between about 50 sccm and about 250 sccm during the oxidation process.
8. 10. The method of claim 1, wherein the chamber pressure during the oxidation process is between about 10 mTorr and about 50 mTorr, and an RF power bias is applied at between about 500 Watts and about 600 Watts.
9. 1. A method for etching a layer of material on a substrate through a hard mask in a processing chamber, comprising: supplying a first etching gas to a material layer having a hard mask formed thereon in a processing chamber to form features in the material layer, the material layer including a plurality of first layers and a plurality of second layers formed alternately on a substrate; subsequent to providing the first etching gas, providing an oxidizing gas to oxidize sidewalls of the feature; subsequent to providing the oxidizing gas, exposing the feature to a second etching gas; A method comprising:
10. 10. The method of claim 9, wherein the plurality of first layers and the plurality of second layers comprise tungsten (W), molybdenum (Mo), tantalum (Ta), titanium (Ti), hafnium (Hf), vanadium (V), chromium (Cr), manganese (Mn), ruthenium (Ru), alloys thereof, suicide compounds thereof, nitride compounds thereof, copper (Cu), nickel (Ni), cobalt (Co), iron (Fe), aluminum (Al), palladium (Pd), gold (Au), silver (Au), platinum (Pt), alloys thereof, nitride compounds thereof, silicon germanium (SiGe), silicon (Si), or combinations thereof.
11. the material layer has a thickness between 0.2 μm and 25 μm; 10. The method of claim 9, wherein each layer of the plurality of first layers and the plurality of second layers has a thickness between 10 nm and 30 nm.
12. 10. The method of claim 9, wherein the sidewall variation is between about 1 nm and about 2 nm, the sidewall variation being the difference between the maximum point of the protrusion of the sidewall and the minimum point of the recess of the sidewall.
13. The first etching gas is Cl 2 , SiCl 4 , BCl 3 , SiHCl 3 , SiH 2 Cl 2 , SiH 3 Cl, Si 2 Cl 6 or a combination thereof, The second etching gas is SF 6 , C.H. 2 F 4 , C 4 F 8 , C.F. 4 , CHF 3 , C 2 F 6 , C 3 F 8 , N.F. 3 10. The method of claim 9, comprising:
14. The oxidizing gas is O 2 , H 2 O, O 3 or a combination thereof.
15. 10. The method of claim 9, wherein the oxidizing gas is supplied at a flow rate between about 50 sccm and about 250 sccm.
16. 1. A method for reducing sidewall thickness variation of a feature etched into a material layer, comprising: flowing an oxidizing gas through a material layer in a processing chamber, the material layer including a plurality of first layers and a plurality of second layers formed alternately on a substrate; forming an oxide layer on the sidewall of the feature, the oxide layer having a first side and a second side, the first side of the oxide layer disposed over and conformally with a contour of the feature, and the second side of the oxide layer having a second-side variation of about 1 nm to about 2 nm, the second-side variation being the difference between a maximum point on the second side and a minimum point on the second side; A method comprising:
17. 17. The method of claim 16, wherein the plurality of first layers and the plurality of second layers comprise tungsten (W), molybdenum (Mo), tantalum (Ta), titanium (Ti), hafnium (Hf), vanadium (V), chromium (Cr), manganese (Mn), ruthenium (Ru), alloys thereof, suicide compounds thereof, nitride compounds thereof, copper (Cu), nickel (Ni), cobalt (Co), iron (Fe), aluminum (Al), palladium (Pd), gold (Au), silver (Au), platinum (Pt), alloys thereof, nitride compounds thereof, silicon germanium (SiGe), silicon (Si), or combinations thereof.
18. The oxidizing gas is O 2 , H 2 O, O 3 or a combination thereof.
19. The method of claim 16, wherein the oxidizing gas is flowed at a rate between about 50 sccm and about 250 sccm.
20. the material layer has a thickness between 0.2 μm and 25 μm; 17. The method of claim 16, wherein each layer of the plurality of first layers and the plurality of second layers has a thickness between 10 nm and 30 nm.