Method for manufacturing an electric wire arrangement and an electric wire arrangement

Abstract

The present invention relates to a method for manufacturing an electrical wire arrangement primarily for the microwave and / or millimeter wave frequency range, and to an electrical wire arrangement preferably manufactured by said method. A method for manufacturing an electrical wire arrangement includes the following steps: a) generating a support structure (20), wherein at least one first subregion (120) of the support structure (20) is generated by a freeform microstructuring method, at least one second subregion (220) of the support structure (20) comprises an electrically insulating material, and the support structure (20) has at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h) with respect to the projection direction (100); and b) generating at least one electrical wire structure (1) by coating the support structure (20) with at least one conductive material, wherein the coating includes at least one spatially oriented coating process oriented along the projection direction (100) that is aligned with the at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h). The invention makes it possible to provide integrated undercuts (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h) in a support structure (20), in particular to create a wire structure (1) on a substrate (40, 41) of a high frequency (HF) chip, or to create wire transitions (60a-60c, 61a-61c) in existing wire structures (50a-50c, 51a-51c).

Description

[Technical Field]

[0001] The present invention belongs to the field of microwave technology, and relates to a method for manufacturing electrical wiring arrangements, in particular for the microwave and / or millimeter wave frequency range, and preferably to electrical wiring manufactured by said method. The invention makes it possible to provide a support structure with an integrated undercut, in particular to create electrical wiring structures on the substrate of a radio frequency (RF) chip or to create electrical wiring transitions in existing electrical wiring structures. By appropriate design of the support structure, a wide variety of electrical wiring arrangement designs can be created. [Background technology]

[0002] Standaert et al., "Three Techniques for the Fabrication of High-Precision, mm-Sized Metal Components Based on Two-Photon Lithography, Applied to Manufacturing Horn Antennas for THz Transceivers," J. Micromech. Microeng. 28, 035008, 2018, describes the current state of RF component fabrication using two-photon lithography. In one method presented there, a support structure is first generated using two-photon lithography, and then its entire surface is deposited using a PVD process. A thicker copper layer is then formed using electroplating. This method does not allow for the creation of isolated conductive structures because the entire surface of the structure is covered by deposition, specifically to provide a "seed layer" for subsequent electroplating, thereby uniformly wetting the entire surface. After fabrication, the structure is manually or mechanically positioned, but it is not possible to subsequently fabricate corresponding components on substrates with other line structures.

[0003] M. Sterner et al., "Electrochemically Assisted Maskless Selective Removal of Metal Layers for Three-Dimensional Micromachined SOI RF MEMS Transmission Lines and Devices," J. Microelectromechanical Systems 20 (4), pp. 899-908, 2011, describes a method for producing electrical wire arrangements by first depositing a silicon covering layer that is selectively etched with the aid of a mask, and then under-etching an intermediate silicon dioxide layer that is placed between the silicon wafer and the silicon covering layer. In this case, the electrical wire arrangements are formed on the surface of the silicon covering layer by direct "visual contact" with the deposition source and remain electrically insulated from one another because the under-etching of the intermediate layer achieves the projection of a shadow of the silicon covering layer onto the silicon wafer. This allows for the creation of conductive structures that are insulated from one another. However, due to the fixed and low height of the silicon dioxide intermediate layer, conductive structures created on the surface of the silicon wafer by direct "line-of-sight" deposition of the deposition source may unintentionally remain in direct proximity to actual line structures on the surface of the silicon covering layer, and may, for example, electrically interfere with each other. Therefore, it is essential to remove these undesired structures to ensure electrical isolation of these conductive structures. In addition, due to the use of a planar layer structure made of silicon and silicon dioxide, followed by selective etching of the silicon covering layer using a mask, this method is limited to planar line configurations and, in particular, is unable to create line transitions.

[0004] AQ Liu, et al., "Low-loss lateral micromachined switches for high-frequency applications." Journal of micromechanics and microengineering 15.1, 2004, pp. 157-167, present two lateral RF MEMS switches. These switches are implemented in a quasi-finite coplanar waveguide (FGCPW) configuration and are actuated by electrostatic forces applied to cantilevers with high aspect ratios. These lateral switches are fabricated by deep reactive ion etching (DRIE) on silicon-on-insulator (SOI) wafers using shadow mask technology.

[0005] EP 511360 A1 discloses an electron source comprising, on a substrate, a dielectric layer having at least one cavity in which a protruding cathode electrode is disposed, a first gate electrode located on the upper surface of the dielectric layer and at least partially surrounding the cavity, and at least one second gate electrode located on the same side of the upper surface of the dielectric layer as the first gate electrode, wherein the first gate electrode is located between the cavity and the second gate electrode, these two electrodes being insulated from each other, both gate electrodes being disposed on the upper surface of the dielectric layer, and the second gate electrode being thicker than the first gate electrode.

[0006] U.S. Patent Application Publication No. 2002 / 0167009 discloses a thin-film transistor for a liquid crystal display and a manufacturing method that can reduce the number of photomasks used in the photolithography process compared to conventional methods. The passivation film is formed as a single layer of organic insulating film, and the number of required exposure steps is reduced to reduce the number of required photomasks, thereby improving the efficiency of the manufacturing process.

[0007] DE 10 2007 010 462 A1 discloses a method for producing a micromechanical particle source having at least one field emitter tip for particle emission, comprising the steps of applying at least one surface layer of semiconductive or conductive material to the surface of a substrate, structuring the at least one surface layer applied to the substrate in such a way that conducting paths are generated that are as narrow and low in height as possible, partially removing exposed areas of the electrically insulating substrate surface located between these paths in such a way that the newly formed areas of the electrically insulating substrate surface are prevented from being covered by the upper surface layer, applying a further conductive layer to the surface thus generated, and positioning the field emitter tip in the narrow path, accurately positioning the field emitter tip in the center of the optical axis of the micromechanical particle source with an accuracy of a few nanometers.

[0008] DE 10 2020 102 372 A1 discloses a component carrier comprising a laminate having at least one conductive layer structure and / or at least one electrically insulating layer structure, a tapered blind hole formed in the laminate, and a conductive plating layer extending along at least a portion of the horizontal surface of the laminate outside the blind hole and along at least a portion of the surface of the blind hole, wherein the minimum thickness of the plating layer at the bottom of the blind hole is at least 8 μm. (Object of the present invention)

[0009] Based thereon, it is an object of the present invention to provide a method for manufacturing an electrical wire arrangement and an electrical wire arrangement that at least partially overcomes the drawbacks and limitations of the prior art.

[0010] The object of the invention is in particular to enable the production of components with conductive structures that are isolated from one another in their cross-section, ensuring electrical isolation of the line arrangement, without the need to remove additional conductive structures that would otherwise be undesirably produced by a direct "line of sight" to the deposition source.Furthermore, the invention is not intended to be limited to the production of planar line arrangements. Summary of the Invention

[0011] This object is achieved by a method for producing a wire arrangement and a wire arrangement having the features of the independent claims. Advantageous refinements, which can be realized individually or in any combination, are presented in the dependent claims.

[0012] In a first aspect, the present invention relates to a method for manufacturing an electrical wire arrangement, the steps of which, taken individually, are as follows: a) generating a support structure, wherein at least one first subregion of the support structure is generated by using a freeform microstructuring method and at least one second subregion of the support structure comprises an electrically insulating material, the support structure having at least one undercut in the projection direction; and b) generating at least one electrical wire structure by coating the support structure with at least one conductive material, the coating comprising at least one spatially directed coating process oriented along a projection direction aligned with the at least one undercut.

[0013] The term "wire arrangement" refers to an arrangement designed for the transmission and / or modulation of electromagnetic waves. The wire arrangement proposed herein comprises a support structure that is manufactured in at least one first subregion using a freeform microstructuring method and in at least one second subregion made of an electrically insulating material, and the wire structure is applied to the support structure. In this case, the wire structure comprises one or more conductive structures that can be designed in particular as wires or as waveguides. The entire or partial conductive structures that are electrically isolated from each other or electrically connected to each other in a defined manner in one or more cross-sectional planes form the desired wire structure. Depending on the specific design of multiple conductive structures, in particular by connecting them outside of a specific cross-sectional plane, this allows multiple different wire structures to be generated on the support structure, which together form the wire arrangement.

[0014] The present invention relates to any type of electromagnetic wave that can be conducted in an electric wire designed as a waveguide. However, electromagnetic waves with a wavelength λ of 3 μm≦λ≦1 m are preferred. In a preferred manner, the following electromagnetic waves can be used: Electromagnetic waves with wavelength λ of 3 μm≦λ≦3 mm, also known as "terahertz waves" or "THz waves," and / or Electromagnetic waves with wavelengths λ of 300 μm ≤ λ ≤ 1 cm, known as "millimeter waves," and / or Electromagnetic waves called "microwaves" have a wavelength λ of 1 mm≦λ≦1 m.

[0015] According to method step a), a support structure is generated in at least the first subregion by using a freeform microstructuring process. Here, the term "freeform microstructuring process" refers to a three-dimensional structuring process, including a subtractive manufacturing process or an additive manufacturing process, by which three-dimensional structures, preferably freeform structures, can be generated. In this context, "freeform structure" is understood to mean a structure that can have arbitrarily curved surfaces in at least some regions, within the technical limitations in terms of resolution and accuracy. Thus, freeform structures differ from structural geometries that can be generated by classical planar microstructuring processes, in particular by a combination of thin film deposition processes, two-dimensional lithography processes (e.g., projection lithography), and etching processes on flat substrates. The combination of these processes typically results in prismatic, three-dimensional structural geometries, each having a base and a cover surface generally parallel to the substrate surface, identical or very similar in shape, and connected to each other by sidewalls that are either perpendicular to the substrate surface or inclined and / or curved inward or outward, depending on the deposition and etching processes used in each case. The shapes of the base and cover surfaces are substantially determined by masks, often configured using lithography, that are used for localized etching or deposition. By repeating the deposition and etching processes multiple times using different masks, multilayer structures comprising multiple prismatic substructures can be built up. However, the additional effort involved in this repetition is considerable and is often limited by overlay accuracy, resulting in a practically achievable number of layers often limited to a small number, e.g., only three. This places geometric constraints on the structures that can be produced with reasonable effort using known microstructuring methods, and therefore limits the functionality of the components formed thereby.

[0016] In contrast, freeform structures produced by freeform microstructuring processes are not subject to these constraints, or are not subject to them to the same extent, because their structural geometries are not limited to a combination of a relatively small number of planar and prismatic substructures. Therefore, it is possible to use subregions of the support structure, particularly those defined by the freeform structure, to design electrical wire arrangements that no longer need to have a planar form. It should be noted that in many cases, freeform structures are actually produced from a large number of individual layers, particularly by utilizing multilayer materials in 3D printing or by curing different layers in 3D lithography processes. However, the freeform microstructuring process allows the number of these layers to be selected large enough for a reasonable manufacturing effort, so that a good approximation to the freeform structure is obtained and the division into individual layers no longer represents a functional limit to the structural geometry that can actually be produced. The structure preferably consists of more than 10 layers, particularly preferably more than 20 layers, and in particular more than 40 or 50 layers. In the manufacture of wire arrangements designed for a vacuum operating wavelength of approximately 1 mm, the layer thicknesses are preferably between 100 nm and 10 μm, particularly preferably between 500 nm and 5 μm, and in particular between 100 nm and 1 μm. It is therefore possible to produce wire structures with an accuracy of preferably better than 10 μm, particularly preferably better than 5 μm, and in particular better than 1 μm. The resolution of the freeform microstructuring method is preferably better than 20 μm, particularly preferably better than 5 μm, and in particular better than 1 μm. The above figures relate to the manufacture of wire arrangements designed for a vacuum operating wavelength of approximately 1 mm. For other vacuum operating wavelengths, the dimensions of the structures and the associated requirements regarding the accuracy and resolution of the microfabrication processes used in their manufacture can be scaled accordingly, taking into account the refractive indices of the materials used.Depending on the design, the same or different freeform microstructuring processes can be used to generate sub-regions of the support structure, optional additional light blocking structures, and optional mechanical protective structures or layers generated by the freeform microstructuring process, and if the same freeform microstructuring process is used, all structures can be generated in a common operation.

[0017] In a preferred embodiment, the freeform microstructuring process and / or the freeform microstructuring unit configured for such a process may be based on a lithography process, in particular using stereolithography or direct writing, preferably three-dimensional direct writing, lithography. Additive or subtractive manufacturing methods can be used for this purpose, with the term "additive manufacturing process" referring to a manufacturing process in which material is gradually deposited or added onto a structure, while the term "subtractive manufacturing process" refers to an alternative manufacturing process in which material is gradually removed from a structure. In a preferred embodiment, the application of material or the removal of material can be achieved by a lithography method using a suitable photoresist, in particular a negative or positive photoresist. In a preferred embodiment, a surface light modulator that allows rapid structuring can be used in the stereolithography process. In a preferred embodiment, a multiphoton lithography process, in particular by using a pulsed laser source, can be used as the direct writing lithography method. In this case, pulsed light having a pulse duration of at most 10 ps, ​​preferably at most 1 ps, particularly preferably at most 200 fs, particularly at most 100 fs, preferably at a repetition rate of at least 1 MHz, preferably at least 10 MHz, particularly preferably at least 25 MHz, particularly at least 80 MHz, can be used. Particularly suitable laser light sources for this purpose are selected from fiber-based femtosecond lasers, which can be combined with specially configured frequency conversion units for frequency doubling, sum frequency generation, or difference frequency generation, or pulsed solid-state lasers, preferably titanium sapphire lasers or diode lasers. In particular, depending on the lithography method used for this purpose, wavelengths in the near-infrared, visible, ultraviolet, or extreme ultraviolet radiation (EUV) range, or wavelengths of X-rays, can be preferably used.In a particularly preferred embodiment, the wavelength may be in the range of 150 nm to 1700 nm, and more particularly in the range of 300 nm to 1100 nm. In the case of pulsed lasers, two-photon, three-photon, or multi-photon absorption effects can be obtained by selecting the pulse duration and pulse energy. In lithography processes based on single-photon absorption using continuous-wave lasers or LEDs, emission wavelengths between 360 nm and 550 nm are suitable, with wavelengths of approximately 365 nm, 385 nm, 405 nm, 550 nm, and 532 nm being particularly suitable. To enhance the resolution of lithography processes, the principle of "stimulated emission depletion" (STED) can be used with appropriate photoinitiators according to the corresponding microscopy method.

[0018] In certain embodiments, it may occur that subregions of support structures, additional light-blocking structures, mechanical protection structures, or protective layers produced by the freeform microstructuring process are larger than the available writing field size of the equipment used for fabrication by the freeform microstructuring process. In these cases, the structure in question can be divided into individual sections, each located within the writing field, and fabricated by precisely stitching these sections together. The selection of the writing field size may be made by considering, among other things, the achievable resolution, which generally improves with a smaller writing field, and stitching errors at the boundaries of the writing field, which can be reduced in number by using a larger writing field. The writing field size is preferably 50 × 50 μm. 2 From 5 x 5 mm 2 and particularly preferably between 100 × 100 μm 2 From 3 x 3 mm 2 and most particularly preferably between 200 × 200 μm 2 From 1 x 1 mm 2The positioning accuracy of the individual writing fields is preferably better than 5 μm, particularly preferably better than 1 μm, and more particularly better than 500 nm or 100 nm. In a particular embodiment, a two-photon lithography system is used for the production. In this case, the available writing field for a lens with a numerical aperture of 1.4 and a magnification of 40 can take the form of, for example, a circular surface with a diameter of 400 μm.

[0019] In some embodiments, the first subregion of the support structure produced by the freeform microstructuring process can also contain a conductive material. In this case, methods of 3D printing of metals, which may be based on material extrusion, powder bed fusion, material jetting, binder jetting, replica impression, selective laser sintering, laser metal deposition, or electron beam melting, among others, can be preferably used. In particularly preferred embodiments, a polymer can be produced that contains a high proportion of particles (slurry) selected from, for example, copper, stainless steel, or other conductive materials. Subsequent firing of the part in an oven decomposes and burns out the polymer compound (debinding and sintering), leaving behind a conductive workpiece that largely reflects the properties of the material that makes up the particles.

[0020] In addition to the subregions generated by the freeform microstructuring process, the support structure can also comprise further subregions that are unstructured or structured by other methods. Thus, the support structure can comprise a substantially flat substrate on which further subregions of the support structure are generated by the freeform microstructuring process, with the further subregions having undercuts, as defined below, either alone or together with the substrate. Suitable substrates are, inter alia, silicon (Si), gallium arsenide (GaAs), indium phosphide (InP), aluminum oxide (Al2O3), beryllium oxide, fused silica, sapphire, (woven) PTFE / glass, polyolefin, ferrite / granite, or ceramic. Furthermore, the substrate can also comprise conductive subregions. During coating of a support structure comprising a substrate, it is particularly possible that at least one exposed surface defined by at least one undercut in the support structure and designed to insulate adjacent conductive structures is located on the substrate and is not located, for example, on sub-regions of the support structure generated by a freeform microstructuring process or on sub-regions of the support structure made of insulating material.

[0021] The support structure generated according to method step a) is at least one second sub-region comprising an electrically insulating material; On the one hand, it provides a mechanically stable and, in at least some areas, electrically insulating basis for the subsequent coating carried out according to method step b) using at least one electrically conductive material, and On the other hand, the coating carried out in accordance with method step b) allows the desired line structure to be formed thereon, which may be formed into any desired geometrical shape, which is not necessarily planar. It further comprises at least one second sub-region.

[0022] For the purposes of this invention, an "electrically insulating material" is defined as a material whose electrical conductivity σ is greater than or equal to 10 -4 Not exceeding S / m, preferably 10 -7S / m, especially 10 -10 The term "electrically insulating" refers to a material that does not exceed 1000 kJ / m. Additionally, the electrically insulating material preferably has a high dielectric strength and low loss, particularly in the form of a low dissipation factor tanδ of not more than 0.1, preferably not more than 0.05, and especially not more than 0.01, at the respective operating frequency of the wire structure. In this context, the term "operating frequency" refers to the frequency of the electromagnetic wave for which the selected wire arrangement is preferably designed. Similarly, the term "operating wavelength" is defined as the wavelength of the electromagnetic wave for which the selected wire arrangement is preferably designed. Suitable materials for at least one electrically insulating subregion of the support structure are preferably ceramics, glasses, polymers, or other organic compounds or appropriately doped semiconductors, as well as composite materials made of these materials. In particular, suitable materials are those that can be three-dimensionally structured by suitable methods; in preferred embodiments, these methods and associated materials are selected to enable the creation of freeform structures. In a preferred embodiment, a polymer-based material is used to generate the support structure, which preferably comprises a photo-additively or subtractively structurable polymer, for example belonging to the classes of acrylates, epoxy resins or fluoropolymers. If lithographic methods are used to structure the polymer-based material in method step a), polymers that can be fluorinated or have polysiloxane-based components are preferably used.

[0023] In a particularly preferred embodiment, the first subregion generated in method step a) by the freeform microstructuring process can be the same as the second subregion containing an electrically insulating material. However, these two regions can be separate, non-intersecting, or completely or partially contained within each other. An example in which the second subregion completely contains the first subregion occurs when the conductive region of the substrate is replaced with an insulating substrate, resulting in only the insulating second subregion being generated by 3D printing. In another example in which these two regions are separated, the support structure has a metallic core containing a metallic substrate and an insulating coating. While the core filling the first subregion is generated in the first subregion of the support structure by the freeform microstructuring process, an insulating coating can be applied independently to the second subregion of the support structure in a subsequent process, particularly by an isotropic coating method. Thus, in this example, these two subregions are separated.

[0024] According to method step a), a support structure is generated having at least one undercut with respect to the projection direction. The term "undercut" refers to an overhang introduced into the surface of the support structure, defined with respect to the projection direction. The geometric definition of the term "undercut" is illustrated by the example of FIG. 3, which shows a support structure with an undercut defined with respect to the projection direction p and indicated by the corresponding shaded area. The shaded area includes all points P on the surface of the support structure where a ray g emanating from point P and oriented opposite to the projection direction p penetrates the support structure. The entire portion of all such ray g located inside the support structure defines a subregion of the support structure called an overhang. The overhang defines a shaded region that includes the entire connecting line PP' from point P located outside the support structure to the closest incident point P' of the corresponding ray g incident on the support structure opposite to the projection direction p.

[0025] At least one undercut is designed to generate a shadow in at least one spatially oriented coating of the support structure, which coating is applied along the projection direction using at least one conductive material. The term "shadow" refers to the result of coating the support structure with at least one conductive material, whereby at least one exposed area on the surface of the support structure remains uncoated and is not covered by the conductive material. Depending on the design of the coating process according to method step b) and the direction of spatial anisotropy of the material flow, the uncoated area may be identical to the shaded area in a geometric sense, may surround at least some areas of the shaded area, or may be part of the shaded area.

[0026] According to method step b), an electrical wire structure is produced by coating the support structure with at least one electrically conductive material. In certain embodiments, the coating of the support structure may include multiple coating methods and / or materials, with at least one coating method being spatially directed and at least one material being electrically conductive as defined herein. In a preferred embodiment, at least one electrically conductive material is applied in a directed coating process.

[0027] Any coating process suitable for the above purposes can be used to coat the support structure. The coating process can be preferably selected from physical vapor deposition (PVD) processes, in particular thermal evaporation, electron beam evaporation, laser beam evaporation, arc evaporation, molecular beam epitaxy, ion plating, or sputter deposition, including DC sputtering, RF sputtering, magnetron sputtering, reactive sputtering, ion beam sputtering, or atomic beam sputtering, or chemical vapor deposition (CVD) processes, including plasma-enhanced chemical vapor deposition (PECVD), thermal injection, or electroplating. In these methods, the degree of spatial anisotropy, i.e., the directionality of material transport during the coating process, can be adjusted using various parameters, in particular the pressure at which the coating is performed. In addition to spatially anisotropic, i.e., directional, coating processes, isotropic processes can also be used, in which the structure is coated from all directions. A wide range of processes, such as immersion or spray processes, spin coating, atomic layer deposition (ALD), or electrochemical processes, are contemplated herein. In certain embodiments, after the directional coating with metal, an isotropic coating with an inert protective material can be applied, particularly to prevent oxidation of the metal regions. In certain embodiments, the thickness of the applied conductive structure of the wire structure, consisting of at least one conductive material, can be increased by electrolytic deposition to increase the robustness of the coating, particularly under mechanical stress. In this case, the resulting wire structure thickness can be preferably greater than 1 μm, particularly preferably greater than 10 μm, and in particular greater than 20 μm or 50 μm. The resulting thickness can be adjusted by setting process parameters, particularly current density, temperature, and time, for each material.

[0028] For the purposes of the present invention, an "electrically conductive material" is defined as a material having an electrical conductivity σ of preferably at least 10 6 S / m, and particularly preferably at least 10 7 S / m, especially at least 5 × 10 7S / m. Particularly suitable materials for this purpose include silver, copper, gold, and aluminum, although other materials can also be used. In this case, the wire structure can include a homogeneous region of a single conductive material, a mixed phase of at least two different conductive materials, in particular an alloy of at least two different metals, and / or a layered structure of at least two different layers, each containing a homogeneous or mixed phase.

[0029] In a preferred embodiment, the layer sequence in the layer structure can be selected in a preferred manner. A preferred layer sequence includes, in particular, a first layer directly or indirectly adjacent to the support structure and having an adhesion promoter with good adhesion to the underlying substrate and / or the layer above. The first layer can include, in particular, titanium, a core of a highly conductive material, preferably copper or gold, and an outer passivation layer adjacent to the periphery, made of a chemically resistant and non-oxidizing material, preferably gold, silicon nitride, or silicon dioxide. Additionally, at least one additional layer, preferably titanium, can be introduced to prevent diffusion between the core material and the passivation layer. Other materials are also possible. Thus, the electrical line structure can be designed for particularly high charge transport and, at the same time, for particularly high resistance to environments in which substances aggressive to conductive materials, especially oxygen, may occur. The application of these layers does not necessarily have to be carried out in a spatially directed process. Therefore, it may be advantageous to use an isotropic process, especially for the passivation layer, that protects the wire arrangement from multiple sides, preferably from all sides, in particular atomic layer deposition or evaporation under high pressure.

[0030] The thickness γ of the conductive layer of the wire structure can often be approximated based on the skin effect, taking into account the vacuum operating frequency, particularly using equation (1).

number

[0031] Here, the thickness of the conductive layer γ is defined as the resulting wall thickness of a notional spherical conductor that has the same DC resistance as a solid conductor due to the skin effect at frequency f. Absolute permeability μ = μ0μ r is the permeability constant μ0=1, 256·10 -6 N / A 2 and the relative permeability constant μ of the conductive material used for the spherical conductor r The electrical conductivity of a conductive material is expressed by σ. For example, for copper, the vacuum operating wavelength is approximately 1 mm and the electrical conductivity is σ = 5, 8 10 6 At γ=0, a conductive layer thickness of 12 μm is obtained at S / m. Therefore, the thickness of the conductive material layer when applying the coating process is selected to be at least sufficiently large, preferably 3 times, particularly preferably 5 times, and especially 10 times, the conductive layer thickness at the desired operating frequency or wavelength. For other operating wavelengths, the layer thickness can be scaled proportionally to the square root of the wavelength, taking into account the conductivity of the conductive material used.

[0032] According to method step b), the coating of the support structure includes at least one spatially oriented coating process, which is directed along a projection direction aligned with at least one undercut. As a result, the conductive material is applied to the support structure as a wire structure in the form of one or more conductive structures that are electrically insulated or electrically connected to each other in a specific manner in a cross-sectional plane, the direction of the coating corresponding to the projection direction associated with the undercut. As described above, the at least one undercut introduced into the support structure results in the formation of at least one uncoated exposed area on the surface of the support structure, which results in electrical isolation at a desired location on the surface of the support structure between the conductive structures adjacent to the at least one exposed area. In this way, a desired wire structure is formed on the surface of the support structure, comprising a number of conductive structures that are electrically insulated or electrically connected to each other in a specific manner in a cross-sectional plane. In this case, it is particularly advantageous if at least one undercut is generated during method step a) with appropriate knowledge of the desired projection direction during method step b), such that the final shape of the desired electrical line structure comprising a number of conductive structures electrically insulated from one another or electrically connected to one another in a defined manner can be freely defined in space, taking into account the direct line of sight between each point P on the support structure to be coated and the position of the deposition source supplying the conductive material used for coating the support structure, via the shape of the support structure and the at least one undercut introduced therein.

[0033] In a preferred embodiment, physical vapor deposition (PVD) methods, particularly electron or laser beam deposition, can be used. By selecting a sufficient working distance between the deposition source and the support structure to be coated, the deposition direction defined by the connecting line between the deposition source and the support structure to be coated can be set with good approximation, which corresponds to the desired projection direction associated with the undercut according to the present invention. In this case, the distance between the deposition source and the support structure to be coated is preferably greater than 25 cm, particularly preferably greater than 50 cm, and in particular greater than 75 cm or 100 cm, so that the flow of the deposition beam emanating from the deposition source has a divergence of preferably less than 10°, particularly preferably less than 5°, and in particular less than 2° around the defined projection direction at the support structure to be coated. The term "divergence" at the support structure to be coated is understood to mean the dispersion or standard deviation of the direction in which the beam emitted from the deposition source impinges on a point on the support structure. The dispersion can be determined, in particular, from the ratio of the lateral extent of the deposition source to the distance of the deposition source from the support structure to be coated. A large dispersion in the direction of the incident beam can usually cause a corresponding blurring of the edge of the shadow cast by at least one undercut, which can have detrimental effects on the characteristics of the resulting electrical wire arrangement. The deviation between the actual deposition direction and the desired projection direction for the undercut according to the present invention can be preferably at most 20°, particularly preferably at most 10°, and in particular at most 5° or 2°. The operating pressure in the chamber of the coating system can preferably be selected so that the mean free path length of the particles transported during deposition exceeds the distance between the deposition source and the support structure to be coated. The term "mean free path length" as used herein refers to the length of the path that a particle, in particular an atom, molecule, ion, or electron, travels on average in a given material before colliding with another particle. When a particle flow in a material travels the mean free path length, 1 / e of the particle flow has not yet experienced a collision with another particle.The mean free path length is preferably at least 3 times, particularly preferably at least 8 or 20 times, and especially at least 100 or 200 times, the distance between the deposition source and the support structure to be coated. The pressure is usually 10, depending on the material selected. -7 Pa~10 -3 It is possible to assume a value for Pa.

[0034] In certain embodiments, performing method step b) not only forms the desired wire structure but also generates at least one other conductive structure that is not necessarily a functionally relevant component of the desired wire structure. Therefore, in this case, it is desirable to design the at least one undercut so that the at least one other conductive structure can be positioned sufficiently far away from the desired wire structure. In such a configuration, the influence of the additionally generated conductive structure on the electromagnetic wave guided by the desired wire structure, which may also be called a "mode," can be preferably minimized. In particular, to avoid coupling of the mode guided by the desired wire structure with the at least one other conductive structure, the distance between the two structures is set to be sufficiently large to exceed the penetration depth ε of the electromagnetic wave guided by the desired wire structure into the surrounding spatial region, preferably at least twice the penetration depth ε, particularly preferably five times, and particularly preferably ten times the penetration depth ε. The term "penetration depth ε" as used herein refers to the depth at which the evanescent electric field associated with the mode guided by the wire structure is reduced by a factor of 1 / e.

[0035] The methods described herein allow a wide variety of electrical wire structures to be produced on a support structure.

[0036] In a preferred embodiment, the wire structure may comprise a single microstrip line formed from a conductive structure that is electrically isolated from the environment in all cross-sectional planes along the wire structure. The electrical isolation of the conductive structure from the environment is preferably achieved by at least one exposed area on the surface of the support structure that remains uncoated during the coating step due to a shadow cast by at least one undercut. The conductive structure may be implemented on the support structure, in particular as a wire or as a waveguide.

[0037] In a further preferred embodiment, the wire structure may comprise at least two conductive structures that are spatially separated from one another, spaced apart on the support structure, and at the same time electrically insulated from one another in all cross-sectional planes along the wire structure, preferably by virtue of the fact that at least one exposed area, created by at least one undercut, is located between the at least two conductive structures.

[0038] In this embodiment, the electrical line structure may comprise a plurality of individual conductive structures in the form of a plurality of microstrip lines, electrically isolated from one another. At least two of the isolated microstrip lines may be at the same or different potentials. For example, the microstrip lines may be arranged parallel to one another. However, other configurations of the microstrip lines are also contemplated.

[0039] In this embodiment, the wire structure may in particular be or comprise a slot line, which has two conductive structures that are spatially separated from each other and electrically insulated from each other in all cross-sectional planes along the wire structure, the two conductive structures being at the same potential.

[0040] In this embodiment, the electrical line structure (1) can be or comprise a coplanar line, which has three conductive structures that are spatially separated from one another and electrically isolated from one another in all cross-sectional planes along the electrical line structure, two of the conductive structures being at the same potential while the third of the conductive structures is at a different potential.

[0041] In a further preferred embodiment, the electric line structure can be designed in the form of an antenna. In this embodiment, the electric line structure preferably comprises a plurality of individual conductive structures electrically isolated from one another in a cross-sectional plane, which are varied in a defined manner along the line structure and, in particular, can be electrically connected in a defined manner in at least one further cross-sectional plane of the electric line structure. In this embodiment, the at least one exposed area created by the at least one undercut can, in particular, be configured to be able to transition an electric signal coupled to the line into a free space wave.

[0042] In a further preferred embodiment, the wire structure can comprise, in addition to the desired conductive structure in the cross-sectional plane, at least one further conductive structure as described in more detail above, in order to enable a particular function. In this configuration, the wire structure can be designed in particular in the form of a wire coupler. The wire coupler can comprise two conductive structures in the form of two waveguides, which are spaced apart on the support structure and can be electrically isolated from each other in all cross-sectional planes along the wire structure, and the two waveguides can guide different signals and can maintain a distance from each other such that the desired coupling of the electric field from one conductive structure to the other can be adjusted via the at least one further conductive structure.

[0043] In a further preferred embodiment, the electrical line structure can be embodied in the form of an electrical probe tip, which is suitable for contacting electrical circuits, in particular radio frequency (RF) circuits, and which can preferably have at least one contact element for this purpose. By suitable shaping of the support structure to be coated, the at least one contact element can be configured as a contact tip or based on a suitable structural element protruding in a direction perpendicular to the surface to be coated, thereby allowing geometrically precise contact of the tip or of corresponding contact surfaces (pads or probe pads) on a flat substrate.

[0044] The methods described herein can be used to produce additional wire structures that have special geometries or may be suited for special purposes.

[0045] A significant advantage of the method described herein is that the support structure for the wire structure can be designed with at least one undercut so that the effective permittivity of the modes guided by the wire structure can be set and varied along the propagation direction of the wire structure or the electromagnetic field present in the wire structure, based on the geometry of the wire structure's conductive material and the support structure. The effective permittivity of the modes guided by at least one wire structure along the mode propagation direction perpendicular to the plane of the respective drawing is preferably set to 20 Ω to 100 Ω. This type of configuration can be particularly advantageous for reducing the influence of a high permittivity of the substrate on the antenna, for example, by gradually moving the modes guided by the wire structure away from the substrate, particularly by varying at least one undercut along the wire structure. This allows the permittivity effectively seen by the modes to be adapted to local conditions in order to reduce line losses or gradually adjust line impedance. Here, the term "gradually" refers to a continuous change in the characteristic quantities of the mode, in particular the impedance, due to a linear transformation of the geometry, in particular in the transition section, starting from a substrate preferably having a high dielectric constant to a subregion of the support structure based on a material having a low dielectric constant.

[0046] In a further embodiment, the methods described herein can be used to provide at least one wire transition to at least one existing wire structure previously generated using the methods described herein and / or by conventional manufacturing methods on a substrate. For this purpose, a support structure is aligned with the existing wire structure, whereby coating of the support structure with at least one conductive material is performed along a projection direction aligned with the at least one undercut. This creates at least one wire transition from the existing wire structure to a conductive structure of the wire structure being generated. Thus, by using the at least one undercut, the support structure can ensure that the existing wire structure remains electrically insulated in all cross-sectional planes along the wire structure.

[0047] However, this type of coating can result in the entire substrate outside the subregion of the support structure created by the freeform microstructuring process being covered with a conductive material, which can unnecessarily coat existing wire structures as well as other components or circuits present on the substrate. To prevent such unnecessary coating, at least one additional light-shielding structure can be aligned with at least one wire transition between the existing wire structure and a newly created wire structure using the methods described herein. This allows the existing wire structure to remain electrically insulated in all cross-sectional planes along the wire structure during coating under the projection direction. This also prevents the entire wire structure from being shorted to additional conductive structures that are deposited.

[0048] In a preferred embodiment, at least one additional light-shielding structure can coat the additional surfaces of the substrate so that they remain protected from overall coverage with the conductive material. For this purpose, it is particularly conceivable to completely coat these additional surfaces with a protective structure, particularly in the form of a protective layer, thus minimizing the impact of the electrical wire structure being generated on the existing electrical wire structure on the substrate with a protective structure, particularly a protective layer, of sufficient thickness. Alternatively, the additional protective or light-shielding structure, particularly the protective layer, can be optionally removed after coating, particularly by simply peeling it off with a suitable tool, preferably tweezers, or by using a lift-off process. This can prevent the overall coverage with the conductive material from re-peeling off the additional conductive structure formed as a by-product. Preferably, selective coating of the areas to be protected with the protective layer can be performed before coating. In a preferred embodiment, the selective application of the protective layer can be performed by inkjet printing, using a dispenser, and / or by lithographic structuring. After application of the conductive material, the protective layer can be removed again to re-expose the existing electrical line structure, and therefore any additional conductive structures formed on the protective layer can also be removed. In this case, it is advantageous if the protective material used, as well as any substances, such as solvents, used for their removal, do not damage or have other deleterious effects on the support structure, particularly the subregions created by the freeform microstructuring process, during prolonged exposure. In a preferred embodiment, PMMA (polymethyl methacrylate) or another suitable substance can be used as the protective material for the protective layer, which can be removed again with PGMEA (propylene glycol monomethyl acetate) without affecting other regions of the support structure created using two-photon lithography. Advantages of such a lift-off process include faster overall coverage of the substrate using a deposition process, especially when the size of the surface to be covered makes the creation of protective or light-shielding structures impractical using a freeform microstructuring process.

[0049] In a further preferred embodiment, the line structure can comprise at least two wire transitions and thus can be configured as a connecting element between at least two line structures arranged on separate substrates, the line structures being previously produced using the method described herein and / or by conventional manufacturing methods. The support structure can comprise at least two substrates attached to a common base plate and at least one subregion produced using a freeform microstructuring process, the subregion having at least one undercut according to the invention in the projection direction, which can be connected to existing line structures on the two substrates via the wire transitions. To protect the surfaces of the two substrates, they can be re-applied with corresponding temporary or permanent protective structures, in particular light-shielding structures or protective layers, in at least some regions during the coating process in method step b).

[0050] In a further preferred embodiment, the wire structure can be embodied in the form of an interdigital capacitance. The wire structure in the form of an electrical interdigital capacitance can comprise a plurality of conductive structures that can be substantially alternately arranged in two separate planes extending parallel to each other and that can be set to different potentials. Preferably, the conductive structures can be located in a common first plane defined by recesses in the support structure, while the remaining conductive structures can be located in a second plane defined by webs between the recesses. To generate the wire arrangement, at least one undercut is introduced into the support structure with respect to the projection direction, thereby providing at least one exposed area to ensure electrical insulation of the conductive structures applied on the two different planes. In a preferred embodiment, the divergence of the deposition beam emitted from the deposition source around the projection direction defined at the position of the support structure to be coated is utilized to increase the width of the strip-shaped conductive structure generated in the first plane so that the strip-shaped conductive structure generated in the first plane can overlap the conductive structure in the second plane in projection along the projection direction. This can particularly contribute to increasing the electrical capacitance between structures on two planes. Conductive structures located in a common plane can be electrically connected to each other in a further cross-sectional plane of the electrical line structure, thus forming a common power supply. By designing sub-regions of the support structure as 3D freeform structures, this design can provide greater freedom in placement, particularly with improved resolution, compared to prior art methods.

[0051] In a further aspect, the present invention relates to an electrical wire arrangement, in particular an electrical wire arrangement manufactured by using the method also described herein. The wiring arrangement is at least one first sub-region designed as a three-dimensional freeform structure and generated using a freeform microstructuring process; a second subregion comprising an electrically insulating material; a support structure having at least one undercut in a projection direction; at least one electrical wire structure applied as a coating onto the support structure by using at least one spatially directed coating process with at least one electrically conductive material along a projection direction aligned with the at least one undercut; Includes:

[0052] For further details regarding this electrical wire arrangement, reference is made to the exemplary embodiments as well as to the description of the method for manufacturing the electrical wire arrangement also described herein.

[0053] The terms "have," "show," "comprise," or "include," or any grammatical form thereof, are used in a non-exclusive sense. Thus, these terms can refer both to a situation in which no other features are present in addition to the feature introduced by these terms, and to a situation in which one or more other features are present. For example, the expressions "A has B," "A shows B," "A comprises B," or "A includes B" can refer both to a situation in which no other elements are present in A in addition to B (i.e., a situation in which A consists entirely of B), and to a situation in which one or more other elements are present in A in addition to B, such as element C, elements C and D, or further elements.

[0054] It should also be noted that the terms "at least one" and "one or more," and grammatical forms of these terms, when used in connection with one or more elements or features, and when intended to express the fact that these elements or features may be provided one or more times, are typically used only once, e.g., when these features or elements are first introduced. When a feature or element is mentioned again later, the corresponding term "at least" or "one or more" is generally no longer used, but does not limit the possibility that the feature or element may be present one or more times.

[0055] Furthermore, the terms "preferably," "preferably," "particularly," "for example," or similar terms are used herein in connection with optional features, but do not thereby limit alternative embodiments. Features introduced by these terms are therefore optional features and are not intended to limit the scope of protection of the claims, in particular the independent claims. Therefore, as a person skilled in the art will recognize, the present invention can also be implemented using other embodiments. Similarly, features introduced by "in one embodiment of the invention" or "in one example of the invention" are understood to be optional features, but are not thereby intended to limit alternative embodiments or limit the scope of protection of the independent claims. Furthermore, these introductory expressions are intended to leave open all possibilities for combining the features introduced by them with other features, whether optional or non-optional. [Effects of the Invention]

[0056] In contrast to known methods for manufacturing electrical wire arrangements, which are often based on the use of masks and are therefore essentially limited to the creation of planar support structures and electrical wire arrangements of different heights, the present method does not require a mask for manufacturing. In particular, this enables the creation of 3D freeform line structures. The use of 3D printing techniques to generate support structures allows the creation of complex support structures with three-dimensional configurations, particularly suitable for increasing the coupling efficiency and bandwidth between transmission lines compared to known methods. The use of freeform microstructuring methods to generate freeform support structures allows the electrical wire arrangement to be generated in situ, i.e., directly at the site of use, for example, on a chip, without the need for a mask for fabrication. This allows the electrical wire arrangement to be directly aligned with existing circuits and electrically connected, for example, with high bandwidth and low loss, thereby eliminating the need for precise assembly procedures that are typically required. This enables the implementation of a wide variety of components, including connection elements between multiple chips and even antennas designed as freeform structures and spaced apart from the surface for more efficient radiation.

[0057] The prior art cited at the beginning does not disclose a first subregion of a support structure that is produced by using a freeform microstructuring process. Therefore, the cited prior art does not disclose the production of a non-planar electrical wire arrangement, as specified in the present invention. In particular, the present invention solves the problem of producing components with conductive structures that are mutually insulated within a cross-sectional plane, without first having to remove additional conductive structures that would otherwise be undesirably produced by direct "line-of-sight" deposition of the deposition source in order to ensure electrical isolation of the desired wire arrangement. Therefore, in a further departure from the prior art cited above, the present invention also solves the problem of so-called packaging for the next generation of radio-frequency components, especially those designed for millimeter-wave and THz-wave applications.

[0058] Using this manufacturing method, microwave components, particularly antennas, inter-chip connection elements, or electrical probe tips, can also be produced directly on existing substrates as support structures. Printing subregions of the support structure that define the electrical line structure or on the substrate contained in the support structure, and protecting the support structure or substrate by using light-shielding structures, particularly protective layers, allows for a wide variety of implementable structures with 3D freeform geometries, particularly allowing the electrical line structure to be adapted to existing structures. This is particularly important in radio frequency technology, since while modifications to the electrical line structure on a chip are generally time-consuming and expensive, the function and design of the electrical line structure according to the present invention can be flexibly changed by appropriately forming the subregions of the support structure produced by the freeform microstructuring process. The possibility of three-dimensionally designing the support structure means, for example, that electromagnetic waves can be directed away from the substrate, thereby easily adapting the effects of the high dielectric constant of the substrate or support structure to local requirements within a cross-sectional area as needed. Similarly, electrical probe tips with a wide variety of geometries can be flexibly implemented on standardized and therefore cost-effective support substrates. [Brief explanation of the drawings]

[0059] Further details and features of the present invention can be found in the following description of preferred exemplary embodiments, particularly in connection with the dependent claims. In this text, each feature can be realized either alone or in combination with each other. The present invention is not limited to these exemplary embodiments. The exemplary embodiments are shown diagrammatically in the following drawings, in which the same reference signs in the drawings refer to identical or functionally identical elements, or elements that correspond in terms of their functions. The following drawings are to be understood individually.

[0060] [Figure 1] 1 shows a preferred exemplary embodiment of a method according to the invention for manufacturing an electrical wire arrangement in a schematic cross-sectional view; [Figure 2]1 shows a preferred exemplary embodiment of a method according to the invention for manufacturing an electrical wire arrangement in a schematic cross-sectional view; [Figure 3] 3 shows a schematic representation of the geometric definition of an undercut according to the invention with respect to the projection direction on a support structure according to the invention; [Figure 4] 1 shows an exemplary embodiment of an electrical wiring arrangement according to the present invention in a schematic cross-sectional view. [Figure 5] 1 shows an exemplary embodiment of an electrical wiring arrangement according to the present invention in a schematic cross-sectional view. [Figure 6] 1 shows an exemplary embodiment of an electrical wiring arrangement according to the present invention in a schematic cross-sectional view. [Figure 7] 1 shows an exemplary embodiment of an electrical wiring arrangement according to the present invention in a schematic cross-sectional view. [Figure 8] 1 shows an exemplary embodiment of an electrical wiring arrangement according to the present invention in a schematic cross-sectional view. [Figure 9] 1 shows an exemplary embodiment of an electrical wiring arrangement according to the present invention in a schematic cross-sectional view. [Figure 10] 1 shows an exemplary embodiment of an electrical wiring arrangement according to the present invention in a schematic cross-sectional view. [Figure 11] 5A-5C show diagrammatically a method sequence for producing a further electrical wire arrangement according to the invention; [Figure 12] 5A-5C show diagrammatically a method sequence for manufacturing a further electrical wire arrangement according to the invention; [Figure 13] 5A-5C show diagrammatically a method sequence for producing a further electrical wire arrangement according to the invention; [Figure 14] 5A-5C show diagrammatically a method sequence for manufacturing a further electrical wire arrangement according to the invention; [Figure 15] 1 shows a preferred exemplary embodiment of a wire arrangement according to the present invention. [Figure 16] 1 shows a preferred exemplary embodiment of a wire arrangement according to the present invention. [Figure 18] 10 shows a further exemplary embodiment of a method sequence for manufacturing a further electrical wire arrangement according to the invention as a microscopic image; [Figure 19]10 shows a further exemplary embodiment of a wire arrangement according to the present invention as a microscope image. [Figure 20] 10 shows a further exemplary embodiment of a wire arrangement according to the present invention as a microscope image. DETAILED DESCRIPTION OF THE INVENTION

[0061] 1 and 2 each show a preferred exemplary embodiment of the method according to the invention for producing an electrical wire arrangement in the form of a schematic cross-section, with FIG. 1 diagrammatically representing method step a) and FIG. 2 diagrammatically representing method step b). The illustrations chosen for this purpose, and in particular the shapes used for the support structure 20, should be understood as examples, and a wide variety of other arrangements and shapes are possible according to technical considerations.

[0062] 1 shows schematically method step a) comprising the generation of a support structure 20, in which a first subregion 120 of the support structure 20 is generated by using a freeform microstructuring method, a second subregion 220 of the support structure 20 comprises an electrically insulating material, and the support structure 20 has undercuts 20a, 20b, 20c, 20d with respect to the projection direction 100. In the outlined case, the subregions 120, 220 are identical and form the support structure 20.

[0063] 2 schematically illustrates method step b) for producing at least one electrical wire structure 1 by coating the support structure 20 with at least one conductive material along a projection direction 100 aligned with the undercuts 20a, 20b, 20c, 20d. In this step, coating of the support structure 20, including the undercuts 20a, 20b, 20c, 20d contained therein, is performed from the projection direction 100. The areas 30a, 30b, 30c, 30d shaded by the undercuts 20a, 20b, 20c, 20d present in the support structure 20 arise based on the predetermined projection direction 100, which is known in advance, and are not affected, or are only insignificantly affected, by the spatially directed coating of the support structure 20 with the conductive material. In this context, the expression "only insignificantly" means that, for example, the edge areas of the shadowed areas 30a, 30b, 30c, 30d due to the non-vanishing divergence 105 of the deposition beam emitted from the deposition source around the predetermined projection direction 100 may be covered with a conductive material, but exposed areas 30a, 30b, 30c, 30d that are not covered with a conductive material still remain, thereby resulting in electrical insulation of the conductive structures 10a, 10b, 10c in the schematic cross-sectional area of ​​the wire structure 1.

[0064] As shown schematically in Fig. 2, a plurality of conductive structures 10a, 10b, 10c and other conductive structures 11a, 11b are formed on the surface of a support structure 20 in a cross-sectional plane by coating with a conductive material. In the present exemplary embodiment according to Fig. 2, the three conductive structures 10a, 10b, 10c are located at a common height and each have a shape predetermined by the three-dimensional shape of the surface of the support structure 20. Due to undercuts 20a, 20b, 20c, 20d included in the support structure 20, exposed areas 30a, 30b, 30c, 30d are additionally formed on the surface of the support structure 20 by coating the surface of the support structure 20 with a conductive material in relation to the projection direction 100. The exposed regions 30a, 30b, 30c, and 30d are designed to insulate the conductive structures 10a, 10b, and 10c from one another and to keep the conductive structures 10a, 10b, and 10c electrically isolated in the cross-sectional plane from additional conductive structures 11a and 11b that will inevitably be formed in recesses in the support structure 20 during the execution of method step b). By appropriately forming the support structure 20, a configuration can be achieved in which the additional conductive structures 11a and 11b are spaced apart from the conductive structures 10a, 10b, and 10c such that electrical signals conducted by the conductive structures 10a, 10b, and 10c do not interact with the other conductive structures 11a and 11b. See also FIG. 6 and the associated description. In this case, the three conductive structures 10a, 10b, and 10c form the desired electrical wire structure 1. The electrical wiring structure 1 together with the support structure 20 and the exposed areas 30a, 30b, 30c, 30d present therein form an electrical wiring arrangement.

[0065] 3 shows a schematic representation of the definition of projection direction p100 according to the present invention, the associated definition of undercut 20a according to the present invention, and the associated definition of shaded area 30a on support structure 20 according to the present invention. In the illustrated case, two subregions 120, 220 are identical and form support structure 20. Shaded area 30a encompasses all points P1015 on the surface of support structure 20, whereby ray g1016 emanating from point P1015 and directed opposite projection direction p100 penetrates support structure 20. The entire portion 1030 of all such ray g1016 located inside support structure 20 defines a subregion of support structure 20 called overhang 1020. The overhang 1020 defines a shaded area 1040 that includes the entire connecting line PP'1031 from a point P1015 located outside the support structure 20 to the point P' of incidence into the support structure 20 of the corresponding ray g1016, which is located opposite and closest to the projection direction p100.

[0066] FIG. 4 shows, in the form of a schematic cross-section, an exemplary embodiment of an electrical wire arrangement according to the invention, in which a support structure 20 comprises a substrate 40. A first subregion 120 of the support structure is produced from an electrically insulating material by using a freeform microstructuring process. An electrically insulating carrier material is used as the substrate 40, which is not produced by the same production process as the first subregion 120 of the support structure 20. In this exemplary embodiment, the electrically insulating second subregion 220 of the support structure 20 comprises both the substrate 40 and the first subregion 120 of the support structure 20, which are produced by using a freeform microstructuring process. The support structure 20 is coated with at least one conductive material in the projection direction 100, similar to the illustration in FIG. 2. The coating forms mutually insulated conductive structures 10a, 10b, 10c and additional conductive structures 11a, 11b, similar to FIG. 2. However, in contrast to the illustration in Figure 2, the additional conductive structures 11a, 11b, and here exposed regions 30a, 30b, 30c, 30d, are on the surface of the substrate 40 and are not present on (or exclusively present therein, not shown here) the surface of the first sub-region 120 of the support structure 20 produced by the freeform microstructuring process.

[0067] FIG. 5 shows a further exemplary embodiment of a wire arrangement according to the invention in the form of a schematic cross section, in which an isotropic coating with an inert protective material 26 is applied to the support structure 20, the conductive structures 10a, 10b, 10c forming the wire structure 1, and the additional conductive structures 11a, 11b. The wire arrangement shown by way of example in FIG. 5 can be manufactured in this case similarly to the procedure described in FIGS. 1 and 2. In the embodiment illustrated in FIG. 5, the two subregions 120, 220 are identical and form the support structure 20. After formation, the inert protective material 26 can be applied by an isotropic process in which the structure is coated from all sides. The inert protective material 26 can be designed, for example, to prevent oxidation of the metal regions 10a, 10b, 10c, 11a, 11b.

[0068] Figure 6 shows a schematic cross-section of a further wire arrangement according to the invention, which can be manufactured by the method. In the embodiment illustrated in Figure 6, the two subregions 120, 220 are identical and form the support structure 20. The wire structure 1 according to Figure 6 forms a coplanar line with three conductive structures 10a, 10b, 10c electrically isolated from one another in all cross-sectional planes along the wire structure 1, where two conductive structures 10a, 10c can be at the same potential, for example in the case of a so-called "ground-signal-ground" configuration. In order to avoid any short circuits between the generated conductive structures 10a, 10b, 10c and the further conductive structures 11a, 11b, undercuts 20a, 20b, 20c, 20d are again provided in the slots introduced into the support structure 20 between the coated areas during the directed coating of the surface of the support structure 20 along the projection direction 100, designed to result in exposed areas 30a, 30b, 30c, 30d intended for insulating purposes. The undercuts 20a, 20b, 20c, 20d of the support structure 20 in this exemplary embodiment are designed to be deep enough so that the signal paths in the desired electrical wiring structure 1 comprising the conductive structures 10a, 10b, 10c cannot be influenced by the further conductive structures 11a, 11b that necessarily occur on the support structure 20. This is shown in FIG. 6 for the field lines of the electric field 80, which paths are not adversely affected by the further conductive structures 11a, 11b, especially due to their sufficient spacing. Therefore, the above-mentioned additional conductive structures 11a, 11b generated as a "by-product" in this exemplary embodiment can be left in place on the surface of the support structure 20 (or alternatively, on the surface of the substrate 40, not shown here), and therefore do not need to be removed.

[0069] FIG. 7 shows a schematic cross-section of a further wire arrangement according to the invention, which can also be produced by the method. In the embodiment shown in FIG. 7, the two subregions 120, 220 are identical and form the support structure 20. In this case, the wire structure 1 is designed in the form of a wire coupler. The wire structure 1 in the form of a wire coupler comprises three conductive structures 10a, 10b, and 10c, two of which are electrically isolated from each other in all cross-sectional planes along the wire structure 1 and have different electrical potentials. The distance between the two conductive structures 10a and 10c is selected so that the cross-coupling of the electric field 80 from one conductive structure 10a to the other conductive structure 10c (or vice versa) can be adjusted via the third conductive structure 10b, which is located in a cutout in the support structure 20, as shown schematically in FIG. 7. The width of the third conductive structure 10b is determined in this case by undercuts 20b, 20c inserted into the support structure 100 and designed as light-shielding structures with respect to the projection direction 20, and the exposed areas 30b, 30c defined by these light-shielding structures. This embodiment is particularly advantageous in cases of strong cross-coupling, which requires a short distance between the two conductive structures 10a, 10c, which is more difficult to achieve with planar lithography processes with limited lateral resolution. By using the third conductive structure 10b, which can be created by coating with a conductive material, the strength of the cross-coupling can be increased while maintaining a constant distance. The additional undercuts 20a, 20d inserted into the support structure 20 prevent undesirable influence of the wire structure 1 by other conductive structures 11a, 11b generated as "by-products" outside the two support structures 20. These two undercuts 20a, 20d are deeper than the undercuts 20b, 20c in the present exemplary embodiment according to Figure 7, which is why the further conductive structures 11a, 11b, determined on the basis of the defined exposed areas 30a, 30d, have a greater distance from the conductive structures 10a, 10c of the wire structure 1. Thus, cross-coupling of the electric field 80 from the wire structure 1 to the other conductive structures 11a, 11b can be prevented.

[0070] FIG. 8 shows a schematic cross-section of a further wire arrangement according to the invention, which can also be manufactured by the present method. In the embodiment shown in FIG. 8, two subregions 120, 220 are identical and form the support structure 20. In this case, the wire structure 1 is designed in the form of an electrical interdigital capacitance. The wire structure 1 in the form of an electrical interdigital capacitance includes, for example, seven conductive structures 10a, 10b, 10c, 10d, 10e, 10f, and 10g, which are substantially alternately arranged in two different planes 35, 36 extending parallel to each other and which may be at different potentials. For example, four conductive structures 10a, 10c, 10e, and 10g are arranged in a common first plane 35 defined by recesses in the support structure 20, while the remaining three conductive structures 10b, 10d, and 10f are arranged in a second plane 36 defined by webs between the recesses. To produce the electrical line arrangement 1, undercuts 20a, 20b, 20c, 20d, 20e, 20f are introduced into the support structure 20 with respect to the projection direction 100, and by using exposed areas 30a, 30b, 30c, 30d, 30e, 30f, these undercuts ensure electrical insulation of the conductive structures 10a, 10b, 10c, 10d, 10e, 10f, 10g applied to two different planes 35, 36. In the outlined case, the flow of the deposition beam emanating from the deposition source exhibits a divergence 105 around the given projection direction 100 at the position of the support structure 20 to be coated, which means that the width of the strip-shaped conductive structures 10a, 10c, 10e, 10g generated on the first plane 35 is increased so that they overlap, in projection along the projection direction 100, with the conductive structures 10b, 10d, 10f located on the second plane 36. This can in particular contribute to an increase in the capacitance between the structures on the two planes 35, 36. The conductive structures 10a, 10c, 10e, 10g and / or 10b, 10d, 10f located in the common plane 35, 36 can be electrically connected to each other in a further cross-sectional plane of the electrical line structure 1 and thus form a common electrical supply line.

[0071] FIG. 9 shows an exemplary embodiment of an electrical wiring arrangement according to the present invention in the form of a schematic cross-section, in which a support structure 20 comprises a substrate 40 including an electrically conductive upper subregion 320 and an electrically insulating lower second subregion 220. The first subregion 120 of the support structure 20 is produced from an electrically insulating material by using a freeform microstructuring process. In this case, the electrically insulating second subregion 220 of the support structure 20 is composed of multiple elements and includes both the lower second subregion 220 of the substrate 40 and all first subregions 120 of the support structure 20 produced by using a freeform microstructuring process. The support structure 20 is coated with at least one electrically conductive material in the projection direction 100, similar to the illustration in FIG. 4. The coating forms mutually insulated conductive structures 10a, 10b, and 10c and additional conductive structures 11a and 11b, similar to FIG. 4. 4, further first subregions 120 of the support structure 20 can be generated on the substrate 40 by using a freeform microstructuring process. As a result, during coating, by using the conductive subregions 320 of the substrate 40, vias 15 are generated between at least one of the conductive structures 10a, 10c and at least one further conductive structure present in the arrangement. This can be achieved, for example, via a corresponding gradient structure in the first subregions 120 generated by using the freeform microstructuring process.

[0072] 10 shows a schematic cross-sectional view of an exemplary embodiment of a wire arrangement according to the present invention, in which a support structure 20 comprises a conductive or insulating substrate 40, a first subregion 120 created by a freeform microstructuring process applied thereon, and an insulating coating 25 substantially uniformly surrounding the substrate 40 and the first subregion 120. The insulating coating 25 forms an insulating second subregion 220 of the support structure 20 and is applied, for example, by an isotropic coating process. In this case, the two subregions 120, 220 are therefore not connected, i.e., are in a non-intersecting relationship. The illustrated support structure 20 is then coated with at least one conductive material along a projection direction 100 to form a wire structure 1 consisting of a conductive structure 10a, similar to FIG. 2. In contrast to the illustration in Figure 2, the additional conductive structures 11a, 11b and the exposed regions 30a, 30b here are on the surface of the insulating coating 25 and not on the surface of the first sub-region 120 of the support structure 20 generated by the freeform microstructuring process.

[0073] In certain embodiments (not shown here), the conductive structures 10a, 10b, 10c, etc., and additional conductive structures 11a, 11b, etc., of the wire structure 1, as schematically illustrated in FIGS. 2, 4, 5, 6, 7, 8, 9, and 10, can vary in cross section and / or follow a non-planar trajectory along the propagation direction of the electromagnetic signal, which in the outlined case runs substantially perpendicular to the respective drawing planes. This non-planar trajectory can be predetermined by the corresponding non-planar shape of the support structure 20; in particular, the use of a freeform microstructuring process according to the present invention opens up new options for implementation. In further embodiments, the substrate 40 included in the support structure 20 can have a non-planar shape that defines or significantly influences the trajectory of the line profile. In addition, for example, the cross section of the wire structure 1 can vary along the propagation direction of the electromagnetic wave. This makes it possible to locally match the line impedance according to the varying cross section or to create wire transitions 60a, 61a that are matched at both ends in the electrical connection element. Alternatively, it is possible to create specific components defined by the respective shape of the wire structure 1, which have, in particular, capacitive, resistive or inductive effects.

[0074] 11-14 show a schematic process sequence for manufacturing an additional electrical wire arrangement according to the present invention, embodied as a non-planar electrical connection element between two separate substrates 40 and 41, using additional light blocking structures 70, 71, according to the manufacturing method described herein.

[0075] 11 shows a schematic diagram of an initial state in which two insulating substrates 40, 41 are substantially aligned facing each other. Each of the two substrates 40, 41 includes a pre-existing line structure 50a, 50b, 50c; 51a, 51b, 51c, here illustrated as a conventional coplanar waveguide, which has been previously fabricated using the methods described herein and / or conventional fabrication methods. Each coplanar waveguide includes three conductive structures that are electrically isolated from each other in all cross-sectional planes along the line structure, and the two pre-existing conductive structures 50a, 50c; 51a, 51c are each at the same potential.

[0076] 12 shows a schematic representation of a first method step in which a first subregion 120 of the support structure 20 is produced from an electrically insulating material by using a freeform microstructuring process. In this embodiment, the first subregion 120 of the support structure 20 forms a connection between conventional coplanar lines, thereby bridging at least one gap that may exist between the two substrates 40 and 41.

[0077] 11 to 14, it is possible to adapt the shape of the first subregion 120 of the support structure 20 to the positions of the two substrates 40, 41, which cannot always be precisely controlled. It is therefore particularly possible to first install these substrates 40, 41 in an inexpensive manner with relatively large positioning tolerances, and then record the exact positions of the ends of the existing line structures 50a, 50b, 50c; 51a, 51b, 51c to be connected, and based on this information to design the first subregion 120 of the support structure 20 to be produced by the freeform microstructuring process. The first sub-regions 120 adapted to the positions of the line ends to be connected can then be implemented with high precision on the substrate 40, 41, so that, for example, accurately defined, wideband and / or low-loss electrical line transitions 60a, 60b, 60c; 61a, 61b, 61c can be realized between the existing line structures 50a, 50b, 50c; 51a, 51b, 51c. For the accurate recording of the positions of the ends of the existing line structures 50a, 50b, 50c; 51a, 51b, 51c to be connected, and for the accurate positioning of the first sub-regions 120 adapted to the positions of the line ends to be connected on the substrate 40, 41, the device used for carrying out the freeform microstructuring process can, for example, be equipped with additional image acquisition capabilities that allow accurate detection of markers or structural elements on the substrate 40, 41. In the case of two-photon lithography methods, such functionality can be based, for example, on camera-based 2D or 3D imaging methods or on scanning methods, for example according to the principle of confocal microscopy. The precision with which structures can be detected on the substrates 40, 41 and with which corresponding first subregions 120 can be located on these substrates 40, 41 is preferably better than 100 μm, particularly preferably better than 10 μm, and even more particularly preferably better than 1 μm, 300 nm or 100 nm.

[0078] In order to prevent short circuits from occurring between the resulting conductive structures 10a, 10b, 10c; 11a, 11b, 11c, 11d, 11e, 11f upon coating of the support structure 20 with a conductive material along the projection direction 100 shown in FIG. 13, corresponding exposed areas 30a, 30b, 30c, 30d, 30e, 30f are created between these structures by using appropriate undercuts 20a, 20b, 20c, 20d, 20e, 20f. The undercuts 20a, 20b, 20c, 20d, 20e, 20f are designed to be deep enough in the cross section of the wire structure 1 so that the conductive structures 10a, 10b, 10c are not affected by the conductive structures 11a, 11b, 11c, 11d, 11e, 11f that are generated as "by-products", or if they are affected, they are only insignificantly affected, or are only affected locally in the desired manner, similar to the illustration in Figure 6.

[0079] Furthermore, to prevent the coating from shorting the existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c to each other, additional light blocking structures 70, 71 in the form of a plurality of protruding arms are used. The additional light blocking structures 70, 71 are aligned with the transitions between the existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c and the wire structure 1 such that, upon coating under a defined projection direction 100, no connection is created between the existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c in any cross-sectional plane along the wire structure 1.

[0080] The additional light blocking structures 70, 71 can preferably be produced together with the first sub-region 120 of the support structure 20 by the same freeform microstructuring process as in method step a). By coating in projection direction 100 in method step b), first wire transitions 60a, 60b, 60c are formed between the existing conductive structures 50a, 50b, 50c on the first substrate 40 and the conductive structures 10a, 10b, 10c of the wire structure 1, and additional wire transitions 61a, 61b, 61c are formed between the existing additional conductive structures 51a, 51b, 51c on the additional substrate 41 and the conductive structures 10a, 10b, 10c of the wire structure 1, as shown schematically in Figures 13 and 14. The additional conductive structures 11a, 11b, 11c, 11d, 11e, 11f that are also formed as "by-products" on the substrates 40, 41 of the support structure 20 either do not affect the electrical wire structure 1, or if they do, they only affect it in a negligible manner, or only in a precisely known manner that can be taken into account in implementation.

[0081] 14 shows a schematic representation of the completed electrical wire arrangement after the additional light-shielding structures 70, 71 have previously been removed. The additional light-shielding structures 70, 71 can be removed by simply peeling them off, preferably with tweezers or the lift-off process already mentioned above. In addition to the additional light-shielding structures 70, 71, the two substrates 40, 41 can be provided with at least corresponding temporary or permanent protective layers 75 (not shown here), which prevent undesired coating of the substrate surfaces or of corresponding sub-regions during the coating process in method step b). These protective layers can be produced, for example, by suitable lithographic, printing or dispensing methods and can be removed again with a suitable solvent after performing method step b).

[0082] 15 shows a schematic diagram of another exemplary embodiment of a wire arrangement according to the present invention, here embodied in the form of a non-planar dipole antenna. The wire arrangement comprises an insulating substrate 40 including a conventionally manufactured coplanar line consisting of three pre-existing conductive structures 50a, 50b, 50c, two of which may be set to the same electrical potential. In this embodiment, the wire structure 1 initially includes three individual conductive structures 10a, 10b, 10c electrically isolated from one another in a cross-sectional plane, which vary in their individual geometries along the wire structure 1 in a defined manner and, in particular, become electrically connected in at least one further cross-sectional plane of the wire structure 1.

[0083] Method step a) comprises the production of a first subregion 120 of the support structure 20, which is produced by a freeform microstructuring process from an electrically insulating material according to Fig. 15. In order to be able to coat surfaces at an angle of 90° to the surface of the substrate 40, the projection direction 100 is here set at an angle of, for example, 45° to the surface of the substrate 40. Both side walls of the slot between the structures to be coated and both the outer wall of the first subregion 120 of the support structure 20 have undercuts 20a, 20b, 20c, 20d, 20e, 20f in the region of the sloped structure shown in Fig. 15, which are designed to produce exposed regions 30a, 30b, 30c, 30d, 30e, 30f along the sloped structure. The undercuts 20a, 20b, 20c, 20d, 20e, 20f are designed to be deep enough so that the wire structure 1 comprising the conductive structures 10a, 10b, 10c is not affected, or is only insignificantly affected, or affected only in a known manner that must be taken into account in implementation, by the conductive structures 11a, 11b, 11c generated as a "by-product", as illustrated in Fig. 6. Further undercuts 20g, 20h introduced in the foot and side parts of the first subregion 120 of the support structure 20 generated by the freeform microstructuring process are designed to generate exposed areas 30g, 30h that electrically insulate the conductive structures 10a, 10b, 10c comprised by the wire structure 1 from the substrate 40 and / or the conductive structures 11c formed as a "by-product" on the substrate 40.

[0084] By using a coating of the support structure 20 with a conductive material along the projection direction 100, wire transitions 60a, 60b, 60c are formed between the existing conductive structures 50a, 50b, 50c on the substrate 40 and the conductive structures 10a, 10b, 10c of the wire structure 1. The conductive structures 10a, 10b, 10c, which are insulated from one another in the exemplary cross-sectional plane A (part in the (x,z) plane), are guided upward via a sloped structure, and in at least one further exemplary cross-sectional plane B (part in the (x,z) plane), the two outer conductive structures 10a, 10c are centrally coupled to the central conductive structure 10b, configured as a signal conductor, thus forming a dipole antenna. With a correct design, an efficient matching of the line impedance of the wire structure 1 to the wave impedance of free space is achieved, thereby enabling the resulting dipole antenna radiation without the possibility of a problematic increase in the dielectric constant of the substrate 40.

[0085] In this exemplary embodiment, an additional light-blocking structure 70 (not shown here) can also be used to enable electrical connection of conductive structures 10a, 10b, 10c to existing conductive structures 50a, 50b, 50c without causing short circuits between conductive structures 10a, 10b, 10c or between them or existing conductive structures 50a, 50b, 50c and substrate 40 and / or conductive structures 11a, 11b, 11c formed as a "by-product" on substrate 40, similar to the arrangements shown in Figures 12 and 13.

[0086] Figure 16 shows a further exemplary embodiment of an electrical wire arrangement according to the invention, here embodied in the form of an electrical probe tip that may be particularly suitable for contacting RF circuits. The electrical wire arrangement shown schematically in Figure 16 can preferably be manufactured by the method steps according to Figures 11 to 14 and similarly to the electrical wire arrangement shown schematically in Figure 15. For further details, reference is therefore made to the description of Figures 11 to 15.

[0087] In Fig. 16, the projection direction 100 is set at an angle of 90° with respect to the surface of the insulating substrate 40. By using a coating of the support structure 20 with a conductive material along the projection direction 100, wire transitions 60a, 60b, 60c are formed between the existing conductive structures 50a, 50b, 50c on the substrate 40 and the conductive structures 10a, 10b, 10c of the wire structure 1. The conductive structures 10a, 10b, 10c, which remain insulated in all cross-sectional planes along the wire structure 1, are again guided upwards via an inclined structure, shown schematically in Fig. 16, and converge at a certain distance to form three contact elements 500. The creation of the first subregion 120 according to the invention with the aid of a freeform microstructuring process again allows for very precise alignment with respect to existing structures on the substrate 40 and, with reference to the description of Figures 11 to 15, it is also possible to manufacture the wire structure 1 very precisely in terms of dimensions, with flexibly adjustable electrical parameters such as the impedance of the wire arrangement and the impedance of the transition to a further test substrate (not shown) defined by the contact element 500.

[0088] The structure shown in Figure 16 further comprises contact elements 500, which are produced by suitable shaping of the support structure 20 to be coated, allowing geometrically precise contact of corresponding contact surfaces on a chip or flat substrate. In the embodiment diagrammed in Figure 16, the contact elements 500 are based on structural elements that protrude in a direction perpendicular to the coated surface, in this example taking the form of pyramidal cones. Other geometric configurations of the contact elements 500 are also possible.

[0089] Also in this exemplary embodiment, as shown in Figures 12 and 13, an additional light-shielding structure 70 (not shown) can be used to enable electrical connection of conductive structures 10a, 10b, 10c to existing conductive structures 50a, 50b, 50c in all cross-sectional planes along electrical wire structure 1 without causing short circuits between conductive structures 10a, 10b, 10c or between them or existing conductive structures 50a, 50b, 50c and substrate 40 and / or conductive structures 11a, 11b, 11c, 11d formed as a "by-product" on substrate 40.

[0090] In this case, the support structure 20 can be designed in particular so that the three contact elements 500 protrude beyond the edge of the substrate 40 to the right, as shown in FIG. 16 , so that they are visible for contact even when the wire structure 1 is rotated so that the contact elements 500 face downwards and are visible for contact when a camera image taken from above is used for positioning. Due to the numerous options for designing the first subregion 120 of the support structure 20 generated by the freeform microstructuring process, it is also possible to generate a mechanical protective structure 600 by using the freeform microstructuring process according to method step a) or by using a different freeform microstructuring process, which prevents undesired mechanical damage to the electrical probe tip, for example due to impact with the test substrate below or misalignment. The mechanical protective structure 600 can be designed as a robust protective structure 600, as shown in FIG. 16 , which prevents unwanted access of the electrical probe tip to objects that could damage it. Alternatively or additionally, the protective structure 600 can be designed in such a way that the approach of the electrical probe tip or contact element 500 to an object that may damage them, such as, for example, the substrate 41, results in a well-defined or partial elastic deformation of the protective structure 600, or a part of it. See FIG. 17 . For this purpose, a dedicated monitor structure 2000 with an indicator structure 2200 can be used, which can be used to translate an approach 2300 of the electrical probe tip substantially along the viewing direction 2100 to a potentially damaging object into a deformation 2400 of the monitor structure 2000 that is transverse to the viewing direction 2100 and thereby visually detectable. In a preferred embodiment, the monitor structure 2000, or a part of it, can be produced integrally with the first sub-region 120 of the support structure 20 by a freeform microstructuring process.

[0091] In Fig. 18, a further exemplary embodiment of the method sequence according to Figs. 11-14 for manufacturing a further electrical wire arrangement according to the invention is shown in the form of a microscope image. For further details, reference is made to the above description of Figs. 11-14.

[0092] 18(a) shows a further electrical wiring arrangement according to the invention, comprising two substrates 40, 41, each of which has an existing electrical wiring structure provided with existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c, where two of the existing conductive structures 50a, 50c; 51a, 51c are each at the same electrical potential. Similarly to the structure shown in FIG. 9, the substrates 40, 41 comprise, in each case in the second subregion 220, an insulating support made of aluminum oxide (Al2O3) with a layer thickness of 625 μm and a conductive region 320 created on the insulating support by using a gold layer with a layer thickness of 3 μm. The existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c can be created by structuring this gold layer, for example, by using conventional lithography or laser ablation processes.

[0093] The existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c are then electrically connected to their respective counterparts. For this purpose, the first subregion 120 of the support structure 20 shown in FIG. 18(b) is produced from an insulating material by using a two-photon lithography process. In this example, the electrically insulating second subregion 220 of the support structure 20 also comprises the second subregion 220 below the substrates 40, 41, as well as the first subregion 120 of the support structure 20 produced by using a freeform microstructuring process. Due to constraints on the writing field size, the electrical line arrangement was divided into multiple parts and manufactured in multiple steps.

[0094] In order to avoid short circuits between the conductive structures 10a, 10b, 10c; 11a, 11b, 11c, 11d, 11e, 11f caused by coating the support structure with a conductive material in Figure 18(c) by a PVD process along a projection direction 100 at an angle of 90° to the surface of the substrates 40, 41, the first sub-region 120 of the support structure 20 has slots in its sidewalls in which undercuts 20a, 20b, 20c, 20d, 20e, 20f are formed, which are designed to create exposed regions 30a, 30b, 30c, 30d, 30e, 30f. The undercuts 20a, 20b, 20c, 20d, 20e, 20f are designed to be deep enough so that the wire structure 1 comprising the conductive structures 10a, 10b, 10c is either not affected by the conductive structures 11a, 11b, 11c, 11d, 11e, 11f that are generated as "by-products", as shown in Figure 6, or if affected, it is only insignificant, or is affected only in a known manner that must be taken into account at implementation.

[0095] Due to the coating in the projection direction 100, on the one hand, first wire transitions 60a, 60b, 60c are formed between the existing conductive structures 50a, 50b, 50c on the substrate 40 on the left side shown in Fig. 18(b) and the conductive structures 10a, 10b, 10c generated according to the invention of the wire structure 1, and on the other hand, additional wire transitions 61a, 61b, 61c are formed between the additional conductive structures 51a, 51b, 51c present on the substrate 41 on the right side shown in Fig. 18(b) and the conductive structures 10a, 10b, 10c of the wire structure 1. The coating thus generated on the support structure 20 has a total layer thickness along the projection direction 100 of approximately 600 nm and mainly comprises a copper layer for high conductivity. A thin layer of titanium acts as an adhesion promoter between the support structure 20 and the copper layer, and a thin layer of gold is also applied as an outer layer for environmental passivation. An additional thin layer of titanium may be inserted between the copper and gold layers to prevent gold from diffusing from the gold layer into the copper layer.

[0096] However, in order to also prevent the existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c from shorting out with themselves and with their respective adjacent substrates 40, 41, additional light blocking structures 70, 71 in the form of a plurality of protruding arms are used, which are preferably fabricated beforehand by using the same two-photon lithography process as for the first sub-region 120 of the support structure 20. The additional light blocking structures 70, 71 are aligned with respect to the wire transitions 60a, 60b, 60c; 61a, 61b, 61c between the existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c and the wire structure 1 in such a way that, upon coating under a defined projection direction 100, no electrical connection can occur between the existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c or between them and the substrates 40, 41. The conductive structures 11a, 11b, 11c, 11d, 11e, 11f formed as a "by-product" are also electrically isolated. For this purpose, the effect of the shadows cast by the additional shading structures 70, 71 on the respective wire transitions 60a, 60b, 60c; 61a, 61b, 61c along the projection direction 100 is utilized. In this way, a three-dimensional electrical connection element as shown in Figure 18 can be created between coplanar lines already present on two substrates 40, 41, while the individual conductive structures 10a, 10b, 10c remain electrically isolated from each other in all cross-sectional planes along the wire structure 1.

[0097] 18(b) are designed only to protect the immediate periphery of the electrical wire transitions 60a, 60b, 60c; 61a, 61b, 61c due to the limited writing field size of the printing process, which is why a protective layer 75 of PMMA (polymethyl methacrylate) covers the existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c over the remaining surfaces of the substrates 40, 41. The protective layer 75, applied in this exemplary embodiment by using an inkjet printing process, can be seen in FIG. 18(b) to the left of the additional light-shielding structure 70 on the left-hand substrate 40 and to the right of the light-shielding structure 71 on the right-hand substrate 41. In principle, further methods are conceivable that allow the coating of large areas of the substrates 40, 41 with sufficient precision, such as lithographic processes, dispensing processes, or simple coating with an adhesive film. The protective layer is further coated by using a metal layer in a coating process according to Fig. 18(c). By dissolving the PMMA layer with PGMEA (propylene glycol monomethyl acetate), the metal layer can be peeled off from the surface previously coated with the PMMA layer in a lift-off process, so that the existing conductive structures 50a, 50b, 50c; 51a, 51b, 51c remain electrically isolated, as shown in Fig. 18(d).

[0098] In principle, it may be conceivable, and even desirable, to perform the entire coating of the substrates 40, 41 by the same freeform microstructuring process that is also used to generate the first subregion 120 of the support structure 20 and the additional light-shielding structures 70, 71, as already explained above, provided that the selected freeform microstructuring process allows this. Due to the writing field limitations of the two-photon lithography process used here, complete coating of the substrates 40, 41 would in practice take too long due to the large surface area of ​​the substrates 40, 41, which is why the printing and lift-off processes described here were used instead. The conductive structures 11c, 11d, 11e, 11f formed as "by-products" typically remain on the substrates 40, 41 without affecting the electrical line structure 1, but can preferably be removed by peeling them off using tweezers, as is evident from a comparison of Figures 18(c) and 18(d).

[0099] Figures 18(e) and 18(f) show schematically the completed wire arrangement after the previous removal of the additional shading structures 70, 71. The shadows created on the support structure 20 using the additional shading structures 70, 71 during coating are clearly visible in Figure 18(e) in the form of darkened areas at the wire transitions 60a, 60b, 60c; 61a, 61b, 61c.

[0100] Figure 19 shows in the form of a microscope image a further exemplary embodiment of the wire arrangement according to the invention according to Figure 15 as a non-planar dipole antenna. For further details, reference is made to the description of Figure 15.

[0101] FIG. 19 shows a conventionally manufactured coplanar line comprising a substrate 40 and three pre-existing conductive structures 50a, 50b, and 50c, two of which may be at the same potential. Similar to the structure depicted in FIG. 9, the substrate 40 comprises, in each case in the second subregion 220, an insulating support made of aluminum oxide (Al2O3) with a layer thickness of 625 μm and a conductive region 320 formed on the insulating support by using a gold layer with a layer thickness of 3 μm. The pre-existing conductive structures 50a, 50b, and 50c were formed by structuring this gold layer, for example, by using a conventional lithography process or a laser ablation process. To fabricate a non-planar dipole antenna at a certain distance from the substrate 40, the first subregion 120 of the carrier structure 20 was again formed by using a two-photon lithography process and then coated with a conductive material by using a PVD process. Due to limitations in the writing field size, the wire arrangement was divided into multiple parts and manufactured in multiple steps. In this exemplary embodiment, the support structure 20 also has a surface at a 90° angle to the surface of the substrate 40, so coating at this angle is not practical here to create the desired spacing of the non-planar dipole antenna from the substrate 40. Therefore, the coating was applied in a projection direction 100 according to FIG. 15 , which is at an angle of, for example, 45° to the surface of the substrate 40. The side walls of the slits introduced in the support structure 20 between the surfaces to be coated are provided with undercuts 20 a, 20 b, 20 c, and 20 d, similar to the exemplary embodiment according to FIG. 18. Here too, the undercuts 20a, 20b, 20c, 20d are designed to be deep enough so that the wire structure 1 comprising the conductive structures 10a, 10b, 10c is not affected by the conductive structures 11a, 11b, 11c that are generated as "by-products", similar to the illustration in Figure 6, or if they are affected, it is only insignificant, or only in a known manner that must be taken into account in implementation.The coating on the support structure 20, which is most often implemented as a copper layer or from a suitable series of different materials, again has a total layer thickness of about 600 nm along the projection direction 100. A thin titanium layer acts as an adhesion promoter between the support structure 20 and the copper layer, and for environmental passivation a thin gold layer is applied as an outer layer, again another thin titanium layer can be inserted between the copper and gold layers.

[0102] 19(c), further undercuts 20e, 20f, 20g, 20h introduced in the foot and flank portions of the support structure 20 are again designed to create exposed areas 30e, 30f, 30g, 30h that provide electrical insulation of the conductive structures 10a, 10b, 10c comprised by the wire structure 1 from the substrate 40. By using a coating of the support structure 20 with a conductive material along the projection direction 100, wire transitions 60a, 60b, 60c are formed between the existing conductive structures 50a, 50b, 50c on the substrate 40 and the conductive structures 10a, 10b, 10c of the wire structure 1. The conductive structures 10a, 10b, 10c are again guided upwards via a sloped structure, so that in all cross-sectional planes along the wire structure 1, the conductive structures 10a, 10b, 10c initially remain isolated from one another, and at the peak of the slope, the two outer conductive structures 10a, 10c after slotting are centrally joined in the cross-sectional plane with the central conductive structure 10b, which is designed as a signal conductor, thereby forming a dipole antenna. With correct design, an efficient matching of the line impedance of the wire structure 1 to the wave impedance of free space can be achieved, and therefore an efficient radiation of the dipole antenna generated thereby can be achieved.

[0103] In this exemplary embodiment, additional light-shielding structures 70, 71 are also used to enable electrical connection of the conductive structures 10a, 10b, 10c of the wire structure 1 to the existing conductive structures 50a, 50b, 50c without causing short circuits between the conductive structures 10a, 10b, 10c or between them or the existing conductive structures 50a, 50b, 50c and the substrate 40 and / or the conductive structures 11a, 11b, 11c formed as a "by-product" on the substrate 40.

[0104] 19(c) shows schematically the substrate 40 with three dipole antennas after the additional light-shielding structures 70, 71 have previously been removed. To protect the existing conductive structures 50a, 50b, 50c over the entire surface of the substrate 40 from short-circuiting, a protective layer 75 made of PMMA is again used, as in the exemplary embodiment of FIG. 18, which is again removed with PGMEA in a lift-off process.

[0105] Figure 20 shows in the form of a microscope image a further exemplary embodiment of an electrical wire arrangement according to the invention according to Figure 16, in particular as an electrical probe tip for contacting RF circuits. For further details, reference is made to the description of Figure 16.

[0106] FIG. 20 shows an electrical wiring arrangement including a substrate 40 with a conventionally manufactured coplanar line consisting of three pre-existing conductive structures 50a, 50b, and 50c, two of which may be at the same potential. Similar to the structure depicted in FIG. 9, the substrate 40 includes, in each case in the second subregion 220, an insulating support made of aluminum oxide (Al2O3) with a layer thickness of 625 μm and a conductive region 320 created on the insulating support by using a gold layer with a layer thickness of 3 μm. The pre-existing conductive structures 50a, 50b, and 50c were created by structuring this gold layer, for example, by using a conventional lithography process or a laser ablation process. To manufacture an electrical probe tip, the first subregion 120 of the carrier structure 20 is also structured here by using a two-photon lithography process. Subsequently, the support structure 20 was coated with a conductive material at an angle of 90° to the surface of the substrate 40 along the projection direction 100 shown in FIG. 16 using a PVD process. The sidewalls of the slits introduced into the support structure 20 between the surfaces to be coated were provided with undercuts 20a, 20b, 20c, 20d, 20e, and 20f, similar to the exemplary embodiment according to FIGS. 18 and 19. The undercuts 20a, 20b, 20c, 20d, 20e, and 20f were designed to be deep enough so that the wire structure 1 comprising the conductive structures 10a, 10b, and 10c was either not affected, or only insignificantly affected, by the conductive structures 11a, 11b, 11c, and 11d, which were generated as "by-products," similar to the illustration in FIG. 6, or were affected in a known manner that must be taken into account during implementation. The coating on the support structure 20, which is most often implemented as a copper layer, again has a total layer thickness of about 600 nm along the projection direction 100. A thin titanium layer acts as an adhesion promoter between the support structure 20 and the copper layer, and for environmental passivation a thin gold layer is applied as an outer layer, again another thin titanium layer can be inserted between the copper and gold layers.

[0107] By using a coating of the support structure 20 with a conductive material along the projection direction 100, wire transitions 60a, 60b, 60c are formed between the existing conductive structures 50a, 50b, 50c on the substrate 40 and the conductive structures 10a, 10b, 10c of the wire structure 1. The conductive structures 10a, 10b, 10c, which remain insulated in all cross-sectional planes along the wire structure 1, are again guided upwards via an inclined structure and converge there at specific intervals to form contact elements 500, which in this case are in the form of pyramidal cone-like structures.

[0108] In this exemplary embodiment, an additional light-shielding structure 70 is also used to enable electrical connection of the conductive structures 10a, 10b, 10c of the electrical wire structure 1 to the pre-existing conductive structures 50a, 50b, 50c without causing short circuits between the conductive structures 10a, 10b, 10c or between them or the pre-existing conductive structures 50a, 50b, 50c and the substrate 40 and / or the conductive structures 11a, 11b, 11c, 11d formed as a "by-product" on the substrate 40. To protect the pre-existing conductive structures 50a, 50b, 50c against short circuits over the entire surface of the substrate 40, a protective layer 75 made of PMMA is again used, as in the exemplary embodiment of Figures 18 and 19, which is removed with PGMEA in a lift-off process.

[0109] In addition to the illustrated exemplary embodiment, further embodiments are possible. The use of a lithography process with a significantly larger writing field and at the same time a sufficiently high lateral resolution in the micrometer range, such as projection microstereolithography (PμSL), allows complete coverage of the substrate 40 surface as protection during coating, eliminating the need for the complex lift-off process using conventionally used PMMA and PGMEA. Directly generating a large-area protective structure together with the support structure 20 and additional light-shielding structure 70 in the same lithography step, according to FIG. 12, results in significant time savings and a considerable simplification of the method. Eliminating the application of chemicals to the substrate 40 and the support structure 20, especially to the first subregion 120, allows for extensive protection of sensitive components, and therefore allows for much greater freedom in the selection of materials for the support structure 20. [Explanation of symbols]

[0110] 1 Wire structure 10a~10g conductive structure 11a to 11f Additional conductive structures 15 Beer 20 Support structure (for electric wiring structures) 20a~20h Undercut (in supporting structure) 25 Insulation Coating 26 Isotropic coating with protective materials 30a-30h Shaded areas on the supporting structure; "exposed areas" 35, 36 Planes extending parallel to each other 40, 41 Substrate (part of the support structure) 50a~50c, 51a~51c Existing electric wiring structure 60a~60c, 61a~61c Wire transitions 70, 71 Additional light-blocking structures 75 Protective layer 80 Electric field lines; "modes" 100 Projection direction p 105 Divergence of the deposition beam emitted by the deposition source around a given projection direction p 120 first sub-region of the support structure (generated by the freeform microstructuring process) 220 (electrically insulating) second sub-region of the support structure 320 (electrically conductive) sub-region of the substrate 500 contact elements 600 Mechanical protection structure 1015 Point P on the surface of the support structure 1016 Half line g in the opposite direction to the projection direction p 1020 Overhang (support structure sub-area) 1030 Part of a half-line located inside the support structure 1031 Connection line PP' located outside the support structure 1040 Shaded area 2000 monitor structure 2100 Viewing direction 2200 indicator structure 2300 Approach direction 2400 transformation

Claims

1. 1. A method for manufacturing an electrical wire arrangement, comprising the steps of: a) generating a support structure (20), wherein at least one first subregion (120) of said support structure (20) is generated by using a freeform microstructuring method, at least one second subregion (220) of said support structure (20) comprises an electrically insulating material, and said support structure (20) has at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h) with respect to the projection direction (100), and b) producing at least one electric wire structure (1) by coating said support structure (20) with at least one electrically conductive material, said coating comprising at least one spatially directed coating process directed along said projection direction (100) aligned with said at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h), A method comprising:

2. The method of claim 1 , wherein the coating of the support structure (20) comprises at least one spatially directed coating process with at least two different conductive materials.

3. 3. The method according to claim 1 or 2, wherein the thickness of the at least one wire structure (1) comprising a conductive structure (10a, 10b, 10c, 10d, 10e, 10f, 10g) is increased by electrolytic growth.

4. 4. The method according to claim 1, wherein the at least one electric wire structure (1) is produced in such a way that the at least one conductive structure (10a, 10b, 10c, 10d, 10e, 10f, 10g) is formed electrically insulated with respect to additional conductive structures (10a, 10b, 10c, 10d, 10e, 10f, 10g) adjacent to the at least one conductive structure (10a, 10b, 10c, 10d, 10e, 10f, 10g) in a cross-sectional plane of the at least one electric wire structure (1) by using at least one exposed area (30a, 30b, 30c, 30d, 30e, 30f, 30g, 30h) produced by the at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h).

5. The method of any one of claims 1 to 4, wherein the support structure (20) comprises a substrate (40, 41).

6. The production of the at least one wire structure (1) comprises: the creation of a microstrip line, including the creation of a single structure (10a) that is conductive in all cross-sectional planes along said at least one electrical line structure (1); Creation of a slot line including creation of two conductive structures (10a, 10b) electrically isolated from each other in all cross-sectional planes along said at least one wire structure (1); Creation of a coplanar line, including the creation of three conductive structures (10a, 10b, 10c) electrically isolated from each other in all cross-sectional planes along said at least one electrical line structure (1); creating an antenna comprising: creating at least one conductive structure (10a) configured to, upon interaction with the at least one exposed area (30a, 30b, 30c, 30d, 30e, 30f, 30g, 30h) created by the at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h), effect a transition to free wave space of an electrical signal coupled to the at least one conductive structure (10a); the creation of a wire coupler, comprising the creation of three conductive structures (10a, 10b, 10c) electrically insulated from one another in all cross-sectional planes along said at least one wire structure (1), wherein two of said conductive structures (10a, 10c) are placed at different potentials from one another, and the distance between said two conductive structures (10a, 10c) is selected in such a way that the cross-coupling of an electric field (80) from one of said conductive structures (10a) to the other of said conductive structures (10c) is adjusted via a third conductive structure (10b); Producing an electrical probe tip having at least one contact element (500) suitable for contacting a corresponding contact surface; Creation of an electrical connection element between at least two electrical wire structures (50a-50c, 51a-51c) arranged on separate substrates (40, 41), said support structure (20) comprising at least two of said substrates (40, 41) and said first sub-region (120); Creation of an interdigital capacitance comprising a plurality of conductive structures (10a, 10b, 10c, 10d, 10e, 10f, 10g) arranged alternately in two different planes (35, 36) extending parallel to each other; The method according to any one of claims 1 to 5, wherein the compound is selected from the group consisting of:

7. 7. The method of claim 6, wherein in method step a) an additional mechanical protection structure (600) or monitor structure (2000) is generated that is designed to prevent unwanted mechanical damage to the electrical probe tip.

8. 8. The method according to any one of claims 1 to 7, wherein the at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h) is introduced in the support structure (20) in such a way that an effective permittivity of a mode (80) guided in the at least one wire structure (1) is adjusted along a propagation direction of the mode (80).

9. 9. The method of claim 8, wherein the effective dielectric constant of the modes (80) guided in the at least one wire structure (1) along the propagation direction of the modes (80) perpendicular to the respective plane of drawing is set to between 20 Ω and 100 Ω.

10. 10. The method of claim 1, wherein the freeform microstructuring method comprises generating the first subregion (120) of the support structure (20) from a plurality of individual layers, the first subregion (120) of the support structure (20) being composed of layers the number of which is greater than 10.

11. The method according to any one of claims 1 to 10, wherein the support structure (20) is produced by using a multiphoton polymerization process or a stereolithography process.

12. The method according to any one of claims 1 to 11, wherein the cross section of the at least one wire structure (1) varies along the propagation direction of the electromagnetic signal or follows a non-planar trajectory specified by the non-planar shape of the support structure (20).

13. 13. The method of any one of claims 1 to 12, wherein the first sub-region (120) of the support structure (20) and the second sub-region (220) of the support structure (20) are wholly or partially mutually encompassing, non-connected, non-intersecting, at least partially overlapping, or identical.

14. The method according to any one of claims 1 to 13, wherein a wire transition (60a-60c, 61a-61c) is formed between at least one existing wire structure (50a-50c, 51a-51c, 51) and said at least one wire structure (1).

15. When coating the support structure (20) along the projection direction (100) by using the conductive material, in such a way that at least one additional conductive connection is formed between at least two of said existing electrical wire structures (50a-50c, 51a-51c, 51) and said at least one electrical wire structure (1); or in such a way that the at least two existing electrical wire structures (50a-50c, 51a-51c, 51) remain electrically insulated from each other; at least one additional light blocking structure (70, 71) is created in at least one of said electrical wire transitions (60a-60c, 61a-61c); 15. The method of claim 14.

16. 16. The method of claim 15, wherein the at least one additional light-blocking structure (70, 71) or protective layer (75) is applied to the further portion of the substrate (40, 41) in such a way that the further portion of the substrate (40, 41) is protected from being covered by the conductive material.

17. 17. The method according to claim 15 or 16, wherein the at least one additional light blocking structure (70, 71) or the protective layer (75) is produced by using the freeform microstructuring method, in particular selected from a multiphoton polymerization process or a projection lithography process.

18. 18. The method according to any one of claims 15 to 17, wherein the at least one additional light blocking structure (70, 71) or the protective layer (75) is removed after the coating of the support structure (20), in particular by using a lift-off process or by peeling off the at least one additional light blocking structure (70, 71).

19. at least one first sub-region (120) designed as a three-dimensional freeform structure and generated using a freeform microstructuring process; a second sub-region (220) comprising an electrically insulating material; a support structure (20) comprising: a support structure (20) having at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h) with respect to a projection direction (100); at least one electrical wire structure (1) applied as a coating onto said support structure (20) by using at least one spatially directed coating process with at least one electrically conductive material along said projection direction (100) aligned with said at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h); The electrical wiring arrangement comprises:

20. The electrical wire arrangement of claim 19, wherein the coating on the support structure (20) comprises at least two different conductive materials.

21. 21. The wire arrangement according to claim 19 or 20, wherein the thickness of the at least one wire structure (1) comprising a conductive structure (10a, 10b, 10c, 10d, 10e, 10f, 10g) is increased by electrolytic growth.

22. 22. The wire arrangement of any one of claims 19 to 21, wherein the freeform microstructuring method comprises generating the first subregion (120) of the support structure (20) from a plurality of individual layers, the first subregion (120) of the support structure (20) being composed of layers the number of which is greater than 10.

23. 23. The wire arrangement according to any one of claims 19 to 22, wherein the at least one wire structure (1) comprises at least one conductive structure (10a, 10b, 10c, 10d, 10e, 10f, 10g) that is electrically insulated from a further conductive structure (10a, 10b, 10c, 10d, 10e, 10f, 10g) adjacent to the at least one conductive structure (10a, 10b, 10c, 10d, 10e, 10f, 10g) within a cross-sectional area of ​​the at least one wire structure (1) by using at least one exposed area (30a, 30b, 30c, 30d, 30e, 30f, 30g, 30h) created by the at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h).

24. The wire arrangement according to any one of claims 19 to 23, wherein the support structure (20) comprises a substrate (40, 41).

25. The at least one electric wire structure (1) comprises: a microstrip line comprising a single structure (10a) that is conductive in all cross-sectional planes along said at least one electrical line structure (1); a slot line comprising two conductive structures (10a, 10b) electrically insulated from each other in all cross-sectional planes along said at least one wire structure (1); a coplanar line comprising three conductive structures (10a, 10b, 10c) electrically isolated from each other in all cross-sectional planes along said at least one electrical line structure (1); an antenna comprising the generation of at least one conductive structure (10a) configured to effect a transition to free wave space of an electrical signal coupled to the at least one conductive structure (10a) upon interaction with the at least one exposed area (30a, 30b, 30c, 30d, 30e, 30f, 30g, 30h) generated by the at least one undercut (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h); a wire coupler comprising three conductive structures (10a, 10b, 10c) insulated from one another in all cross-sectional planes along said at least one wire structure (1), wherein two of said conductive structures (10a, 10c) are placed at different potentials, the distance between said two conductive structures (10a, 10c) being selected in such a way that the cross-coupling of an electric field (80) from one of said conductive structures (10a) to the other of said conductive structures (10c) is adjusted via a third conductive structure (10b); an electrical probe tip having at least one contact element (500) suitable for contacting a corresponding contact surface; an electrical connection element between at least two electrical wire structures (50a-50c, 51a-51c) arranged on separate substrates (40, 41), said support structure (20) comprising at least two of said substrates (40, 41) and said first sub-region (120); or an interdigital capacitance comprising a plurality of conductive structures (10a, 10b, 10c, 10d, 10e, 10f, 10g) arranged alternately in two different planes (35, 36) that extend parallel to each other and that may be at different potentials; Selected from: A wire arrangement according to any one of claims 19 to 24.

26. 26. The electrical wire arrangement of claim 25, further comprising an additional mechanical protection structure (600) or monitoring structure (2000) designed to prevent unwanted mechanical damage to the electrical probe tip.

27. 27. The wire arrangement according to any one of claims 19 to 26, wherein the undercuts (20a, 20b, 20c, 20d, 20e, 20f, 20g, 20h) in the support structure (20) are configured in such a way that the effective permittivity of a mode (80) guided in the at least one wire structure (1) is adjusted along the propagation direction of the mode (80).

28. 28. The wire arrangement of claim 27, wherein the effective dielectric constant of the modes (80) guided in the at least one wire structure (1) along the propagation direction of the modes (80) perpendicular to the respective plane of drawing is set to between 20 Ω and 100 Ω.

29. 29. The wire arrangement according to any one of claims 19 to 28, wherein the cross section of the at least one wire structure (1) varies along the propagation direction of the electromagnetic signal or follows a non-planar trajectory specified by the non-planar shape of the support structure (20).

30. 30. The wire arrangement according to any one of claims 19 to 29, wherein the first sub-region (120) of the support structure (20) and the second sub-region (220) of the support structure (20) wholly or partially contain one another, do not join or intersect, at least partially overlap or are identical.

31. 31. The wire arrangement according to any one of claims 19 to 30, comprising at least one additional light blocking structure (70, 71) or protective layer (75) applied to the further portion of the substrate (40, 41) in such a way that the further portion of the substrate (40, 41) is protected from being covered by the conductive material.

Images