Printed circuit board and electronic device having the same

By constructing a multi-layer sidewall structure on the PCB and using materials such as low-flow prepreg and polyimide layer, the problems of PCB warpage and cavity quality are solved, achieving the formation of high-quality cavities and circuit protection, reducing surface mount process steps, and improving the heat resistance and film adhesion of the circuit.

CN114982390BActive Publication Date: 2026-03-31SAMSUNG ELECTRONICS CO LTD
View PDF 4 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-12-18
Publication Date
2026-03-31

AI Technical Summary

Technical Problem

Existing printed circuit boards (PCBs) are prone to warping when using interlayer lamination, leading to defects such as solder ball breakage. At the same time, there are problems with heat resistance and film adhesion degradation when forming protective areas, making it difficult to form high-quality cavities and manage cavities.

Method used

By constructing a sidewall structure on the PCB, a multi-layer structure consisting of insulating materials and conductive layers, including low-flow prepreg, polyimide layers, and conductive components, is used to form a high-quality cavity, and the circuit is protected by laser processing, reducing the need for surface mount process iterations.

Benefits of technology

It effectively suppresses PCB warpage, reduces the risk of solder ball breakage, improves cavity quality and circuit protection, reduces surface mount process steps, and enhances the heat resistance and film adhesion of the circuit.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN114982390B_ABST
    Figure CN114982390B_ABST
Patent Text Reader

Abstract

Disclosed is a printed circuit board (PCB) module including a first PCB including a base PCB, a sidewall disposed on a periphery of the base PCB, and a conductive via penetrating the sidewall; a second PCB disposed on the sidewall to cover a cavity formed by the sidewall of the first PCB; and at least one electronic component disposed inside the cavity and positioned on the first PCB and / or the second PCB, wherein the sidewall includes a first layer disposed on an upper face of the base PCB and composed of an insulating member, a second layer disposed on the first layer and including polyimide, a third layer disposed on the second layer and composed of an insulating member, and a fourth layer disposed on the third layer and including a conductive member that is conductive with respect to the conductive via.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This disclosure generally relates to printed circuit boards (PCBs), and more specifically to electronic devices having the PCB. Background Technology

[0002] A PCB is generally constructed by printing circuit patterns onto an electrically insulating board using a conductive material such as copper, and it refers to a board capable of mounting electronic components. In other words, on a PCB, the location for mounting each component is determined to densely accommodate various electronic components, and circuit patterns for connecting these components are printed.

[0003] Because several PCBs are positioned facing each other, electronic devices comprising these PCBs can be implemented in a lightweight, thin, short, and small form factor with increased mounting density. Interposers or connectors can be used to connect multiple PCBs facing each other. For example, because an interposer is positioned between two PCBs, electronic components can be mounted within a reliable internal space. Furthermore, the interposer can use multiple conductive paths to electrically connect electronic components mounted on the two PCBs.

[0004] To enable the two PCBs to be laminated through an interposer, surface mount technology is used to attach the interposer to each PCB. In this process, warping tends to occur within the PCB, which can lead to defects such as solder ball breakage.

[0005] Furthermore, structures that can serve as interposers are constructed on PCBs, in which cavities with protective regions are formed inside the PCB. However, when protective regions are formed in this way, the processing areas may not be formed correctly due to deterioration in heat resistance and film adhesion. In addition, surface quality may deteriorate due to resist residue and variations in processing depth, and large-area cavities may be difficult to form and manage due to increased flatness distribution per unit area.

[0006] Therefore, there is a need in the art for PCBs with structures that can be used as interposers and related methods for manufacturing such PCBs, wherein the interposer has fewer surface mounting iterations.

[0007] Furthermore, there is a need in the art to form more precise protective areas inside PCBs to prevent degradation of heat resistance and film adhesion. Summary of the Invention

[0008] Technical issues

[0009] This disclosure is provided to at least address the aforementioned problems and / or disadvantages and to provide at least the following advantages.

[0010] Therefore, one aspect of this disclosure is to provide a process for constructing a structure on a PCB that can be used as an interposer, wherein a high-quality cavity is formed inside the PCB.

[0011] Another aspect of this disclosure is to protect the circuitry by forming a cavity (e.g., laser processing, deep wiring) by covering the circuitry exposed to the cavity with an improved film or resist.

[0012] Another aspect of this disclosure is to provide a method for integrally constructing an interposer layer on one of two PCBs, thereby reducing the number of surface mount processes.

[0013] Solution to the problem

[0014] According to one aspect of this disclosure, a PCB module may include: a first PCB including a substrate PCB, a sidewall disposed on the periphery of the substrate PCB, and a conductive path penetrating the sidewall; a second PCB disposed on the sidewall to cover a cavity formed by the sidewall of the first PCB; and at least one electronic component disposed inside the cavity and positioned on the first PCB and / or the second PCB, wherein the sidewall includes a first layer disposed on the upper surface of the substrate PCB and composed of insulating members, a second layer disposed on the first layer and comprising polyimide, a third layer disposed on the second layer and composed of insulating members, and a fourth layer disposed on the third layer and comprising conductive members conductive relative to the conductive path.

[0015] According to another aspect of this disclosure, a method of manufacturing a PCB module having a first PCB and a second PCB may include: laminating a first layer including an opening onto a substrate PCB of the first PCB; laminating a second layer in a cured state onto the first layer; laminating a third layer consisting of prepreg onto the second layer; laminating a fourth layer including a conductive layer onto the third layer; manufacturing the first PCB by removing portions corresponding to the openings from the second to the fourth layers; and mounting the surface of the second PCB onto the fourth layer of the first PCB. Attached Figure Description

[0016] The above and other aspects, features and advantages of certain embodiments of this disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0017] Figure 1 This is a perspective view showing an electronic device according to one embodiment;

[0018] Figure 2 This is a rear perspective view showing an electronic device according to one embodiment;

[0019] Figure 3 This is an exploded perspective view of an electronic device according to one embodiment;

[0020] Figure 4 An exploded view and a cross-sectional view of a PCB module according to one embodiment are shown;

[0021] Figure 5 Multiple layers constituting the sidewalls of a first PCB according to one embodiment are shown;

[0022] Figure 6A Multiple layers constituting a substrate PCB according to the first embodiment are shown;

[0023] Figure 6B Multiple layers constituting the substrate PCB according to the second embodiment are shown;

[0024] Figure 7A The first step of a manufacturing process for forming the sidewalls of a first PCB according to one embodiment is shown;

[0025] Figure 7B The second step of a manufacturing process for forming the sidewalls of a first PCB according to one embodiment is shown;

[0026] Figure 7C The third step of a manufacturing process for forming the sidewalls of a first PCB according to one embodiment is shown;

[0027] Figure 7D The fourth step of a manufacturing process for forming the sidewalls of a first PCB according to one embodiment is shown;

[0028] Figure 8 A process for improving the flatness of the uppermost layer of the sidewall by using filler is shown according to one embodiment;

[0029] Figure 9A A process for joining two substrate PCBs by means of an adhesive member according to one embodiment is shown;

[0030] Figure 9B This illustrates a configuration in which multiple layers are symmetrically positioned on two substrate PCBs according to one embodiment; and

[0031] Figure 9C A main PCB is shown, according to one embodiment, which is mounted or positioned on the sidewall of the first sub-PCB after a cavity is formed on the first sub-PCB. Detailed Implementation

[0032] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. For clarity and brevity, detailed descriptions of known functions and / or configurations will be omitted.

[0033] The electronic device according to the embodiments can be one of various types of electronic devices. Electronic devices may include portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices are not limited to those listed above.

[0034] It should be understood that the terminology used herein is not intended to limit the technical features set forth herein to a particular embodiment, and includes various changes, equivalents, or substitutions to corresponding embodiments. In the description of the drawings, similar reference numerals may be used to refer to similar or related elements. It will be understood that a singular noun corresponding to an item may include one or more things unless the relevant context explicitly indicates otherwise. As used herein, each of the phrases such as “A or B,” “at least one of A and B,” “at least one of A or B,” “A, B, or C,” “at least one of A, B, and C,” and “at least one of A, B, or C” may include all possible combinations of items listed together in their corresponding one. As used herein, terms such as “first” and “second” or “first” and “second” may be used simply to distinguish one corresponding component from another and do not limit the components in terms of importance or order. It will be understood that if an element (e.g., the first element) is referred to as being "connected" to, "attached to" another element (e.g., the second element), "connected to" another element (e.g., the second element), or "connected to" another element (e.g., the second element) with or without the terms "operationally" or "communically", then this means that the first element can be connected to the second element directly (e.g., wired), wirelessly, or via a third element.

[0035] In this disclosure, because the PCB and the interposer are constructed as a single unit, board warpage can be suppressed, which reduces the likelihood of defects such as solder ball breakage. Therefore, PCBs can be manufactured in high-volume production.

[0036] Figure 1 This is a perspective view showing an electronic device 100 according to one embodiment. Figure 2 This illustrates an embodiment. Figure 1 Rear perspective view of electronic device 100.

[0037] Reference Figure 1 and Figure 2 The electronic device 100 may include a housing 110, which includes a first surface (or front surface) 110A, a second surface (or rear surface) 110B, and side surfaces 110C surrounding the space between the first surface 110A and the second surface 110B. In another embodiment, the housing may be configured as follows: Figure 1Parts of the first side 110A, the second side 110B, and the third side 110C.

[0038] The first surface 110A may be composed of a front panel 102 that is at least partially transparent (e.g., a polymer panel or glass panel with various coatings). The front panel 102 may include a curved portion that extends seamlessly from the first surface 110A toward the rear panel 111 by bending in at least one side edge portion.

[0039] The second surface 110B may be composed of an opaque back panel 111. For example, the back panel 111 may be composed of coated or colored glass, ceramic, polymer, metallic material (e.g., aluminum, stainless steel (STS), or magnesium), or a combination of at least two of these materials. The back panel 111 may include a curved portion that extends seamlessly from the second surface 110B toward the front panel 102 by bending at least one side edge portion.

[0040] Side 110C may be formed by a side frame structure (or side member or sidewall) 118 joined to the front panel 102 and the rear panel 111 and comprising metal and / or polymer. The rear panel 111 and the side frame structure 118 may be integrally constructed and may comprise the same material (e.g., a metallic material such as aluminum).

[0041] Electronic device 100 may include at least one or more of the following: display 101, audio modules 103 and 114, sensor module, camera module 105, at least one key input device 117, and connector hole 108. At least one of the components may be omitted from electronic device 100, or other components may be additionally included. For example, sensors such as proximity sensors or illuminance sensors may be integrated into display 101 in an area provided by front panel 102, or may be located adjacent to display 101.

[0042] The electronic device 100 may also include a light-emitting element disposed in the area provided by the front panel 102 adjacent to the display 101. The light-emitting element may provide status information of the electronic device 100 in an optical form, may provide a light source that cooperates with the operation of the camera module 105, and may include light-emitting diodes (LEDs), infrared (IR) LEDs, and xenon lamps.

[0043] Display 101 may be exposed through portions of front panel 102. The edges of display 101 may be configured to have a substantially similar shape to the periphery of adjacent front panel 102 (e.g., a curved surface). Alternatively, to increase the area of ​​exposed display 101, display 110 and front panel 102 may be configured to have substantially the same spacing between their peripheries. A portion of the screen display area of ​​display 101 may have a recess or opening and may include other electronic components aligned with the recess or opening, such as camera module 105 and proximity or illuminance sensors.

[0044] At least one of the camera modules 112 and 113, the fingerprint sensor 116, and the flash 106 may be included behind the screen display area of ​​the display 101, or the display 101 may be arranged adjacent to or in conjunction with the following: touch sensing circuitry, a pressure sensor capable of measuring touch intensity (pressure), and / or a digitizer for detecting magnetic type styluses.

[0045] Audio modules 103 and 114 may include a microphone hole and a speaker hole. The microphone hole may have a microphone disposed therein to receive external sound, and may have multiple microphones configured to sense the direction of sound. The speaker hole and microphone hole may be implemented with a single hole 103, or a speaker (e.g., a piezoelectric speaker) may be included without a speaker hole. The speaker hole may include an external speaker hole and a communication receiver hole 114.

[0046] The electronic device 100 includes a sensor module to generate electrical signals or data values ​​corresponding to internal operating states or external environmental states. The sensor module may further include a proximity sensor disposed adjacent to a first surface 110A of the housing 110, a fingerprint sensor integrally or adjacent to the display 101, and / or a biometric sensor (e.g., a heart rate monitoring (HRM) sensor) disposed to a second surface 110B of the housing 110. The electronic device 100 may also include at least one of the following sensor modules: a gesture sensor, a gyroscope sensor, an atmospheric pressure sensor, a magnetic sensor, an accelerometer, a grip sensor, a color sensor, an IR sensor, a biometric sensor, a temperature sensor, a humidity sensor, and an illuminance sensor.

[0047] Camera modules 105, 112, 113, and 106 may include a first camera device 105 disposed on a first surface 110A of the electronic device 100, a second camera device 112 disposed on a second surface 110B, and / or a flash 113. Camera devices 105, 112, and 113 may include one or more lenses, an image sensor, and / or an image signal processor. The flash 106 may include an LED or a xenon lamp. Two or more lenses (wide-angle lenses and telephoto lenses) and an image sensor may be disposed on one surface of the electronic device 100.

[0048] The key input device 117 may be disposed on the side 110C of the housing 110. Alternatively, the electronic device 100 may not include all or part of the aforementioned key input device 117, in which case the key input device 117 may be implemented on the display 101 in a different form such as a soft key. The key input device may include at least a portion of a fingerprint sensor 116 disposed on the second side 110B of the housing 110.

[0049] Connector hole 108 may accommodate a connector for transmitting / receiving power and / or data from an external electronic device, and / or a connector for transmitting / receiving audio signals about the external electronic device. For example, connector hole 108 may include a Universal Serial Bus (USB) connector or a headphone jack.

[0050] Figure 3 This is an exploded perspective view of an electronic device according to one embodiment. (Refer to...) Figure 3 Electronic device 200 may include a side bezel structure 210, a first support member 211 (e.g., a bracket), a front panel 220, a display 230, a PCB 240, a battery 250, a second support member 260 (e.g., a rear cover), an antenna 270, and a rear panel 280. Electronic device 200 may omit at least one of these components, or may include additional components. At least one component of electronic device 200 may be compatible with... Figure 1 or Figure 2 At least one component of the electronic device 100 is the same as or similar to that of the other device, therefore, redundant descriptions will be omitted below.

[0051] The first support member 211 can be connected to the side bezel structure 210 by being disposed inside the electronic device 200, or it can be integrally constructed relative to the side bezel structure 210. The first support member 211 can be made of metallic and / or non-metallic materials (e.g., polymers). The display 230 can be attached to one side of the first support member 211, and the PCB 240 can be attached to its other side. A processor, memory, and / or interface can be mounted on the PCB 240. The processor can include one or more of a central processing unit, an application processor, a graphics processing unit, an image signal processor, a sensor central processor, and a communication processor.

[0052] The memory may include volatile memory or non-volatile memory.

[0053] The interface may include a High Definition Multimedia Interface (HDMI), a USB interface, a Secure Digital (SD) card interface, and / or an audio interface. For example, the interface can electrically or physically connect electronic device 200 to external electronic devices, and may include a USB connector, an SD card / Multimedia Card (MMC) connector, or an audio connector.

[0054] As a means of supplying power to at least one component of electronic device 200, battery 250 may include a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. At least a portion of battery 250 may be disposed on a plane substantially the same as that of PCB 240. Battery 250 may be integrally disposed within electronic device 200 or may be detachably disposed relative to electronic device 200.

[0055] Antenna 270 may be disposed between rear panel 280 and battery 250 and may include near field communication (NFC) antenna, wireless charging antenna, and / or magnetically secure transmission (MST) antenna. Antenna 270 may perform NFC with external electronic devices or may wirelessly send / receive power required for charging. The antenna structure may consist of at least a portion of the first support member 211 and / or the side frame structure 210, or a combination thereof.

[0056] Figure 4 An exploded view and a cross-sectional view of a PCB 400 according to one embodiment are shown.

[0057] Reference Figure 4 PCB 400 may include a sub-PCB 410, a main PCB 430, and at least one electronic component 450 mounted or positioned on the sub-PCB 410 and / or the main PCB 430. The sub-PCB 410 and the main PCB 430 may correspond to a first PCB and a second PCB, respectively. In the following description, the upper surface faces the direction of arrow 401, and the lower surface faces the direction opposite to arrow 401. The side surfaces face a direction perpendicular to arrow 401.

[0058] The sub-PCB 410 may define a cavity 416 by including a base PCB 411 and a sidewall 412 extending from the upper surface 414 of the base PCB 411. A conductive path 413 may be formed inside the sub-PCB 410.

[0059] The substrate PCB 411 may include multiple layers having conductive and / or non-conductive layers. The substrate PCB 411 may include circuit patterns printed on or within its surface. The substrate PCB 411 may also include a solder resist layer coated on its surface.

[0060] Sidewall 412 can extend from the upper surface 414 of the base PCB 411 to the lower surface 431 of the main PCB 430. Sidewall 412 can be configured to have a height (e.g., h) along a peripheral region of the base PCB 411. Furthermore, the peripheral region can refer to the edge of the base PCB 411, or it can refer to an inner region adjacent to the edge. For example, sidewall 412 can be disposed on the edge or outer boundary of the base PCB 411, or spaced apart from the inner side of the edge. The height h of sidewall 412 can be greater than the height of at least one electronic component 451 mounted or positioned on the upper surface 414 of the base PCB 411, or at least one electronic component 455 mounted or positioned on the lower surface 431 of the main PCB 430. Figure 4 In this example, the PCB module has a rectangular shape, and the sidewalls 412 have a shape corresponding to the PCB module. However, the shape of the PCB module 400 is not limited to the example shown.

[0061] The sub-PCB 410 may include a cavity 416 corresponding to a space surrounded by the inner surface 415 of the sidewall 412. The upper surface 414 of the base PCB 411 may be exposed toward the cavity 416 of the sub-PCB 410. The cavity 416 of the sub-PCB 410 may correspond to a closed space surrounded by the upper surface 414 of the base PCB 411, the inner surface 415 of the sidewall 412, and the lower surface 431 of the main PCB 430. The sidewall 412 may include multiple layers, and each of the layers constituting the sidewall 412 may include an opening corresponding to the cavity 416.

[0062] The main PCB 430 may face the sub-PCB 410 and may be spaced apart from the base PCB 411 of the sub-PCB 410. The main PCB 430 may be surface-mounted or positioned on the upper surface 417 of the sidewall 412 of the sub-PCB 410 and may be spaced apart from the base PCB 411 by a height h of the sidewall 412. Alternatively, the sidewall 412 of the sub-PCB 410 may be surface-mounted or positioned on the lower surface 431 of the main PCB 430. The lower surface 431 of the main PCB 430 may be partially exposed toward the cavity 416 of the sub-PCB 410. The main PCB 430 may be soldered to conductive components included in the upper surface 417.

[0063] PCB module 400 may include at least one or more electronic components 451, 453, 455, and 457 mounted or positioned on the surfaces of sub-PCB 410 and main PCB 430. At least one or more electronic components 451 and 455 may be mounted or positioned on the surfaces of sub-PCB 410 and main PCB 430 exposed toward cavity 416. For example, at least one or more electronic components 451 and 455 may be mounted or positioned on the upper surface 414 of substrate PCB 411 and / or the lower surface 431 of main PCB 430.

[0064] The base PCB 411 and / or sidewall 412 may include a plurality of conductive paths 413 disposed along the sidewall 412 of the sub-PCB 410. Although Figure 4 The diagram shows conductive passages 413 arranged in a row along the sidewall, but conductive passages 413 may optionally be arranged in two or more rows.

[0065] The sub-PCB 410 may include conductive paths 413 disposed within the sidewall 412. The conductive paths 413 may penetrate all layers constituting the sidewall 412. The conductive paths 413 may penetrate some (e.g., vias in inner layers) or all (e.g., vias in all layers) of the layers constituting the base PCB 411. Among the conductive paths 413, a first conductive path may penetrate the entire base PCB 411, and a second conductive path may penetrate a portion of the base PCB 411. The conductive paths 413 penetrate the sub-PCB 410 (e.g., the base PCB 411 and the sidewall 412), but are not limited thereto; the conductive paths 413 may also penetrate all or part of the main PCB 430.

[0066] The conductive path 413 can electrically connect electronic components 451 and 453 mounted or positioned on the sub-PCB 410 and electronic components 455 and 457 mounted or positioned on the main PCB 430. One side of the conductive path 413 can be connected to a conductive member (e.g., in the upper surface 417 of the sidewall 412). Figure 5 The conductive path 413 is connected to the fourth layer 514, and the conductive component can be connected to the conductive pattern of the main PCB 430. The other side of the conductive path 413 can be connected to the conductive pattern, which is connected to the electronic components 451 and 453 mounted or positioned on the substrate PCB 411.

[0067] The sidewall 412 of the sub-PCB 410 can serve as an interposer layer for electrically connecting the base PCB 411 and the main PCB 430. By ensuring internal space via the interposer layer while the main PCB 430 is mounted on the sub-PCB 410, electronic components (e.g., 451, 455) can be compactly mounted or positioned inside the electronic device. Here, the area occupied by the PCB module in the electronic device can be reduced, and the area for battery mounting can be increased.

[0068] Figure 5 The following is illustrated: [The following is a description of a configuration according to an embodiment] Figure 4 The first PCB 410 has multiple layers on its sidewall 412. Figure 5 This can correspond to some areas 500 of sub-PCB 410.

[0069] Reference Figure 5 The sidewall 412 may include multiple layers 511, 512, 513 and 514, which contain conductive and / or non-conductive layers.

[0070] The sidewall 412 may include a first layer 511 laminated on the upper surface 414 of the substrate PCB 411, a second layer 512 disposed on the first layer 511, a third layer 513 disposed on the second layer 512, and a fourth layer 514 disposed on the third layer 513.

[0071] Despite Figure 5 In the example, the sidewalls consist of four layers, but are not limited to this; in another embodiment, at least one layer may be further included between the layers. Furthermore, each of the layers constituting the sidewalls may have a different height. Although for ease of illustration, the substrate PCB 411 is... Figure 5 The example is shown as a single layer, but the substrate PCB 411 may include two or more layers.

[0072] The first layer 511 can be laminated onto the substrate PCB 411 of the sub-PCB 410 and can be made of an insulating material. The first layer 511 can be made of a low-flow prepreg (pre-impregnated with resin), which refers to a prepreg having lower resin flowability than conventional prepregs (or conventional flow prepregs). Because the resin contained in the prepreg is partially cured during the PCB manufacturing process, resin flow may occur in the direction of arrow 503 during the PCB compression process. For example, when pressure is applied to a prepreg layer having a specific height and width, the resin may flow out in the direction of lower pressure, thus the prepreg layer may decrease in height and increase in width. The resin of the prepreg may include epoxy resin and filler. A prepreg with low flowability can be achieved by changing the composition of the epoxy resin or filler or by changing the ratio of filler to epoxy resin.

[0073] Because the first layer 511 is made of a low-flow prepreg, its shape can be maintained during the manufacturing process of the PCB module 400. For example, when the substrate PCB 411 includes a first region 501 and a second region 502, the first layer 511 can be located only in the first region 501. Even when pressure is applied to the first layer 511 made of the low-flow prepreg, it can remain located in the first region 501 because the resin flow is lower in the direction of arrow 503.

[0074] The first layer 511 can be configured to form an air gap between the substrate PCB 411 and the second layer 512. Because the opening of the first layer 511 is covered by the second layer 512, the air gap (e.g., surrounded by the substrate PCB 411, the inner surface of the first layer 511, and the second layer 512) is formed. Figure 7B An air gap 702 can be formed. When the first layer 511 is made of a low-flow prepreg, the height of the first layer 511 can be maintained at a specific level even if other layers are laminated on top of it. (Refer to...) Figure 7B Because the first layer 511 is made of low-flow prepreg, the height h of the air gap formed between the substrate PCB 411 and the second layer 512 can be maintained at a specific level.

[0075] The first layer 511 can be made of a material capable of forming air gaps during the PCB manufacturing process, and it does not necessarily have to be made of a low-flow prepreg. For example, even when pressure or heat is applied, the first layer 511 can be made of a material with properties that can retain the volume of the openings formed therein.

[0076] The second layer 512 may include a non-conductive layer made of polyimide.

[0077] The second layer 512 can be configured to protect circuit patterns located on the base PCB 411. For example, the second layer 512 can be included in the sub-PCB 410. Figure 4 The circuit pattern of the cavity 416 is exposed on the upper surface 414 of the substrate PCB 411 during the process. To form the cavity 416 of the sub-PCB 410, some areas of the layer disposed on the first layer 511 can be removed using a laser. When the laser reaches the opening 511b of the substrate PCB 411 exposed to the first layer 511... Figure 7A When the upper surface 414 of the substrate PCB is exposed, the circuit pattern printed on the surface of the substrate PCB 411 may be damaged. The second layer 512 can prevent the laser from penetrating the second layer 512 to reach the upper surface 414 of the substrate PCB 411, thereby protecting the circuit pattern of the substrate PCB 411.

[0078] The second layer 512 may also include conductive members that are electrically disconnectable from the conductive path 413 of the sub-PCB 410. For example, the conductive members of the second layer 512 may be patterned to be spaced apart from the conductive path 413 of the sub-PCB 410.

[0079] The second layer 512 can be a single-sided flexible copper-clad laminate (FCCL), which includes a polyimide layer and copper foil laminated on the polyimide layer.

[0080] The second layer 512 may be made of a material that has a specific level of stiffness in the environment (e.g., high temperature) in which the sub-PCB 410 is manufactured. That is, the second layer 512 may be made of a material that does not soften at high temperatures. The second layer 512 may include a material that has been pre-cured when laminated onto the first layer 511. For example, the second layer 512 may include a synthetic resin, polyimide, or a metal film.

[0081] The third layer 513 may be made of an insulating material. The third layer 513 may be made of a conventional prepreg with higher flowability than the first layer 511. The third layer 513 may be used as an adhesive mechanism between the second layer 512 and the fourth layer 514.

[0082] The fourth layer 514 may include a conductive member that can be connected to the conductive path 413. The fourth layer 514 may also include a non-conductive layer disposed below the conductive member and on the third layer 513, and the conductive member may be disposed on the non-conductive layer. The non-conductive layer of the fourth layer 514 may be made of prepreg. The fourth layer 514 may be a single-sided copper-clad laminate (CCL) including a conductive layer and a prepreg layer. The fourth layer 514 may include a solder resist layer coated on the conductive member.

[0083] The height h of the sidewall 412, formed by the first layer 511 to the fourth layer 514, is determined such that electronic components are mounted or positioned within the internal space surrounded by the sidewall 412. For example, refer to... Figure 4 The height h of the sidewall 412 can be determined so that electronic components 451 mounted or positioned on the upper surface 414 of the base PCB 411 and / or electronic components 455 mounted or positioned on the lower surface 431 of the main PCB 430 will not interfere with each other or have an electrical effect on each other (e.g., performance will not be degraded due to noise or heating).

[0084] Sidewall 412 may include a conductive member disposed on an outer surface. For example, the outer surface of sidewall 412 may be plated with a conductive member. The conductive member can shield electromagnetic waves radiated toward the internal space or conductive path, thereby reducing performance degradation of electronic components in the PCB. The conductive member may include a conductive material for electromagnetic shielding, such as gold, copper, lead, or silver.

[0085] Figure 6A and Figure 6B Multiple layers constituting the substrate PCB 411 according to the first and second embodiments are shown. (Refer to...) Figure 6A In a first embodiment, the substrate PCB 411 may include a first layer 601, a second layer 602 located on the first layer 601, a third layer 603 located on the second layer 602, a fourth layer 604 located on the third layer 603, and a fifth layer 605 located on the fourth layer 604. (Refer to...) Figure 6B In the second embodiment, the substrate PCB 411 may further include a sixth layer 612 located below the first layer 601 and a seventh layer 611 located below the sixth layer 612.

[0086] exist Figure 6A and Figure 6B For ease of explanation, the substrate PCB 411 consists of 5 layers (e.g., Figure 6A ) or 7 layers (for example, Figure 6B The number of layers constituting the substrate PCB 411 is not limited to this. That is, the number of layers constituting the substrate PCB 411 can be greater than or less than 5 or 7.

[0087] exist Figure 6A and Figure 6B For ease of illustration, each of the layers constituting the substrate PCB 411 (e.g., first layer 601 to seventh layer 611) is represented as a single layer, but each layer may include two or more layers. For example, the first layer 601 may include a non-conductive layer made of prepreg and a conductive layer made of copper. Figure 6B The seventh layer 611 may include a single-sided FCCL composed of polyimide and copper foil.

[0088] The multiple layers constituting the substrate PCB 411 may include conductive layers and / or non-conductive layers. The non-conductive layer may be a prepreg. The conductive layer may be a layer made of copper. The conductive layer may include conductive patterns that can be configured to connect with the conductive path 413. The conductive patterns included in the conductive layer can serve as conductive paths between electronic components 451 and 453 mounted or positioned on the substrate PCB 411 and the conductive path 413. The conductive and non-conductive layers may be sequentially laminated to form the substrate PCB 411. For example, a first conductive layer, a first non-conductive layer, a second conductive layer, and a second non-conductive layer may be sequentially laminated to form the substrate PCB 411.

[0089] If the layers constituting the substrate PCB 411 have different properties, such as material or thickness, warping may occur in the substrate PCB 411. For example, when the substrate PCB 411 is composed of a second layer 602, a third layer 603, and a fourth layer 604, and when the second layer 602 and the fourth layer 604 are composed of different materials, each layer may deform (e.g., expand or contract) at different levels, even if the second layer 602 and the fourth layer 604 are exposed to the same environment (e.g., the same temperature). In this case, warping may occur in the substrate PCB 411 composed of the second layer 602 to the fourth layer 604. Some or all of the multiple layers constituting the substrate PCB can be configured symmetrically to minimize the deformation (or warping) of the substrate PCB.

[0090] The substrate PCB 411 may include multiple layers that are symmetrically positioned relative to a central layer. The central layer may refer to a standard of symmetry, and when two layers are said to be symmetrical with respect to the central layer, it may mean that the two layers have the same thickness and / or the same material. The nth layer above the central layer may have the same characteristics (e.g., thickness or material) as the nth layer below the central layer.

[0091] exist Figure 6A In this configuration, because the first layer 601 and the second layer 602 are symmetrical with respect to the third layer 603, respectively, with respect to the fifth layer 605 and the fourth layer 604, the third layer 603 is the central layer. The fourth layer 604, which is the first layer above the third layer 604, can be constructed to have the same thickness and / or the same material as the second layer 602, which is the first layer below the third layer 603. Furthermore, the fifth layer 506, which is the second layer above the third layer 603, can be constructed to have the same thickness and / or the same material as the first layer 601, which is the second layer below the third layer 603.

[0092] The substrate PCB 411 may include some or all of the layers constituting the sidewalls 412 that are symmetrical with respect to the central layer. (See reference...) Figure 6B The substrate PCB 411 may include some layers that are symmetrical with respect to the third layer 603 (i.e., the center layer) among the layers constituting the sidewall 412. For ease of illustration, the first layer 511 of the sidewall 412 is referred to as the air gap forming layer, and the second layer 512 is referred to as the protective layer.

[0093] The substrate PCB 411 may include a seventh layer 612, which is symmetrical with respect to the third layer 603, to the air gap forming layer 511 of the sidewall 412. The seventh layer 612 may be positioned symmetrically with respect to the third layer 603 to the air gap forming layer 511. The substrate PCB 411 may also include a sixth layer 611, which is symmetrical with respect to the third layer 603, to the protective layer 512 of the sidewall 412. The sixth layer 611 may be positioned symmetrically with respect to the third layer 603 to the protective layer 512. Although... Figure 6B A substrate PCB 411 is shown comprising layers 611 and 612 symmetrical to two of the layers 511 and 512 constituting the sidewall 412. However, in another embodiment, the substrate PCB 411 may also include layers symmetrical to the remaining layers constituting the sidewall 412 (e.g., the third layer 513 of the fourth layer 514 of the sidewall 412).

[0094] That is, the sixth layer 611 and the seventh layer 612 in the substrate PCB 411, which are symmetrical with respect to the sidewall 412, may not include openings. The air gap forming layer 511 and the protective layer 512 constituting the sidewall 412 include openings corresponding to the cavities 416 of the sub-PCB 410, but the sixth layer 611 and the seventh layer 612, which are symmetrical with respect to the third layer 603, may not include openings.

[0095] Figure 7A , Figure 7B , Figure 7C and Figure 7D The formation according to one embodiment is shown. Figure 6A and Figure 6B PCB 410 Figure 6A and Figure 6B The first, second, third and fourth steps of the manufacturing process of the sidewall 412.

[0096] Specifically, for ease of explanation, Figure 7B , Figure 7C and Figure 7D A cross-section of the subPCB 410, including the air gap 702, is shown at each step of the manufacturing process. Although the layers constituting the sidewalls are described below as consisting of the first layer 511 through the fourth layer 514, in another embodiment, the sidewalls may also include at least one layer disposed between these layers. For example, the manufacturing process may also include the step of laminating an additional layer on the third layer 513 prior to laminating the fourth layer 514.

[0097] The manufacturing process of the sub-PCB 410 described herein is limited to layer lamination, and additional steps may be added between each step.

[0098] form Figure 6A and Figure 6B PCB 410 Figure 6A and Figure 6B The manufacturing process of the sidewall 412 may include a first step of laminating the first layer 511 onto some areas of the substrate PCB 411, a second step of laminating layers onto the first layer 511, and processing the layers located on the first layer 511 to form Figure 4 The third step of cavity 416.

[0099] Reference Figure 7A In the first step, a first layer 511 can be positioned on a substrate PCB 411. The first layer 511 may include a peripheral portion 511a made of insulating material and an opening 511b surrounded by the peripheral portion 511a. The peripheral portion 511a of the first layer 511 may be disposed on a first region 414a corresponding to a peripheral region in the upper surface of the substrate PCB 411, and the opening 511b of the first layer 511 may be disposed on a second region 414b corresponding to an internal region of the substrate PCB 411. For example, the first layer 511 may be formed in a shape including the opening 511b and may be positioned on the substrate PCB 411. The peripheral portion 511a of the first layer 511 may form part of the sidewall 412 of the first PCB 410, and the opening portion 511b of the first layer 511 may form part of the cavity 416 of the first PCB 410.

[0100] After positioning the first layer 511, a space (corresponding to the opening 511b of the first layer) can be formed, surrounded by the upper surface 414 of the substrate PCB 411 and the peripheral portion 511a of the first layer 511. If the first layer 511 is a low-flow prepreg layer, the shape of the space can be maintained even if pressure is applied to the first layer 511 after the first step. That is, because the first layer 511 is formed with a low-flow prepreg, even if pressure is applied to the first layer 511 in the direction of arrow 701, the prepreg constituting the peripheral portion 511a can be prevented from flowing into the second region 414b.

[0101] Reference Figure 7B In the second step, the second layer 512 to the fourth layer 514 can be positioned sequentially on the first layer 511.

[0102] The second layer 512 can be laminated onto the first layer 511 in such a way that the outer region of the lower surface of the second layer 512 (e.g., with respect to the first layer 511) Figure 7A The area corresponding to the outer portion 511a of the first layer 511, and surrounded by the outer region of the lower surface of the second layer 512 (e.g., the area corresponding to the outer portion 511a of the first layer 511). Figure 7AThe portion corresponding to the opening 511b of the first layer 511 is exposed to air from the opening 511b of the first layer 511. After the second layer 512 is positioned on the first layer 511, an air gap 702 can be formed, surrounded by the substrate PCB 411, the peripheral portion 511a of the first layer 511, and the second layer 512. For example, an air layer can exist between the second layer 512 and the substrate PCB 411. The air gap 702 can correspond to the opening 511b of the first layer 511.

[0103] The second layer 512 can be made of a material with a specific level of stiffness in the PCB manufacturing environment. That is, the second layer 512 can be made of a material that does not soften at high temperatures. For example, the second layer 512 may include a single-sided FCCL or a cured polyimide layer.

[0104] When the second layer 512 is made of a material with a specific level of stiffness, sagging of the internal region of the second layer 512 toward the opening 511b of the first layer 511 can be minimized. For example, because the second layer 512 is laminated on the first layer 511 with a specific level of stiffness, the air gap 702 between the substrate PCB 411 and the second layer 512 can be prevented from narrowing or disappearing.

[0105] The third layer 513 and the fourth layer 514 can be sequentially positioned on the second layer 512. Because the second layer 512 is pre-cured, even if the third layer 513 and the fourth layer 514 are laminated on the second layer 512, the sagging of the layers disposed on the opening 511b of the first layer 511 towards the opening 511b can be minimized. In other words, even if other layers are additionally laminated on the second layer 512, the air gap 702 between the substrate PCB 411 and the second layer 512 can be maintained.

[0106] The conductive path 413 can be constructed before the cavity is fabricated. The conductive path 413 can be constructed along the region 703 corresponding to the peripheral portion 511a of the first layer. The conductive path 413 can be constructed to penetrate some or all of the layers constituting the substrate PCB 411 (e.g., multiple layers 601, 602, 603, 604, and 605) and the layers constituting the sidewall 412 (e.g., multiple layers 511, 512, 513, and 514). In another embodiment, the conductive path 413 can be constructed to penetrate some or all of the layers 511, 512, 513, and 514 constituting the sidewall 412, but not the layers 601, 602, 603, 604, and 605 constituting the substrate PCB 411.

[0107] Reference Figure 7C In the third step, the internal region of the layer, which is located in the first layer 511, can be removed by using laser drilling. Figure 7AOn the opening 511b. That is, the sub-PCB 410 can be removed from the second layer 512 to the fourth layer 514. Figure 4 The portion corresponding to cavity 416 (hereinafter, "cavity portion 710").

[0108] After performing the second step, each of the second to fourth layers 512 may include a portion corresponding to the sidewall 412 of the sub-PCB 410 (hereinafter, "sidewall portion") and a cavity portion 710. In the third step, the cavity portion 710 of the second to fourth layers 512 may be removed by drilling, and only the sidewall portion may be retained. When removing the cavity portion 710 of the second to fourth layers 512 (e.g., with the sidewall portion 412 of the sub-PCB 410), Figure 4 When the cavity 416 corresponds to the region, a cavity 416 can be formed surrounded by the remaining sidewall portion (e.g., the portion of the second layer 512 to the fourth layer 514 corresponding to the peripheral portion 511a of the first layer 511) and the peripheral portion 511a of the first layer 511. The first layer 511 Figure 7A The outer portion 511a and the sidewall portions of the second layer 512 to the fourth layer 514 can correspond to the sidewall 412 of the first PCB 410.

[0109] The drilling process preferably uses a laser, but a mechanism capable of removing the cavity 710 from the second layer 512 to the fourth layer 514 is sufficient. The laser drilling process can be performed using at least one of carbon dioxide (CO2), yttrium aluminum garnet (YAG), and an excimer laser.

[0110] Reference Figure 7D The processing depth for machining the cavity can be adjusted so that it does not penetrate the second layer 512, thereby protecting the circuit patterns on the substrate PCB 411 from laser interference. The laser device can adjust the intensity or frequency of the radiated laser to control it so that the laser does not penetrate the second layer 512. As a result, a groove 704 can be formed on the second layer. For example, if the second layer 512 is a single-sided FCCL that includes copper foil only on the upper surface of the second layer 512, the laser can be adjusted to penetrate the copper foil of the single-sided FCCL without penetrating the polyimide layer. That is, the depth of the groove 704 formed on the second layer 512 can be less than the height of the second layer 512 and greater than the height of the copper foil of the second layer 512. When the laser is adjusted to not penetrate the second layer 512, a portion of the cavity 416 of the layer disposed on the first layer 511 can be connected to the sidewall 412 of the first PCB 410. Because the thickness t of the portion connecting the cavity 416 and the sidewall 412 of the second layer 512 has been thinned by the drilling process, the portion of the cavity 416 of the layer disposed on the first layer 511 can be easily removed from the sidewall 412.

[0111] Figure 8 A process for improving the flatness of the uppermost layer (e.g., the fourth layer 514) of the sidewalls by using filler is shown according to one embodiment. It can be... Figure 7B The following process is added in the middle of the second step.

[0112] Figure 8 It shows Figure 6A and Figure 6B The cross-section of the sub-PCB 410 includes the air gap 702.

[0113] exist Figure 8 In the middle, because only the outer area of ​​the second layer 512 is composed of the first layer 511. Figure 7A The outer portion 511a is supported, so the inner region of the second layer 512 may sag vertically in the direction 802 of the air gap 702. If the flatness of the second layer 512 is low, the flatness of the third layer 513 and the fourth layer 514 laminated on the second layer 512 may also be low. If the flatness of the fourth layer 514 is low, the bonding surface relative to the main PCB 430 will be uneven, which may negatively affect the bonding between the sub-PCB 410 and the main PCB 430.

[0114] Because a filler 801, such as ink, is applied to the second layer 512 before the third layer 513 is laminated onto the second layer 512, the flatness of the fourth layer 514 can be maintained at a certain level even if the second layer 512 sags vertically in the direction 802 of the air gap 702 of the first layer 511. Due to the air gap 702 of the first layer 511, the filler 801 can be applied to the area of ​​the second layer 512 that sags vertically in the downward direction 802. The filler 801 added to the second layer 512 makes the surfaces on which the third layer 513 and the fourth layer 514 are positioned uniform, thereby improving the flatness of the fourth layer 514. Because most of the filler 801 present on the second layer 512 is located in the area corresponding to the air gap 702, the filler 801 can be removed during the process of forming the cavity 416 of the sub-PCB 410.

[0115] exist Figure 7A and Figure 7B In this case, because the sidewall 412 is formed only on one surface 414 of the base PCB 411, the subPCB 410 can be formed asymmetrically. Because the subPCB 410 is exposed to high temperatures or relatively large temperature variations during manufacturing, it may be susceptible to deformations such as warping when the subPCB 410 is formed asymmetrically.

[0116] Two substrate PCBs can be joined using adhesive members, and layers with the same properties can be added to each substrate PCB substantially simultaneously. If the first and second substrate PCBs are joined using carrier tape, when a single-sided CCL is located on one side of the first substrate PCB, the same single-sided CCL can be located on one side of the second substrate PCB. In this case, although the individual substrate PCBs are asymmetrical, the entire structure in which the two substrate PCBs are joined can be symmetrical with respect to the adhesive member. Therefore, deformation occurring in the sub-PCB can be minimized during sub-PCB manufacturing.

[0117] Figure 9A and Figure 9B A process for symmetrically manufacturing a pair of asymmetric sub-PCBs 410 according to one embodiment is shown. Figure 9A The process of bonding two substrate PCBs 411a and 411b by adhesive member 910 is shown. Figure 9B The diagram shows the state in which multiple layers 511, 512, 513 and 514 are symmetrically positioned on two substrate PCBs 411a and 411b. Figure 9C The diagram shows the main PCB 430 being mounted or positioned on the sidewall 412 of the first sub-PCB 410a after a cavity 416 has been formed on the first sub-PCB 410a.

[0118] Reference Figure 9A The first substrate PCB 411a can be bonded or joined to the second substrate PCB 411b via the adhesive member 910. In the following description, when PCBs are joined together, this does not mean that the two PCBs are integrally joined into an inseparable whole, but rather that the two PCBs are joined so that they can be separated from each other later. Furthermore, although the joining of the two substrate PCBs 411a and 411b via the adhesive member is described below, this disclosure is not limited thereto. That is, a PCB composed of some layers constituting a substrate PCB can be symmetrically joined to another PCB composed of some identical layers via the adhesive member, after which the remaining layers constituting the substrate PCB can be positioned. For example, refer to… Figure 6A Two substrate PCBs consisting only of the first layer 610 of the layers 601, 602, 603, 604, and 605 constituting the substrate PCB 411 can be bonded together using adhesive components. Subsequently, the second to fifth layers 605 can be sequentially laminated onto the first layer 601 to form a substrate PCB comprising the first to fifth layers 605.

[0119] Reference Figure 9B Multiple layers 511, 512, 513 and 514 can be symmetrically positioned on the first substrate PCB 411a and the second substrate PCB 411b. Figure 9BThe first sub-PCB 411a and the second sub-PCB 411b can be formed when the conductive path 413, sidewall 412 and cavity 416 have not yet been formed. Figure 9B Sub-PCBs 410a and 410b can represent PCBs before the sidewalls or cavities are formed.

[0120] The first sub-PCB 410a may include a first substrate PCB 411a and first layers 511 to fourth layers 514. The second sub-PCB 410b may include a second substrate PCB 411b and first layers 511 to fourth layers 514.

[0121] After attaching the first substrate PCB 411a to the second substrate PCB 411b via the adhesive member 900, the first layer 511 can be positioned on the first substrate PCB 411a and the second substrate PCB 411b. After positioning the first layer 511, the second layers 512 to the fourth layers 514 can be sequentially positioned on the first substrate PCB 411a and the second substrate PCB 411b. Because the first layer 511 includes an opening 511b, an air gap 702 can be formed between the second layer 512 and the substrate PCBs 411a and 411b when the second layer 512 is positioned on the first layer 511. Because the layers 511, 512, 513, and 514 positioned on each of the substrate PCBs 411a and 411b are symmetrically arranged with respect to the adhesive member 910, the entire structure in which the first sub-PCB 410a and the second sub-PCB 410b are combined can be symmetrical with respect to the adhesive member 910.

[0122] After all the first layers 511 to the fourth layers 514 are laminated onto the substrate PCBs 411a and 411b, the two sub-PCBs 410a and 410b can be separated from each other by removing the adhesive members 910 used to bond the first sub-PCB 410a and the second sub-PCB 410b. After separating the first sub-PCB 410a from the second sub-PCB 410b, a cavity 416 surrounded by sidewalls 412 can be formed on the first sub-PCB 410a by a drilling process. For example, laser drilling can be used to remove the portion 920 in the second layers 512 to the fourth layers 514 corresponding to the air gap 702 to form the sidewalls 411 and the cavity 416 surrounded by the sidewalls 411.

[0123] Before separating the two sub-PCBs 410a and 410b from each other, a cavity 416 can be formed on each sub-PCB. Before the cavity is formed, all the first layers 511 to the fourth layers 514 can be laminated onto the base PCBs 411a and 411b to create the sub-PCBs 410a and 410b. In this case, the two sub-PCBs 410a and 410b can be joined to form a single unit using an adhesive member 910. When integrating the two sub-PCBs 410a and 410b using the adhesive member, the portion 920 corresponding to the air gap 702 can be removed from the second layers 512 to the fourth layers 514 using a drilling process, thereby forming a sidewall 411 and the cavity 416 surrounded by the sidewall 411. Because the adhesive member 910 is removed after the cavity 416 is formed on the two sub-PCBs 410a and 410b, the two sub-PCBs 410a and 410b can be separated from each other.

[0124] Figure 9C The first sub-PCB 410a is shown when cavity 416 is formed. (See reference...) Figure 9C After the cavity 416 is formed on the first sub-PCB 410a, the main PCB 430 can be mounted or positioned on the side wall 412.

[0125] According to one embodiment, a PCB module may include: a first PCB, including a substrate PCB, a sidewall disposed on the periphery of the substrate PCB, a cavity surrounded by the sidewall, and a conductive path penetrating the sidewall; a second PCB disposed on the sidewall to cover the cavity formed by the sidewall of the first PCB; and at least one electronic component disposed inside the cavity and positioned on the first PCB and / or the second PCB. The sidewall may include: a first layer disposed on the upper surface of the substrate PCB and composed of an insulating member; a second layer disposed on the first layer and comprising polyimide; a third layer disposed on the second layer and composed of an insulating member; and a fourth layer disposed on the third layer and comprising a conductive member conductive relative to the conductive path.

[0126] The second layer of the PCB module may include a polyimide layer and a conductive layer positioned on the polyimide layer.

[0127] The second layer of the PCB module can correspond to a single-sided FCCL consisting of a polyimide layer and copper foil disposed on the upper surface of the polyimide layer.

[0128] The first layer of the PCB module can be made of low-flow prepreg.

[0129] The third layer of the PCB module can be made of a conventional prepreg characterized by higher fluidity than the first layer.

[0130] The fourth layer of the PCB module can correspond to a single-sided CCL consisting of a conventional prepreg layer and copper foil disposed on the conventional prepreg layer.

[0131] The second PCB of the PCB module can be surface-mounted on the upper surface of the sidewall.

[0132] The first PCB of the PCB module may include multiple layers. The multiple layers may include a central layer and layers symmetrically positioned relative to the central layer.

[0133] The plurality of layers of the PCB module may also include at least one layer that is symmetrical with respect to the center layer to at least one of the layers forming the sidewalls.

[0134] The first layer of the PCB module can be made of low-flow prepreg. The second layer can be a single-sided FCCL. The third layer can be made of conventional prepreg, and the fourth layer is a single-sided CCL.

[0135] According to one embodiment, a method for manufacturing a PCB module including a first PCB and a second PCB may include laminating a first layer including openings onto a substrate PCB, laminating a cured second layer onto the first layer, laminating a third layer consisting of prepreg onto the second layer, laminating a fourth layer including a conductive layer onto the third layer, manufacturing the first PCB by removing portions corresponding to the openings from the second to the fourth layers, and mounting the surface of the second PCB onto the fourth layer of the first PCB.

[0136] The first layer of a PCB module manufacturing method can be made of low-flow prepreg.

[0137] The second layer of the PCB module manufacturing method can be a single-sided FCCL.

[0138] The third layer of the PCB module manufacturing method can be made of conventional prepreg characterized by higher fluidity than the first layer, and the fourth layer can be a single-sided CCL.

[0139] The substrate PCB of the PCB module manufacturing method may include multiple layers. The multiple layers may include a central layer and layers symmetrically positioned relative to the central layer.

[0140] The PCB module manufacturing method may also include laminating a fifth layer, made of the same material as the first layer, under the substrate PCB while the first layer is laminated onto the substrate PCB.

[0141] The PCB module manufacturing method may also include laminating a sixth layer, made of the same material as the second layer, under the fifth layer while the second layer is laminated on the first layer.

[0142] In PCB module manufacturing methods, the removal of the second to fourth layers corresponding to the opening can be performed using a laser.

[0143] In the PCB module manufacturing method, removing the second to fourth layers by using a laser may include forming a groove on the second layer by using a laser, and removing the second to fourth layers along the groove corresponding to the opening.

[0144] The PCB module manufacturing method may also include applying filler to the internal area of ​​the second layer before laminating the third layer onto the second layer.

[0145] Although this disclosure has been specifically shown and described with reference to certain embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the scope of the subject matter as defined by the appended claims and their equivalents.

Claims

1. A printed circuit board module comprising: a first printed circuit board comprising a base printed circuit board, a side wall extending from an upper face of the base printed circuit board and disposed along a periphery of the upper face of the base printed circuit board, wherein a cavity is formed that is surrounded by the side wall disposed along the periphery of the upper face, and a conductive via penetrating the side wall, wherein the conductive via extends into at least a portion of the base printed circuit board; a second printed circuit board disposed on the side wall to cover the cavity surrounded by the side wall of the first printed circuit board; and at least one electronic component disposed inside the cavity and positioned on the first printed circuit board and / or the second printed circuit board, wherein the side wall comprises: a first layer disposed on the upper face of the base printed circuit board and composed of an insulating member; a second layer disposed on the first layer and comprising polyimide; a third layer disposed on the second layer and composed of an insulating member; and a fourth layer disposed on the third layer and comprising a conductive member electrically connected with the conductive via.

2. The printed circuit board module of claim 1, wherein the second layer comprises a polyimide layer and a conductive layer disposed on the polyimide layer.

3. The printed circuit board module of claim 2, wherein the second layer corresponds to a single-sided flexible copper clad laminate composed of the polyimide layer and a copper foil disposed on an upper face of the polyimide layer.

4. The printed circuit board module of claim 2, wherein the first layer is composed of a low flow prepreg material.

5. The printed circuit board module of claim 4, wherein the third layer is composed of a regular prepreg material having a higher flow than the first layer.

6. The printed circuit board module of claim 1, wherein the fourth layer corresponds to a single-sided copper clad laminate composed of a regular prepreg layer and a copper foil disposed on the regular prepreg layer.

7. The printed circuit board module of claim 1, wherein the second printed circuit board is surface mounted on an upper face of the side wall.

8. The printed circuit board module of claim 1, wherein the base printed circuit board comprises a plurality of layers, and wherein the plurality of layers comprises a center layer and a layer positioned symmetrically with respect to the center layer.

9. The printed circuit board module of claim 8, wherein the plurality of layers of the base printed circuit board further comprises a layer symmetric with respect to the second layer of the side wall from the center layer.

10. The printed circuit board module of claim 1, wherein the first layer is composed of a low flow prepreg material, the second layer is a single-sided flexible copper clad laminate, the third layer is composed of a regular prepreg material, and the fourth layer is a single-sided copper clad laminate.

11. A method of manufacturing a printed circuit board module comprising a first printed circuit board and a second printed circuit board, the method comprising: laminating a first layer comprising an opening on a base printed circuit board of the first printed circuit board; laminating a second layer in a cured state on the first layer; laminating a third layer composed of a prepreg over the second layer; laminating a fourth layer comprising a conductive layer over the third layer; manufacturing the first printed circuit board by removing portions corresponding to the openings from the second layer to the fourth layer; and surface mounting the second printed circuit board over the fourth layer of the first printed circuit board, wherein cavities corresponding to the openings and the portions are surrounded by sidewalls comprising the first layer, the second layer, the third layer, and the fourth layer disposed along a periphery of an upper surface of the base printed circuit board; wherein conductive vias of the first printed circuit board penetrate the sidewalls, and wherein the conductive vias extend into at least portions of the base printed circuit board.

12. The method of claim 11, wherein the first layer is composed of a low flow prepreg material.

13. The method of claim 11, wherein the second layer is a single sided flexible copper clad laminate.

14. The method of claim 11, wherein the third layer is composed of a conventional prepreg material having a higher flow than the first layer, and the fourth layer is a single sided copper clad laminate.

15. The method of claim 11, wherein the base printed circuit board comprises a plurality of layers, and wherein the plurality of layers of the base printed circuit board comprises a center layer and layers positioned symmetrically relative to the center layer.

Citation Information

Patent Citations

  • Multilayer printed circuit board and method of manufacturing it

    JP1993160574A

  • Multilayer laminate package and method of manufacturing the same

    US20120024583A1

  • Flexible printed circuit board and manufacturing method thereof

    US20160037624A1

  • Printed Circuit Board

    US20160330840A1