Vibrating substage for frame mode overlay metrology

Abstract

An oscillating substage in a metrology system. The metrology system includes a main stage configured to move a long distance to transport a wafer from one location to another. A substage coupled to the main stage and holding the wafer is configured to oscillate between a first direction and a second direction. The oscillation of the substage enables image frames of the wafer to be captured at a target location during the movement of the main stage.

Description

[Technical Field]

[0001] The present disclosure relates generally to the field of wafer inspection systems, and more particularly to frame mode metrology. [Background technology]

[0002] Generally, the semiconductor manufacturing industry involves highly complex integrated circuit fabrication techniques that use semiconductor materials, such as silicon, to be deposited and patterned on a substrate. With the increasing scale of circuit integration and the miniaturization of semiconductor devices, the devices being manufactured are becoming increasingly susceptible to defects, meaning that the defects that can cause device failure are becoming smaller and smaller. These devices must be made nearly defect-free before being shipped to end users or customers.

[0003] In frame-mode metrology, a single wafer can have tens, hundreds, or even thousands of overlay targets to measure. Currently, only one target is measured at a time. Because the distance between targets can be quite large, current systems utilize a moving stage, which moves sequentially from one target to the next. Each move requires time for the stage to move from one target to the next. Furthermore, each move requires accelerating from a parked position and decelerating to the parked position for the next target, which adds additional wait time before a measurement can be made. Additionally, current systems require additional time for vibrations in the system to settle. As a result, there is a significant lag time between measurements, primarily due to the acceleration and deceleration of the stage, combined with the settling time. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-081319 [Patent Document 2] U.S. Patent Application Publication No. 2005 / 0024621 [Patent Document 3] Japanese Patent Application Laid-Open No. 2007-240519 Summary of the Invention [Problem to be solved by the invention]

[0005] Therefore, there is a need for improved metrology systems that reduce the time between measurements. [Means for solving the problem]

[0006] The following presents a brief summary of the present disclosure to provide a basic understanding of certain embodiments of the present disclosure. This summary is not an extensive overview of the disclosure, and it does not identify key / critical elements of the disclosure or delineate the scope of the disclosure. Its sole purpose is to present some concepts disclosed herein in a simplified form as a prelude to the detailed description that is presented later.

[0007] One aspect of the present disclosure is directed to a system. The system includes a stage base and a main stage coupled to the stage base. The main stage is configured for long-distance movement and is configured to move a wafer in a first direction from a first position to a target position. The system also includes a secondary stage coupled to the main stage. The secondary stage is configured for oscillatory motion and is configured to move the wafer in a second direction opposite the first direction as the wafer approaches the target position, thereby enabling image frames of the wafer to be captured at the target position during movement of the main stage. Finally, the system includes a wafer retention mechanism configured to hold the wafer in a fixed position during movement of the main stage and the secondary stage.

[0008] In some embodiments, the secondary stage accelerates in both the first direction and the second direction. In some embodiments, the primary stage accelerates and decelerates in the first direction. In some embodiments, the wafer holding mechanism includes a vacuum chuck. In some embodiments, the primary stage moves at a constant velocity during capture of the image frame. In some embodiments, the secondary stage is further configured to accelerate in the first direction after capture of the image frame. In some embodiments, the positions of the secondary stage and the primary stage are monitored using a position feedback mechanism.

[0009] Another aspect of the present disclosure is directed to a method and a non-transitory computer-readable medium storing instructions for performing the method. The method first includes moving a primary stage in a first direction relative to a stage base from a first position to a target position. The primary stage is coupled to a secondary stage, the secondary stage being configured to hold the wafer via a wafer holding mechanism. Next, the method includes moving the secondary stage in a second direction opposite the first direction as the wafer approaches the target position. Finally, the method includes capturing an image frame of the wafer at the target position during movement of the primary stage.

[0010] In some embodiments, the method further includes accelerating the secondary stage in both the first direction and the second direction. In some embodiments, the method further includes accelerating and decelerating the primary stage in the first direction. In some embodiments, the wafer holding mechanism includes a vacuum chuck. In some embodiments, the primary stage moves at a constant velocity during capture of the image frame. In some embodiments, the method further includes accelerating in the first direction after capture of the image frame. In some embodiments, the method further includes monitoring the positions of the secondary stage and the primary stage using a position feedback mechanism.

[0011] These and other aspects of the present disclosure are described in detail below with reference to the figures. [Brief explanation of the drawings]

[0012] [Figure 1A] FIG. 2 illustrates exemplary layers within a wafer, according to an embodiment of the present disclosure. [Figure 1B] FIG. 2 illustrates an example of a target within a wafer, according to an embodiment of the present disclosure. [Figure 1C] FIG. 1 illustrates an example of the distance between two targets within a wafer, according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a side view illustrating an exemplary wafer carrier according to an embodiment of the present disclosure. [Figure 3A] 10 is a graph illustrating an exemplary acceleration of a sub-stage according to an embodiment of the present disclosure. [Figure 3B] 10 is a graph illustrating an exemplary acceleration of the main stage, according to an embodiment of the present disclosure. [Figure 3C] 10 is a graph illustrating an exemplary velocity of a sub-stage, according to an embodiment of the present disclosure. [Figure 3D] 10 is a graph illustrating an exemplary velocity of the main stage, according to an embodiment of the present disclosure. [Figure 3E] 10 is a graph illustrating an exemplary distance of a sub-stage according to an embodiment of the present disclosure. [Figure 3F] 10 is a graph illustrating an exemplary distance of the main stage according to an embodiment of the present disclosure. [Figure 4A] 10 is a graph illustrating various travel times between targets according to an embodiment of the present disclosure. [Figure 4B] 10 is a graph illustrating various travel distances between targets according to an embodiment of the present disclosure. [Figure 5] FIG. 1 is a flow diagram illustrating a method according to an embodiment of the present disclosure. [Figure 6] FIG. 1 illustrates an example computer system according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0013] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. The present disclosure may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail in order to avoid unnecessarily obscuring the present disclosure. While the present disclosure will be described in connection with specific embodiments, it will be understood that it is not intended to limit the disclosure to these embodiments.

[0014] In a scanning system, one of the primary objectives is to find defects. Therefore, the system must scan the entire wafer surface. This means that it must collect signals from a large area (the entire wafer surface). A frame-mode system only needs to measure discrete points on the wafer. In other words, scanning is appropriate when the system needs to collect information continuously; frame-mode is appropriate when the system only needs to capture discrete points. This influences how the system itself can utilize the motion within the system. Scanning requires scanning the entire wafer, so the wafer movement speed must be constant and very slow. On the other hand, a frame-mode system only cares about capturing discrete points that are relatively far apart from each other. Therefore, using a constant, slow speed would be inefficient. Instead, a frame-mode system can use acceleration and deceleration to move the wafer more quickly from one target to the next. However, constantly changing speeds make it difficult to capture clear images because particles vibrate due to inertia as the wafer decelerates. Before an image can be captured, the vibrations must settle, which takes time. Therefore, moving from one target to another requires a waiting period for the movement and settling time.

[0015] As described above, in an overlay metrology system, there may be thousands of overlay targets on each wafer, and each target is measured one at a time. In many systems, a stage moves sequentially from target to target, and each move requires accelerating from a stop position and decelerating to another stop position on the next target. Therefore, each new target requires a new move time and a new settling time. When the number of targets can reach thousands, the settling time can accumulate significantly, resulting in significant overall delays. Because the time it takes to actually capture an image after the wafer reaches its next destination is relatively short compared to the time it takes for the wafer to move to the next destination, reducing the overall move time from target to target improves throughput. Because improving throughput is a primary goal in improving metrology system efficiency, the disclosed techniques and mechanisms solve this problem by significantly reducing the time between image captures of two adjacent targets.

[0016] To better understand the techniques and mechanisms of the present disclosure, targets are described below. As discussed above, targets for frame mode image capture are at discrete point locations on a wafer. According to various embodiments, a wafer is composed of a number of different layers. FIG. 1A shows an example of only one layer in a wafer, according to an embodiment of the present disclosure. As can be seen in FIG. 1A, fabrication layer 100 includes four lattice cells 102, 104, 106, and 108. Fabrication layer 100 also includes its own XY centroid 110. XY centroid 110 forms part of an overlay target within the wafer, as can be seen in FIG. 1B.

[0017] FIG. 1B illustrates an example of a target within a wafer, according to embodiments of the present disclosure. According to various embodiments, target 180 includes a second layer, e.g., resist layer 150 (shown in FIG. 1B), overlying first process layer 100. Like process layer 100, resist layer 150 also includes four lattice cells 152, 154, 156, and 158. However, in some embodiments, lattice cells 152, 154, 156, and 158 are printed on top of lattice cells 102, 104, 106, and 108 in an offset pinwheel-like configuration, as shown in FIG. 1B. Additionally, resist layer 150 further includes an XY centroid 160. According to various embodiments, the purpose of capturing an image of target 180 is to determine the distance / difference between two centroids, e.g., centroid 160 and centroid 110, in vertically adjacent layers. In some embodiments, this distance is on the order of a few microns, e.g., 1-5 μm. In some embodiments, the targets themselves are on the order of tens of microns, e.g., 30 μm, while the next adjacent target may be several millimeters apart. FIG. 1C shows an example of a distance 190 between two adjacent targets 180 and 185. In some embodiments, the stage moves the wafer until the targets are precisely positioned within a field of view 170 for image capture. In some embodiments, the field of view 170 is the field of view of a microscope.

[0018] As discussed above, accelerating and decelerating a wafer through a main stage requires a settling time before the vibrations stop and image frames can be captured. However, the techniques and mechanisms of the present disclosure provide a way to reduce or eliminate the settling time by utilizing a secondary stage, which moves at a velocity equal to but in the opposite direction to the main stage so that the main stage "remains stationary" for image capture. Figure 2 shows a side view of an exemplary wafer carrier according to an embodiment of the present disclosure.

[0019] FIG. 2 illustrates a wafer carrier 200. In various embodiments, the wafer carrier 200 includes a stage base 202. In some embodiments, the stage base 202 does not move. In some embodiments, the stage base 202 includes stage granite. In various embodiments, a main stage 204 is located atop the stage base 202. In some embodiments, the main stage 204 is a two-axis long-travel stage. In other embodiments, the main stage 204 is a single-axis long-travel stage. In some embodiments, the main stage 204 is primarily responsible for moving the wafer 210 between targets. In some embodiments, because the distance between two targets is relatively long compared to the width of the targets themselves, the main stage 204 is configured to accelerate to a maximum speed when moving away from the first target position and then decelerate when approaching the next target position. In this manner, the main stage 204 can minimize the travel time between two targets.

[0020] According to various embodiments, the wafer carrier 200 further includes a secondary stage 206. According to various embodiments, the secondary stage 206 is configured to move in a direction opposite to the direction of movement of the primary stage in order to bring the wafer to a complete "stop" to allow image frame capture. In some embodiments, the secondary stage 206 accelerates until it reaches a constant velocity equal to but opposite to the velocity of the primary stage near the target location, allowing the wafer to come to a complete stop and allow image frames to be captured without having to wait for particles to settle. This is possible because the wafer is not decelerated to a complete stop. As a result, the primary stage 204 does not need to stop moving in order for the system to capture images. Advantages of this configuration of the wafer carrier 200 include eliminating, or at least minimizing, settling time and eliminating the need for the primary stage 204 to start moving from a complete stop, which requires significant acceleration and force due to inertia. By not ceasing the movement of the primary stage 204, even during the capture of an image frame, the system requires less power, acceleration, and time to overcome the inertia of the wafer carrier mechanism. In some embodiments, the secondary stage 206 is a single-axis stage configured to move in the same direction as the primary stage 204 or in the opposite direction. In other embodiments, the secondary stage 206 is a two-axis stage configured to move in both the X and Y directions. In some embodiments, the wafer 210 is held to the secondary stage 206 via a wafer holding mechanism 208. In some embodiments, the wafer holding mechanism 208 includes a vacuum chuck that prevents the wafer 210 from moving relative to the secondary stage 206, even while the secondary stage 206 is accelerating in the opposite direction to the movement of the primary stage 204.

[0021] According to various embodiments, both the primary stage 204 and the secondary stage 206 move via a combination of motors, bearings, controllers, and encoders. In some embodiments, each stage includes an encoder 212 or 214 to help identify the position of the stage. In some embodiments, instead of or in addition to encoders on each stage, the wafer carrier includes a common position feedback mechanism 216 (e.g., an interferometer) for the wafer 210. In some embodiments, the position feedback mechanism 216 is a single measurement (e.g., a glass scale sensor) of the wafer relative to the stage base 202. In some embodiments, the glass encoder includes glass with grating lines. In such embodiments, a light is shone on the grating, and a sensor on the backside counts the lines as the stage passes by. In some embodiments, the position feedback is on the order of a few nanometers.

[0022] In some embodiments, the encoder 212 is a separate measurement relative to the main stage 204. Various types of measurements can be used. In some embodiments, the encoder can be positioned relative to any stage. For example, the encoder 212 can be a position sensor for the secondary stage 206 relative to either the main stage 204 or the stage base 202. In some embodiments, the encoder 214 can be a position sensor for the main stage 204 relative to the stage base 202. Additionally, the encoder 216 can be a position sensor for the wafer 210 relative to either the secondary stage 206, the main stage 204, or the stage base 202, since the system needs to know where the wafer is moving. In some embodiments, the bearings for the stages can be air bearings, magnetic levitation, ball bearings, roller bearings, or flexure bearings.

[0023] In some embodiments, the secondary stage 206 oscillates between the direction of movement of the primary stage 204 and a direction opposite to that of the primary stage 204. In such embodiments, when the primary stage accelerates, the secondary stage 206 accelerates back to its starting position. In other embodiments, the secondary stage 206 moves only in a direction opposite to the direction of movement of the primary stage 204. In some embodiments, the secondary stage 206 is configured to accelerate to a velocity equal to but opposite in direction to the velocity of the primary stage 204. In some embodiments, the secondary stage 206 is configured to accelerate to a velocity opposite to but less than the velocity of the primary stage 204, such that the wafer 210 appears to be moving at a constant velocity that is less than the velocity of the primary stage 204. In such embodiments, this constant, slow velocity may be suitable for other purposes, such as scanning the wafer.

[0024] In various embodiments, the secondary stage 206 oscillates with as short a stroke as possible. Figures 3A-3F are graphs showing example acceleration, velocity, and distance of the primary and secondary stages. In some embodiments, the stage travels approximately 300 mm along each axis, since a typical wafer size is 300 mm. In some embodiments, each wafer is capable of 1-2 g acceleration. As used herein, RMS stands for "root mean square" and refers to the maximum value, e.g., maximum velocity.

[0025] In some embodiments, the system uses a short-travel secondary stage to apply an equal but opposite velocity vector on the long-travel primary stage to bring the wafer to a complete stop at the target, and in some embodiments, the long-travel primary stage does not stop even during image frame capture.

[0026] Figure 3B shows the acceleration of the main stage from one target to the next. Figure 3B starts at the target location where an image frame was just captured. Figure 3B then shows the main stage first accelerating to a maximum velocity, then decelerating to a constant velocity (shown to be 180 mm / s as can be seen in Figure 3D, which is the constant velocity during image acquisition). As can be seen in Figure 3B, the main stage reaches a maximum acceleration of 2 G RMS.

[0027] According to various embodiments, a secondary stage is positioned above the primary stage. Similar to FIG. 3B, at the start of the graph in FIG. 3A, the system has just completed image capture of a wafer at the previous target and is moving toward the next target. Because the secondary stage was actually moving at an equal but opposite velocity relative to the primary stage during image capture (i.e., the secondary stage appears "stationary" relative to the stage base), the secondary stage must also return to its initial starting position relative to the primary stage and then accelerate (actually decelerating relative to the stage base) in the opposite direction to the primary stage to begin the next capture operation. Therefore, the secondary stage must first accelerate in the same direction as the primary stage to return to its initial position relative to the primary stage. As can be seen from FIG. 3B, because the primary stage is originally accelerating, the secondary stage must accelerate more than the primary stage. Therefore, the secondary stage reaches a maximum acceleration of 6G RMS. Once the secondary stage returns to its initial starting position, it can begin moving in the opposite direction to the movement of the primary stage to acquire the next image frame at the next target. Thus, from the perspective of the stationary stage base, the secondary stage begins to decelerate until it reaches a constant velocity relative to the primary stage. Once the secondary stage reaches a velocity that is opposite in direction and equal to the velocity of the primary stage, it appears "stationary" from the perspective of the stage base (image capture field of view). Once the secondary stage appears stationary from the perspective of the stage base (i.e., moving at a constant velocity in the opposite direction relative to the primary stage), image capture occurs. As can be seen from both Figures 3A and 3B, an exemplary acquisition time can be as long as 4 ms.

[0028] Figures 3C and 3D are graphs showing the velocities of the primary and secondary stages over the same period. As can be seen in Figure 3C, the secondary stage begins moving at a constant negative velocity of -180 mm / s. This is the velocity during image capture. As the secondary stage begins to return to its initial position, its velocity increases until it reaches that position. The secondary stage then begins to decelerate as it approaches the next target, continuing until it reaches -180 mm / s again for the next image capture. Meanwhile, the primary stage, as can be seen in Figure 3D, starts at a constant positive velocity of 180 mm / s. During the travel period of the graph, the primary stage reaches a maximum velocity, e.g., 300 mm / s (i.e., approximately 250 mm / s RMS), and then slows back down to 180 mm / s for the next image capture. The gist is that the primary stage is at 180 mm / s and the secondary stage is at -180 mm / s. In some embodiments, any constant velocities of equal magnitude but opposite direction can be used. Note that one cycle is referred to as a "move and measure" (MAM) cycle. In some embodiments, an exemplary MAM cycle takes 20.8 seconds. Note that if the system were capable of handling even greater accelerations (greater than 3G), the graphs in Figures 3C and 3D would shift upward.

[0029] Figures 3E and 3F show the distance traveled during a MAM cycle. As can be seen in Figure 3F, the total travel distance is 5 mm because the distance between targets in this example is 5 mm. The graph in Figure 3F is relatively simple because the main stage moves in one direction. However, the graph in Figure 3E presents a different situation. Because the secondary stage is required to repeat the cycle for the next target, its starting and stopping positions must be identical relative to the main stage, so the secondary stage must oscillate back to its starting position, i.e., its initial position on the main stage. As can be seen in Figure 3E, the total oscillation stroke of the secondary stage spans 1.6 mm. Note that the distance traveled during a MAM cycle is an asymmetric sinusoidal curve due to the 4 ms image capture time. Therefore, as can be seen in Figure 3E, during the first capture (which takes 4 ms), the secondary stage moves a negative distance relative to the main stage. Then, after that image capture period, the secondary stage begins to return toward its initial position. Once the sub-stage reaches its initial position (the vertex of the graph), it starts moving in the negative direction again to reach the start of the next cycle.

[0030] In some embodiments, instead of oscillating back to its initial position, the secondary stage simply stops moving in the opposite direction to the primary stage. In such embodiments, the secondary stage approaches the next target and then begins moving in the opposite direction again, so that the wafer appears to be "stationary." In such embodiments, the secondary stage movements are cumulative, which may require a larger primary stage.

[0031] In some embodiments, the velocity of the main stage during image capture may be constant or variable. In embodiments using a constant velocity during image capture, the velocity of the secondary stage during the image capture process must be constant in the opposite direction. However, in embodiments using a variable velocity during image capture, the secondary stage must vary its velocity in the exact inverse pattern of the main stage.

[0032] In some embodiments, the acceleration and deceleration are sinusoidal, as can be seen in Figures 3A and 3B. In some embodiments, the acceleration profile need not be sinusoidal. However, sinusoidal acceleration and deceleration profiles are easier to work with because they allow the system to operate at a single frequency. That is, the controller can be configured to operate the system at a single excitation frequency.

[0033] FIG. 4A is a graph showing various travel times (also referred to as MAM times) from one target to the next. Graph 400 illustrates various embodiments and their respective times. For example, curve 402 illustrates the time for a standard main stage accelerated at 2 G RMS without a second vibration stage. As can be seen from FIG. 4A, when using only the main stage, the MAM time for a 5 mm movement is approximately 38 ms. Furthermore, curve 402 illustrates that when using only the main stage, the MAM time for a 10 mm movement is approximately 52 ms. Meanwhile, curve 404 illustrates that when using a main stage and a secondary stage accelerating at 2 G RMS, the MAM time for a 5 mm movement is approximately 28 ms, and the MAM time for a 10 mm movement is approximately 38 ms. Overall, graph 400 illustrates that the greater the RMS acceleration of the secondary stage, the shorter the MAM time between two targets.

[0034] Figure 4B is a graph showing the distance traveled by the substage with various RMS acceleration values. For each curve in graph 450, the maximum acceleration of the main stage is 2G RMS. Furthermore, for each curve, the substage movement profile is a single-frequency sinusoid with a 4 ms image capture period. As can be seen from Figure 4B, curve 452 shows that for a 5 mm target spacing, a substage accelerating at 2G RMS travels approximately 1.8 mm. Meanwhile, curve 454 shows that for a 5 mm target spacing, a substage accelerating at 8G RMS travels approximately 1 mm. Overall, graph 450 shows that the greater the RMS acceleration of the substage, the shorter the distance the substage must travel during oscillation.

[0035] 5 is a flow diagram illustrating a method for frame mode image capture using a moving stage according to an embodiment of the present disclosure. Method 500 begins by moving a primary stage relative to a stage base in a first direction from a first position to a target position (502). In some embodiments, the primary stage is coupled to a secondary stage. In some embodiments, the secondary stage is configured to hold a wafer via a wafer holding mechanism. Next, as the wafer approaches the target position, the secondary stage moves in a second direction opposite the first direction (504). Finally, an image frame of the wafer is captured at the target position during the primary stage movement (506).

[0036] In some embodiments, the method further includes accelerating the secondary stage in both the first direction and the second direction. In some embodiments, the method further includes accelerating and decelerating the primary stage in the first direction. In some embodiments, the wafer holding mechanism includes a vacuum chuck. In some embodiments, the primary stage moves at a constant velocity during capture of the image frame. In some embodiments, the method further includes accelerating in the first direction after capture of the image frame. In some embodiments, the method further includes monitoring the positions of the secondary stage and the primary stage using a position feedback mechanism.

[0037] 6 illustrates an example computer system according to embodiments of the present disclosure. According to certain embodiments, a system 600 suitable for implementing certain embodiments of the present disclosure includes a processor 601, memory 603, an interface 611, and a bus 615 (e.g., a PCI bus or other interconnect fabric). The processor 601, when operating under the control of appropriate software or firmware, is responsible for executing applications, such as an operating system kernel, containerized storage drivers, and one or more applications. Various specially configured devices may be used instead of or in addition to the processor 601. The interface 611 is typically configured to send and receive data packets or data segments over a network.

[0038] Specific examples of supported interfaces include Ethernet interfaces, Frame Relay interfaces, Cable interfaces, DSL interfaces, and Token Ring interfaces. Additionally, various ultra-high speed interfaces may be provided, such as Fast Ethernet interfaces, Gigabit Ethernet interfaces, ATM interfaces, HSSI interfaces, POS interfaces, and FDDI interfaces. Generally, these interfaces may include ports suitable for communication over an appropriate medium. In some cases, the interface may also include a separate processor and possibly volatile RAM. The separate processor may control communication-intensive tasks such as packet switching, media control, and management.

[0039] According to various embodiments, system 600 is a computer system configured to operate a metrology system, as understood herein. In some embodiments, processor 601 is configured to perform all steps in the methods described above, as well as any functions or processes described above or necessary for implementing the processes described above. In some implementations, one or more of the computer components may be virtualized. For example, a physical server may be configured in a local environment or in a cloud environment. A physical server may implement one or more virtual server environments that run the electronic scanning system. While a specific computer system is described, it should be recognized that various alternative configurations are possible. For example, modules may be implemented in separate devices connected to the computer system.

[0040] The particular embodiments of the present disclosure presented herein generally address the field of semiconductor inspection and process control and are not limited to the hardware, algorithmic / software implementations and architectures, and use cases outlined above.

[0041] Although the foregoing disclosure has been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications can be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present disclosure. Thus, the present embodiments should be considered illustrative rather than restrictive, and the disclosure should not be limited to the details set forth herein.

Claims

1. 1. A system comprising: Stage base and a main stage coupled to the stage base, the main stage configured for long-range movement and configured to move the wafer in a first direction from a first position to a target position; a sub-stage coupled to the main stage, the sub-stage configured for oscillatory motion to move the wafer in a second direction opposite the first direction as the wafer approaches the target location, thereby enabling image frames of the wafer to be captured at the target location during movement of the main stage; a wafer holding mechanism configured to hold the wafer in place during movement of the main stage and the sub-stage; A system comprising:

2. The system of claim 1 , wherein the sub-stage accelerates in both the first direction and the second direction.

3. The system of claim 1 , wherein the main stage accelerates and decelerates in the first direction.

4. The system of claim 1 , wherein the wafer holding mechanism comprises a vacuum chuck.

5. The system of claim 1 , wherein the main stage moves at a constant velocity during capture of the image frames.

6. The system of claim 1 , wherein the sub-stage is further configured to accelerate in the first direction after capturing the image frame.

7. The system of claim 1 , wherein the positions of the sub-stage and the main stage are monitored using a position feedback mechanism.

8. 1. A method comprising: moving a primary stage in a first direction relative to a stage base from a first position to a target position, the primary stage coupled to a secondary stage, the secondary stage configured to hold a wafer via a wafer holding mechanism; moving the sub-stage in a second direction opposite to the first direction when the wafer approaches the target position; capturing image frames of the wafer at the target location during movement of the main stage; A method comprising:

9. The method of claim 8 , further comprising accelerating the sub-stage in both the first direction and the second direction.

10. The method of claim 8 , further comprising accelerating and decelerating the main stage in the first direction.

11. The method of claim 8 , wherein the wafer holding mechanism comprises a vacuum chuck.

12. The method of claim 8 , wherein the main stage moves at a constant velocity during capture of the image frames.

13. The method of claim 8 , further comprising accelerating in the first direction after capturing the image frame.

14. The method of claim 8 further comprising monitoring the positions of the sub-stage and the main stage using a position feedback mechanism.

15. 1. A non-transitory computer-readable medium storing instructions for causing a computer processor to perform a method, the method comprising: moving a primary stage in a first direction relative to a stage base from a first position to a target position, the primary stage coupled to a secondary stage, the secondary stage configured to hold a wafer via a wafer holding mechanism; moving the sub-stage in a second direction opposite to the first direction when the wafer approaches the target position; capturing image frames of the wafer at the target location during movement of the main stage; 1. A non-transitory computer-readable medium, comprising:

16. The non-transitory computer-readable medium of claim 15 , further comprising accelerating the sub-stage in both the first direction and the second direction.

17. The non-transitory computer-readable medium of claim 15 , further comprising accelerating and decelerating the main stage in the first direction.

18. The non-transitory computer-readable medium of claim 15 , wherein the wafer holding mechanism comprises a vacuum chuck.

19. The non-transitory computer-readable medium of claim 15 , wherein the main stage moves at a constant velocity during capture of the image frames.

20. The non-transitory computer-readable medium of claim 15 , further comprising accelerating in the first direction after capturing the image frame.

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