Composite structure including a single-crystal thin film on a polycrystalline silicon carbide support substrate and related manufacturing methods

Abstract

A composite structure for manufacturing a microelectronic component including a single-crystal thin film disposed on a support substrate made of polycrystalline silicon carbide, wherein the support substrate has a preferred crystal orientation on each of its surfaces, and according to this crystal orientation, the texture coefficient C 422 The sum of the texture coefficients is less than 40%. 220 +C 200 +C 400 A composite structure having more than 50%, preferably more than 80%. The present invention also relates to a method for manufacturing such a composite structure.

Description

[Technical Field]

[0001] (Field of invention)

[0001] The present invention relates to the field of semiconductor materials for microelectronic components. The present invention relates in particular to a composite structure comprising a single-crystal thin film disposed on a support substrate made of polycrystalline silicon carbide. The single-crystal thin film is preferably made of silicon carbide, and the composite structure is intended for power electronics applications. [Background technology]

[0002] (Technical background of the invention)

[0002] SiC is increasingly being used in the manufacture of innovative power devices to meet the needs of electronics in growing sectors such as electric vehicles. In fact, power devices and integrated power systems based on single-crystal silicon carbide can handle much higher power densities with smaller active area dimensions compared to those based on conventional silicon.

[0003]

[0003] High-quality single-crystal SiC substrates (c-SiC) for the microelectronics industry remain expensive and difficult to supply in large sizes. Therefore, it is advantageous to use a layer transfer solution to fabricate a composite structure that includes a thin film made of single-crystal SiC (from a high-quality c-SiC substrate) on a lower-cost support substrate, typically made of polycrystalline SiC (p-SiC). Electronic components can then be fabricated on and / or within the thin film.

[0004]

[0004] A well-known solution for thin-layer transfer is the Smart Cut® method, which is based on light ion implantation and direct bonding between the donor single crystal substrate and the support substrate at the bonding interface.

[0005]

[0005] p-SiC substrates capable of forming support substrates are currently commercially available. However, their mechanical, electrical, and even thermal properties are not always optimal for obtaining high-quality composite structures intended for power applications using thin-film transfer methods.

[0006]

[0006] As described above, power electronics applications require excellent vertical electrical conductivity in composite structures. Therefore, single-crystal thin films can be doped, for example, with n-type or p-type doping and to exhibit resistivity of less than 30 mΩ·cm, 10 mΩ·cm, or even less than 1 mΩ·cm, depending on the requirements of the application. The assembly interfaces of the composite structure must be manufactured so as not to increase (or only slightly increase) the vertical electrical resistance. Finally, good conductivity must be ensured in the support substrate of the composite structure. Therefore, polycrystalline substrates need to be heavily doped (n or p doping) to achieve resistivity of 15 mΩ·cm or less, 10 mΩ·cm, or even less than 5 mΩ·cm. However, it is known that high concentrations of doping agents in p-SiC materials, such as nitrogen, can be a limiting factor in obtaining good flatness (low deformation) due to the high density of defects generated.

[0007]

[0007] However, it is essential to use a support substrate with low curvature or deformation. Curvature corresponds to bending or "warping" which is equal to the algebraic difference in the deviation of the substrate from the reference plane. On the one hand, the curvature needs to be small so that these support substrates are suitable for direct assembly with excellent quality and high bonding energy, and on the other hand, so that large mechanical stresses do not damage the single crystal thin film during or after the transfer process. Small curvature is also important to ensure the performance of manufacturing steps (e.g., photolithography) of components on / in the thin film of the composite structure. The radius of curvature of a p-SiC support substrate (proportional to the reciprocal of the warping) is typically targeted to be greater than about 25 m (for a 150 mm diameter substrate, less than 100 μm, even less than 50 μm, or ideally less than 30 μm of warping).

[0008]

[0008] Finally, the thin-film transfer method based on direct bonding by molecular adhesion is highly dependent on the surface quality of the substrate being assembled. In particular, both the support substrate and the donor substrate require a roughness of 1 nm RMS (root mean square roughness) or less, coupled with surface defects (particles, holes, or other irregularities that can cause bonding defects). It should be noted that the hardness of SiC and the presence of crystal grains on the surface of the polycrystalline support substrate have been shown to greatly complicate surface preparation and make it difficult to obtain perfect quality.

[0009]

[0009] In addition, it often seems important that the support substrate ensure good thermal conductivity (typically above 200 W / (mK), and even above 250 W / (mK)) in order to effectively dissipate heat, especially the heat generated by power components. However, thermal conductivity can be adversely affected by high concentrations of doping agents that inhibit phonon propagation, particularly due to the generation of additional crystal defects.

[0010]

[0010] All of these specifications are extremely complex to achieve with currently available p-SiC substrates.

[0011]

[0011] U.S. Patent No. 1,0934634 proposes a p-SiC substrate with a rate of change in crystal grain size between two faces of the substrate of less than 0.43% and a radius of curvature greater than 142 m, i.e., a p-SiC substrate with very little deformation. Furthermore, the arithmetic mean roughness of at least one face of the substrate is less than 1 nm. However, this method is still expensive and consumes a lot of energy and material because a large portion of the p-SiC initially deposited on the graphite substrate (typically 2 mm initially deposited to form a 350 μm p-SiC substrate) is removed and lost in order to obtain the proposed p-SiC substrate.

[0012]

[0012] In order to reduce manufacturing costs, it is optimal to grow a layer of p-SiC with a thickness as close as possible to the desired final thickness of the substrate by high-speed chemical vapor deposition, to stabilize the grain size very quickly after the start of layer growth, and to avoid unnecessary thickness that would be required to reduce or eliminate grain size gradients that are detrimental to the flatness of the substrate, which is typically 5 × 10 19 atoms / cm 3 More preferably 10 20 atoms / cm 3 This is done by ensuring extremely high concentrations of doping agents (e.g., n-type such as nitrogen or phosphorus), typically achieving a resistivity of less than 15 mΩ·cm, or even less than 10 mΩ·cm, of the material, enabling good thermal conductivity. [Overview of the project]

[0013] (Purpose of the invention)

[0013] The present invention proposes a composite structure comprising a thin film made of a high-quality single-crystal material, particularly c-SiC, arranged on a p-SiC support substrate, which has very low resistivity, low deformation, and good thermal conductivity. The present invention also relates to a method for manufacturing such a composite structure.

[0014] (Brief description of the invention)

[0014] The present invention relates to a composite structure for manufacturing a microelectronic component including a single-crystal thin film disposed on a support substrate made of polycrystalline silicon carbide, wherein the support substrate has a preferred crystal orientation on each of its surfaces, and according to this crystal orientation, Texture coefficient C 422 The percentage is less than 40%, Sum of texture coefficients C 220 +C 200 +C 400 This exceeds 50%, preferably exceeding 80%.

[0015]

[0015] According to other advantageous and non-limiting features of the present invention, individually or in any technically feasible combination, The support substrate has an electrical resistivity of 10 mΩ·cm or less, preferably 5 mΩ·cm or less, and more preferably 3 mΩ·cm or less. The support substrate is 5.0×10 19 atoms / cm 3 or more, preferably 1.0×10 20 atoms / cm 3 or more, and even more preferably 1.5×10 20 atoms / cm 3 or more, or preferably 3×10 20 atoms / cm 3 or more, doped with nitrogen at a concentration measured by secondary ion mass spectrometry, the texture coefficient C 422 is less than 20%, preferably less than 15%, and even more preferably less than 10%, the total texture coefficient C 200 +C 400 is more than 1%, preferably more than 2%, and even more preferably more than 5%, The thin film is composed of silicon carbide, The thin film is composed of gallium nitride, The thin film is composed of gallium oxide, The thin film is composed of diamond, The composite structure is disposed between the thin film and the support substrate and includes a continuous or discontinuous intermediate layer composed of at least one metal material or semiconductor material, The intermediate layer is composed of silicon, silicon carbide, tungsten, and / or titanium, The support substrate has a thickness of 50 micrometers to 650 micrometers, The composite structure includes electronic components on and / or within the thin film and optionally includes electrical contacts on the back surface of the support substrate.

[0016]

[0016] The present invention also relates to a method for manufacturing a composite structure including a single-crystalline thin film disposed on a support substrate made of polycrystalline silicon carbide, and the manufacturing method includes a) preparing a support substrate made of polycrystalline silicon carbide having a preferential crystal orientation on each of its surfaces, and according to this crystal orientation, the texture coefficient C 422 is less than 40%, the total texture coefficient C220 +C 200 +C 400 Steps where the percentage exceeds 50%, preferably exceeding 80%, b) A step of preparing a donor substrate made of single crystal material, c) A step of transferring a thin film from a donor substrate to a support substrate. Includes.

[0017]

[0017] According to other advantageous and non-limiting features of the present invention, individually or in any technically feasible combination, Step c) to transcribe is, c1) A step of forming an embedded brittle surface on the donor substrate and defining a thin film boundary between the embedded brittle surface and the front surface of the donor substrate, c2) The step of assembling the donor substrate to the support substrate directly or via an intermediate layer by molecular adhesive bonding, c3) A step of separating along the embedded brittle surface to transfer the thin film to the support substrate. Includes, Step c2) is performed before assembling the two circuit boards. Before or after step c1), a step of forming an intermediate layer on the donor substrate, and / or Step of forming an intermediate layer on the support substrate. Includes, The intermediate layer is formed from at least one metal or semiconductor material selected from silicon, silicon carbide, tungsten, and titanium. The manufacturing method further includes the step of manufacturing an electronic component on and / or within a thin film of a composite structure, The fabrication of electronic components includes, in particular, steps of homoepitaxy or heteroepitaxy on thin films. [Brief explanation of the drawing]

[0018]

[0018] Other features and advantages of the present invention will become apparent from the following detailed description of the invention with reference to the accompanying drawings. [Figure 1] This is a diagram showing a composite substrate according to the present invention. [Figure 2] This table shows a list of 10 diffraction peaks considered in a 3C polytype SiC substrate, measurable by X-ray diffraction, classified by increasing the Miller (hkl) index. The table also shows the location of the peaks and their theoretical intensities. [Figure 3a] This is a scanning electron microscope image of backscattered electrons in a cross-section of a raw p-SiC disk. [Figure 3b] This is an image obtained by scanning electron microscopy of backscattered electrons in a cross-section of the support substrate from the aforementioned raw disk, and the support substrate is mounted to manufacture the composite structure according to the present invention. [Figure 4] This is a diagram showing a composite substrate according to the present invention. [Figure 5a] This figure shows the steps of the manufacturing method according to the present invention. [Figure 5b] This figure shows the steps of the manufacturing method according to the present invention. [Figure 5c] This figure shows the steps of the manufacturing method according to the present invention. [Figure 5ca] This figure shows the steps of the manufacturing method according to the present invention. [Figure 5cb] This figure shows the steps of the manufacturing method according to the present invention. [Figure 5d] This figure shows the steps of the manufacturing method according to the present invention.

[0019]

[0019] The same reference numerals in the figures may be used for the same type of element. Some figures are schematic diagrams that are not to scale for readability. In particular, the thickness of the layers along the z axis is not to scale with respect to the lateral dimensions along the x and y axes, and the relative thickness of the layers between them is not necessarily considered in the figures. [Modes for carrying out the invention]

[0020] (Detailed description of the invention)

[0020] The present invention relates to a composite structure 100 particularly suitable for manufacturing microelectronic components, comprising a single-crystal thin film 10 arranged on a support substrate 20 made of polycrystalline silicon carbide, in particular silicon carbide, diamond, silicon, Group II-VI or Group III-V semiconductor compounds (e.g., AlN, GaN, etc.), gallium oxide (Ga2O3), or any wide-bandgap semiconductor material (Figure 1).

[0021]

[0021] In the main plane (x,y), the composite structure 100 is preferably in the form of a circular wafer having a diameter of 100 mm, 150 mm, 200 mm, or more. However, this composite structure may be any other form that can be later processed for the manufacture of parts. The thickness of the composite structure 100 extends along the z axis in the figure.

[0022]

[0022] The thickness of the thin film 10 of the composite structure 100 is typically several tens of nanometers to several hundred nanometers, for example, 50 nm to 800 nm. Depending on the needs of the electronic component to be manufactured, an epitaxy step can be performed on the thin film 10 to thicken the thin film 10 (homoepitaxy) or to grow other materials (heteroepitaxy), as will be shown below.

[0023]

[0023] The thin film 10 has an electrical resistivity that is suitable for the application and intended component. For example, in the case of power components, the resistivity is typically 30 mΩ·cm, 10 mΩ·cm, or even less than 1 mΩ·cm with n-doping (nitrogen or phosphorus doping agent).

[0024]

[0024] The support substrate 20 corresponds to the mechanical support of the composite structure 100. The lateral dimensions (especially its diameter) of the support substrate 20 in the main plane (x,y) are the same as the lateral dimensions of the composite structure 100. Note that the lateral dimensions of the thin film 10 may be slightly smaller due to the transfer method. In fact, the peripheral ring of the support substrate 20 usually does not have the thin film 10 because edge drops or chamfers of the substrate 20 would hinder the assembly and effective transfer of the layer 10.

[0025]

[0025] In the composite structure 100, the support substrate 20 typically has a thickness ranging from about 50 μm to several hundred μm, for example, 50 μm to 650 μm, or 100 μm to 450 μm, or 200 μm to 350 μm. Typically, the thickness of a support substrate 20 with a diameter of 150 mm is in the range of 350 to 450 μm, and the thickness of a support substrate 20 with a diameter of 200 mm is in the range of 500 to 650 μm.

[0026]

[0026] As mentioned in the introduction, good vertical conductivity is required for power applications, and the support substrate 20 has an electrical resistivity of 10 mΩ·cm or less, preferably 5 mΩ·cm or less, and more preferably 3 mΩ·cm or less. When the thin film 10 is n-type, the type of doping of the support substrate 20 is usually selected to be the same, i.e., a typical doping using nitrogen or phosphorus is selected. To obtain the low resistivity mentioned above, the dopant concentration (which can be measured by secondary ion mass spectrometry) is generally 5.0 × 10 19 atoms / cm 3 More preferably 1.0 × 10 20 atoms / cm 3 The above is 1.5 × 10 20 atoms / cm 3 Furthermore, 3 x 10 20 atoms / cm 3 That's all.

[0027]

[0027] The radius of curvature of the support substrate 20 is greater than 25 m, and preferably 50 m or more. For example, a support substrate 20 with a diameter of 150 mm has a curvature (or warp) of 100 μm or less, 50 μm or less, and even 30 μm or less, and a support substrate 20 with a diameter of 200 mm has a curvature (or warp) of 150 μm or less, 100 μm or less, 70 μm or less, and even 40 μm or less.

[0028]

[0028] The range of the radius of curvature of the support substrate 20 allows the support substrate 20 to be fully compatible with the specifications of the composite structure 100 provided with a thin single crystal layer 10, the method for manufacturing such a structure 100, and the subsequent preparation of microelectronic components on and / or within the thin film 10. Note that the curvature of the composite structure 100 remains close to the curvature of the support substrate 20.

[0029]

[0029] The support substrate 20 made of p-SiC of polytype 3C further has a preferred crystal orientation on each of its surfaces, in particular on each of its two main surfaces (the surfaces on which the thickness of the support substrate 20 is measured). This crystal orientation is particularly suitable for obtaining low curvature and good thermal conductivity in parallel with a high concentration of doping agent.

[0030]

[0030] The preferred crystal orientation is here characterized by a specific percentage of different texture coefficients. The texture coefficient can be expressed as a percentage and quantifies the average preferred orientation of the microcrystals of the support substrate 20 relative to the normal of the surface of the substrate 20. It is recalled that the texture coefficient can be measured using the method described by G. Harris ("X. Quantitative measurement of preferred orientation in rolled uranium bars", Philosophical Magazine Series 7, 43:336, 113-123, 1952). In practice, the texture coefficient is measured by the θ-2θ method over an angular range of 10° to 135° (2θ scale) from diffraction peaks collected by a PANalytical X'Pert PRO MPD type X-ray diffractometer. In this range, 10 diffraction peaks (shown in Figure 2), classified according to an increase in the Miller (hkl) index, as shown in the table, can be considered for a 3C type SiC substrate.

[0031]

[0031] Texture coefficient C hkl The peak intensity I is proportional to the area under the peak of the sample. hklAnd the theoretical strength of powders, which can be obtained from theoretical percentages compiled by ICDD (International Centre for Diffraction Data) 0hkl The texture coefficient C is calculated from the following. hkl This can be expressed as follows: C hkl =(I hkl / I 0 hkl ) / (1 / N×Σ(I hkl / I 0hkl In the formula, N is the number of peaks to be considered.

[0032]

[0032] The preferred crystal orientation of the support substrate 20 is determined by the texture coefficient C 422 The fact that it is less than 40% and the total texture coefficient C 220 +C 200 +C 400 This is characterized by the fact that it exceeds 50%.

[0033]

[0033] In preference, the sum of texture coefficients C 220 +C 200 +C 400 is greater than 60%, 70%, or 80%. 200 +C 400 It may be advantageous for the contribution to be greater than 1%, 2%, or 5%.

[0034]

[0034] Also, texture coefficient C 422 Preferably, it should be less than 20%, less than 15%, or even less than 10%.

[0035]

[0035] Figure 3b shows an exemplary texture of a support substrate 20 for a composite structure 100 according to the present invention. The image was obtained by scanning electron microscope (SEM) using electron backscatter diffraction (EBSD) in a cross-section (y,z), i.e., in a cross-section of the support substrate 20, and the white bar in the lower right of the image indicates a scale of 100 μm. The observed texture is texture coefficient C 220 If over 90%, texture coefficient C 422The content is less than 10%, and is preferably oriented to (220).

[0036]

[0036] In this example, the nitrogen concentration of the support substrate 20 is 1.8 × 10 20 atoms / cm 3 The electrical resistivity measured using the four-point method was 1.2 mΩ·cm. From the thermal diffusivity measurement using the laser flash method, a thermal conductivity of approximately 270 W / (mK) is estimated. Finally, the deformation (warpage) was measured to be less than 100 μm on a substrate with a diameter of 150 mm and a thickness of 350 μm to 450 μm.

[0037]

[0037] The desirable texture associated with high doping makes it possible to obtain a support substrate 20 that satisfies the physical, mechanical, and electrical specifications expected in the composite structure 100, namely, excellent flatness (low curvature), low electrical resistivity, and very good thermal conductivity.

[0038]

[0038] According to a particular embodiment of the present invention, the composite structure 100 includes a continuous or discontinuous intermediate layer 30 disposed between the thin film 10 and the support substrate 20, and composed of at least one metal or semiconductor material (Figure 4). As will be described later with reference to a method for manufacturing the composite structure 100, the intermediate layer 30 may be formed on the side of the thin film 10, the side of the support substrate 20, or on both sides before assembly along the bonding interface 40.

[0039]

[0039] The intermediate layer 30 may be composed of, for example, silicon, silicon carbide, tungsten, and / or titanium. Its thickness is typically several nanometers to several hundred nanometers, preferably 2 nm to 50 nm.

[0040]

[0040] The present invention also relates to a method for manufacturing a composite structure 100.

[0041]

[0041] The method includes a first step a) of preparing a support substrate 20 made of polycrystalline silicon carbide having a preferred crystal orientation, and according to this crystal orientation, Texture coefficient C 422 The percentage is less than 40%, Sum of texture coefficients C 220 +C 200 +C 400 That exceeds 50%.

[0042]

[0042] To address power electronics applications, the support substrate 20 is preferably doped with nitrogen or phosphorus, which enables it to achieve electrical resistivity of 10 mΩ·cm, 5 mΩ·cm or less, and even less than 3 mΩ·cm.

[0043]

[0043] The radius of curvature of the support substrate 20 is greater than 25m, and preferably 50m or more.

[0044]

[0044] Step a) is to carry out chemical vapor deposition (CVD) technology. This technology includes a gas mixture comprising at least one silicon precursor gas (such as silane or chlorosilane) and / or at least one carbon precursor gas (such as alkane or alkene), and / or at least one silicon-carbon precursor gas (such as methyltrichlorosilane, abbreviated as MTCS), and optionally at least one dopant gas. In the case of nitrogen doping, the dopant gas may be, for example, NH3, N2H4, or N2. Note that the dopant gas may also be a precursor of carbon and / or silicon (such as an amine, such as H2NCH3). These gases can be diluted in a carrier gas which may be a reducing gas such as hydrogen and / or an inert gas such as argon. From this gas mixture, a polycrystalline SiC layer is formed on a so-called growth substrate.

[0045]

[0045] This gas mixture is placed in a reactor at a high temperature, where the precursor gas is decomposed and reacts on the surface of a growth substrate, preferably isotropic graphite with fine, purified crystal grains, to form a 3C-SiC polytype whose mechanical and thermal resistance, coefficient of thermal expansion, and purity are in perfect conformance to the specifications of the composite structure 100. Furthermore, the 3C-SiC polytype is typically 10 to a very high level. 20 atoms / cm 3It can be doped with nitrogen up to a certain point, and therefore can have a resistivity of less than 10 mΩ·cm without causing degradation of substrate quality that would be detrimental to the quality of the composite structure and the subsequent performance of microelectronic components. Finally, this 3C-SiC polytype is a material that can withstand the high-temperature processes that the support substrate 20 is expected to undergo during the manufacture of the composite structure 100 and components.

[0046]

[0046] The temperature of the reactor during SiC CVD deposition should be about 1000°C to about 1600°C, preferably about 1100°C to about 1400°C, and even more preferably about 1200°C to about 1400°C. Within this temperature range, the deposition rate can vary over a fairly wide range from 1 micrometer / hour to over 100 micrometers / hour. It is advantageous that the total pressure of the reactor does not exceed 350 mbar, and even more preferably 300 mbar.

[0047]

[0047] By changing parameters of the CVD process, such as temperature, partial pressure of the precursor, and optionally the proportion of dopant gas, it is possible to change the crystal orientation / texture of the deposited p-SiC layer.

[0048]

[0048] As an example, to obtain a support substrate 20 having a diameter of 150 mm, deposition is carried out on a disk-shaped graphite cylinder having a diameter close to 150 mm nominally and a thickness of more than 2 mm in order to ensure sufficient flatness of the substrate. The reactor may include a plurality of these disks, which may have the same or different diameters. Two faces of the disk preferably have a flatness of less than 15 μm, obtained by sufficiently precise machining. The thermal expansion coefficient of the isotropic graphite is carefully selected to match that of the p-SiC layer during cooling after deposition. Substrates sold by MERSEN under the name "grade2303" can be used.

[0049]

[0049] At the end of the deposition process, the graphite growth substrate coated with the p-SiC deposition layer is machined and then typically air-oxidized at 900°C to remove the graphite residue. Note that the removal of graphite can be done solely by mechanical machining techniques or essentially by combustion / oxidation. The p-SiC green disks are recovered for each face of the growth substrate and have curvature due to the relaxation of stress in the deposition layer.

[0050]

[0050] The p-SiC raw disk (optionally, after a thickness of approximately 100 μm or more of material has been removed from at least the surface that was in contact with the growth substrate) exhibits specific crystal properties, namely, on each of its two surfaces, Texture coefficient C 422 The percentage is less than 40%, preferably less than 30%. Texture coefficient C 220 However, more than 50%, preferably more than 60%, and even more than 80% It features a preferred crystal orientation characterized by [the following].

[0051]

[0051] Next, the raw disk made of p-SiC is heat-treated in a temperature range of 1800°C to 2300°C. During this heat treatment, the raw disk is preferably held flat on a flat surface. This heat treatment results in a specific change in the size and crystal orientation of the p-SiC crystal grains, which is only observed if the raw disk has the aforementioned specific crystal properties after deposition. This heat treatment is carried out at a temperature of 1800°C to 2300°C, preferably 1850°C to 2200°C, more preferably 1900°C to 2150°C, and even more preferably 1950°C to 2150°C. The duration is preferably at least 10 minutes, preferably about 1 hour to about 12 hours, and preferably about 2 hours to about 9 hours. If the duration is too long, it may result in undesirable recrystallization, and if the duration is too short, the heat treatment may not be effective.

[0052]

[0052] Next, the p-SiC green disk is thinned by rough grinding and then fine grinding. These grinding steps, known from the prior art, aim to remove the initial crystal growth zone that generates strong stress by removing a sufficient thickness (at least 100 μm) on the side of the disk face that was in contact with the graphite. These grinding steps also make it possible to obtain an intermediate p-SiC disk with a second thickness close to the final thickness intended for the support substrate 20 and low deformation by removing material from both sides of the green disk. This second thickness is typically less than 550 μm, preferably 350 μm to 450 μm.

[0053]

[0053] It should be noted that the steps of thinning by grinding and heat treatment described above can be reversed or even nested (for example, the heat treatment can be performed after the first grinding sequence applied to the raw disk and before the second grinding sequence that yields the intermediate disk).

[0054]

[0054] The above heat treatment yields an intermediate disk made of p-SiC having a preferred crystal orientation, which is also the crystal orientation of the support substrate 20, and is defined as follows. Texture coefficient C 422 It is less than 40%, Sum of texture coefficients C 220 +C 200 +C 400 The percentage should exceed 50%, preferably exceed 80%.

[0055]

[0055] C 200 +C 400 The contribution of this C is preferably more than 1%, more than 2%, and even more than 5%. 200 +C 400 The contribution is texture C 220 This relates to the crystal orientation characterized by the texture C 220 This refers to the extremely dominant texture C, which is generated by a specific heat treatment applied to the raw or intermediate disk. 220 That is the case.

[0056]

[0056] The intermediate disk has a texture coefficient C of less than 20%, preferably less than 15%, and more preferably less than 10% on each of its two surfaces. 422 Having it is advantageous.

[0057]

[0057] Heat treatment of the raw disk (before or after all or some grinding steps) first results in the rearrangement of crystal defects at grain boundaries (which induces the relaxation of residual stress at the grain boundaries), then in the recrystallization due to nucleation at the grain boundaries, and subsequently in the expansion of these crystal grains. Therefore, the initial grain size can affect the microstructure obtained at the end of the heat treatment. The nature of the crystal defects is also important, and in order to promote recrystallization that effectively relieves stress, small-sized crystal grains must be in contact with large-angle grain boundaries (HAGBs). These large-angle grain boundaries contain particularly large stored energy and, as a result, are more mobile than small-angle grain boundaries. The internal energy of the large-angle grain boundaries is the driving force for the rearrangement of defects at the grain boundaries. The specific texture of the p-SiC of the heat-treated raw disk ensures the presence of such large-angle grain boundaries.

[0058]

[0058] Although not bound by this theory, it is conceivable that heat treatment of p-SiC disks could improve the diffusion of doping agents, particularly nitrogen, and allow for more effective electronic integration of doping atoms into the crystal lattice. This would result in 5 × 10 19 atoms / cm 3 More preferably 1 × 10 20 atoms / cm 3 Even more preferably 1.5 × 10 20 atoms / cm 3 It becomes possible to obtain polycrystalline SiC disks that are doped with ultra-high nitrogen concentrations, providing extremely low resistivity of less than 10 mΩ·cm, 5 mΩ·cm, and even less than 3 mΩ·cm.

[0059]

[0059] Finally, the intermediate p-SiC disk is subjected to conventional surface treatment by fine grinding and / or polishing to reach a support substrate 20 made of p-SiC having the important properties described above in the description of the composite structure 100.

[0060]

[0060] Considering the specified preferred crystal orientation, the curvature of the p-SiC raw disk remains within a reasonable range, thereby enabling the fabrication of a support substrate 20 with low curvature from a raw disk of an economically viable thickness. This curvature can be measured by a confocal white light sensor scanning the surface of the disk or substrate, with the disk or substrate placed on the support surface of the measuring tool. The difference between the maximum and minimum heights of the surface scanned by the sensor relative to the support surface is measured. This surface can be interpolated by a central plane using the least squares method. If this central plane is parallel to the support surface, the deformation measurement is equal to the warp. This method for measuring strain generally increases the warp measurement.

[0061]

[0061] As an example, the target curvature (warpage) of a raw p-SiC disk with a diameter of 150 mm and a thickness of less than 1000 μm is 250 μm or less. Therefore, after grinding and polishing, it is possible to obtain a support substrate 20 having a thickness of less than 500 μm and a curvature of less than 100 μm, even less than 50 μm, and even less than 30 μm.

[0062]

[0062] Referring to the exemplary support substrate 20 shown in Figure 3b, a p-SiC CVD deposition of 800 μm thickness was carried out on a graphite growth substrate with a diameter of 150 mm at a temperature of approximately 1277°C, with an MTCS partial pressure of 16 mbar and an NH3 mole fraction of 4%. The resulting p-SiC disk has a preferred crystal orientation with the following texture, as shown in Figure 3a. 220 =93%, C 422 =3%, and C 111 +C 222 +C 511 =2%. 1.8 × 10 by SIMS 20 atoms / cm 3The measured nitrogen concentration provides an electrical resistivity of 10 mΩ·cm (four-point method). The thermal conductivity is evaluated to be 240 W / m / K and is high despite small grain sizes and high doping. The curvature of the as-grown disk is about 210 μm.

[0063]

[0063] Next, the as-grown disk made of p-SiC is heat-treated at 2000 °C and maintained flat on a flat surface. Thereafter, a thinning step by grinding and polishing is performed to sequentially obtain the intermediate disk of Fig. 3b and the support substrate 20.

[0064]

[0064] The as-grown disk exhibits a dominant texture coefficient C 220 and has a significant (111) component near the interface with the growth substrate. The thickness rich in texture C 111 was removed by grinding. The heat treatment caused significant changes in the microstructure and the angle of the crystallites (Fig. 3b). Small crystallites with a (220) orientation tend to coalesce, resulting in a mixed orientation of (111)+(220)+(200). Little small crystallites with a (111) orientation are observed.

[0065]

[0065] In this example, as described above, the support substrate 20 has a nitrogen concentration of 1.8×10 20 atoms / cm 3 and an electrical resistivity measured to be 1.2 mΩ·cm. The thermal conductivity is about 270 W / (m / K). Finally, the curvature is measured to be less than 100 μm on a substrate with a diameter of 150 mm and a thickness of 350 μm to 450 μm.

[0066]

[0066] Empirically, the crystallites may have an average diameter of 5 μm or more, particularly 10 μm or more, and further 20 μm or 50 μm (e.g., measured by EBSD in a plane perpendicular to the z-axis) in a specific support substrate 20 after the aforementioned heat treatment. In particular, the crystallites with (200) and (400) orientations have an average diameter of 5 μm or more, particularly 10 μm or more, and further 20 μm or 50 μm, which results from the heat treatment that causes coalescence and recrystallization of specific crystallites with a (220) orientation.

[0067]

[0067] In measuring the average diameter of crystal grains, it is assumed that different crystals forming one or more twins constitute the same crystal grain, rather than separate crystal grains.

[0068]

[0068] Therefore, the size of the crystal grains tends to increase during heat treatment, and their average diameter can increase by at least twice, often five times, and even ten or fifty times, depending on the heat treatment conditions and duration. This is especially true for (220) oriented crystal grains, which have been shown to be more prone to coalescing and recrystallizing than (422) oriented crystal grains. Thus, the microstructure is such that the texture coefficient C 422 If the sum of the texture coefficients is less than 40%, 220 +C 200 +C 400 It has been found that raw discs with a particle size exceeding 50% are particularly sensitive to heat treatment. However, the increase in particle size during heat treatment correlates with an increase in thermal conductivity, thus making it possible to achieve high thermal conductivity values ​​such as the 270 W / (mK) already mentioned.

[0069]

[0069] Growth by CVD tends to result in strong orientation in the thickness direction of the raw disk, and the crystal grains before heat treatment mainly extend along the Z axis as seen in Figure 3a, so their morphology changes significantly due to the coalescence of adjacent crystal grains. As seen in Figure 3b, heat treatment leads to the appearance of crystal grains with very different morphologies.

[0070]

[0070] In particular, the raw disk or support substrate 20 includes crystal grains in which the aspect ratio, defined as the ratio of the length of the crystal grain along the Z axis in the numerator to the diameter of the crystal grain in the direction perpendicular to the Z axis in the denominator, is 10 or less, in particular 5 or less, and in particular 3 or less. In particular, at least 5% of the crystal grains have such an aspect ratio.

[0071]

[0071] The surface 20a (Figure 5a) of the support substrate 20 intended to receive the thin film 10 preferably has a roughness of 1 nm RMS or less (measured by an atomic force microscope with a 20 μm × 20 μm scan), and more preferably has a roughness of 0.5 nm RMS or less. The surface of the support substrate 20 intended to form the back surface of the composite structure 100 may have a larger surface roughness, for example, about 10 nm RMS.

[0072]

[0072] Step a) of the method may optionally include a heat treatment applied to the support substrate 20 at a temperature of 1500°C or higher, typically 1500°C to 2000°C, in order to stabilize the polycrystalline structure and / or, if applicable, to repair defects generated by the grinding or polishing step. In fact, these temperature ranges are likely to be applied later in the method for manufacturing the composite structure 100.

[0073]

[0073] The manufacturing method according to the present invention then includes step b) preparing a donor substrate 1 made of a single-crystal material from which the thin film 10 is obtained (Figure 5a). As described above with reference to the composite structure 100, the single-crystal material may be 4H, 6H, or 3C polytype silicon carbide, diamond, silicon, Group II-IV or Group III-V semiconductor compounds (particularly GaN), etc. The donor substrate 1 is preferably in the form of a plate with a diameter of 100 mm, 150 mm, 200 mm or more (same as or very close to the support substrate 20) and typically has a thickness of 300 μm to 800 μm. The donor substrate 1 has a front surface 1a and a back surface 1b. The surface roughness of the front surface 1a is preferably selected to be less than 1 nm RMS, and even less than 0.5 nm RMS, by measuring with an atomic force microscope (AFM) with a 20 μm × 20 μm scan. The type of doping and resistivity of the donor substrate 1 are determined according to the requirements of the component to be manufactured on and / or within the thin film 10 of the composite structure 100.

[0074]

[0074] Finally, the method includes step c) of transferring the thin film 10 from the donor substrate 1 to the support substrate 20. There are various options known from the prior art for performing layer transfer (mechanical, chemical, or mechanochemical thinning, separation in the porous layer present in the donor substrate 1, etc.), but these will not be described comprehensively.

[0075]

[0075] According to a preferred embodiment, step c) of the method includes implantation of light species and assembly by direct bonding according to the principle of the Smart Cut method.

[0076]

[0076] The first stage c1) corresponds to the introduction of light species into the donor substrate 1 for forming an embedded brittle plane 11 that defines the boundary of the thin film 10 to be transferred, together with the front face 1a of the donor substrate 1 (FIG. 5b). It should be noted that the thin film 10 to be transferred is illustrated as a continuous layer, but it may be composed of discontinuous tiles prepared on the surface of the donor substrate 1, for example.

[0077]

[0077] The light species are preferably hydrogen, helium, or co-implantation of these two species, and are implanted to a determined depth within the donor substrate 1 that matches the thickness of the target thin film 10. These light species form microcavities distributed in a thin film parallel to the free surface 1a of the donor substrate 1 or parallel to the plane (x, y) in the figure near the determined depth. This thin film is called the embedded brittle plane 11 for simplicity.

[0078]

[0078] The implantation energy of the light species is selected to reach the determined depth. For example, hydrogen ions have an energy of 10 keV to 250 keV, and 5 E 16 / cm 2 ~1 E 17 / cm 2The ion implantation step defines the boundary of a thin film 10 having a thickness of approximately 100 nm to 1500 nm, which is implanted with a dose of ion. Note that a protective layer can be deposited on the front surface 1a of the donor substrate 1 before the ion implantation step. This protective layer may be composed of a material such as silicon oxide or silicon nitride. This protective layer is removed before the next step.

[0079]

[0079] Next, the transfer step c) includes a second step c2) in which the donor substrate 1 is assembled to the support substrate 20 by molecular adhesive bonding along the bonding interface 40, with its front surface 1a on the side and its first surface 20a on the side (Figure 5c).

[0080]

[0080] Optionally, the intermediate layer 30 may be formed on the front surface 1a of the donor substrate 1 before or after the introduction of the lightweight species in step c1), in either case, before the assembly step. The intermediate layer 30 may be made of a semiconductor material such as silicon or silicon carbide, or it may be made of a metallic material such as tungsten or titanium. The thickness of the intermediate layer 30 is advantageously typically limited to a few nanometers to several tens of nanometers.

[0081]

[0081] If the intermediate layer 30 is formed before the first step c1), the injection energy (and potentially dose) of the lightweight species is adjusted to pass through this additional layer. If the intermediate layer 30 is formed after step c1), care is taken to form this layer by applying a lower thermal budget to the bubbling thermal budget, the bubbling thermal budget corresponding to the excessive growth of microcavities in the embedded brittle surface 11 and the appearance of blisters on the surface of the donor substrate 1 due to pressurization.

[0082]

[0082] Optionally, the intermediate layer 30 may also be deposited on the surface of the support substrate 20 to be assembled before the assembly stage, and this intermediate layer may be selected to have the same or different properties as the intermediate layer mentioned for the donor substrate 1.Optionally, the intermediate layer 30 may be deposited on both substrates 1 and 20 to be assembled.

[0083]

[0083] The purpose of the intermediate layer(s) is essentially to facilitate the bonding energy (especially in the temperature range below 1100°C) so that covalent bonds are formed at a lower temperature than when the two SiC surfaces are assembled directly, and another advantage of this (these) intermediate layer may be to improve the perpendicular electrical conductivity of the bonding interface 40.

[0084]

[0084] The intermediate layer(s) 30 are intended to be embedded in the joined assembly 50 after assembly (Figures 5ca, 5cb) and ultimately embedded in the composite structure 100. Even if the intermediate layer 30 is continuous while it is formed on one and / or the other of the substrates 1, 20, the intermediate layer 30 may become fragmented and discontinuous during subsequent heat treatment. This is essentially because the initial thickness of the layer is very small, typically less than 10 nm.

[0085]

[0085] Returning to the description of assembly stage c2), as is well known, direct bonding by molecular adhesion does not require adhesive material because a bond is established at the atomic scale between the assembled surfaces. Several types of molecular adhesive bonding exist, which differ in particular in terms of their temperature, pressure, atmospheric conditions, or treatment before the surfaces are brought into contact. Examples include bonding at room temperature with or without pre-plasma activation of the surfaces to be assembled, atomic diffusion bonding (ADB), surface activation bonding (SAB), etc.

[0086]

[0086] The assembly step c2) may include a conventional chemical cleaning sequence (e.g., RCA cleaning), a surface activation (e.g., oxygen or nitrogen plasma), or other surface preparation (e.g., scrubbing) that can improve the quality (low defects, strong bonding energy) of the bonding interface 40 before bringing the surfaces 1a and 20a to be assembled into contact.

[0087]

[0087] Finally, the third step c3) involves separation along the embedded brittle surface 11, thereby transferring the thin film 10 to the support substrate 20 (Figure 5d).

[0088]

[0088] Separation along the embedded brittle surface 11 is typically carried out by heat treatment at a temperature of 800°C to 1200°C. Such heat treatment induces cavities and microcracks in the embedded brittle surface 11 and pressurizes it with a lightweight species present in gaseous form until the fracturing propagates along the brittle surface 11. Alternatively, or in conjunction with this, mechanical stress can be applied to the joined assembly, particularly to the embedded brittle surface 11, to propagate or assist in mechanical propagation of the fracturing leading to separation. At the end of this separation, a composite structure 100 including the support substrate 20 and the transferred thin film 10 is obtained, as well as the rest of the donor substrate 1'. The level and type of doping of the thin film 10 is determined by the selection of properties of the donor substrate 1 or can be adjusted later by known techniques for doping semiconductor layers.

[0089]

[0089] The free surface 10a of the thin film 10 is usually rough after separation, for example, this free surface has a roughness of 5 nm to 100 nm RMS. A washing and / or smoothing step can be applied to restore a good surface condition (typically a roughness of less than a few angstroms RMS). In particular, these steps may include a chemomechanical smoothing treatment of the free surface of the thin film 10. Removal of 50 nm to 300 nm makes it possible to effectively restore the surface condition of the layer 10. These steps may also include at least one heat treatment at a temperature of 1200°C to 1800°C. Such a heat treatment is applied to remove residual lightweight species from the thin film 10 and to promote the rearrangement of the crystal lattice of the thin film 10. Such a heat treatment can also reinforce the bonding interface 40. The heat treatment may include, or may correspond to, epitaxy on the thin film 10 (e.g., c-SiC homoepitaxy on the c-SiC thin film 10, GaN heteroepitaxy on the c-SiC thin film 10, etc.) in order to increase the thickness of the thin film 10.

[0090]

[0090] Finally, it should be noted that the transfer step c) may include a step of readjusting the remaining portion 1' of the donor substrate for reuse as a donor substrate 1 for a new composite structure 100. The same mechanical and / or chemical treatments that were applied to the composite structure 100 may be performed on the front surface 1'a of the remaining substrate 1'.

[0091]

[0091] The resulting composite structure 100 is extremely robust to very high-temperature heat treatments that may be performed to improve the quality of the thin film 10 or to manufacture components on and / or within the layer 10. The support substrate 20 of the composite structure 100 is stable and does not significantly increase in curvature during and after the high-temperature heat treatments performed for the manufacture of the composite structure 100.

[0092]

[0092] The composite structure 100 according to the present invention is particularly suitable for the manufacture of one (or more) high-voltage microelectronic components such as Schottky diodes and MOSFET transistors. More generally, the present invention addresses power applications of microelectronics by enabling excellent vertical electrical conductivity, good thermal conductivity, and by providing a high-quality single-crystal thin film 10.

[0093]

[0093] Of course, the present invention is not limited to the embodiments and examples described, and various embodiments can be provided without departing from the scope of the present invention as defined by the claims.

Claims

1. A composite structure (100) for manufacturing a microelectronic component, comprising a single-crystal thin film (10) disposed on a support substrate (20) made of polycrystalline silicon carbide, wherein the support substrate (20) has a preferred crystal orientation on each of its surfaces, and according to the crystal orientation, Texture coefficient C ４２２ The percentage is less than 40%, Total texture coefficient C ２２０ +C ２００ +C ４００ A composite structure (100) having more than 50%, preferably more than 80%.

2. The composite structure (100) according to claim 1, wherein the support substrate (20) has an electrical resistivity of 10 mΩ·cm or less, preferably 5 mΩ·cm or less, and more preferably 3 mΩ·cm or less.

3. The support substrate (20) has 5.0×10 １９ atoms / cm ３ or more, preferably 1.0×10 ２０ atoms / cm ３ or more, more preferably 1.5×10 ２０ atoms / cm ３ or more, or preferably 3×10 ２０ atoms / cm ３ or more, and is nitrogen-doped at a concentration measured by secondary ion mass spectrometry, the composite structure (100) according to claim 1 or 2.

4. The aforementioned texture coefficient C ４２２ The composite structure (100) according to any one of claims 1 to 3, wherein the amount is less than 20%, preferably less than 15%, and more preferably less than 10%.

5. The sum of the texture coefficients C ２００ +C ４００ The composite structure (100) according to any one of claims 1 to 4, wherein the amount is greater than 1%, preferably greater than 2%, and more preferably greater than 5%.

6. The composite structure (100) according to any one of claims 1 to 5, wherein the thin film (10) is made of silicon carbide.

7. The composite structure (100) according to any one of claims 1 to 5, wherein the thin film (10) is composed of gallium nitride.

8. The composite structure (100) according to any one of claims 1 to 5, wherein the thin film (10) is composed of gallium oxide.

9. The composite structure (100) according to any one of claims 1 to 5, wherein the thin film (10) is composed of diamond.

10. The composite structure (100) according to any one of claims 1 to 9, comprising a continuous or discontinuous intermediate layer (30) disposed between the thin film (10) and the support substrate (20), and composed of at least one metallic material or semiconductor material.

11. The composite structure (100) according to claim 10, wherein the intermediate layer (30) is composed of silicon, silicon carbide, tungsten, and / or titanium.

12. The composite structure (100) according to any one of claims 1 to 11, wherein the support substrate (20) has a thickness of 50 microns to 650 microns.

13. The composite structure (100) according to any one of claims 1 to 12, comprising electronic components on and / or within the thin film (10), and optionally comprising electrical contacts on the back surface of the support substrate (20).

14. A method for manufacturing a composite structure (100) including a single-crystal thin film (10) placed on a support substrate (20) made of polycrystalline silicon carbide, a) A step of preparing a support substrate (20) made of polycrystalline silicon carbide having a preferred crystal orientation on each of its surfaces, according to the crystal orientation, Texture coefficient C ４２２ The percentage is less than 40%, Total texture coefficient C ２２０ +C ２００ +C ４００ Steps where the percentage exceeds 50%, preferably exceeding 80%, b) A step of preparing a donor substrate (1) made of single crystal material, c) A step of transferring the thin film (10) from the donor substrate (1) to the support substrate (20) Methods that include...

15. The aforementioned step c) of transferring, c1) A step of forming an embedded brittle surface (11) on the donor substrate (1) and defining the boundary of the thin film (10) between the embedded brittle surface (11) and the front surface (1a) of the donor substrate (1), c2) The step of assembling the donor substrate (1) to the support substrate (20) directly or via an intermediate layer (30) by molecular adhesive bonding, c3) A step of separating along the embedded brittle surface (11) to transfer the thin film (10) to the support substrate (20) The manufacturing method according to claim 14, including

16. Step c2) is performed before the assembly of the two substrates (1, 20), A step of forming an intermediate layer (30) on the donor substrate (1) before or after step c1), and / or The step of forming an intermediate layer (30) on the support substrate (20) Includes, The manufacturing method according to claim 15, wherein the intermediate layer (30) is formed from at least one metallic material or semiconductor material selected from silicon, silicon carbide, tungsten, and titanium.

17. The manufacturing method according to any one of claims 14 to 16, further comprising the fabrication of an electronic component on and / or within the thin film (10) of the composite structure (100).

18. The manufacturing method according to claim 17, wherein the fabrication of the electronic component includes, in particular, a step of homoepitaxy or heteroepitaxy on the thin film (10).

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