A device with a shielding layer containing multiple openings filled with thermal interface material.

Abstract

A device comprising (i) an integrated device bonded to the substrate, a shield frame bonded to the substrate, a shield layer bonded to the shield frame having a first surface, a second surface, and a plurality of openings, and (ii) a thermal interface material bonded to the integrated device and the shield layer. The thermal interface material is located within the plurality of openings in the shield layer. The thermal interface material is in contact with the integrated device, the first surface of the shield layer, and the second surface of the shield layer.

Description

Technical Field

[0001]

[0001] Various features relate to devices including shields and thermal interface materials.

Background Art

[0002]

[0002] Electronic devices include many components that generate heat, such as integrated devices. Integrated devices may tend to overheat, which can affect the performance of the integrated device and other components of the electronic device. An overheating integrated device has a high junction temperature, and as a result, the surface temperature of the electronic device may increase. This can ultimately affect the performance of the electronic device. There is still a need to improve the heat dissipation performance of electronic devices including components that generate heat. For example, it is still necessary to reduce the junction temperature of components that generate heat and / or reduce the surface temperature of electronic devices including components that generate heat.

Summary of the Invention

[0003]

[0003] Various features relate to devices including shields and thermal interface materials.

[0004]

[0004] One example provides a device comprising a substrate, an integrated device coupled to the substrate, a shield frame coupled to the substrate, a shield layer coupled to the shield frame, the shield layer including a first surface, a second surface, and a plurality of openings, and (i) the integrated device and (ii) a thermal interface material coupled to the shield layer. The thermal interface material is disposed within the plurality of openings of the shield layer. The thermal interface material contacts the integrated device, the first surface of the shield layer, and the second surface of the shield layer.

[0005]

[0005] Another example provides a method for providing a first shield layer including a first surface and a second surface. The method forms a first plurality of openings in the first shield layer. The method bonds the first thermal interface material to the first shield layer such that the first thermal interface material is positioned within the first plurality of openings in the first shield layer and is in contact with (i) a first surface of the first shield layer and (ii) a second surface of the first shield layer. The method bonds the first shield layer to a shield frame such that the first plurality of openings are positioned on an integrated device, and the first thermal interface material is bonded to the integrated device. [Brief explanation of the drawing]

[0006]

[0006] By reading the "Modes for Carrying Out the Invention" described below in conjunction with the drawings, various features, essences, and advantages can be made clear. In the drawings, the same reference numerals throughout indicate corresponding parts. [Figure 1]

[0007] Figure 1 shows an exemplary front view of an electronic device including a display. [Figure 2]

[0008] Figure 2 shows an exemplary rear view of an electronic device, including an integrated device. [Figure 3]

[0009] An exemplary cross-sectional side view of a device including an integrated device and a shielding metal layer having multiple openings filled with thermal interface material is shown. [Figure 4]

[0010] Figure 4 shows an exemplary cross-sectional side view of a shield metal layer having multiple openings filled with thermal interface material. [Figure 5]

[0011] Figure 5 shows an exemplary plan view of a shield metal layer having multiple openings. [Figure 6]

[0012] Figure 6 shows an exemplary plan view of a shield metal layer having multiple openings filled with thermal interface material. [Figure 7]

[0013] An illustrative diagram shows an assembly including a shielding metal layer with multiple openings filled with thermal interface material. [Figure 8]

[0014] An illustrative diagram shows an assembly including a shielding metal layer with multiple openings filled with thermal interface material. [Figure 9]

[0015] The graphs below illustrate the junction temperature over time for different shielding metal layers. [Figure 10]

[0016] Figure 10 shows an exemplary bonding temperature map of a device having an integrated device bonded to a shield metal layer without multiple pores. [Figure 11]

[0017] Figure 11 shows an exemplary bonding temperature map of a device having an integrated device bonded to a shield metal layer containing multiple pores. [Figure 12]

[0018] Figure 12 shows an example of a shield metal layer having multiple openings in a certain configuration. [Figure 13]

[0019] Figure 13 shows another example of a shield metal layer with multiple openings in a different configuration. [Figure 14]

[0020] Figure 14 shows another example of a shield metal layer with multiple openings in yet another configuration. [Figure 15]

[0021] Figure 15 shows illustrative graphs of the shielding effect in various configurations of the shielding metal layer. [Figure 16]

[0022] Figure 16 shows illustrative graphs of the shielding effect in various configurations of the shielding metal layer. [Figure 17]

[0023] Figure 17 shows illustrative graphs of the shielding effect in various configurations of the shielding metal layer. [Figure 18]

[0024] An exemplary sequence for fabricating a shield metal layer with multiple openings filled with thermal interface material is shown. [Figure 19]

[0025] An exemplary sequence for fabricating a shield metal layer having a plurality of openings filled with a thermal interface material is shown. [Figure 20]

[0026] An exemplary sequence for fabricating a shield metal layer having a plurality of openings filled with a thermal interface material is shown. [Figure 21]

[0027] An exemplary flow diagram of a method for providing an assembly comprising an integrated device and a shield metal layer having a plurality of openings filled with a thermal interface material is shown. [Figure 22]

[0028] Various electronic devices that can integrate a die, an integrated device, an integrated passive device (IPD), a passive component, a package, and / or the device packages described herein are shown.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007]

[0029] In the following description, specific details are set forth in order to provide a thorough understanding of the various aspects of the present disclosure. However, one of ordinary skill in the art will understand that the aspects may be practiced without these specific details. For example, circuits may be shown in block diagrams in order to avoid obscuring the aspects with unnecessary detail. In other instances, well-known circuits, structures, and techniques may not be shown in detail so as not to obscure the aspects of the present disclosure.

[0008]

[0030] This disclosure describes a device (e.g., an electronic device) comprising a substrate, an integrated device bonded to the substrate, a shield frame bonded to the substrate, a shield metal layer bonded to the shield frame, and (i) a thermal interface material bonded to the integrated device and (ii) the shield metal layer. The shield metal layer comprises a first surface, a second surface, and a plurality of openings. The thermal interface material is located within the plurality of openings in the shield metal layer. The thermal interface material is in contact with the integrated device, the first surface of the shield metal layer, and the second surface of the shield metal layer. The device may include a frame (e.g., a mid-frame). The thermal interface material may be bonded to and in contact with the frame. The frame may include a heat sink and / or heat pipes. As will be further explained below, using a shielding metal layer containing multiple openings (e.g., multiple holes) and a thermal interface material (i) positioned in at least one of the multiple openings in the shielding metal layer and (ii) coupled to and in contact with the integrated device and frame helps provide the device with effective heat dissipation and effective shielding (e.g., electromagnetic interference shielding), which helps improve and optimize the performance of the integrated device and / or the device itself.

[0009] An exemplary device comprising a shielding metal layer containing multiple openings filled with thermal interface material.

[0031] Figures 1 and 2 show a device 100 which may include a shielding layer having multiple openings. Device 100 may include an electronic device such as a mobile phone (e.g., a smartphone). Figure 1 shows an exemplary front view of device 100 including a display 102 and a casing body 104. Figure 2 shows an exemplary rear view of device 100. Device 100 includes an integrated device 205. Device 100 may include other integrated devices (not shown). Integrated device 205 may be a first integrated device. Integrated device 205 is located inside device 100. For example, integrated device 205 is located inside the casing body 104. Integrated device 205 may include a system-on-a-chip (SoC).

[0010]

[0032] As will be further described below, device 100 also includes a shield layer (e.g., a shield metal layer, a flexible metal foil) having a plurality of openings (e.g., a plurality of holes), and a thermal interface material disposed within the plurality of openings in the shield layer and in contact with the integrated device 205 and frame within device 100.

[0011]

[0033] Figure 3 shows an exemplary cross-sectional side view of cross-section AA of device 100 in Figure 2. Device 100 includes a display 102, a display module 302, a frame 320, a back cover 304, an antenna frame 309, a substrate 301, an integrated device 205, an integrated device 305, an integrated device 307, a shield frame 306, a shield metal layer 308, and a thermal interface material 310. The shield metal layer 308 may be a type of shielding layer (e.g., an electromagnetic interference shielding layer).

[0012]

[0034] The integrated device 205 is bonded to the first surface of the substrate 301. The integrated device 205 may be bonded to the substrate 301 via a plurality of solder interconnects (not shown). In some mounting configurations, a package substrate (not shown) or an interposer (not shown) may be present between the integrated device 205 and the substrate 301. In such cases, the integrated device 205 may be bonded to the package substrate (or interposer) via a first plurality of solder interconnects, and the package substrate (or interposer) may be bonded to the substrate 301 via a second plurality of solder interconnects. The integrated devices 305 and 307 are bonded to the second surface of the substrate 301. The integrated devices 305 and 307 may be bonded to the substrate 301 using a plurality of solder interconnects. The second surface of the substrate 301 is opposite to the first surface of the substrate 301. The substrate 301 may be a printed circuit board (PCB). The antenna frame 309 is positioned between the substrate 301 and the back cover 304. The antenna frame 309 may be positioned between the integrated device 305 and the back cover 304. The antenna frame 309 may be positioned between the integrated device 307 and the back cover 304.

[0013]

[0035] The shield frame 306 is bonded to a first surface of the substrate 301. The shield frame 306 may laterally surround the integrated device 205. The shield frame 306 may contain a metallic material. Different materials may be used for the shield frame 306 in different mounting configurations. The shield metal layer 308 is bonded to the shield frame 306. An adhesive may be used to bond the shield metal layer 308 to the shield frame 306. The shield metal layer 308 may be placed on (e.g., above) the integrated device 205 and the substrate 301. The shield metal layer 308 and the shield frame 306 may surround and / or seal the integrated device 205. The shield frame 306 and / or the shield metal layer 308 may form a compartment around the integrated device 205. The shield metal layer 308 includes a plurality of openings 380. One or more of the multiple openings 380 may contain one or more holes. One or more of the multiple openings 380 may have the same and / or similar size and / or shape. However, in some implementations, one or more of the multiple openings 380 may have different sizes and / or shapes. The multiple openings 380 may be positioned on (e.g., above) the integrated device 205. The shielding metal layer 308 may include a flexible metal layer. The shielding metal layer 308 may include several metal layers (e.g., laminated metal layers). The shielding metal layer 308 may include metal foil (e.g., flexible metal foil). In some implementations, the shielding metal layer 308 may include multiple metal foils (e.g., multiple flexible metal foils). The shielding metal layer 308 may have different thicknesses. The shielding frame 306 and / or the shielding metal layer 308 may be configured as an electromagnetic interference (EMI) shield for the integrated device 205.

[0014]

[0036] As described above, the shield metal layer 308 includes a plurality of openings 380. The thermal interface material 310 is placed within the plurality of openings 380. The thermal interface material 310 is bonded to the shield metal layer 308, the integrated device 205, and the frame 320. The thermal interface material 310 can fill the plurality of openings 380 of the shield metal layer 308. The thermal interface material 310 can also be placed above and below the shield metal layer 308. For example, the thermal interface material 310 can be bonded to the first and second surfaces of the shield metal layer 308. The thermal interface material 310 can be bonded to the back side of the integrated device 205 and the frame 320.

[0015]

[0037] At least a portion of the thermal interface material 310 may include material that is continuous with and / or adjacent to the integrated device 205 and the frame 320. Having at least a portion of the thermal interface material continuous with and / or adjacent to the integrated device 205 and the frame 320 helps to provide improved heat dissipation because the presence of multiple openings 380 in the shield metal layer 308 reduces and / or lowers the thermal contact resistance. Thermal contact resistance is the phenomenon at the contact interface of two different materials where heat flow and / or heat transfer is hindered. For example, since two materials in contact with each other may not be perfectly flat at a microscopic level, there may be air and / or gas that can be located between and / or trapped between the two materials in contact with each other. Since air and / or gas are relatively low thermal conductors, heat transfer between the two materials may have some thermal contact resistance, which reduces the overall effectiveness of heat transfer.

[0016]

[0038] For example, if there are no openings in the shield metal layer 308, there is thermal contact resistance between (i) the thermal interface material below the shield metal layer 308 and the second surface (e.g., the bottom surface) of the shield metal layer 308, and (ii) the first surface (e.g., the top surface) of the shield metal layer 308 and the thermal interface material above the shield metal layer 308. However, the presence of multiple openings 380 reduces the magnitude of contact interference between the thermal interface material 310 and the shield metal layer 308, thereby reducing the above thermal contact resistance of heat flow and / or heat transfer. The number and size of the openings in the shield metal layer 308 affect and / or determine the extent to which the thermal contact resistance is reduced. Reducing thermal contact resistance means that the thermal interface material 310 is more effective in providing heat transfer, which means that less thermal interface material 310 may be required to provide effective heat dissipation to the integrated device 205. The use of less thermal interface material 310 may mean thinner thermal interface material 310 between the integrated device 205 and the frame 320, which means that the device 100 may be smaller and / or thinner. Furthermore, as described above, the use of multiple openings 380 helps to provide effective shielding to the integrated device 205. In some implementations, one or more of the multiple openings 380 may have a diameter and / or width of about 2 millimeters or less.

[0017]

[0039] Figures 4 to 6 show exemplary diagrams of a shield metal layer and a thermal interface material. Figure 4 shows a cross-sectional side view of the shield metal layer 408 and the thermal interface material 410. The shield metal layer 408 includes a plurality of openings 480. The thermal interface material 410 is located within the plurality of openings 480. The thermal interface material 410 is also located above the first surface of the shield metal layer 408 and below the second surface of the shield metal layer 408. The shield metal layer 408 may include one or more metal foils (e.g., a flexible foil layer). Figure 5 shows a plan view of the shield metal layer 408 and the plurality of openings 480. Figure 5 shows that the plurality of openings 480 are arranged in a 7 × 8 array. Each opening of the plurality of openings 480 has a square shape. However, one or more openings of the plurality of openings 480 may have different shapes and / or sizes. Furthermore, the plurality of openings 480 may be arranged in arrays of different sizes. Figure 6 shows a thermal interface material 410 located within a plurality of openings 480 and above the first surface of the shield metal layer 408. Although not visible in Figure 6, the thermal interface material 410 may also be located below the second surface of the shield metal layer 408. The shield metal layer 408 may be an example of any of the shield layers (one or more) and / or shield metal layers (one or more) described herein.

[0018]

[0040] Figure 7 shows an assembly 700 comprising a substrate 301, an integrated device 205, a shield frame 306, a shield metal layer 708, and a thermal interface material 310. The assembly 700 may be mounted on device 100. The integrated device 205 is bonded to a first surface of the substrate 301 (e.g., via a plurality of solder interconnects not shown). In some mounting configurations, the integrated device 205 may be a system-on-a-chip (SoC). The shield frame 306 is bonded to the first surface of the substrate 301 and may laterally surround the integrated device 205. The shield frame 306 may laterally surround other components bonded to the substrate 301. The shield metal layer 708 may include a plurality of openings 780. The plurality of openings 780 may be located on the integrated device 205. The shield metal layer 708 may be bonded to the shield frame 306. In some mounting configurations, the shield metal layer 708 is bonded to the shield frame 306 via an adhesive. The thermal interface material 310 is positioned within a plurality of openings 780. The thermal interface material 310 is coupled to and in contact with the integrated device (e.g., the back side of the integrated device). The thermal interface material 310 may also be coupled to and in contact with a frame (e.g., 320, not shown in Figure 7), a heat sink (not shown), and / or heat pipes (e.g., not shown). In some implementations, the heat sink and / or heat pipes may be considered part of the frame (e.g., the mid-frame).

[0019]

[0041] Figure 8 shows an assembly 800 including a substrate 301, an integrated device 205, an integrated device 805, an integrated device 818, an integrated device 825, a shield frame 306, a shield metal layer 808, and a thermal interface material 810. The assembly 800 can be mounted on device 100.

[0020]

[0042] Integrated device 205 is bonded to the first surface of substrate 301 (for example, via a plurality of solder interconnects not shown). Integrated device 805 is bonded to the first surface of substrate 301 (for example, via a plurality of solder interconnects not shown). Integrated device 818 is bonded to the first surface of substrate 301 (for example, via a plurality of solder interconnects not shown). Integrated device 825 is bonded to the first surface of substrate 301 (for example, via a plurality of solder interconnects not shown).

[0021]

[0043] The shield frame 306 is coupled to a first surface of the substrate 301 and can laterally surround the integrated devices 205, 805, and 818. Integrated devices 205 and 805 may be located within a first compartment of the shield frame 306. Integrated device 818 may be located within a second compartment of the shield frame 306. The shield frame 806 is coupled to a first surface of the substrate 301 and can laterally surround the integrated device 825. Integrated device 825 may be located within a compartment of the shield frame 806. In some mounting configurations, integrated devices 205, 805, 818, and / or 825 may be chiplets. For example, integrated device 205 may be a first chiplet, integrated device 805 may be a second chiplet, integrated device 818 may be a third chiplet, and integrated device 825 may be a fourth chiplet. Each of the chiplets may be configured to be electrically coupled to one another via the substrate 301.

[0022]

[0044] In some implementations, one or more of the integrated devices described herein (e.g., 205, 805, 818, 825) may be fabricated using the same technology node or two or more different technology nodes. For example, an integrated device (e.g., 205) may include a first chiplet that may be fabricated using a first technology node, and another integrated device (e.g., 805, 818, 825) may include a second chiplet that may be fabricated using a second technology node that is less advanced than the first technology node. In such an example, an integrated device (e.g., 205) may include a component (e.g., an interconnect, a transistor) having a first minimum size, and the other chiplets (e.g., 805, 818, 825) may include a component (e.g., an interconnect, a transistor) having a second minimum size, where the second minimum size is larger than the first minimum size. In some implementations, integrated devices 205 and 805 in a package may be fabricated using the same technology node or different technology nodes. In some implementations, a chiplet in a package (e.g., 818) and another chiplet (e.g., 825) may be created using the same technology node or different technology nodes.

[0023]

[0045] The shield metal layer 808 may be configured to be bonded to the shield frame 306 and the shield frame 806 via adhesives. The shield metal layer 808 may include a plurality of openings 880. The plurality of openings 880 may include a first plurality of openings 880a, a second plurality of openings 880b, a third plurality of openings 880c, and a fourth plurality of openings 880d. The thermal interface material 810 may include a first thermal interface material 810a, a second thermal interface material 810b, a third thermal interface material 810c, and a fourth thermal interface material 810d.

[0024]

[0046] The first set of multiple openings 880a are located on the integrated device 205. The second set of multiple openings 880b are located on the integrated device 805. The third set of multiple openings 880c are located on the integrated device 818. The fourth set of multiple openings 880d are located on the integrated device 825.

[0025]

[0047] The first thermal interface material 810a is located within the first set of openings 880a, coupled to and in contact with the integrated device 205. The second thermal interface material 810b is located within the second set of openings 880b, coupled to and in contact with the integrated device 805. The third thermal interface material 810c is located within the third set of openings 880a, coupled to and in contact with the integrated device 818. The fourth thermal interface material 810d is located within the fourth set of openings 880d, coupled to and in contact with the integrated device 825.

[0026]

[0048] The thermal interface material 810 (including the first thermal interface material 810a, the second thermal interface material 810b, the third thermal interface material 810c, and the fourth thermal interface material 810d) may also be coupled to and in contact with a frame (e.g., 320, not shown in Figure 8), a heat sink (not shown), and / or heat pipes (e.g., not shown). In some implementations, the heat sink and / or heat pipes may be considered part of the frame (e.g., the mid-frame).

[0027]

[0049] Figure 8 shows that the number, size, shape, and / or arrangement (e.g., array size) of the multiple openings 880 in the shield metal layer 808 may vary. For example, the first multiple openings 880a may have a different number of openings than the third multiple openings 880c. In some implementations, one or more openings in the multiple openings 880a may have a different diameter and / or width than the openings in the multiple openings 880c. Figure 8 shows that the shield metal layer 808 is coupled to two shield frames (e.g., 306, 806). In some implementations, the shield metal layer 808 may be divided into two or more separate shield metal layers. Thus, for example, the first shield metal layer may be coupled to shield frame 306, and the second shield metal layer may be coupled to shield frame 806.

[0028]

[0050] In different implementation configurations, different materials may be used for the shield metal layers (e.g., 308, 408, 708, 808) and / or different materials may be used for the thermal interface materials (e.g., 310, 410) as described herein. For example, thermal interface material 310 may include a silicon compound. Thermal interface materials may include thermal grease, thermal gel, thermal putty, thermal pad, and / or thermal tape. Thermal interface materials may include phase change materials, thermal conductive adhesives, liquid metals, graphene, and / or carbon fibers. In some implementation configurations, thermal interface materials may have a thermal conductivity value (K) of at least 2 W / m·K (e.g., 13 W / m·K). The shield metal layers may include copper foil, graphite, aluminum foil, aerogel, and / or copper composites. The shield metal layer may include gold, silver, copper, iron, tin, zinc, lead, nickel, aluminum, tungsten, molybdenum, tantalum, niobium, titanium, and steel and / or stainless steel. The shield metal layer may include graphite / graphene, fullerene, carbon fiber, CNT (carbon nanotube), adamas, carbon aerogel, and carbon and metal nanocomposites. The shield metal layer may include conductive polymers and composites. In some implementations, the shield metal layer may include two or more metal layers of different materials. The shield metal layer can be a type of shield layer. A shield layer may include a shield metal layer. The shield metal layer used in this disclosure may be implemented as a shield layer that does not contain any metallic material. The shield layer and / or shield metal layer may include any combination of the above materials and / or any of the above materials in combination with other materials. In some implementations, the shield metal layer may have a thermal conductivity value (K) of about 400 W / m·K. In some implementation configurations, the shielding layer and / or shielding metal layer may have a thickness of approximately 0.05 millimeters (mm) or more.

[0029]

[0051] Figure 9 shows Graph 900, which illustrates the junction temperature over time for (i) an integrated device having a shield metal layer with several openings and thermal interface material, and (ii) an integrated device having a shield metal layer without several openings and thermal interface material. Graph 900 shows that the integrated device with a shield metal layer without several openings takes approximately 70 seconds to reach a junction temperature of 85 degrees Celsius. Furthermore, after approximately 300 seconds of operation, the junction temperature is approximately 92.6 degrees Celsius. However, for the integrated device with a shield metal layer with several openings, it takes approximately 172 seconds to reach a junction temperature of 85 degrees Celsius. After approximately 300 seconds of operation, the junction temperature is approximately 87.9 degrees Celsius. Thus, Graph 900 in Figure 9 demonstrates the performance advantages of a shield metal layer with multiple openings (e.g., multiple holes). It should be noted that different configurations of shield metal layers with different openings may produce different temperature profiles over time. Therefore, Graph 900 is merely one example of how a shield metal layer with several openings may benefit the thermal performance of an integrated device.

[0030]

[0052] Figures 10 and 11 show exemplary temperature maps and / or heat maps indicating the temperature at the junction of components configured to generate heat. Figure 10 shows an example of a junction temperature map 1000 for a device including an integrated device having several openings and a shielding metal layer without thermal interface material. The junction temperature map 1000 includes the junction temperature at the integrated device 205, which is reflected by position 1005 on the junction temperature map 1000. Position 1005 is shown superimposed on the substrate 301. When the device including the integrated device having a shielding metal layer without several openings is operating, the temperature at position 1005 can reach 102 degrees Celsius.

[0031]

[0053] Figure 11 shows an example of a bonding temperature map 1100 for a device including an integrated device having a shield metal layer with several openings and thermal interface material. The bonding temperature map 1100 includes the bonding temperature at the integrated device 205, which is reflected by position 1005 on the bonding temperature map 1100. Position 1005 is shown superimposed on the substrate 301. When the device including the integrated device having a shield metal layer with several openings is operating, the temperature at position 1005 can reach 97 degrees Celsius.

[0032]

[0054] Therefore, as shown in Figures 10 and 11, using a shielding metal layer with several openings helps to lower the junction temperature of the integrated device, which helps to prevent the integrated device from overheating. This can result in better performance for the integrated device and / or devices containing the integrated device. It should be noted that different configurations of shielding metal layers with different openings can produce different temperature maps. Therefore, junction temperature map 1100 is just one example of how a shielding metal layer with several openings can benefit the performance of the integrated device and / or devices.

[0033]

[0055] Figures 12 to 14 show various examples of opening configurations in a shielding metal layer. Figure 12 shows a shielding metal layer 1208 containing multiple openings 1280 (e.g., holes) arranged in a 4x4 array. Each of the multiple openings 1280 may have a diameter of approximately 2 millimeters. The multiple openings 1280 may be located on top of an integrated device.

[0034]

[0056] Figure 13 shows a shield metal layer 1308 containing multiple openings 1380 (e.g., holes) arranged in a 5x5 array. Each of the multiple openings 1380 may have a diameter of approximately 1.5 millimeters. The multiple openings 1380 may be placed on top of an integrated device.

[0035]

[0057] Figure 14 shows a shield metal layer 1408 containing multiple openings 1480 (e.g., holes) arranged in a 7x7 array. Each of the multiple openings 1480 may have a diameter of approximately 1 millimeter. The multiple openings 1480 may be placed on top of an integrated device.

[0036]

[0058] Figures 15 to 17 show examples of the shielding effects of various configurations of multiple openings in a shielding metal layer. Figure 15 shows examples of the shielding effects for various frequencies along the Z direction for (i) a shielding metal layer with only one large opening, (ii) the shielding metal layer 1208 in Figure 12, (iii) the shielding metal layer 1308 in Figure 13, and (iv) the shielding metal layer 1408 in Figure 14. Figure 16 shows examples of the shielding effects for various frequencies along the X direction for (i) a shielding metal layer with only one large opening, (ii) the shielding metal layer 1208 in Figure 12, (iii) the shielding metal layer 1308 in Figure 13, and (iv) the shielding metal layer 1408 in Figure 14. Figure 17 shows examples of shielding effects for various frequencies along the Y direction for (i) a shield metal layer having only one large opening, (ii) the shield metal layer 1208 in Figure 12, (iii) the shield metal layer 1308 in Figure 13, and (iv) the shield metal layer 1408 in Figure 14.

[0037]

[0059] As shown in Figures 15-17, a shielding metal layer with several openings provides better shielding than a shielding metal layer with one large opening. Figures 15-17 also show that using a shielding metal layer with more openings having smaller diameters and / or widths is better at providing shielding (e.g., electromagnetic interference shielding) than using larger openings.

[0038]

[0060] An integrated device (e.g., 205) may include a die (e.g., a bare semiconductor die). An integrated device may include a power management integrated circuit (PMIC). An integrated device may include an application processor. An integrated device may include a modem. An integrated device may include radio frequency (RF) devices, passive devices, filters, capacitors, inductors, antennas, transmitters, receivers, gallium arsenide (GaAs) based integrated devices, surface acoustic wave (SAW) filters, bulk acoustic wave (BAW) filters, light-emitting diode (LED) integrated devices, silicon (Si) based integrated devices, silicon carbide (SiC) based integrated devices, memory, power management processors, and / or combinations thereof. An integrated device (e.g., 205, 805, 818, 825) may include at least one electronic circuit (e.g., a first electronic circuit, a second electronic circuit, etc.). Integrated devices may include transistors. Integrated devices may be examples of electrical components and / or electrical devices. In some implementations, integrated devices may be chiplets. Chiplets can be manufactured using one or more manufacturing processes that yield better yields compared to the manufacturing processes used for other types of integrated devices, thereby reducing the overall cost of manufacturing chiplets. Different chiplets may have different sizes and / or shapes. Different chiplets may be configured to provide different functions. Different chiplets may have different interconnect density (e.g., interconnects with different widths and / or spacing). In some implementations, several chiplets may be used to perform the functions of one or more chips (e.g., one or more integrated devices).Using several chiplets to perform several functions can reduce the overall cost of the package compared to using a single chip to perform all of the package's functions.

[0039]

[0061] In some implementations, one or more of the chiplets and / or one or more of the integrated devices (e.g., 205, 805, 818, 825) described herein may be fabricated using the same technology node or two or more different technology nodes. For example, an integrated device (e.g., 205) may be fabricated using a first technology node, and another chiplet (e.g., 805, 818, 825) may be fabricated using a second technology node that is less advanced than the first technology node. In such an example, an integrated device (e.g., 205) may include components having a first minimum size (e.g., interconnects, transistors), and a chiplet may include components having a second minimum size (e.g., interconnects, transistors), where the second minimum size is larger than the first minimum size. In some implementations, integrated device 205 and integrated device 805 in a package may be fabricated using the same technology node or different technology nodes. In some implementations, a chiplet in one package and another chiplet may be created using the same technology node or different technology nodes.

[0040]

[0062] One or more of the integrated devices may be implemented within a radio frequency (RF) package. The RF package may be a radio frequency front end (RFFE) package. The package may be configured to provide Wireless Fidelity (WiFi) communications and / or cellular communications (e.g., 2G, 3G, 4G, 5G). The package may be configured to support Global System for Mobile (GSM) communications, Universal Mobile Telecommunications System (UMTS), and / or Long-Term Evolution (LTE). The package may be configured to transmit and receive signals with different frequencies and / or different communication protocols.

[0041] Exemplary sequence for fabricating a shield metal layer with several openings filled with thermal interface material

[0063] Figure 18 shows an exemplary sequence for providing or fabricating a shield metal layer having multiple openings and thermal interface material. In some implementations, the sequence in Figure 18 may be used to provide or fabricate the shield metal layer 408 and the thermal interface material 410. However, the sequence in Figure 18 may be used to fabricate any of the shield metal layers and / or shield layers described herein.

[0042]

[0064] It should be noted that the sequence in Figure 18 may be a combination of one or more steps to simplify and / or clarify the sequence for providing or fabricating the shielding metal layer and the thermal conductive material. In some implementations, the order of the process may be changed or modified. In some implementations, one or more of the processes may be replaced or substituted without departing from the spirit of this disclosure.

[0043]

[0065] As shown in Figure 18, Stage 1 shows the state after the metal layer 1808a has been provided. The metal layer 1808a may have different shapes. Different materials may be used for the metal layer 1808a in different mounting configurations.

[0044]

[0066] Stage 2 shows the state after multiple openings 1880a have been formed in the metal layer 1808a. A laser drilling process may be used to form the multiple openings 1880a. However, different processes may be used to form the multiple openings 1880a in different configurations. The multiple openings 1880a may have a different number of openings. Each opening may have the same or similar size and / or shape. However, in some configurations, one or more openings may have different sizes and / or shapes. The multiple openings 1880a may have different arrangements, such as different array sizes.

[0045]

[0067] Stage 3 shows the state after multiple metal layers 1808 have been provided, and each metal layer contains multiple openings. In this example, the multiple metal layers 1808 include metal layer 1808a, metal layer 1808b, metal layer 1808c, metal layer 1808d, metal layer 1808e, and metal layer 1808f. The multiple metal layers 1808 may be laminated metal layers. The metal layers of the multiple metal layers 1808 may all be made of the same material or may contain different materials. For example, the first metal layer may contain the first material, the second metal layer may contain the second material, and the third metal layer may contain the third material.

[0046]

[0068] Stage 4 shows the state after the thermal interface material 1810 has been provided and bonded to the multiple metal layers 1808. The thermal interface material may be provided within multiple openings 1880 of the multiple metal layers 1808. The multiple metal layers 1808 and the thermal interface material 1810 can be pressed and / or compressed. Different materials may be used for the thermal interface material 1810 in different implementation configurations.

[0047]

[0069] Step 5 shows how the multiple metal layers 1808, specifically metal layer 1808b, metal layer 1808c, metal layer 1808d, and metal layer 1808e, can be cut together with the thermal interface material 1810.

[0048]

[0070] Step 6 shows a shield metal layer 408 containing a plurality of openings 480 and a thermal interface material 410. The shield metal layer 408 may be formed from metal layers 1808b, 1808c, 1808d, and 1808e. The thermal interface material 410 may be derived from the thermal interface material 1810.

[0049] Exemplary sequence for fabricating a shield metal layer with several openings filled with thermal interface material

[0071] Figure 19 shows an exemplary sequence for providing or fabricating a shield metal layer having multiple openings and thermal interface material. In some implementations, the sequence in Figure 19 may be used to provide or fabricate the shield metal layer 408 and the thermal interface material 410. However, the sequence in Figure 19 may be used to fabricate any of the shield metal layers and / or shield layers described herein.

[0050]

[0072] It should be noted that the sequence in Figure 19 may be a combination of one or more steps to simplify and / or clarify the sequence for providing or fabricating the shielding metal layer and the thermal conductive material. In some implementations, the order of the process may be changed or modified. In some implementations, one or more of the processes may be replaced or substituted without departing from the spirit of this disclosure.

[0051]

[0073] As shown in Figure 19, Stage 1 shows the state after the metal layer 1908 has been provided. Different materials may be used for the metal layer 1908 in different configurations. The metal layer 1908 contains a plurality of openings 1980. A laser drilling process may be used to form the plurality of openings 1980. However, different processes may be used to form the plurality of openings 1980 in different configurations. The plurality of openings 1980 may have a different number of openings. Each opening may have the same or similar size and / or shape. However, in some configurations, one or more openings may have different sizes and / or shapes. The plurality of openings 1980 may have different arrangements, such as different array sizes. The plurality of openings 1980 may consist of several groups of multiple openings.

[0052]

[0074] Stage 2 shows the state after the thermal interface material 1910 has been provided and bonded to the metal layer 1908. The thermal interface material may be provided within a plurality of openings 1980 in the metal layer 1908. The thermal interface material 1910 may be injected into the plurality of openings 1980. Different materials may be used for the thermal interface material 1910 in different implementation configurations. The thermal interface material 1910 is thicker than the thickness of the metal layer 1908. Part of the thermal interface material 1910 is located below the metal layer 1908, part of the thermal interface material 1910 is located within a plurality of openings 1980 in the metal layer 1908, and part of the thermal interface material 1910 is located above the metal layer 1908.

[0053]

[0075] Stage 3 shows the state after the thermal interface material 1910 has been provided and bonded to the other openings of the metal layer 1908 in the same manner as described in Stage 2 of Figure 19.

[0054]

[0076] Stage 4 shows the state after the metal layer 1908 has been cut to form individual shield metal layers (e.g., shield metal layer 408), each containing a plurality of openings 480 and thermal interface material 410.

[0055] Exemplary sequence for fabricating a shield metal layer with several openings filled with thermal interface material

[0077] Figure 20 shows an exemplary sequence for providing or fabricating a shield metal layer having multiple openings and thermal interface material. In some implementations, the sequence in Figure 20 may be used to provide or fabricate the shield metal layer 408 and the thermal interface material 410. However, the sequence in Figure 20 may be used to fabricate any of the shield metal layers and / or shield layers described herein.

[0056]

[0078] It should be noted that the sequence in Figure 20 may be a combination of one or more steps to simplify and / or clarify the sequence for providing or fabricating the shielding metal layer and the thermal conductive material. In some implementations, the order of the process may be changed or modified. In some implementations, one or more of the processes may be replaced or substituted without departing from the spirit of this disclosure.

[0057]

[0079] As shown in Figure 20, Stage 1 shows the state after the metal layer 2008 has been provided. Different materials may be used for the metal layer 2008 in different configurations. The metal layer 2008 contains multiple openings 2080. A laser drilling process may be used to form the multiple openings 2080. However, different processes may be used to form the multiple openings 2080 in different configurations. The multiple openings 2080 may have a different number of openings. Each opening may have the same or similar size and / or shape. However, in some configurations, one or more openings may have different sizes and / or shapes. The multiple openings 2080 may have different arrangements, such as different array sizes. The multiple openings 2080 may consist of several groups of multiple openings.

[0058]

[0080] Stage 2 shows the state after the thermal interface material 2010 has been provided and bonded to the metal layer 2008. The thermal interface material may be provided in multiple openings 2080 and in other openings of a group of multiple openings. The thermal interface material 2010 may be injected into the multiple openings 2080. Different materials may be used for the thermal interface material 2010 in different implementation configurations.

[0059]

[0081] Stage 3 shows the state after the thermal interface material 2010 is further provided and bonded to the metal layer 2008, where the footprint of the thermal interface material 2010 is larger on one side of the metal layer 2008 than the footprint of the thermal interface material 2010 on the other side of the metal layer 2008.

[0060]

[0082] Step 4 shows the state after the metal layer 2008 has been cut to form individual shield metal layers 408 containing multiple openings 480 and thermal interface material 410. Step 4 shows that the footprint of the thermal interface material 410 is larger on one side of the shield metal layer 408 (e.g., the first side, upper side) than on the other side of the shield metal layer 408 (e.g., the second side, lower side).

[0061] Exemplary flowchart of a method for providing an assembly comprising an integrated device and a shielding metal layer having several openings filled with thermal interface material.

[0083] Figure 21 shows an exemplary flowchart of Method 2100 for providing an assembly comprising an integrated device, a shielding metal layer having an opening, and a thermal interface. In some implementation configurations, the assembly 300 may be fabricated using Method 2100 of Figure 21. However, Method 2100 may be used to fabricate any of the assemblies described herein and / or any of the shielding layers described herein.

[0062]

[0084] It should be noted that Method 2100 in Figure 21 may combine one or more processes to simplify and / or clarify the method for fabricating the thermal conductive layer. In some implementations, the order of the processes may be changed or modified.

[0063]

[0085] This method involves providing a metal layer (in 2105). Step 1 in Figure 18 illustrates and describes an example of a provided metal layer 1808a. The metal layer 1808a may have different shapes. Different materials may be used for the metal layer 1808a in different mounting configurations. In some mounting configurations, providing a metal layer may include providing a flexible metal foil layer. In some mounting configurations, providing a metal layer may include providing a first shield layer having a first surface and a second surface.

[0064]

[0086] In this method, multiple openings are formed in the metal layer (in 2110). Step 2 in Figure 18 shows and illustrates an example of multiple openings 1880a formed in the metal layer 1808a. A laser drilling process may be used to form the multiple openings 1880a. However, different processes may be used to form the multiple openings 1880a in different mounting configurations. The multiple openings 1880a may have a different number of openings. Each opening may have the same or similar size and / or shape. However, in some mounting configurations, one or more openings may have different sizes and / or shapes. The multiple openings 1880a may have different arrangements, such as different array sizes.

[0065]

[0087] This method forms a stack of metal layers having multiple openings (in 2115). Step 3 of Figure 18 illustrates and describes an example of the multiple metal layers 1808 provided, each metal layer containing multiple openings. In this example, the multiple metal layers 1808 include metal layer 1808a, metal layer 1808b, metal layer 1808c, metal layer 1808d, metal layer 1808e, and metal layer 1808f. The metal layers of the multiple metal layers 1808 may all be made of the same material or may contain different materials. For example, the first metal layer may contain a first material, the second metal layer may contain a second material, and the third metal layer may contain a third material.

[0066]

[0088] This method also involves providing and / or bonding a thermal interface material to stacked metal layers (in 2115). Step 4 in Figure 18 shows and illustrates a thermal interface material 1810 provided and bonded to multiple metal layers 1808. The thermal interface material may be provided within multiple openings of the multiple metal layers 1808. The multiple metal layers 1808 and the thermal interface material 1810 can be pressed and / or compressed. Different materials may be used for the thermal interface material 1810 in different implementation configurations.

[0067]

[0089] This method involves cutting and / or shaping a metal layer (in 2120) to form a shield metal layer having openings and thermal interface material. Steps 5 and 6 in Figure 18 illustrate how a metal layer(s) can be cut to form a shield metal layer. Steps 4 in Figure 19 and 20 also illustrate how a metal layer(s) can be cut to form a shield metal layer.

[0068]

[0090] Once one or more shield metal layers are provided and / or fabricated, the method bonds the shield layers to a shield frame (e.g., 306) (in 2125) such that multiple openings are positioned on the integrated device and the thermal interface material is bonded to the integrated device. Thus, the method can bond the shield metal layers and the thermal interface material to the integrated device (in 2125) such that the thermal interface material is bonded to the integrated device. The thermal interface material may be bonded to the back side of the integrated device. The integrated device and the shield frame may be bonded to a substrate (e.g., a printed circuit board).

[0069]

[0091] This method (in 2130) forms an assembly comprising an integrated device, a shielding metal layer, a thermal interface material, and a frame. As an example, the thermal interface material may be coupled to and in contact with the integrated device and the frame (e.g., a mid-frame). The frame may include a heat sink and / or heat pipes. Thus, the thermal interface material may be coupled to the heat sink and / or heat pipes.

[0070] Exemplary electronic devices

[0092] Figure 22 shows various electronic devices that can be integrated with any of the aforementioned devices, integrated devices, integrated circuit (IC) packages, integrated circuit (IC) devices, semiconductor devices, integrated circuits, dies, interposers, packages, package-on-package (PoP), system in package (SiP), or system on chip (SoC). For example, a mobile phone device 2202, a laptop computer device 2204, a stationary terminal device 2206, a wearable device 2208, or a motor vehicle 2210 may include the device 2200 described herein. The device 2200 may be, for example, any of the devices and / or integrated circuit (IC) packages described herein. The devices 2202, 2204, 2206, and 2208 and the vehicle 2210 shown in Figure 22 are merely examples. Device 2200 may also feature a group of devices (e.g., electronic devices) including, but not limited to, mobile devices, handheld personal communication systems (PCS) units, portable data units such as personal information terminals, global positioning system (GPS) devices, navigation devices, set-top boxes, music players, video players, entertainment units, stationary data units such as meter reading devices, communication devices, smartphones, tablet computers, computers, wearable devices (e.g., watches, glasses), Internet of Things (IoT) devices, servers, routers, electronic devices implemented in automobiles (e.g., autonomous vehicles), or any other devices that store or retrieve data or computer instructions, or any combination thereof.

[0071]

[0093] One or more of the components, processes, features, and / or functions shown in Figures 1-8, 12-14, and / or 18-22 may be reconfigured and / or combined into a single component, process, feature, or function, or may be embodied in several components, processes, or functions. Additional elements, components, processes, and / or functions may also be added without departing from this disclosure. It should also be noted that Figures 1-8, 12-14, and / or 18-22, and their corresponding descriptions in this disclosure, are not limited to dies and / or ICs. In some implementation configurations, devices and / or integrated devices may be manufactured, fabricated, provided, and / or produced using Figures 1-8, 12-14, and / or 18-22, and their corresponding descriptions. In some implementations, a device may include a die, an integrated device, an integrated passive device (IPD), a die package, an integrated circuit (IC) device, a device package, an integrated circuit (IC) package, a wafer, a semiconductor device, a package-on-package (PoP) device, a heat dissipation device, and / or an interposer.

[0072]

[0094] It should be noted that the figures in this disclosure may represent actual and / or conceptual representations of various parts, components, objects, devices, packages, integrated devices, integrated circuits, and / or transistors. In some cases, the figures may not be to exact scale. In some cases, not all components and / or parts may be shown for clarity. In some cases, the position, location, size, and / or shape of various parts and / or components in the figures may be illustrative. In some implementations, various components and / or parts in the figures may be optional.

[0073]

[0095] The term “exemplary” is used herein to mean “serving as an example, case, or illustration.” No implementation or aspect described herein as “exemplary” should necessarily be construed as being preferable or advantageous to any other aspect of the Disclosure. Similarly, the term “aspect” does not require that all aspects of the Disclosure include the features, advantages, or modes of operation described herein. The term “coupled” is used herein to mean a direct or indirect coupling (e.g., mechanical coupling) between two objects. For example, if object A is in physical contact with object B, and object B is in contact with object C, then objects A and C may still be considered coupled to each other, even if they are not in direct physical contact with each other. The term “electrically coupled” may mean that two objects are directly or indirectly coupled together such that an electric current (e.g., signal, power, ground) can propagate between them. Two electrically coupled objects may or may not propagate an electric current between them. Electromagnetic coupling can mean that a signal from one circuit and / or component affects a signal from another circuit and / or component. Electromagnetic coupling can cause crosstalk. Electromagnetic coupling can be a form of signal coupling. The use of the terms “first,” “second,” “third,” and “fourth” (and / or above fourth) is arbitrary. Any of the components described may be the first, second, third, or fourth component. For example, a component referred to as the second component may also be the first, second, third, or fourth component. The terms “top” and “bottom” are arbitrary. A component located at the top may be located above a component located at the bottom.An upper component may be considered a lower component, and vice versa. As described in this disclosure, a first component positioned "over" a second component may mean that the first component is positioned above or below the second component, depending on how the bottom or top is arbitrarily defined. In another example, a first component may be positioned above (e.g., above) a first face of a second component, and a third component may be positioned above (e.g., below) a second face of a second component, in which case the second face is opposite to the first face. It should be further noted that, in the context of one component being positioned above another, the term “on” as used in this application may be used to mean a component that is on and / or inside another component (e.g., on the surface of the component or embedded within the component). Therefore, for example, a first component on a second component may mean (1) the first component is on the second component but is not in direct contact with the second component, (2) the first component is on the second component (e.g., on the surface of the second component), and / or (3) the first component is inside the second component (e.g., embedded within the second component). The term "encapsulating" means that one object can partially or completely enclose another object. The term "surrounding" means that one object can partially or completely surround another object. The term "extending through" means that one object can partially or completely extend through another object.It should be further noted that, in the context of one component being positioned on another component, the term “on” as used in this application may be used to mean a component that is on and / or inside another component (e.g., on the surface of the component or embedded within the component). Thus, for example, a first component on a second component may mean (1) the first component is on the second component but not in direct contact with the second component, (2) the first component is on the second component (e.g., on the surface of the second component), and / or (3) the first component is inside the second component (e.g., embedded within the second component). A first component positioned “in” a second component may be partially positioned within the second component or fully positioned within the second component. The terms “about ‘value X’” or “approximately value X” as used in this disclosure mean within a range of 10 percent of “value X.” For example, a value of "approximately 1" or "about 1" means a value in the range of 0.9 to 1.1. "Multiple" components can include all possible components, or only some of all possible components. For example, if a device contains 10 components, the term "multiple components" could refer to all 10 components, or only some of the 10 components.

[0074]

[0096] In some implementations, an interconnect is an element or component of a device or package that enables or facilitates an electrical connection between two points, elements, and / or components. In some implementations, an interconnect may include traces, vias, pads, pillars, redistribution metal layers, and / or underbump metallization (UBM) layers. An interconnect may include one or more metal components (e.g., seed layer + metal layer). In some implementations, an interconnect may include conductive material that can be configured to provide electrical paths for signals (e.g., data signals), ground, and / or power. An interconnect may be part of a circuit. An interconnect may include two or more elements or components. An interconnect may be defined by one or more interconnects. Different implementations may use different processes and / or sequences to form an interconnect. In some implementations, chemical vapor deposition (CVD), physical vapor deposition (PVD), sputtering, spray coating, and / or plating processes may be used to form interconnects.

[0075]

[0097] Furthermore, note that various disclosures contained herein may be described as processes shown as flowcharts, flow diagrams, structural diagrams, or block diagrams. While flowcharts can describe operations as sequential processes, many of these operations can also be performed in parallel or simultaneously. Moreover, the order of operations may be rearranged. A process terminates when its operations are completed.

[0076]

[0098] Further embodiments are described below to facilitate understanding of this disclosure.

[0077]

[0099] Embodiment 1: A device comprising a substrate, an integrated device bonded to the substrate, a shield frame bonded to the substrate, a shield layer bonded to the shield frame, the shield layer comprising a first surface, a second surface, and a plurality of openings, and (i) a thermal interface material bonded to the integrated device and (ii) the shield layer, A device comprising: The thermal interface material is located within multiple openings in the shield layer. The thermal interface material is in contact with the integrated device, a first surface of the shield layer, and a second surface of the shield layer.

[0078]

[0100] Embodiment 2: The device according to Embodiment 1, further comprising a frame, wherein a thermal interface material is bonded to and in contact with the frame.

[0079]

[0101] Embodiment 3: The device according to Embodiments 1 to 2, wherein a plurality of openings are arranged on top of an integrated device.

[0080]

[0102] Embodiment 4: The device according to Embodiments 1 to 3, wherein each of the multiple openings has a width of approximately 2 millimeters or less.

[0081]

[0103] Embodiment 5: The device according to Embodiments 1 to 4, wherein a plurality of openings include a first opening having a first width, and a plurality of openings include a second opening having a second width.

[0082]

[0104] Embodiment 6: The device according to Embodiments 1 to 5, wherein a plurality of openings include a first opening having a first shape, and a plurality of openings include a second opening having a second shape.

[0083]

[0105] Embodiment 7: The device according to embodiments 1 to 6, wherein a plurality of openings are arranged in rows and / or columns of openings.

[0084]

[0106] Embodiment 8: The device according to Embodiments 1 to 7, wherein the thermal interface material includes thermal grease, thermal gel, thermal putty, thermal pad, and / or thermal tape.

[0085]

[0107] Embodiment 9: The device according to Embodiments 1 to 8, wherein the shielding layer is configured as an electromagnetic interference (EMI) shield.

[0086]

[0108] Embodiment 10: The device according to Embodiments 1 to 9, wherein the shielding layer comprises a plurality of laminated metal layers.

[0087]

[0109] Embodiment 11: The device according to Embodiments 1 to 10, wherein the shield layer comprises a first metal layer and a second metal layer, the first metal layer comprising a first material, and the second metal layer comprising a second material different from the first material.

[0088]

[0110] Embodiment 12: The device according to Embodiments 1 to 11, wherein the shielding layer includes a plurality of metal foils.

[0089]

[0111] Embodiment 13: The device according to embodiments 1 to 12, wherein the shield layer is bonded to the shield frame via an adhesive.

[0090]

[0112] Embodiment 14: The device according to Embodiments 1 to 13, wherein the thermal interface material comprises a first material and a second material, the first material of the thermal interface material contacts a first surface of the shield layer, and the second material of the thermal interface material contacts a second surface of the shield layer.

[0091]

[0113] Embodiment 15: The device according to embodiments 1 to 14, further comprising a second integrated device bonded to a substrate, and a second thermal interface material bonded to the second integrated device and a shield layer. The shield layer further includes a second plurality of openings disposed on the second integrated device. The second thermal interface material is disposed within the second plurality of openings of the shield layer. The second thermal interface material is in contact with the second integrated device, a first surface of the layer, and a second surface of the shield layer.

[0092]

[0114] Embodiment 16: The device according to Embodiment 15, further comprising a frame, wherein a thermal interface material and a second thermal interface material are coupled to and in contact with the frame.

[0093]

[0115] Embodiment 17: A second integrated device bonded to a substrate; a second shielding layer comprising a first surface, a second surface, and a second plurality of openings, the second shielding layer having a second plurality of openings disposed on the second integrated device; and a second thermal interface material bonded to the second integrated device and the second shielding layer. The device according to embodiments 1 to 14, further comprising: a second thermal interface material disposed within a second plurality of openings in the second shield layer; the second thermal interface material in contact with the second integrated device, a first surface of the second shield layer, and a second surface of the shield layer.

[0094]

[0116] Embodiment 18: The device according to embodiments 15 to 17, wherein the first integrated device includes a first chiplet fabricated using a first technology node, and the second integrated device includes a second chiplet fabricated using a second technology node.

[0095]

[0117] Embodiment 19: The device according to Embodiments 1 to 18, wherein the device is selected from the group consisting of music players, video players, entertainment units, navigation devices, communication devices, mobile devices, cell phones, smartphones, personal digital assistants, stationary terminals, tablet computers, computers, wearable devices, laptop computers, servers, Internet of Things (IoT) devices, and devices in automobile vehicles.

[0096]

[0118] Embodiment 20: Method for providing a first shield layer including a first surface and a second surface. The method involves forming a first plurality of openings in the first shield layer. The method involves bonding the first thermal interface material to the first shield layer such that the first thermal interface material is placed within the first plurality of openings in the first shield layer and is in contact with (i) a first surface of the first shield layer and (ii) a second surface of the first shield layer. The method involves bonding the first shield layer to a shield frame such that the first plurality of openings are located on an integrated device, and the first thermal interface material is bonded to the integrated device.

[0097]

[0119] Embodiment 21: Providing a second shield layer including a first surface and a second surface; forming a second plurality of openings in the second shield layer; and bonding the second thermal interface material to the second shield layer such that the second thermal interface material is placed within the second plurality of openings in the second shield layer and is in contact with (i) the first surface of the second shield layer and (ii) the second surface of the second shield layer. The method according to embodiment 20, further comprising the following:

[0098]

[0120] Embodiment 22: The method according to Embodiment 21, further comprising (i) bonding a second shield layer and a second thermal interface material to (ii) a first shield layer and a first thermal interface material in order to form a shield layer.

[0099]

[0121] Embodiment 23: The method according to Embodiments 21 to 22, wherein the first shield layer comprises a different material from the second shield layer.

[0100]

[0122] Embodiment 24: The method according to Embodiments 21 to 23, wherein the first thermal interface material includes a material different from the second thermal interface material.

[0101]

[0123] Embodiment 25: The method according to embodiments 20 to 24, further comprising providing a frame such that the first thermal interface material is in contact with the frame.

[0102]

[0124] Embodiment 26: Method for providing a first shield layer including a first surface and a second surface. The first shield layer includes a first plurality of openings. The first thermal interface material is bonded to the first shield layer such that it is positioned within the first plurality of openings of the first shield layer and in contact with (i) a first surface of the first shield layer and (ii) a second surface of the first shield layer. The first shield layer can form a shield layer. The method involves bonding the first shield layer to a shield frame such that the first plurality of openings are positioned on an integrated device, and the first thermal interface material is bonded to the integrated device.

[0103]

[0125] Embodiment 27: The method according to Embodiment 26, further comprising providing a frame such that the first thermal interface material is in contact with the frame.

[0104]

[0126] Embodiment 28: The method according to Embodiments 26-27, wherein the shield frame is bonded to a first surface of the substrate and the integrated device is bonded to the first surface of the substrate.

[0105]

[0127] Various features of the Disclosure described herein can be implemented in various systems without departing from the Disclosure. It should be noted that the above-described aspects of the Disclosure are merely examples and should not be construed as limiting the Disclosure. The descriptions of the aspects of the Disclosure are intended to be illustrative and not to limit the claims. Therefore, the teachings can be readily applied to other types of devices, and many alternative, modified, and variant forms will be apparent to those skilled in the art.

Claims

1. circuit board and An integrated device coupled to the substrate, A shield frame coupled to the substrate, A shield layer coupled to the shield frame, comprising a first surface, a second surface, and a plurality of openings, (i) the integrated device and (ii) a thermal interface material bonded to the shield layer, Equipped with, The thermal interface material is placed within the plurality of openings in the shield layer, The thermal interface material contacts the integrated device, the first surface of the shield layer, and the second surface of the shield layer. device.

2. The device according to claim 1, further comprising a frame, wherein the thermal interface material is coupled to the frame and in contact with the frame.

3. The device according to claim 1, wherein the plurality of openings are arranged on the integrated device.

4. The device according to claim 1, wherein each of the plurality of openings has a width of about 2 millimeters or less.

5. The plurality of openings include a first opening having a first width, The plurality of openings include a second opening having a second width, The device according to claim 1.

6. The plurality of openings include a first opening having a first shape, The plurality of openings include a second opening having a second shape, The device according to claim 1.

7. The device according to claim 1, wherein the plurality of openings are arranged in rows and / or columns of openings.

8. The device according to claim 1, wherein the thermal interface material includes thermal grease, thermal gel, thermal putty, thermal pad, and / or thermal tape.

9. The device according to claim 1, wherein the shielding layer is configured as an electromagnetic interference (EMI) shield.

10. The device according to claim 1, wherein the shield layer comprises a plurality of laminated metal layers.

11. The shield layer includes a first metal layer and a second metal layer, The first metal layer comprises the first material, The second metal layer comprises a second material different from the first material. The device according to claim 1.

12. The device according to claim 1, wherein the shielding layer includes a plurality of metal foils.

13. The device according to claim 1, wherein the shield layer is bonded to the shield frame via an adhesive.

14. The thermal interface material comprises a first material and a second material. The first material of the thermal interface material is in contact with the first surface of the shield layer, The second material of the thermal interface material contacts the second surface of the shield layer. The device according to claim 1.

15. A second integrated device coupled to the substrate, The second integrated device and the second thermal interface material bonded to the shield layer, Furthermore, The shield layer further includes a second plurality of openings disposed on the second integrated device, The second thermal interface material is placed within the second plurality of openings in the shield layer, The second thermal interface material is in contact with the second integrated device, the first surface of the layer, and the second surface of the shield layer. The device according to claim 1.

16. The device according to claim 15, further comprising a frame, wherein the thermal interface material and the second thermal interface material are coupled to the frame and in contact with the frame.

17. A second integrated device coupled to the substrate, A second shielding layer comprising a first surface, a second surface, and a second plurality of openings, disposed on the second integrated device, the second shielding layer including the second plurality of openings, The second integrated device and the second shield layer are coupled to a second thermal interface material, Furthermore, The second thermal interface material is placed within the second plurality of openings in the second shield layer, The second thermal interface material is in contact with the second integrated device, the first surface of the second shield layer, and the second surface of the shield layer. The device according to claim 1.

18. The first integrated device includes a first chiplet fabricated using a first technology node, The second integrated device includes a second chiplet fabricated using a second technology node, The device according to claim 17.

19. The device according to claim 1, wherein the device is selected from the group consisting of music players, video players, entertainment units, navigation devices, communication devices, mobile devices, mobile phones, smartphones, personal digital assistants, stationary terminals, tablet computers, computers, wearable devices, laptop computers, servers, Internet of Things (IoT) devices, and devices in automobile vehicles.

20. A first shield layer is provided, which includes a first surface and a second surface. Forming a first set of openings in the first shield layer, The first thermal interface material is arranged within the first plurality of openings of the first shield layer and bonded to the first shield layer such that it is in contact with (i) the first surface of the first shield layer and (ii) the second surface of the first shield layer. The first shield layer is coupled to the shield frame such that the first plurality of openings are arranged on the integrated device, The first thermal interface material is coupled to the integrated device, method.

21. A second shield layer is provided, which includes a first surface and a second surface. The second shield layer is formed with a second set of openings, The second thermal interface material is arranged within the second plurality of openings of the second shield layer and bonded to the second shield layer such that (i) it is in contact with the first surface of the second shield layer and (ii) it is in contact with the second surface of the second shield layer. The method according to claim 20, further comprising:

22. In order to form a shield layer, (i) the second shield layer and the second thermal interface material are bonded together, and (ii) the first shield layer and the first thermal interface material are bonded together. The method according to claim 21, further comprising:

23. The method according to claim 21, wherein the first shield layer comprises a material different from that of the second shield layer.

24. The method according to claim 21, wherein the first thermal interface material includes a material different from the second thermal interface material.

25. The method according to claim 20, further comprising providing the frame such that the first thermal interface material is in contact with the frame.

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