Solar cells and their manufacturing methods, power consumption equipment

Abstract

This application provides a solar cell, a method for manufacturing the same, and a power consuming device, wherein the solar cell comprises a substrate, a conductive layer, a gate wire layer, a perovskite functional layer, and an electrode layer, the conductive layer having conductive portions and a first gap between the conductive portions, the gate wire layer comprising a plurality of gate wires, the perovskite functional layer comprising functional portions and a second gap between the functional portions, each gate wire located between adjacent first and second gaps, and the electrode layer comprising a plurality of electrodes, the electrodes being electrically connected to the gate wires.

Description

[Technical Field]

[0001] This application relates to the field of solar cell technology, and more specifically to solar cells, methods for manufacturing the same, and power consumption equipment.

[0002] (Cross-reference of related applications) This application claims priority to a Chinese patent application, proposed on June 20, 2023, with application number 202310737462.0, and titled "Solar Cell, Method for Manufacturing the Same, and Power Consumption Device," and all provisions of that application are incorporated into this application by invocation. [Background technology]

[0003] Perovskite solar cells are batteries that use perovskite material as the light-absorbing layer material. Perovskite materials have significant performance advantages such as a high light absorption coefficient, carrier transport rate, and a direct and controllable optical bandgap, so perovskite solar cells have attracted widespread attention and are developing rapidly. However, in conventional perovskite solar cells, multiple sub-batteries are formed within the solar cell by laser scribing, and channels are formed in the perovskite functional layer by laser scribing, and conductive material is placed in the channels to realize series connection within the solar cell, which makes the manufacturing process of perovskite solar cells complex.

[0004] Therefore, proposing solar cells with a simple manufacturing process is a problem that urgently needs to be resolved. [Overview of the Initiative]

[0005] The technical problems that this application aims to solve are as follows:

[0006] This application has been filed in view of the above-mentioned technical problems, and its purpose is to provide a solar cell with a simple manufacturing process, a method for manufacturing the same, and a power consumption device.

[0007] The following are technical solutions to the technical problems.

[0008] To achieve the above objective, this application provides a solar cell, a method for manufacturing the same, and a power consumption device.

[0009] A first aspect of this application provides a solar cell comprising a substrate, a conductive layer placed on the substrate and having a plurality of conductive parts, wherein the conductive layer has a first gap between the conductive parts, a gate line layer placed on the conductive layer and including a plurality of gate lines, wherein the gate lines are placed on the conductive parts, a perovskite functional layer placed on the conductive layer and the gate line layer and including a plurality of functional parts, wherein the functional parts have a second gap between the functional parts, each functional part is placed on two adjacent conductive parts, and each gate line is located between an adjacent first gap and a second gap, a perovskite functional layer, and an electrode layer placed on the perovskite functional layer and including a plurality of electrodes, wherein the electrodes have a second gap between the electrodes, and the electrodes are electrically connected to the gate lines.

[0010] In the invention of this application, a gate wire layer is placed between the conductive layer and the perovskite functional layer. The conductive layer has multiple conductive parts, the gate wire layer includes multiple gate wires, the gate wires are placed in the conductive parts, the perovskite functional layer includes multiple functional parts, the electrode layer includes multiple electrodes, there is a second gap between each functional part and the electrode placed thereon and adjacent functional parts and electrodes placed thereon, each functional part is placed in two adjacent conductive parts, and each gate wire is located between adjacent first and second gaps. The electrical connection between the electrodes and the gate wires realizes a series connection within the solar cell. Furthermore, there is a second gap between each functional part and the electrode placed thereon and adjacent functional parts and electrodes placed thereon. This means that in the manufacturing process, a one-step scribing method can be adopted to penetrate the perovskite functional layer and the electrode layer, thus simplifying the manufacturing process of the perovskite solar cell.

[0011] In some embodiments, the gate wire includes a gate wire body, the gate wire body having a first extension and / or a second extension at its end; the functional part covers the gate wire body, the first extension and / or the second extension are exposed from the functional part; and the electrode includes a diffuser, the diffuser having a first electrical connection and / or a second electrical connection at its end; the diffuser is installed in the functional part, the first electrical connection is electrically connected to the first extension, and / or the second electrical connection is electrically connected to the second extension.

[0012] In the invention of this application, by exposing the first extension and / or the second extension from the functional part, the first extension is made electrically connected to the first electrical connection part and / or the second extension is made electrically connected to the second electrical connection part, thereby realizing an electrical connection between the gate wire and the electrode.

[0013] In some embodiments, the substrate includes a first region, a second region, and a third region, the second region being located between the first and third regions, and the conductive layer being placed in the second region.

[0014] In the invention of this application, by placing the conductive layer in the second region, it is not necessary to place the conductive layer in the first and third regions, thereby reducing the probability of short-circuit problems occurring in the first and third regions of each conductive part of the conductive layer and increasing the stability of the solar cell.

[0015] In some embodiments, the first extension and the first electrical connection are located in a first region, the first extension is mounted on a substrate, and the first electrical connection is mounted on the first extension, or on the first extension and the substrate.

[0016] In the embodiment of this application, by installing the first extension on a substrate, the first extension is electrically connected to the first electrical connection portion, forming a current path in the solar cell.

[0017] In some embodiments, the second extension and the second electrical connection are located in a third region, the second extension is mounted on a substrate, and the second electrical connection is mounted on the second extension, or on both the second extension and the substrate.

[0018] In the embodiment of this application, by installing the second extension on a substrate, the second extension is electrically connected to the second electrical connection portion, forming a current path in the solar cell.

[0019] In some embodiments, the substrate includes a first region, a second region, and a third region, the second region being located between the first and third regions, a conductive layer being placed in the second region and further placed in the first and / or third regions, the conductive layers of the first and third regions being insulated from the conductive layer of the second region, the conductive layers of the first and third regions having a plurality of conductive branches, the conductive branches corresponding to conductive parts, and the conductive branches being insulated from each other.

[0020] In the invention of this application, the conductive layer is installed in a second region and further installed in a first region and / or a third region, and the conductive layers in the first and third regions are insulated from the conductive layer in the second region, thereby eliminating the process of peeling off the conductive layer located in the first region and the conductive layer located in the second region, saving production time and improving production efficiency.

[0021] In some embodiments, the first extension and the first electrical connection are located in a first region, the first extension is installed in one conductive branch, and the first electrical connection is installed in the first extension and / or the conductive branch in which the first extension is located.

[0022] In the invention of this application, by installing the first extension on a single conductive branch, the conductive branch is insulated from the conductive layer of the second region, and the area between the conductive branches is also insulated. Therefore, by installing the first electrical connection on the first extension and / or the conductive branch on which the first extension is located, short circuits do not occur, and the stability of the solar cell is increased.

[0023] In some embodiments, the second extension and the second electrical connection are located in a third region. The second extension is disposed on one conductive branch, and the second electrical connection is disposed on the second extension and / or the conductive branch where the second extension is located.

[0024] In the technical solution of the embodiments of the present application, by disposing the second extension on one conductive branch, the conductive branch is insulated from the conductive layer in the second region, and the space between the conductive branches is insulated. Therefore, by disposing the second electrical connection on the second extension and / or the conductive branch where the second extension is located, no short-circuit phenomenon occurs, and the stability of the solar cell is increased.

[0025] In some embodiments, the thickness of the gate line is 40 nm or more, and optionally 40 - 80 nm.

[0026] In the technical solution of the embodiments of the present application, when the thickness of the gate line is within the above range, the solar cell has a relatively high photoelectric conversion rate.

[0027] The second aspect of the present application provides a method for manufacturing a solar cell. The manufacturing method includes: providing a substrate; installing a conductive layer on the substrate, the conductive layer having a plurality of conductive parts and having a first gap between the conductive parts; installing a gate line layer on the conductive layer, the gate line layer including a plurality of gate lines, and the gate lines being disposed on the conductive parts; installing a perovskite functional layer on the conductive layer and the gate line layer; The steps include: placing an electrode layer on a perovskite functional layer, forming a second gap through the electrode layer and the perovskite functional layer, wherein the perovskite functional layer includes a plurality of functional parts, with a second gap between the functional parts, each functional part being placed on two adjacent conductive parts, each gate wire being located between an adjacent first gap and a second gap, the electrode layer including a plurality of electrodes, with a second gap between the electrodes, and the electrodes being electrically connected to the gate wires.

[0028] In the technical invention of the embodiment of this application, the step of placing a conductive layer on a substrate includes the step of performing a first scribing on a first preform layer for forming the conductive layer to form a plurality of conductive portions, having a first gap between the conductive portions.

[0029] In the invention of this application, a plurality of conductive parts are formed by performing a first scribing on a first preform layer for forming a conductive layer, and the adjacent conductive parts are separated by a first gap.

[0030] In the invention of this application, the steps of placing a perovskite functional layer on a conductive layer and a gate wire layer, placing an electrode layer on the perovskite functional layer, and forming a second gap through the electrode layer and the perovskite functional layer include sequentially placing a second preform layer for forming the perovskite functional layer and a third preform layer for forming the electrode layer on the conductive layer and the gate wire layer, performing a second scribing on the second and third preform layers, and forming a second gap through the third and second preform layers.

[0031] In the invention of this application, a second gap is formed between the third and second preform layers by performing a second scribing on a second preform layer for forming a perovskite functional layer and a third preform layer for forming an electrode layer. This means that the perovskite functional layer and the electrode layer can be penetrated using a one-step scribing method during the manufacturing process, thus simplifying the solar cell manufacturing process.

[0032] In the invention of this application, a plurality of conductive parts are formed that are sequentially isolated in the conductive layer by a first gap, and a gate wire is installed in the conductive part. The gate wire is electrically connected to the electrode, forming a current path in the solar cell and realizing the conversion of light energy to electrical energy. Since the gate wire does not come into contact with the perovskite layer, the stability of the solar cell is increased.

[0033] A third aspect of this application provides a power-consuming device, which includes a solar cell as described above or a solar cell manufactured by the method for manufacturing a solar cell as described above. [Brief explanation of the drawing]

[0034] In drawings, the drawings are not drawn to the actual scale. [Figure 1] This is a top view of some of the structures of a solar cell according to several embodiments of this application. [Figure 2] This is a cross-sectional view of some of the structures of solar cells according to several embodiments of this application. [Figure 3] This is a top view of some of the structures of a solar cell according to several embodiments of this application. [Figure 4] This is a top view of some of the structures of a solar cell in some other embodiments of this application. [Figure 5] This is a cross-sectional view of some of the structures of solar cells according to several embodiments of this application. [Figure 6] This is a top view of some of the structures of a solar cell according to several embodiments of this application. [Figure 7] This is a cross-sectional view of some of the structures of solar cells according to several embodiments of this application. [Figure 8] This is a top view of the overall structure of several embodiments of the solar cell described in this application. [Figure 9] This is a cross-sectional view of the overall structure of several embodiments of the present application. [Figure 10] This is a schematic diagram of the structure of some embodiments of power consumption devices in this application. [Modes for carrying out the invention]

[0035] The following describes in detail embodiments of the solar cell, its manufacturing method, and power consumption equipment disclosed in this application, with appropriate reference to the drawings. However, unnecessary detailed explanations may be omitted. For example, detailed explanations of well-known matters and redundant explanations of structures that are actually the same may be omitted. This is to avoid making the following explanation unnecessarily long and to make it easily understandable to those skilled in the art. The drawings and the following explanation are provided to enable those skilled in the art to fully understand this application and do not limit the topics described in the claims.

[0036] The “range” disclosed in this application is limited in the form of a lower limit and an upper limit, and a given range is limited by selecting one lower limit and one upper limit, which define the boundary of a particular range. The range thus defined may or may not include the endpoints, and any combination is possible, that is, any lower limit can be combined with any upper limit to form a range. For example, if the ranges 60-120 and 80-110 are listed for a particular parameter, it is understood that the ranges 60-110 and 80-120 can also be expected. Furthermore, if 1 and 2 are listed as the minimum range values ​​and 3, 4, and 5 are listed as the maximum range values, then the ranges 1-3, 1-4, 1-5, 2-3, 2-4, and 2-5 can be expected. In this application, unless otherwise specified, the numerical range “a-b” represents an abbreviated expression of any combination of real numbers between a and b, where a and b are both real numbers. For example, the numerical range "0 to 5" indicates that all real numbers between "0 to 5" have already been listed in this specification, and "0 to 5" is simply a shortened expression for combinations of these numbers. Also, when a parameter is described as an integer ≥ 2, it is equivalent to disclosing that this parameter is, for example, an integer such as 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc.

[0037] Unless otherwise specified, all embodiments and optional embodiments of this application can be combined to form new technical inventions.

[0038] Unless otherwise specified, all technical features and optional technical features of this application can be combined to form new technical concepts.

[0039] Unless otherwise specified, all steps of this application may be performed sequentially or randomly, preferably sequentially. For example, the fact that the above method includes steps (a) and (b) means that the above method may include steps (a) and (b) performed sequentially, or steps (b) and (a) performed sequentially. For example, the fact that the above method mentioned may further include step (c) means that step (c) is added to the above method in any order, for example the above method may include steps (a), (b) and (c), or steps (a), (c) and (b), or steps (c), (a) and (b), and so on.

[0040] Unless otherwise specified, the terms “includes” and “inclusion” as used in this application may be open or closed. For example, “includes” and “inclusion” may mean that other components not listed may be included or inclusion, or that only the listed components may be included or inclusion.

[0041] Unless otherwise specified, the term "or" is inclusive in this application. For example, the phrase "A or B" means "A, B, or both A and B." More specifically, the conditions A is true (or exists) and B is false (or does not exist), the condition A is false (or does not exist) but B is true (or exists), and the condition both A and B are true (or exist) all satisfy "A or B."

[0042] Currently, the market situation shows that the applications of perovskite solar cells are expanding more and more. Perovskite solar cells are used in lunar rovers, satellite sailing boards, various sensors and detectors, and can also be used in consumer products such as wearable electronic products and automotive power supplies. In many forms, perovskite solar cells are the power source for consumer goods. With the continuous expansion of the application fields of perovskite solar cells and their flexible folding capabilities, the market demand for them is also constantly growing.

[0043] In perovskite solar cells, a perovskite functional layer is generally formed on a conductive layer. A laser scribing method is used to form channels in the perovskite functional layer, which penetrate the perovskite functional layer in the thickness direction. By placing a conductive material on the perovskite functional layer to form an electrode layer, the conductive material is simultaneously placed within the channels, achieving electrical connection between the conductive layer and the electrode layer. Then, the electrode layer and the perovskite functional layer are scribed to form multiple sub-cells corresponding to each perovskite solar cell module. The manufacturing process of perovskite solar cells is complex because the individual scribing of the perovskite functional layer and the scribing of the electrode layer and the perovskite functional layer are two independent steps.

[0044] To solve the above technical problems, this application relates to a solar cell, comprising a substrate, a conductive layer, a gate wire layer, a perovskite functional layer, and an electrode layer, wherein the conductive layer is installed on the substrate and has a plurality of conductive parts with a first gap between the conductive parts, the gate wire layer is installed on the conductive layer and includes a plurality of gate wires with the gate wires installed on the conductive parts, the perovskite functional layer is installed on the conductive layer and the gate wire layer and includes a plurality of functional parts with a second gap between the functional parts, each functional part is installed on two adjacent conductive parts, each gate wire is located between an adjacent first gap and a second gap, and the electrode layer is installed on the perovskite functional layer and includes a plurality of electrodes with a second gap between the electrodes, the electrodes are electrically connected to the gate wires.

[0045] By placing a gate wire layer between the conductive layer and the perovskite functional layer, the conductive layer has multiple conductive parts, the gate wire layer includes multiple gate wires, the gate wires are installed in the conductive parts, the perovskite functional layer includes multiple functional parts, the electrode layer includes multiple electrodes, there is a second gap between each functional part and the electrode installed thereon and adjacent functional parts and electrodes installed thereon, each functional part is installed in two adjacent conductive parts, and each gate wire is located between adjacent first and second gaps, and the electrical connection between the electrodes and gate wires realizes a series connection within the solar cell, and there is a second gap between each functional part and the electrode installed thereon and adjacent functional parts and electrodes installed thereon, that is, in the manufacturing process, a one-step scribing method can be adopted to penetrate the perovskite functional layer and the electrode layer, thus simplifying the manufacturing process of the perovskite solar cell.

[0046] Furthermore, the related technologies described above employ a laser scribing method to form channels in the perovskite functional layer, and there are many defects. For example, if the laser scribing energy is too low, the perovskite functional layer remains in the channel, and if the laser scribing energy is too high, the conductive layer is destroyed. Therefore, regardless of whether the laser scribing energy is too high or too low, the series connection resistance of the perovskite solar cell increases, and the stability of the perovskite solar cell tends to deteriorate.

[0047] In this application, the step of scribing the perovskite functional layer independently is omitted, thus avoiding the problem of increased series connection resistance of the solar cells caused by this step, and improving the stability of the solar cells.

[0048] The solar cells disclosed in the embodiments of this application may be used in power-consuming devices that utilize photoelectric conversion. Power-consuming devices may include, but are not limited to, mobile phones, tablets, laptop computers, electric toys, power tools, battery cars, electric vehicles, steamships, spacecraft, detectors, etc. Here, electric toys may include stationary or portable electric toys, such as game consoles, electric car toys, electric steamship toys and electric airplane toys, and spacecraft may include airplanes, rockets, space shuttles and spacecraft, etc.

[0049] Referring to Figures 7 and 8, according to some embodiments of this application, this application provides a solar cell 100, Circuit board 10 and A conductive layer 20 is installed on a substrate 10 and has a plurality of conductive parts 21, wherein the conductive layer 20 has a first gap 21a between the conductive parts 21, A gate line layer 30 installed on a conductive layer 20 and including a plurality of gate lines 31, wherein the gate lines 31 are installed on the conductive part 21, A perovskite functional layer 40 is installed on a conductive layer 20 and a gate line layer 30 and includes a plurality of functional parts 41, wherein there is a second gap 41a between the functional parts 41, each functional part 41 is installed on two adjacent conductive parts 21, and each gate line 31 is located between an adjacent first gap 21a and a second gap 41a. The electrode layer 50 is installed on the perovskite functional layer 40 and includes a plurality of electrodes 51, having a second gap 41a between the electrodes 51, and the electrodes 51 are electrically connected to the gate wire 31.

[0050] Referring to Figures 1 and 2, there are many types of substrates 10, which can be applied to devices with different requirements. Substrate 10 includes, but is not limited to, at least one of polyethylene terephthalate (PET) substrates, polyetherimide (PEI) substrates, textured silicon substrates, glass substrates, and mica substrates. PET substrates, PEI substrates, textured silicon substrates, glass substrates, and mica substrates have high light transmittance, allowing more sunlight to enter the perovskite functional layer 40 and improving the photoelectric conversion efficiency of the solar cell 100. Here, the glass substrate includes at least one of tempered glass, float glass, and anti-reflective glass, and the mica substrate includes, but is not limited to, a white mica substrate. White mica substrates have extremely high light transmittance as well as high flexibility and thermal stability.

[0051] The conductive layer 20 is a transparent conductive layer, and its high light transmittance is advantageous for improving the photoelectric conversion efficiency of the solar cell. The conductive layer 20 may also be fluorine-doped tin oxide (FTO), which has advantages such as good visible light transmittance, a large ultraviolet absorption coefficient, low resistivity, stable chemical properties, and strong acid-alkali resistance. Of course, the conductive layer 20 may also be tin-doped indium trioxide (ITO), which has advantages such as high light transmittance and good conductivity.

[0052] During the manufacturing process, a conductive layer 20 may be placed on the substrate 10, and a first gap 21a may be formed by a scribing process. Adjacent conductive parts 21 are isolated by the first gap 21a.

[0053] Referring to Figures 3 to 5, the gate wire layer 30 may be a metal layer containing metals such as copper, gold, and silver, and their alloys. The gate wire layer 30 may be installed on the conductive layer 20 by methods such as vapor deposition, sputtering, deposition, electroplating, and printing, but is not limited to these.

[0054] Referring to Figures 6 and 7, the perovskite functional layer 40 may include an electron transport layer 44, a hole transport layer 42, and a perovskite layer 43. The solar cell 100 may be a cis-type solar cell 100 or a transformer-type solar cell 100. In the cis-type solar cell 100, the electron transport layer 44, the perovskite layer 43, and the hole transport layer 42 are stacked in order from the conductive layer 20 to the electrode layer 50. In the transformer-type solar cell 100, the hole transport layer 42, the perovskite layer 43, and the electron transport layer 44 are stacked in order from the conductive layer 20 to the electrode layer 50, and the embodiment of this application will be described using the transformer-type solar cell 100 as an example.

[0055] The hole transport layer 42 has the function of transporting holes and blocking electrons, and the electron transport layer 44 has the function of transporting electrons and preventing electron-hole recombination. Together, the hole transport layer 42 and the electron transport layer 44 give the solar cell 100 a relatively high photoelectric conversion efficiency.

[0056] Referring to Figures 8 and 9, the electrode layer 50 may be made of a metallic material or a transparent conductive material. The metallic material may be copper, gold, silver, or other metals and their alloys. The transparent conductive material may be indium tin oxide, fluorine-doped tin oxide, aluminum-doped zinc oxide, etc.

[0057] When sunlight irradiates the perovskite layer 43, photons from the sunlight are absorbed by the perovskite layer 43, which absorbs the photons and generates "electron-hole pairs". The internal electric field generated by the energy level difference between the hole transport layer 42, the perovskite layer 43, and the electron transport layer 44 accelerates the transport of electrons and holes. That is, electrons and holes separate and transition due to the action of the internal electric field, the holes transition to the hole transport layer 42, and are transported to the conductive layer 20 by the hole transport layer 42. Through this process, most of the holes accumulate in the conductive layer 20, and the direction of electron transport is opposite to the direction of hole transport. Electrons are transported to the electron transport layer 44, and then to the electrode layer 50 by the electron transport layer 44. Through this process, most of the electrons accumulate in the electrode layer 50. By electrically connecting the electrode 51 to the gate wire 31, an electrical connection is established between the conductive layer 20 and the electrode layer 50, forming a directional movement of charge, thereby generating an electric current and achieving the conversion of light energy to electrical energy.

[0058] By installing a gate wire layer 30 between the conductive layer 20 and the perovskite functional layer 40, the conductive layer 20 has a plurality of conductive parts 21, the gate wire layer 30 includes a plurality of gate wires 31, the gate wires 31 are installed on the conductive parts 21, the perovskite functional layer 40 includes a plurality of functional parts 41, the electrode layer 50 includes a plurality of electrodes 51, there is a second gap 41a between each functional part 41 and the electrode 51 installed thereon and adjacent functional parts 41 and the electrode 51 installed thereon, and each functional part 41 is installed on two adjacent conductive parts 21. Each gate wire 31 is located between an adjacent first gap 21a and a second gap 41a, and the electrical connection between the electrode 51 and the gate wire 31 realizes a series connection within the solar cell 100. Furthermore, each functional part 41 and the electrode 51 installed thereon has a second gap 41a between it and an adjacent functional part 41 and the electrode 51 installed thereon, meaning that a one-step scribing method can be adopted during the manufacturing process to penetrate the perovskite functional layer 40 and the electrode layer 50, thus simplifying the manufacturing process of the solar cell 100.

[0059] In some embodiments, referring again to Figure 5, the pitch D1 between the gate wire 31 and its adjacent first gap 21a is 5 to 20 μm.

[0060] The pitch D1 between the gate line 31 and the adjacent first gap 21a is 5μm, 5.4μm, 5.8μm, 6μm, 6.5μm, 6.8μm, 7μm, 7.4μm, 7.8μm, 8μm, 8.4μm, 8.6μm, 9μm, 9.3μm, 9.8μm, 10μm, 10.2μm, 10.6μm, 11μm, 11.4μm, 11.6μm, 12μm, 12.3μm, 12.8μm, 13μm, 13.4μm, 13.9μm, 14.5μm, 14.8μm, 15μm, 15.5μm The values ​​may be m, 16μm, 16.5μm, 16.7μm, 16.9μm, 17μm, 17.5μm, 18μm, 18.5μm, 19μm, 19.5μm, 20μm, etc., or a range consisting of any two of the above values, for example, 5~7μm, 8~12μm, 12.8~15μm, 16~17.5μm, 18~20μm, etc., and can be selected according to actual needs as long as the pitch D1 between the gate line 31 and the adjacent first gap 21a is within the range of 5~20μm.

[0061] In some embodiments, referring again to Figure 9, the pitch D2 between the gate wire 31 and its adjacent second gap 41a is 5 to 20 μm.

[0062] The pitch D2 between the gate line 31 and the adjacent second gap 41a is 5μm, 5.5μm, 5.7μm, 6μm, 6.4μm, 6.8μm, 7μm, 7.5μm, 7.8μm, 8μm, 8.6μm, 8.9μm, 9μm, 9.2μm, 9.6μm, 10μm, 10.5μm, 10.8μm, 11μm, 11.4μm, 11.6μm, 12μm, 12.5μm, 12.8μm, 13μm, 13.6μm, 13.9μm, 14μm, 14.5μm, 15μm, 15.5μm, 16μm, 1 The values ​​may be 6.5 μm, 16.7 μm, 17 μm, 17.4 μm, 17.7 μm, 18 μm, 18.5 μm, 19 μm, 19.5 μm, 20 μm, etc., or a range consisting of any two of the above values, for example, 5 to 7.5 μm, 9 to 10.8 μm, 11 to 13.6 μm, 14 to 16.5 μm, 17 to 18.5 μm, 19 to 20 μm, etc., and can be selected according to actual needs as long as the pitch D2 between the gate line 31 and the adjacent second gap 41a is within the range of 5 to 20 μm.

[0063] In some embodiments, referring again to Figure 2, the width W1 of the first gap 21a is 20 to 200 μm.

[0064] In the technical invention of the embodiment of this application, the width W1 of the first gap 21a is 20μm, 25μm, 30μm, 35μm, 40μm, 45μm, 50μm, 56μm, 60μm, 66μm, 70μm, 73μm, 78μm, 80μm, 85μm, 88μm, 90μm, 96μm, 98μm, 100μm, 105μm, 110μm, 116μm, 120μm, 127μm, 130μm, 135μm, 140μm, 146μm, 150μm, 154μm, It may be 160μm, 166μm, 170μm, 175μm, 180μm, 185μm, 190μm, 196μm, 200μm, etc., or it may be a range consisting of any two of the above values, for example, 20-50μm, 60-90μm, 96-110μm, 120-140μm, 146-170μm, 180-200μm, etc., and as long as the width W1 of the first gap 21a is within the range of 20-200μm, it will be selected according to the actual needs.

[0065] In the invention of this application, when the width W1 of the first gap 21a is within the above range, the solar cell 100 has excellent stability and cost-effectiveness.

[0066] Furthermore, if the width W1 of the first gap 21a is less than 20 μm, the isolation between adjacent conductive parts 21 will be insufficient due to the width of 20 μm or less, and during the use of the solar cell 100, a situation may occur where adjacent conductive parts 21 are directly connected, which may affect the stability of the solar cell 100. If the width W1 of the first gap 21a is greater than 200 μm, it will lead to waste due to excessive peeling of the conductive layer 20 of the solar cell 100. Therefore, when the width W1 of the first gap 21a is within the above range, the solar cell 100 has excellent stability and cost-effectiveness.

[0067] In some embodiments, referring again to Figure 5, the width W2 of the gate wire 31 is 50 to 200 μm.

[0068] The width W2 of the gate line 31 is 50μm, 53μm, 55μm, 60μm, 65μm, 68μm, 70μm, 75μm, 80μm, 85μm, 88μm, 90μm, 95μm, 97μm, 100μm, 106μm, 108μm, 110μm, 115μm, 120μm, 125μm, 130μm, 135μm, 138μm, 140μm, 143μm, 146μm, 150μm, 154μm, 160μm, 166μm, It may be 170μm, 175μm, 180μm, 185μm, 190μm, 196μm, 200μm, etc., or a range consisting of any two of the above values, for example, 50~75μm, 90~110μm, 115~130μm, 140~166μm, 170~185μm, 190~200μm, etc., and as long as the width W2 of the gate line 31 is within the range of 50~200μm, it will be selected according to the actual needs.

[0069] In the invention of this application, when the width W2 of the gate wire 31 is within the above range, the solar cell 100 has a relatively high photoelectric conversion efficiency.

[0070] Furthermore, if the width W2 of the gate wire 31 is less than 50 μm, the resistance of the gate wire 31 increases due to the width of 50 μm or less, affecting the photoelectric conversion efficiency of the solar cell 100 and reducing its performance. If the width W2 of the gate wire 31 is greater than 200 μm, the area of ​​the gate wire 31 covered by the perovskite functional layer 40 is too large, reducing the light-receiving area of ​​the perovskite functional layer 40 and lowering the photoelectric conversion efficiency of the solar cell 100. Therefore, if the width W2 of the gate wire 31 is within the above range, the solar cell 100 can be given a relatively high photoelectric conversion efficiency.

[0071] In some examples, referring again to Figure 9, the width W3 of the second gap 41a is 50 to 200 μm.

[0072] The width W3 of the second gap 41a is 50 μm, 56 μm, 58 μm, 60 μm, 65 μm, 67 μm, 70 μm, 74 μm, 80 μm, 86 μm, 88 μm, 90 μm, 94 μm, 97 μm, 100 μm, 105 μm, 10 7μm, 110μm, 114μm, 118μm, 120μm, 123μm, 127μm, 130μm, 136μm, 138μm, 140μm, 145μm, 148μm, 150μm, 155μm, 160μm, 166μm It may be 170μm, 176μm, 180μm, 185μm, 190μm, 196μm, 200μm, etc., or it may be a range consisting of any two of the above values, for example, 50~70μm, 80~100μm, 105~120μm, 130~145μm, 150~166μm, 170~185μm, 190~200μm, etc., and as long as the width W3 of the second gap 41a is within the range of 50~200μm, it will be selected according to the actual needs.

[0073] In the invention described in this application, when the width W3 of the second gap 41a is 50 to 200 μm, the stability and photoelectric conversion efficiency of the solar cell 100 are improved.

[0074] Furthermore, if the width W3 of the second gap 41a is less than 50 μm, there is a risk of short circuit in the solar cell 100, which may affect the performance of the solar cell 100. If the width W3 of the second gap 41a is greater than 200 μm, the proportion of the effective area for photoelectric conversion decreases, resulting in lower photoelectric conversion efficiency. Therefore, when the width W3 of the second gap 41a is within the above range, the performance of the solar cell 100 is more stable and it has good photoelectric conversion efficiency.

[0075] In the invention of this application, a plurality of conductive parts 21 are formed in the conductive layer 20, sequentially separated by a first gap 21a, while a gate wire 31 is installed in the conductive parts 21. The second gap 41a penetrates the hole transport layer 42, the perovskite layer 43, the electron transport layer 44, and the electrode layer 50. The second gap 41a divides the solar cell 100 into a plurality of sub-cells, and the gate wire 31 is electrically connected to the electrode 51, forming a current path. In other words, in the manufacturing process, a one-step scribing method can be adopted to penetrate the perovskite functional layer and the electrode layer, thus simplifying the manufacturing process of the perovskite solar cell.

[0076] In some embodiments, the gate wire 31 includes a gate wire body 312, the ends of which are provided with a first extension 311 and / or a second extension 313; the functional part 41 covers the gate wire body 312, the first extension 311 and / or the second extension 313 are exposed from the functional part 41; the electrode 51 includes a diffusion part 512, the ends of which are provided with a first electrical connection part 511 and / or a second electrical connection part 513; the diffusion part 512 is installed on the functional part 41, the first electrical connection part 511 is electrically connected to the first extension 311 and / or the second electrical connection part 513 is electrically connected to the second extension 313.

[0077] In the technical invention of the embodiment of this application, in the direction of extension of the gate wire 31, the length of the gate wire 31 is at least greater than the length of the functional part 41, and the first extension 311 and / or second extension 313 of the gate wire 31 are exposed from the functional part 41, and the length of the electrode 51 may also be greater than the length of the functional part 41, thereby facilitating the electrical connection of the first electrical connection 511 to the first extension 311 and / or the electrical connection of the second electrical connection 513 to the second extension 313.

[0078] In the direction of extension of the gate line 31, the length of the substrate 10 is at least greater than the length of the functional part 41, and may also be greater than or equal to the length of the gate line 31. The first extension 311 and the second extension 313 can be exposed to the functional part 41, or they can be installed on the substrate 10. The substrate 10 provides support to the first extension 311 and the second extension 313, thereby mitigating damage to the first extension 311 and the second extension 313 due to external forces, and thereby increasing the stability of the solar cell 100.

[0079] In the direction from the substrate 10 to the electrode layer 50, the gate wire 31 is located between the conductive layer 20 and the hole transport layer 42. The thickness of the gate wire 31 is less than the thickness of the hole transport layer 42, so that the gate wire body 312 can be completely covered by the hole transport layer 42. This prevents the gate wire 31 from contacting the perovskite layer 43, thereby mitigating the problem of the gate wire 31 potentially damaging the perovskite layer 43, increasing the stability of the solar cell 100 and extending its service life.

[0080] In the invention of this application, by exposing the first extension 311 and / or the second extension 313 from the functional part 41, the first extension 311 is electrically connected to the first electrical connection part 511 and / or the second extension 313 is electrically connected to the second electrical connection part 513, thereby realizing an electrical connection between the gate wire 31 and the electrode 51.

[0081] In some embodiments, the substrate 10 includes a first region 11, a second region 12, and a third region 13, the second region 12 being located between the first region 11 and the third region 13, and the conductive layer 20 being placed in the second region 12.

[0082] The first region 11, the second region 12, and the third region 13 may be connected in order in the direction of extension of the gate wire 31. The conductive layer 20 is installed in the second region 12, the gate wire body 312 is installed in the conductive layer 20, the perovskite functional layer 40 is installed in the conductive layer 20 and the gate wire body 312, and the perovskite functional layer 40 may be located in the second region 12. The perovskite functional layer 40 covers the gate wire body 312 and the side of the conductive layer 20 facing the gate wire body 312.

[0083] In the invention of this application, by placing the conductive layer 20 in the second region 12, it is not necessary to place the conductive layer 20 in the first region 11 and the third region 13, thereby reducing the probability of short-circuit problems occurring in the first region 11 and the third region 13 of each conductive part 21 in the conductive layer 20, and increasing the stability of the solar cell 100.

[0084] In some embodiments, the first extension 311 and the first electrical connection 511 are located in the first region 11, the first extension 311 is installed on the substrate 10, and the first electrical connection 511 is installed on the first extension 311, or on the first extension 311 and the substrate 10.

[0085] The first extension 311 and the first electrical connection 511 are located in the first region 11. The first extension 311 is exposed to the perovskite functional layer 40 and is installed on the substrate 10, the diffusion portion 512 of the electrode 51 is installed in the perovskite functional layer 40, and the first electrical connection 511 extends from the diffusion portion 512 toward the substrate 10, thereby being electrically connected to the first extension 311 and forming a current path in the solar cell 100.

[0086] In some embodiments, the second extension 313 and the second electrical connection 513 are located in the third region 13, the second extension 313 is installed on the substrate 10, and the second electrical connection 513 is installed on the second extension 313, or on the second extension 313 and the substrate 10.

[0087] The second extension 313 and the second electrical connection portion 513 are located in the third region 13. The second extension 313 is exposed to the perovskite functional layer 40 and is installed on the substrate 10, the diffusion portion 512 of the electrode 51 is installed in the perovskite functional layer 40, and the second electrical connection portion 513 extends in the direction from the diffusion portion 512 toward the substrate 10, thereby being electrically connected to the second extension 313 and forming a current path in the solar cell 100.

[0088] In some embodiments, in the solar cell 100, only the first extension 311 may be installed at the end of the gate wire 31, and the second extension 313 may not be installed. Similarly, only the first electrical connection part 511 may be installed at the end of the electrode 51, and the second electrical connection part 513 may not be installed. By electrically connecting the first extension 311 and the first electrical connection part 511, a current path can be realized within the solar cell 100.

[0089] In some embodiments, in the solar cell 100, only the second extension 313 may be installed at the end of the gate wire 31, and the first extension 311 may not be installed. Similarly, only the second electrical connection part 513 may be installed at the end of the electrode 51, and the first electrical connection part 511 may not be installed. By electrically connecting the second extension 313 and the second electrical connection part 513, a current path can be realized within the solar cell 100.

[0090] In some embodiments, in the solar cell 100, a first extension 311 and a second extension 313 may be installed at the end of the gate wire 31, and a first electrical connection part 511 and a second electrical connection part 513 may be installed at the end of the electrode 51. By electrically connecting the first extension 311 and the first electrical connection part 511, and by electrically connecting the second extension 313 and the second electrical connection part 513, a current path can be realized within the solar cell 100.

[0091] In some embodiments, the substrate 10 includes a first region 11, a second region 12, and a third region 13, the second region 12 being located between the first region 11 and the third region 13, a conductive layer 20 being placed in the second region 12 and further placed in the first region 11 and / or the third region 13, the conductive layer 20 in the first region 11 and the third region 13 being insulated from the conductive layer 20 in the second region 12, the conductive layer 20 in the first region 11 and the third region 13 having a plurality of conductive branches 22, the conductive branches 22 corresponding to conductive portions 21, and the conductive branches 22 being insulated from each other.

[0092] Selectively, the conductive layer 20 is placed in the second region 12 and the first region 11, and the conductive layer 20 located in the first region 11 is insulated from the conductive layer 20 located in the second region 12.

[0093] Selectively, the conductive layer 20 is placed in the second region 12 and the third region 13, and the conductive layer 20 located in the third region 13 is also insulated from the conductive layer 20 located in the second region 12.

[0094] Selectively, the conductive layer 20 is installed in a first region 11, a second region 12, and a third region 13. The conductive layer 20 located in the first region 11 is insulated from the conductive layer 20 located in the second region 12, and the conductive layer 20 located in the third region 13 is also insulated from the conductive layer 20 located in the second region 12.

[0095] During the manufacturing process, the conductive layers 20 in the first region 11 and the third region 13 may be insulated from the conductive layer 20 in the second region 12 by methods such as laser scribing, etching, or dicing with a dicer. This eliminates the need to separate the conductive layers 20 located in the first region 11 and the conductive layers 20 located in the second region 12, saving production time and improving production efficiency.

[0096] The conductive layers 20 of the first region 11 and the third region 13 have a plurality of conductive branches 22, each conductive branch 22 corresponding to a conductive portion 21, and the conductive branches 22 are insulated from each other. Because the conductive layers 20 of the first region 11 and the third region 13 are insulated from the conductive layer 20 of the second region 12, the conductive branches 22 are insulated from the conductive layer 20 of the second region 12.

[0097] The first gap 21a between the conductive portions 21 extends from the edge of the first region 11 away from the second region 12 to the edge of the third region 13 away from the second region 12.

[0098] The conductive branch 22 has a first portion 221 and a second portion 222. The first extension 311 and the second extension 313 of the gate wire 31 are located in the first portion 221. There is a third gap 22a between the first portion 221 and the second portion 222. The third gap 22a is located between adjacent first gaps 21a and second gaps 41a, and adjacent first gaps 21a and third gaps 22a are located between two adjacent second gaps 41a. Of the adjacent first gaps 21a and third gaps 22a, the third gap 22a in the first region 11 and the third gap 22a in the third region 13 are located on the same side of the first gap 21a. The first portion 221 is located between adjacent third gaps 22a and first gaps 21a. Of course, the third gap 22a can be omitted, and it is sufficient to insulate the conductive layers 20 of the first region 11 and the third region 13 from the conductive layer 20 of the second region 12, and to insulate the adjacent conductive branches 22.

[0099] In the invention of this application, the conductive layer 20 is installed in the second region 12 and further installed in the first region 11 and / or third region 13, and by insulating the conductive layers 20 in the first region 11 and the third region 13 from the conductive layer 20 in the second region 12, the process of peeling off the conductive layer 20 located in the first region 11 and the conductive layer 20 located in the second region 12 is omitted, thereby saving production time and improving production efficiency.

[0100] In some embodiments, the first extension 311 and the first electrical connection 511 are located in the first region 11, the first extension 311 is installed in one conductive branch 22, and the first electrical connection 511 is installed in the first extension 311 and / or the conductive branch 22 in which the first extension 311 is located.

[0101] In the invention of this application, by installing the first extension 311 on one conductive branch 22, the conductive branch 22 is insulated from the conductive layer 20 of the second region 12, and the area between the conductive branches 22 is also insulated. Therefore, by installing the first electrical connection 511 on the first extension 311 and / or the conductive branch 22 on which the first extension 311 is located, a short circuit does not occur, and the stability of the solar cell 100 is increased.

[0102] In some embodiments, the second extension 313 and the second electrical connection 513 are located in the third region 13, the second extension 313 is installed in one conductive branch 22, and the second electrical connection 513 is installed in the second extension 313 and / or the conductive branch 22 in which the second extension 313 is located.

[0103] In the invention of this application, by installing the second extension 313 on one conductive branch 22, the conductive branch 22 is insulated from the conductive layer 20 of the second region 12, and the area between the conductive branches 22 is also insulated. Therefore, by installing the second electrical connection 513 on the second extension 313 and / or the conductive branch 22 on which the second extension 313 is located, a short circuit does not occur, and the stability of the solar cell 100 is increased.

[0104] In some embodiments, the thickness of the gate wire 31 is 40 nm or more, and selectively between 40 and 300 nm.

[0105] The thickness of the gate line 31 is 40nm, 42nm, 44nm, 45nm, 46nm, 48nm, 49nm, 50nm, 51nm, 53nm, 55nm, 57nm, 59nm, 60nm, 62nm, 64nm, 66nm, 68nm, 70nm, 71nm, 73nm, 75nm, 78nm, 80nm, 88nm, 90nm, 100nm, 110nm, 115nm, 120nm, 150nm, 175nm, 180nm, 200nm, 215nm, 220nm, 230nm, 250nm, 270nm, 275nm, 280nm 300nm, or any two of the above values, may be used, for example, 40nm~46nm, 48nm~53nm, 55nm~60nm, 64nm~70nm, 40nm~80nm, 75nm~80nm, 50nm~120nm, 80nm~100nm, 80nm~120nm, 110nm~150nm, 110nm~230nm, 120nm~150nm, 150nm~250nm, 250nm~300nm, etc., and can be selected according to actual needs as long as the thickness of the gate line 31 is within the above range.

[0106] In the invention of this application, the solar cell 100 has a relatively high photoelectric conversion rate because the thickness of the gate wire 31 is within the above range.

[0107] According to some embodiments of this application, the present application provides a method for manufacturing a solar cell 100, which includes the following steps:

[0108] The steps include providing the substrate 10, A step of placing a conductive layer 20 on a substrate 10, wherein the conductive layer 20 has a plurality of conductive portions 21 and a first gap 21a between the conductive portions 21, A step of installing a gate line layer 30 on a conductive layer 20, wherein the gate line layer 30 includes a plurality of gate lines 31, and the gate lines 31 are installed on the conductive part 21. The steps include: installing a perovskite functional layer 40 on the conductive layer 20 and the gate wire layer 30; The steps include: placing an electrode layer 50 on a perovskite functional layer 40 to form a second gap 41a penetrating the electrode layer 50 and the perovskite functional layer 40, wherein the perovskite functional layer 40 includes a plurality of functional parts 41, with a second gap 41a between the functional parts 41, each functional part 41 being placed on two adjacent conductive parts 21, each gate line 31 being located between an adjacent first gap 21a and a second gap 41a, the electrode layer 50 including a plurality of electrodes 51, with a second gap 41a between the electrodes 51, and the electrodes 51 being electrically connected to the gate line 31.

[0109] In the invention of this application, a gate wire layer 30 is provided between the conductive layer 20 and the perovskite functional layer 40, so that the conductive layer 20 has a plurality of conductive parts 21, the gate wire layer 30 includes a plurality of gate wires 31, the gate wires 31 are provided on the conductive parts 21, the perovskite functional layer 40 includes a plurality of functional parts 41, the electrode layer 50 includes a plurality of electrodes 51, there is a second gap 41a between each functional part 41 and the electrode 51 provided thereon and adjacent functional part 41 and the electrode 51 provided thereon, and each functional part 41 is provided with two adjacent conductive parts The electrical section 21 has gate wires 31, each located between adjacent first gaps 21a and second gaps 41a. The electrical connection between the electrodes 51 and the gate wires 31 enables series connection within the solar cell 100. Furthermore, each functional section 41 and the electrode 51 installed thereon has a second gap 41a between it and adjacent functional sections 41 and the electrode 51 installed thereon. This means that a one-step scribing method can be used during the manufacturing process to penetrate the perovskite functional layer 40 and the electrode layer 50, thus simplifying the manufacturing process of the solar cell 100.

[0110] In some embodiments, the step of placing the conductive layer 20 on the substrate 10 includes the step of performing a first scribing on a first preform layer for forming the conductive layer 20 to form a plurality of conductive portions 21, with a first gap 21a between the conductive portions 21.

[0111] The material for the first preform layer may be selected from, but is not limited to, fluorine-doped tin oxide (FTO) or tin-doped indium trioxide (ITO). The scribing method for performing the first scribing on the first preform layer for forming the conductive layer 20 may be, but is not limited to, laser scribing or chemical etching.

[0112] In the invention of this application, a plurality of conductive portions 21 are formed by performing a first scribing on a first preform layer for forming a conductive layer 20, and adjacent conductive portions 21 are separated by a first gap 21a.

[0113] In some embodiments, the steps of placing a perovskite functional layer 40 on a conductive layer 20 and a gate wire layer 30, placing an electrode layer 50 on the perovskite functional layer 40, and forming a second gap 41a through the electrode layer 50 and the perovskite functional layer 40 include sequentially placing a second preform layer for forming the perovskite functional layer 40 and a third preform layer for forming the electrode layer 50 on the conductive layer 20 and the gate wire layer 30, performing a second scribing on the second and third preform layers to form a second gap 41a through the third and second preform layers.

[0114] The second preform layer has a multilayer structure. The third preform layer may have a single-layer or multilayer structure. The third preform layer may be made of a metallic material or a transparent conductive material. The metallic material may be metals such as copper, gold, or silver, or their alloys. The transparent conductive material may be indium tin oxide, fluorine-doped tin oxide, or aluminum-doped zinc oxide. The scribing method used to perform the second scribing on the second and third preform layers may be laser scribing or chemical etching, but is not limited to these.

[0115] In the invention of this application, a second gap 41a is formed that penetrates the third preform layer and the second preform layer by performing a second scribing on the second preform layer for forming the perovskite functional layer 40 and the third preform layer for forming the electrode layer 50. In other words, a one-step scribing method is employed during the manufacturing process to penetrate the perovskite functional layer 40 and the electrode layer 50, thereby simplifying the manufacturing process of the solar cell 100.

[0116] Referring to Figure 10, the present application further provides a power consumption device 1000, which includes the solar cell 100 described above or a solar cell 100 manufactured by a method for manufacturing the solar cell 100 described above.

[0117] In this application, the solar cell 100 may supply power to the power-consuming device 1000 as its power source, or the solar cell 100 may serve as an energy storage unit for the power-consuming device 1000. For example, the power-consuming device 1000 may be a lighting element, a display element, or an automobile.

[0118] The features and performance of this application will be described in more detail below, along with examples.

[0119] Example 1: This embodiment provides a method for manufacturing a solar cell, and includes the following steps.

[0120] A substrate is provided, wherein the substrate includes a first region, a second region, and a third region. The substrate material is glass, and its thickness is 2.2 mm. A conductive layer is placed on a substrate, the conductive layer has multiple conductive parts, a first gap between the conductive parts, and the conductive layer is located in a second region. The conductive layer material is FTO, with a thickness of 350 nm, and the width of the first gap is 50 μm. A gate wire layer, a perovskite functional layer, and an electrode layer are arranged in order on the conductive layer. The gate wire layer is made of copper, and the perovskite functional layer includes a hole transport layer, a perovskite layer, and an electron transport layer. Here, the hole transport layer is made of nickel oxide with a thickness of 10 nm to 15 nm, and the perovskite layer is made of Cs doped with methylamine chloride (MACl). 0.05 FA 0.95 The material is PbI3, with a thickness of 650nm to 680nm, where the methylamine chloride concentration is 20% of the perovskite precursor concentration, the perovskite precursor concentration is 1.55 mol / L, and the electron transport layer material is C 60 The thickness is 15nm to 30nm, the electrode layer material is copper, and the thickness is 100nm. The gate wire body is installed in the conductive part, the first extension is located in the first region, the second extension is located in the third region, and there is a second gap between the functional parts of the perovskite functional layer and between the electrodes of the electrode layer, the width of which is 100 μm, each gate wire is located between adjacent first and second gaps, the functional part covers the gate wire body, the first and second extensions are exposed from the functional part, the electrode diffusion part is installed in the functional part, the first electrical connection part is installed in the first extension or in the first extension and the substrate, the second electrical connection part is installed in the second extension or in the second extension and the substrate, the first electrical connection part is electrically connected to the first extension, and the second electrical connection part is electrically connected to the second extension.

[0121] In the solar cell provided in Example 1, the conductive layer is located in the second region, the gate wire body is installed in the conductive part, the first extension is located in the first region, the second extension is located in the third region, and the first and second extensions are exposed from the functional part.

[0122] Example 2: A substrate is provided, wherein the substrate includes a first region, a second region, and a third region. The substrate material is glass, and its thickness is 2.2 mm. A conductive layer is placed on a substrate, the conductive layer having multiple conductive parts, with a first gap between the conductive parts, the conductive layer is placed in a second region, and further placed in the first and / or third regions, the conductive layers in the first and third regions are insulated from the conductive layer in the second region, the conductive layers in the first and third regions have multiple conductive branches, the conductive branches correspond to conductive parts, and the conductive branches are insulated from each other. The conductive layer material is FTO, with a thickness of 350 nm, and the width of the first gap is 50 μm. A gate wire layer, a perovskite functional layer, and an electrode layer are arranged in order on the conductive layer. The gate wire layer is made of copper, and the perovskite functional layer includes a hole transport layer, a perovskite layer, and an electron transport layer. Here, the hole transport layer is made of nickel oxide with a thickness of 10 nm to 15 nm, and the perovskite layer is made of Cs doped with methylamine chloride (MACl). 0.05 FA 0.95 The material is PbI3, with a thickness of 650nm to 680nm, where the methylamine chloride concentration is 20% of the perovskite precursor concentration, the perovskite precursor concentration is 1.55 mol / L, and the electron transport layer material is C 60 The thickness is 15nm to 30nm, the electrode layer material is copper, and the thickness is 100nm. The gate wire body is installed in the conductive part, the first extension is located in the first region, the second extension is located in the third region, both the first and second extensions are installed in the conductive branch, there is a second gap between the functional parts of the perovskite functional layer and between the electrodes of the electrode layer, the width of the second gap is 100 μm, each gate wire is located between adjacent first and second gaps, the functional part covers the gate wire body, the first and second extensions are exposed from the functional part, the electrode diffusion part is installed in the functional part, the first electrical connection part is installed in the first extension and / or the conductive branch where the first extension is located, the second electrical connection part is installed in the second extension and / or the conductive branch where the second extension is located, the first electrical connection part is electrically connected to the first extension, and the second electrical connection part is electrically connected to the second extension.

[0123] The conductive layer of the solar cell provided in Example 2 is located in the second region, the gate line body is installed in the conductive part, and is further installed in the first region and / or the third region. The conductive layers in the first region and the third region are insulated from the conductive layer in the second region. The conductive layers in the first region and the third region have a plurality of conductive branches, the conductive branches correspond to the conductive parts, and the spaces between the conductive branches are insulated. Both the first extension part and the second extension part are installed on the conductive branches.

[0124] Comparative Example: The comparative example provides a method for manufacturing a solar cell, including the following steps.

[0125] Provide a substrate, The material of the substrate is glass, and the thickness is 2.2 mm. Install a conductive layer on the substrate. The conductive layer has a plurality of conductive parts and has a first gap between the conductive parts. The material of the conductive layer is FTO, the thickness is 350 nm, and the width of the first gap is 50 μm. Install a perovskite functional layer and an electrode layer in sequence on the conductive layer. The material of the gate line layer is copper. The perovskite functional layer includes a hole transport layer, a perovskite layer, and an electron transport layer. Here, the material of the hole transport layer is nickel oxide, and the thickness is 10 nm to 15 nm. The material of the perovskite layer is Cs doped with methylamine chloride (MACl) 0.05 FA 0.95 PbI3, and the thickness is 650 nm to 680 nm. Here, the concentration of methylamine chloride is 20% of the perovskite precursor concentration, and the concentration of the perovskite precursor is 1.55 mol / L. The material of the electron transport layer is C 60 and the thickness is 15 nm to 30 nm. The material of the electrode layer is copper, and the thickness is 100 nm. The perovskite functional layer has a channel that extends from the side of the perovskite functional layer toward the electrode layer to the side of the perovskite functional layer toward the conductive layer, with a channel width of 100 μm, and a conductive material is placed within the channel to form a current path in the solar cell. The perovskite functional layer and the electrode layer have a second gap that communicates with each other, the width of which is 100 μm, and the second gap extends from the side of the electrode layer away from the perovskite functional layer to the side of the perovskite functional layer toward the conductive layer. The channel is located between the first gap and the second gap, and the second gap divides the perovskite functional layer and the electrode layer into multiple battery cell assemblies, and the electrode layer in one battery cell assembly and the conductive layer in an adjacent battery cell assembly form a solar cell with a series connection structure.

[0126] The perovskite functional layer of the solar cell provided in the comparative example has a channel, which is located between a first gap and a second gap.

[0127] Photoelectric conversion efficiency tests were performed on the solar cells of Examples 1 and 2 and the Comparative Example. The test method was as follows, and the test results are shown in Table 1.

[0128] 1. Photoelectric conversion efficiency test: Standard simulated sunlight (AM 1.5G, 100mW / cm²) 2 Under irradiation, the battery performance was tested and an IV curve was obtained. Based on the IV curve and data fed back from the test equipment, the short-circuit current Jsc (in mA / cm²) was calculated. 2 The open-circuit voltage Voc (in V), maximum optical output current Jmpp (in mA), and maximum optical output voltage Vmpp (in V) were obtained. The battery charging coefficient FF was calculated using the formula FF = Jsc × Voc / (Jmpp × Vmpp), and the unit is %. The photoelectric conversion efficiency PCE of the battery was calculated using the formula PCE = Jsc × Voc × FF / Pw, and the unit is %, where Pw represents the input power, and the unit is mW.

[0129] Solar cell performance parameters of Examples 1-2 and the Comparative Example [Table 1]

[0130] As can be seen from the test results of Examples 1-2 and the Comparative Example in Table 1, the photoelectric conversion efficiency of the solar cell according to this application improved with increasing gate wire thickness. When the gate wire thickness of the solar cell according to this application was 40 nm or more, and selectively between 40 and 300 nm, the photoelectric conversion efficiency of the solar cell according to this application was higher than that of the Comparative Example, and at this time, the stability of the solar cell according to this application was also higher.

[0131] Furthermore, a comparison between Examples 1 and 2 showed that the photoelectric conversion efficiency of the solar cell in Example 1 was higher than that of the solar cell in Example 2. [Explanation of Symbols]

[0132] Solar cell 100, substrate 10, first region 11, second region 12, third region 13, conductive layer 20, conductive part 21, conductive branch 22, first part 221, second part 222, first gap 21a, third gap 22a, gate wire layer 30, gate wire 31, first extension 311, gate wire body 312, second extension 313, perovskite functional layer 40, functional part 41, second gap 41a, hole transport layer 42, perovskite layer 43, electron transport layer 44, electrode layer 50, electrode 51, first electrical connection part 511, diffusion part 512, second electrical connection part 513, power consumption device 1000.

Claims

1. It is a solar cell, circuit board and A conductive layer installed on the substrate, having a plurality of conductive parts, wherein the conductive layer has a first gap between the conductive parts, A gate line layer installed on the conductive layer and including a plurality of gate lines, wherein the gate lines are installed on the conductive portion, A perovskite functional layer installed on the conductive layer and the gate wire layer, comprising a plurality of functional parts, having a second gap between the functional parts, each functional part being installed on two adjacent conductive parts, and each gate wire being located between adjacent first and second gaps, A solar cell comprising an electrode layer installed on the perovskite functional layer, the electrode layer having a plurality of electrodes, the second gap between the electrodes, and the electrodes being electrically connected to the gate wire.

2. The solar cell according to claim 1, wherein the gate wire includes a gate wire body, and a first extension and / or a second extension are provided at the end of the gate wire body; the functional part covers the gate wire body, and the first extension and / or the second extension are exposed from the functional part; the electrode includes a diffusion part, and a first electrical connection part and / or a second electrical connection part are provided at the end of the diffusion part; the diffusion part is installed in the functional part; the first electrical connection part is electrically connected to the first extension part, and / or the second electrical connection part is electrically connected to the second extension part.

3. The solar cell according to claim 2, wherein the substrate includes a first region, a second region, and a third region, the second region is located between the first region and the third region, and the conductive layer is installed in the second region.

4. The solar cell according to claim 3, wherein the first extension and the first electrical connection are located in the first region, the first extension is installed on the substrate, and the first electrical connection is installed on the first extension, or installed on the first extension and the substrate.

5. The solar cell according to claim 3 or 4, wherein the second extension and the second electrical connection are located in the third region, the second extension is installed on the substrate, and the second electrical connection is installed on the second extension, or installed on the second extension and the substrate.

6. The solar cell according to claim 2, wherein the substrate includes a first region, a second region, and a third region, the second region being located between the first region and the third region, the conductive layer being installed in the second region and further installed in the first region and / or the third region, the conductive layer in the first region and the third region being insulated from the conductive layer in the second region, the conductive layer in the first region and the third region having a plurality of conductive branches, the conductive branches corresponding to the conductive parts, and the spaces between the conductive branches are insulated.

7. The solar cell according to claim 6, wherein the first extension and the first electrical connection are located in the first region, the first extension is installed in one of the conductive branches, and the first electrical connection is installed in the first extension and / or the conductive branch in which the first extension is located.

8. The solar cell according to claim 6 or 7, wherein the second extension and the second electrical connection are located in the third region, the second extension is installed in one of the conductive branches, and the second electrical connection is installed in the second extension and / or the conductive branch in which the second extension is located.

9. The solar cell according to any one of claims 1 to 8, wherein the thickness of the gate wire is 40 nm or more, and selectively 40 to 80 nm.

10. A method for manufacturing a solar cell according to any one of claims 1 to 9, The steps include providing a substrate and A step of placing a conductive layer on the substrate, wherein the conductive layer has a plurality of conductive portions and a first gap between the conductive portions, A step of installing a gate wire layer on the conductive layer, wherein the gate wire layer includes a plurality of gate wires, and the gate wires are installed on the conductive portion. The steps include: installing a perovskite functional layer on the conductive layer and the gate wire layer; A method for manufacturing a solar cell, comprising the steps of: placing an electrode layer on the perovskite functional layer; forming a second gap through the electrode layer and the perovskite functional layer, wherein the perovskite functional layer includes a plurality of functional parts, the second gap is between the functional parts, each functional part is placed on two adjacent conductive parts, each gate wire is located between adjacent first and second gaps, the electrode layer includes a plurality of electrodes, the second gap is between the electrodes, and the electrodes are electrically connected to the gate wires.

11. The above step of placing a conductive layer on the substrate is, A method for manufacturing a solar cell according to claim 10, comprising the step of performing a first scribing on a first preform layer for forming the conductive layer to form a plurality of conductive portions, wherein the conductive portions have a first gap between them.

12. The steps described above—placing a perovskite functional layer on the conductive layer and the gate wire layer, placing an electrode layer on the perovskite functional layer, and forming a second gap through the electrode layer and the perovskite functional layer—are: A method for manufacturing a solar cell according to claim 11, comprising the steps of sequentially placing a second preform layer for forming the perovskite functional layer and a third preform layer for forming the electrode layer on the conductive layer and the gate wire layer, performing a second scribing on the second preform layer and the third preform layer to form the second gap penetrating the third preform layer and the second preform layer.

13. A power consumption device comprising a solar cell according to any one of claims 1 to 9, or a solar cell manufactured by a method for manufacturing a solar cell according to any one of claims 10 to 12.

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