Segmented transistor active region for improved thermal conductivity
The segmented active region in RF transistors addresses self-heating issues by eliminating thermal boundary resistance, facilitating efficient heat transfer and prolonging device life.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- RAYTHEON CO
- Filing Date
- 2024-03-15
- Publication Date
- 2026-04-14
AI Technical Summary
RF transistors experience self-heating during operation, leading to reduced device life due to high thermal boundary resistance at the interface between the buffer layer and capping layer.
A semiconductor device with a segmented active region is developed, featuring nanowire channels epitaxially grown on surface steps of a miscut substrate, eliminating the interface and enabling efficient heat transfer through the device by reducing thermal boundary resistance.
The segmented active region allows for rapid heat dissipation, reducing the device's operating temperature and extending its lifespan, enabling higher power densities in RF applications.
Smart Images

Figure 2026511655000001_ABST
Abstract
Description
Technical Field
[0001] Cross - Reference to Related Applications This application claims the benefit of U.S. Application No. 18 / 191,954, filed Mar. 29, 2023, the entire disclosure of which is incorporated herein by reference.
Background Art
[0002] The present invention relates to a semiconductor device and a segmented transistor active region for improving thermal conductivity.
[0003] A radio frequency (RF) transistor is a semiconductor device used to amplify and switch electronic signals. An RF transformer can be placed between two or more circuits and can generate a changing magnetic field (magnetic flux) that couples energy to another conductor using the principles of electrical signal change and induction.
[0004] During operation, an RF transistor tends to get hot, thereby shortening the device life. Therefore, there is a need for an RF transistor that still does not generate self - heating.
Summary of the Invention
[0005] According to one aspect of the present disclosure, a semiconductor device is provided, which includes a mis - cut substrate, an intermediate layer epitaxially grown on the mis - cut substrate and including a surface step on the topmost surface, a segmented active region including nanowire channels each epitaxially grown on a corresponding one of the surface steps, and a cap layer epitaxially grown on the nanowire channels and the exposed portion of the topmost surface.
[0006] According to additional or alternative embodiments, there is no high thermal boundary resistance between the nanowire channels, the intermediate layer, and the cap layer.
[0007] According to additional or alternative embodiments, the cross-sectional shape of the segmented active region is one or more of the following: triangular, square, rectangular, and trapezoidal, and the intermediate layer and nanowire channels have various crystal orientations including at least one of the following: N-polar, Ga-polar, m-plane, and semi-polar.
[0008] According to additional or alternative embodiments, the intermediate layer, capping layer, and nanowire channel each comprise at least one of aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and its alloys, and indium gallium nitride and its alloys.
[0009] According to additional or alternative embodiments, the segmented active regions are provided in multiple layers.
[0010] In additional or alternative embodiments, the source and drain regions are arranged to be electrically in communication with the opposite end of each nanowire channel, and the gate structure is located between the source and drain regions and around each nanowire channel.
[0011] A method for manufacturing a semiconductor device is provided according to aspects of the present disclosure. The method includes providing a miscut substrate, epitaxially growing an intermediate layer on the miscut substrate such that the uppermost surface of the intermediate layer includes surface steps, epitaxially growing nanowire channels such that each nanowire channel is epitaxially grown on one of the corresponding surface steps to form segmented active regions, and epitaxially growing a cap layer on the nanowire channels and the exposed portions of the uppermost surface.
[0012] According to additional or alternative embodiments, the epitaxial growth of the intermediate layer, nanowire channel, and cap layer includes metal-organic chemical vapor deposition (CVD).
[0013] According to additional or alternative embodiments, the material for epitaxial growth of the intermediate layer, cap layer and nanowire channel includes at least one of aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and its alloys, and indium gallium nitride and its alloys, and the precursor material includes at least one of trimethylaluminum, trimethylgallium, triethylgallium, trimethylindium, triethylindium, ammonia, hydrazine, and dimethylhydrazine.
[0014] According to additional or alternative embodiments, the epitaxial growth of the intermediate layer, nanowire channels, and capping layer is continuous.
[0015] According to additional or alternative embodiments, the epitaxial growth of the intermediate layer, nanowire channel, and cap layer includes one or more of N-polar growth, Ga-polar growth, m-plane growth, and semi-polar growth.
[0016] According to additional or alternative embodiments, the epitaxial growth of the nanowire channels is carried out such that segmented active regions are provided in multiple layers.
[0017] In additional or alternative embodiments, the method further includes arranging a source region and a drain region to be electrically in communication with the opposite end of each nanowire channel, and arranging a gate structure between the source region and the drain region and around each nanowire channel.
[0018] According to one aspect of the present disclosure, a method for manufacturing a semiconductor device is provided. The method includes providing a planarized substrate; epitaxially growing an intermediate layer on the planarized substrate; providing surface steps on the uppermost surface of the intermediate layer; epitaxially growing nanowire channels, wherein each nanowire channel is epitaxially grown on one of the corresponding surface steps to form segmented active regions; and epitaxially growing a cap layer on the nanowire channels and the exposed portions of the uppermost surface.
[0019] According to additional or alternative embodiments, the epitaxial growth of the intermediate layer, nanowire channel, and cap layer includes metal-organic chemical vapor deposition (CVD).
[0020] According to additional or alternative embodiments, the material for epitaxial growth of the intermediate layer, cap layer and nanowire channel includes at least one of aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and its alloys, and indium gallium nitride and its alloys, and the precursor material includes at least one of trimethylaluminum, trimethylgallium, triethylgallium, trimethylindium, triethylindium, ammonia, hydrazine, and dimethylhydrazine.
[0021] According to additional or alternative embodiments, at least the epitaxial growth of the nanowire channels and cap layers is continuous.
[0022] According to additional or alternative embodiments, the epitaxial growth of the intermediate layer, nanowire channel, and cap layer includes one or more of N-polar growth, Ga-polar growth, m-plane growth, and semi-polar growth.
[0023] According to additional or alternative embodiments, the epitaxial growth of the nanowire channels is carried out such that segmented active regions are provided in multiple layers.
[0024] According to an additional or alternative embodiment, the method further includes arranging source and drain regions so as to be in electrical communication with opposite ends of each nanowire channel, and arranging a gate structure between the source and drain regions and around each nanowire channel.
[0025] Additional features and advantages are realized through the techniques of the present disclosure. Other embodiments and aspects of the present disclosure are described in detail herein and are considered to be part of the claimed technical concept. To better understand the present disclosure with its advantages and features, please refer to the description and the drawings.
[0026] Here, to understand the present disclosure more fully, please refer to the following brief description in connection with the accompanying drawings and the detailed description. The same reference numerals represent the same parts.
Brief Description of the Drawings
[0027] [Figure 1A] It is an axial view of a semiconductor device according to an embodiment. [Figure 1B] It is an enlarged view of the surface of the misaligned substrate of the semiconductor device of FIG. 1A surrounded by a dashed line according to an embodiment. [Figure 2A] It is a side view of the semiconductor device of FIG. 1A according to an embodiment. [Figure 2B] It is an enlarged view of the surface of the misaligned substrate of the semiconductor device of FIG. 2A surrounded by a dashed line according to an embodiment. [Figure 3] It is a top view of the semiconductor device of FIG. 1A without a cap layer according to an embodiment. [Figure 4] It is a schematic cross-sectional view of a triangular nanowire channel according to an embodiment. [Figure 5] It is a schematic cross-sectional view of a square nanowire channel according to an embodiment. [Figure 6] It is a schematic cross-sectional view of a rectangular nanowire channel according to an embodiment. [Figure 7]This is a schematic cross-sectional view of a trapezoidal nanowire channel according to the embodiment. [Figure 8] This is an axial view of a semiconductor device comprising multiple layers of segmented active regions and nanowire channels according to an embodiment. [Figure 9] This is a flowchart illustrating a method for manufacturing a semiconductor device using a miscut substrate according to the embodiment. [Figure 10] This is a flowchart illustrating a method for manufacturing a semiconductor device using a planarized substrate and a surface step formation operation according to the embodiment. [Modes for carrying out the invention]
[0028] Semiconductor devices such as transistors used in RF applications often require higher power density at higher frequencies. During such high-power-density operation, device life tends to decrease due to self-heating. To maintain a long device life, it is necessary to lower the temperature of the active region. For example, in gallium nitride (GaN) high electron-mobility transistors (HEMTs), the device includes an epitaxial layer or epitaxial sheet with an interface that has high thermal boundary resistance, contributing to the temperature rise of the active region. Therefore, lowering the temperature of the active region remains a challenge in HEMTs.
[0029] Therefore, as described below, semiconductor devices such as RF transistors have a segmented active region in which the interface between the buffer layer and the capping layer is removed, enabling more efficient heat transfer through the semiconductor device. This structure can be applied to various material combinations and crystal orientations. Segmentation of the active region can be achieved by self-assembled nanowire growth on a vicinal substrate, where surface steps naturally provide segmentation. This creates a segmented two-dimensional electron gas (2DEG), which can be considered a 1DEG with channel conduction parallel to the source-drain.
[0030] Referring to Figures 1A and 1B, 2A and 2B, and Figure 3, a semiconductor device (hereinafter referred to as an exemplary "RF transistor device") 101 is shown, which includes a miscut substrate 110 having an uppermost surface 111 including a miscut portion 112 tilted (approximately 2 to 4 degrees) with respect to the horizontal plane P, an intermediate layer 120, a segmented active region 130, and a cap layer 140. The intermediate layer 120 is epitaxially grown on the uppermost surface 111 of the miscut substrate 110, and the formation of the miscut portion 112 causes the intermediate layer 120 to grow in a form that includes a surface step 122 on the uppermost surface 121 of the intermediate layer 120. The surface step 122 substantially mimics the formation of the miscut portion 112. Thus, the surface step 122 can be considered a vicinal substrate in which the surface at the surface step is offset from the main crystal axis. The segmented active regions 130 can be provided as a fully strained state, a partially relaxed state, or a fully relaxed state, and may include nanowire channels 131. Each nanowire channel 131 is epitaxially grown or self-assembled on one of the corresponding surface steps 122, so that each nanowire channel 131 has a specific cross-sectional shape (see Figures 4, 5, 6, and 7). The capping layer 140 is epitaxially grown on the nanowire channels 131 and on the exposed portions of the uppermost surface 121.
[0031] In additional or alternative embodiments, the intermediate layer 120, the segmented active region 130, the nanowire channel 131, and the cap layer 140 may comprise at least one of aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and its alloys, and indium gallium nitride and its alloys.
[0032] As shown in Figure 3, the RF transistor device 101 may further include a source region 150 and a drain region 151 arranged to be electrically in communication with the opposite ends of each segmented active region 130 and each nanowire channel 131, and a gate structure 152. The gate structure 152 is positioned between the source region 150 and the drain region 151, and around each segmented active region 130 and each nanowire channel 131.
[0033] According to the embodiment, the miscut substrate 110 can be reformed as a planarized substrate. In these and other cases, the surface step 122 of the top surface 121 can be etched or machined onto the top surface 121. This results in the overall configuration of the segmented active region 130 and the nanowire channel 131 being the same as described above.
[0034] With the above configuration, the RF transistor device 101 is characterized by the absence of high thermal boundary resistance between the uppermost surface 121 of the intermediate layer 120 and the cap layer 140. Therefore, heat from the nanowire channel 131 is transferred to the surrounding material and then experiences little to no resistance, or significantly reduced resistance, thereby lowering the temperature of the RF transistor device 101. This heat transfer characteristic exists when the intermediate layer 120 and the cap layer 140 are formed from similar materials such as aluminum nitride, and the nanowire channel 131 is formed from gallium nitride, and / or when the intermediate layer 120 and the cap layer 140 are formed from different materials. When the intermediate layer 120 and the cap layer 140 are formed from different materials, there are fewer interfaces compared to when the active region is not segmented.
[0035] Furthermore, referring to Figures 4 to 7, the intermediate layer 120 and nanowire channels 131 can have various crystal orientations due to the formation of miscut portions 112 in the miscut substrate 110, or when the intermediate layer 120 and nanowire channels 131 are formed on a semipolar substrate having a large surface step. These various crystal orientations include, but are not limited to, one or more of N-polar, Ga-polar, m-plane, and semipolar. In any case, since the nanowire channels 131 are epitaxially grown or self-assembled on the surface step 122 of the uppermost surface 121, the cross-sectional shapes of the segmented active regions 130 and nanowire channels 131 can be one or more of triangles 401, squares 501, rectangles 601, trapezoids 701, or other regular or irregular shapes.
[0036] Referring to Figure 8, according to further embodiments, the segmented active regions 130 and nanowire channels 131 may be provided in multiple layers 801, 802, ..., 80N. The number of layers can be increased or decreased to meet various requirements of the RF transistor device 101.
[0037] Referring to Figure 9, a method 900 for manufacturing an RF transistor device such as the RF transistor device 101 described above is provided. The method 900 includes providing a miscut substrate (block 901), epitaxially growing an intermediate layer on the miscut substrate such that the uppermost surface of the intermediate layer includes a surface step (block 902), epitaxially growing nanowire channels, wherein each nanowire channel is epitaxially grown on one of the corresponding surface steps to form a segmented active region (block 903), and epitaxially growing a cap layer on the nanowire channels and the exposed portions of the uppermost surface (block 904).
[0038] Method 900 may further include arranging source and drain regions that are electrically in communication with the opposite end of each nanowire channel (block 905), and arranging gate structures between the source and drain regions and around each nanowire channel (block 906).
[0039] According to the embodiment, the epitaxial growth of the intermediate layers, nanowire channels, and cap layers of blocks 902, 903, and 904 can be carried out by metal-organic chemical vapor deposition or metal-organic vapor epitaxy, and can be performed continuously. Such continuous epitaxial growth can be made possible by switching precursor materials without removing the wafer material from the growth chamber, and by continuing epitaxial growth without stopping, or at least without stopping for a long period of time. Continuous epitaxial growth has the great advantage of not leaving impurities at the interface when removing the wafer from the growth chamber, a process that is frequently performed during material patterning. These impurities degrade the performance of the device.
[0040] According to further embodiments, the materials used for epitaxial growth of the intermediate layers, nanowire channels, and cap layers of blocks 902, 903, and 904 may include at least one of aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and its alloys, and indium gallium nitride and its alloys. The precursor material may include at least one of trimethylaluminum, trimethylgallium, triethylgallium, trimethylindium, triethylindium, ammonia, hydrazine, and dimethylhydrazine.
[0041] Epitaxial growth of the intermediate layers, nanowire channels, and cap layers in blocks 902, 903, and 904 self-assembles segmented channel regions that would otherwise require etching or regrowth processes to form. These conventional processes tend to introduce damage and / or impurities near sensitive parts of the device, resulting in reduced performance.
[0042] According to the embodiment, the epitaxial growth of the intermediate layers, nanowire channels, and cap layers of blocks 902, 903, and 904 may include one or more of N-polar growth, Ga-polar growth, m-plane growth, and semi-polar growth. Furthermore, the epitaxial growth of the nanowire channels in block 903 can be carried out so that segmented active regions and nanowire channels are provided in multiple layers.
[0043] Referring to Figure 10, a method 1000 for manufacturing an RF transistor device such as the RF transistor device 101 described above is provided. Method 900 includes providing a planarized substrate (block 1001), epitaxially growing an intermediate layer on the planarized substrate (block 1002), and forming a surface step on the top surface of the intermediate layer by either etching or machining (block 1003). Method 1000 further includes epitaxially growing nanowire channels, each nanowire channel being epitaxially grown on one of the corresponding surface steps to form segmented active regions (block 1004), and epitaxially growing a capping layer on the nanowire channels and the exposed top surface (block 1005).
[0044] Method 1000 may further include arranging source and drain regions electrically communicating with the opposite end of each nanowire channel (block 1006), and arranging gate structures between the source and drain regions and around each nanowire channel (block 1007). According to embodiments, the epitaxial growth of the intermediate layers, nanowire channels, and cap layers of blocks 1002, 1004, and 1005 can be carried out by organometallic chemical vapor deposition or organometallic vapor epitaxy and can be performed continuously. Such continuous epitaxial growth can be made possible by switching precursor materials without removing the wafer material from the growth chamber, and by continuing epitaxial growth without stopping, or at least without stopping for a long time. Continuous epitaxial growth has the great advantage of not leaving impurities at the interface when removing the wafer from the growth chamber, a process that is frequently performed when patterning materials. These impurities degrade the performance of the device.
[0045] According to further embodiments, the materials used for epitaxial growth of the intermediate layers, nanowire channels, and cap layers of blocks 1002, 1004, and 1005 may include at least one of aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and its alloys, and indium gallium nitride and its alloys. The precursor material may include at least one of trimethylaluminum, trimethylgallium, triethylgallium, trimethylindium, triethylindium, ammonia, hydrazine, and dimethylhydrazine.
[0046] Epitaxial growth of the intermediate layers, nanowire channels, and cap layers in blocks 1002, 1004, and 1005 self-assembles segmented channel regions that would otherwise require etching or regrowth processes to form. These conventional processes tend to introduce damage and / or impurities near sensitive parts of the device, resulting in reduced performance.
[0047] According to the embodiment, the epitaxial growth of the intermediate layers, nanowire channels, and cap layers of blocks 1002, 1004, and 1005 may include one or more of N-polar growth, Ga-polar growth, m-plane growth, and semi-polar growth. Furthermore, the epitaxial growth of the nanowire channels described in block 1004 may be carried out so that segmented active regions and nanowire channels are provided in multiple layers.
[0048] The technical effect and advantages of this disclosure are that it provides an RF transistor device that can transfer heat between the buffer layer and the cap layer without interfacial thermal boundary resistance. Furthermore, multiple parallel conductive channels are generated in the plane, improving vertical thermal conductivity. By eliminating the interface, heat can be dissipated relatively rapidly, leading to a decrease in the device's operating temperature and thus extending the device's lifespan. As a result, higher power densities become possible while maintaining the lifetime metrics for RF applications.
[0049] All means or step-plus-function elements in the following claims are intended to include any structures, materials, or actions for performing a function in combination with other claimed elements specifically claimed. The descriptions in this disclosure are presented for illustrative and descriptive purposes, but are not intended to be exhaustive or limiting to the technical concepts in the disclosed forms. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of this disclosure. The selection and description of embodiments have been made to best illustrate the principles and practical applications of this disclosure and to enable other those skilled in the art to understand this disclosure in terms of various embodiments with various modifications suitable for a particular intended use.
[0050] While preferred embodiments of this disclosure have been described, those skilled in the art should understand that various improvements and enhancements, both now and in the future, may be included in the following claims. These claims should be construed as maintaining appropriate protection to the disclosure described initially.
Claims
1. A semiconductor device, Miscut circuit board and The intermediate layer is epitaxially grown on the miscut substrate such that the uppermost surface of the intermediate layer includes a surface step, A segmented active region comprising nanowire channels, wherein each of the nanowire channels is epitaxially grown on one of the corresponding surface steps, A semiconductor device comprising the nanowire channel and a cap layer epitaxially grown on the exposed portion of the uppermost surface.
2. The semiconductor device according to claim 1, wherein there is no high thermal boundary resistance between the nanowire channel, the intermediate layer, and the cap layer.
3. The cross-sectional shape of the segmented active region is one or more of the following: triangle, square, rectangle, trapezoid. The semiconductor device according to claim 1, wherein the intermediate layer and the nanowire channel have various crystal orientations including at least one of N polarity, Ga polarity, m plane, and semipolarity.
4. The semiconductor device according to claim 1, wherein the intermediate layer, the cap layer, and the nanowire channel each contain at least one of the following: aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and its alloys, and indium gallium nitride and its alloys.
5. The semiconductor device according to claim 1, wherein the segmented active regions are provided in a plurality of layers.
6. Source region and drain region are arranged to be electrically connected to the opposite ends of the nanowire channel, The semiconductor device according to claim 1, further comprising a gate structure disposed between the source region and the drain region, and around each of the nanowire channels.
7. A method for manufacturing a semiconductor device, To provide miscut substrates, The intermediate layer is epitaxially grown on the miscut substrate such that the uppermost surface of the intermediate layer includes a surface step, The method of epitaxially growing nanowire channels, wherein each nanowire channel is epitaxially grown on a corresponding surface step to form segmented active regions, and the epitaxial growth is carried out accordingly. The method comprising epitaxially growing a cap layer on the nanowire channel and the exposed portion of the uppermost surface.
8. The method according to claim 7, wherein the epitaxial growth of the intermediate layer, the nanowire channel, and the cap layer comprises metal-organic chemical vapor deposition (CVD).
9. The material for the epitaxial growth of the intermediate layer, the cap layer, and the nanowire channel comprises at least one of the following: aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and its alloys, and indium gallium nitride and its alloys. The method according to claim 7, wherein the precursor material comprises at least one of trimethylaluminum, trimethylgallium, triethylgallium, trimethylindium, triethylindium, ammonia, hydrazine, and dimethylhydrazine.
10. The method according to claim 7, wherein the epitaxial growth of the intermediate layer, the nanowire channel, and the cap layer is continuous.
11. The method according to claim 7, wherein the epitaxial growth of the intermediate layer, the nanowire channel, and the cap layer includes one or more of N-polar growth, Ga-polar growth, m-plane growth, and semi-polar growth.
12. The method according to claim 7, wherein the epitaxial growth of the nanowire channel is carried out such that the segmented active region is provided in multiple layers.
13. The source region and drain region are arranged to be electrically connected to the opposite ends of the nanowire channel, The method according to claim 7, further comprising arranging gate structures between the source region and the drain region, and around each of the nanowire channels.
14. A method for manufacturing a semiconductor device, To provide a planarized substrate, The process involves epitaxially growing an intermediate layer on the planarized substrate, To form a surface step on the uppermost surface of the intermediate layer, The method of epitaxially growing nanowire channels, wherein each nanowire channel is epitaxially grown on a corresponding surface step, forming segmented active regions, and the epitaxial growth is carried out accordingly. The method comprising epitaxially growing a cap layer on the nanowire channel and the exposed portion of the uppermost surface.
15. The method according to claim 14, wherein the epitaxial growth of the intermediate layer, the nanowire channel, and the cap layer comprises metal-organic chemical vapor deposition (CVD).
16. The material for the epitaxial growth of the intermediate layer, the cap layer, and the nanowire channel comprises at least one of the following: aluminum nitride, gallium nitride, indium nitride, aluminum gallium nitride and its alloys, and indium gallium nitride and its alloys. The method according to claim 14, wherein the precursor material comprises at least one of trimethylaluminum, trimethylgallium, triethylgallium, trimethylindium, triethylindium, ammonia, hydrazine, and dimethylhydrazine.
17. The method according to claim 14, wherein at least the epitaxial growth of the nanowire channel and the cap layer is continuous.
18. The method according to claim 14, wherein the epitaxial growth of the intermediate layer, the nanowire channel, and the cap layer includes one or more of N-polar growth, Ga-polar growth, m-plane growth, and semi-polar growth.
19. The method according to claim 14, wherein the epitaxial growth of the nanowire channel is carried out such that the segmented active region is provided in multiple layers.
20. The source region and drain region are arranged to be electrically connected to the opposite ends of the nanowire channel, The method according to claim 14, further comprising arranging gate structures between the source region and the drain region, and around each of the nanowire channels.