Dielectric etching using carbon-based liners

Abstract

A method is provided for etching a feature into a stack containing a silicon-containing dielectric layer. The feature is partially etched into the stack and has sidewalls. A carbon-containing liner is deposited on the sidewalls of the feature, and the method includes providing a pressure of at least 100 mTorr, providing a deposition gas containing a carbon-containing passivation component, and generating a plasma from the deposition gas. The plasma causes a carbon-containing sidewall deposit to be deposited on the sidewalls of the feature. The feature is further etched.

Description

Technical Field

[0001] <Cross - Reference to Related Applications> This application claims the benefit of priority of U.S. Application No. 63 / 493,435, filed on March 31, 2023, which is incorporated herein by reference for all purposes.

Background Art

[0002] One process commonly used in the manufacture of semiconductor devices is the formation of etched cylinders or other concave features in a silicon - containing dielectric material. The silicon - containing dielectric material may be an alternating layer / repeat layer in which the concave features are formed, or a thick film of a single layer of the silicon - containing material. One exemplary situation in which such a process can occur is in memory applications such as DRAM (Dynamic Random Access Memory) and NAND (Negative - AND Device). As the semiconductor industry advances and device dimensions shrink, such concave features are becoming increasingly difficult to etch uniformly, particularly in high - aspect - ratio features having narrow widths and / or high depths.

[0003] The background art described herein is for the purpose of generally presenting the content of the present disclosure. The inventions of the currently named inventors are not to be regarded, either explicitly or implicitly, as prior art to the present disclosure, to the extent that they are described in a manner that does not fall within the scope corresponding to the present background art section and the prior art at the time of filing.

Summary of the Invention

[0004] To accomplish the foregoing in accordance with the purposes of this disclosure, a method is provided for etching a feature into a stack including a silicon-containing dielectric layer. The feature is partially etched into the stack and has sidewalls. A carbon-containing liner is deposited on the sidewalls of the feature. This includes providing a pressure of at least 13332.2 mPa (100 mTorr), providing a deposition gas containing a carbon-containing passivation component, and generating a plasma from the deposition gas. The plasma causes the carbon-containing sidewall deposit to be deposited on the sidewalls of the feature. The feature is further etched.

[0005] These and other features of the present disclosure will be described in more detail in conjunction with the following drawings in embodiments for carrying out the invention described below. [Brief explanation of the drawing]

[0006] This disclosure is illustrated, not limited, in the drawings of the attached drawings, and the same reference numerals mean similar elements.

[0007] [Figure 1] A flowchart illustrating a method for etching concave features into a laminate containing dielectric material, according to various embodiments.

[0008] [Figure 2A] Lamination processed according to a specific embodiment. [Figure 2B] Lamination processed according to a specific embodiment. [Figure 2C] Lamination processed according to a specific embodiment. [Figure 2D] Lamination processed according to a specific embodiment. [Figure 2E] Lamination processed according to a specific embodiment.

[0009] [Figure 3A] Another laminate processed by a specific embodiment. [Figure 3B] Another laminate processed by a specific embodiment.

[0010] [Figure 4] A reaction chamber that can be used to carry out the technology described herein, according to a particular embodiment.

[0011] [Figure 5] A computer system for implementing a controller used in an embodiment of the present invention.

[0012] In drawings, the same reference number may be used to indicate similar structural elements. It should also be noted that the depiction in the drawings is illustrative and not to actual scale. [Modes for carrying out the invention]

[0013] Herein, the disclosure is described in detail with reference to some preferred embodiments thereof, as shown in the accompanying drawings. In the following description, some specific details are given in order to provide a full understanding of the disclosure. However, it will be obvious to those skilled in the art that the disclosure may be carried out without some or all of these specific details. In other examples, well-known process steps and / or structures are not described in detail so as not to make the disclosure unnecessarily difficult to understand.

[0014] The manufacture of certain semiconductor devices involves etching features into a layer of materials using a plasma etching process. In various embodiments herein, the layer of materials includes alternating / repeating layers of dielectric materials. In some cases, at least one layer in the layer is a silicon-containing layer, or includes a silicon-containing layer. The silicon-containing layer may include silicon nitride, silicon oxide, silicon carbide, silicon oxynitride, silicon oxycarbide, polysilicon, or silicon germanium. In one example, the layer includes alternating layers of silicon oxide and polysilicon. In some embodiments, the layer includes alternating layers of silicon oxide and silicon nitride films, or a single layer of silicon oxide.

[0015] Features etched into silicon-containing materials may be cylindrical, trench, or other concave features. The aspect ratio of such features is defined as the depth divided by the lateral limit dimension. As the aspect ratio of such features increases, several problems arise, including (1) twisting of the feature, (2) non-circularity of the feature, (3) aspect ratio-dependent etching rate, (4) bowing etching geometry, (5) insufficient mask selectivity, and (6) low etching rate.

[0016] Torsion refers to a random deviation between the intended bottom position of a feature and the actual final bottom position of the feature (for example, the final position of a feature corresponds to the bottom position of the feature after it has been etched). For example, in some cases, cylindrical features are intended to be etched in a regular arrangement. Torsion is understood when some or all of the features at the bottom are randomly deviated from this arrangement. Torsion can be measured by the degree to which the features deviate from the desired arrangement pattern. The torsion described herein is the standard deviation between holes at the bottom of the feature, multiplied by 3. Since torsion is an undesirable feature, it is preferable that the standard deviation be as low as possible.

[0017] The non-circularity of a feature, also called ellipticity, refers to the deviation of the shape of the bottom hole from the circular hole shape. This problem is relevant when etching circular features such as cylinders when it is desirable for the bottom of the concave feature to be circular. When the hole shape at the bottom deviates from circular, it often forms a shape close to an ellipse, triangle, or irregular polygon. In many cases, these non-circular shapes are not desirable. Ellipticity can be measured by how much the bottom of a cylindrical feature deviates from a perfect circle to an ellipse, and is calculated as the ratio of the major axis length to the minor axis length for an ellipse that fits the bottom hole shape. A perfect circular feature has an ellipticity of 1.0. Since a circular feature is often desired (e.g., during cylindrical etching), it is preferable for the ellipticity to be close to 1.0. In various embodiments, a mask feature having a circular cross-section results in a feature having an average ellipticity of 1.0 to 1.1.

[0018] Aspect ratio-dependent etching rate becomes a problem when the etching rate decreases as the aspect ratio of the feature increases. That is, as the feature is etched deeper into the dielectric material, the etching process becomes slower. This results in low throughput and high associated processing costs, making this problem a difficult one.

[0019] The bowing etching shape means that as the feature is etched laterally into the dielectric layer, the final shape tends to bend outward excessively somewhere along the depth of the feature. That is, the actual maximum dimension of the feature exceeds the desired maximum dimension, which may compromise the integrity of the formed structure or limit the electrical performance of the final device.

[0020] Insufficient mask selectivity becomes a problem when the etching process removes an excessive amount of the mask, resulting in no mask remaining at the end of the process or the amount of mask remaining being insufficient to properly transfer the pattern from the mask to the dielectric film. A common consequence of insufficient mask selectivity is the deterioration of the feature shape near the top of the concave feature.

[0021] A low etching rate means an etching rate that is slower than the rate desired for a particular application. A low etching rate is a problem because it causes an increase in etching time, a decrease in throughput, and an increase in processing cost.

[0022] Unfortunately, techniques that improve some of these problems often worsen other problems. Therefore, when planning an etching operation, these problems are considered in balance with each other. For example, conventional industrially implemented dielectric etching processes often result in significant bowing. Previously, it was difficult to avoid such trade-offs.

[0023] The techniques described herein can be used to etch concave features in a dielectric material without some or all of the problems described above. That is, the techniques of the present disclosure can be used to etch concave features in a dielectric material with little twist, with moderately circular features, with an acceptable aspect ratio-dependent etching rate, with acceptable bowing, with a sufficient mask selectivity, and with a sufficient etching rate.

[0024] In various embodiments of the present specification, an etching process is provided that includes multiple cycles of etching a stack including at least one dielectric layer and depositing a carbon-containing sidewall passivation film. The carbon-containing sidewall passivation film is deposited uniformly on the sidewalls of the features.

[0025] Figure 1 is a flowchart of the process that may be used in several embodiments for ease of understanding. The lamination is placed on a substrate support in a process chamber (step 104). Figure 2A is a schematic cross-sectional view of a lamination 204 that may be processed according to several embodiments. The lamination 204 may be formed on a substrate 208. The lamination 204 is a silicon oxide (SiO2) layer 212 beneath a polysilicon (Si) mask 216 having a mask feature 220. In some embodiments, there may be one or more layers between the silicon oxide layer 212 and the substrate 208. In some embodiments, there may be one or more layers between the silicon oxide layer 212 and the polysilicon mask or doped polysilicon mask 216. In some embodiments, the mask feature has a CD of less than 25 nanometers (nm). In some embodiments, the mask feature has a CD of less than 20 nm. The silicon oxide layer includes a silicon oxide-based layer. The silicon oxide-based layer is a silicon oxide layer that may also include one or more dopants. Similarly, the polysilicon layer also includes a polysilicon layer that includes at least one dopant resulting in a polysilicon-based layer. The silicon nitride layer includes a silicon nitride layer containing at least one dopant that forms a silicon nitride-based layer.

[0026] In some embodiments, the laminate 204 is partially etched (step 108). This partial etching is optional and is not performed in some embodiments. Figure 2B is a schematic cross-sectional view of the laminate 204 after the feature 224 has been partially etched into the laminate 204.

[0027] Next, a periodic process is provided (step 112). In some embodiments, the periodic process (step 112) includes one or more cycles of depositing a carbon-containing sidewall layer (step 116) and etching the stack (step 120). In some embodiments, depositing the carbon-containing sidewall layer includes applying a pressure of at least 13332.2 mPa (100 mTorr) and providing a deposition gas containing a carbon-containing passivation component. In some embodiments, the deposition gas includes nitrogen (N2) and at least one of hydrocarbons and fluorinated hydrocarbons. In some embodiments, the deposition gas includes nitrogen (N2), at least one of hydrocarbons and fluorinated hydrocarbons, and at least one of metal halides and carbonyl sulfides. In some embodiments, the metal halide includes at least one of molybdenum hexafluoride and tungsten hexafluoride. The most significant improvements were obtained when the deposition gas included nitrogen (N2), tungsten hexafluoride, and at least one of hydrocarbons and fluorinated hydrocarbons. Plasma is generated from the deposition gas, causing carbon-containing sidewall deposits to be deposited on the sidewalls of the features. Figure 2C is a schematic cross-sectional view of the stack 204 after the carbon-containing sidewall layer 228 has been deposited on the sidewall of feature 224. The carbon-containing sidewall layer 228 is not shown in exact proportions, but is shown thicker to make it more clearly visible.

[0028] After the carbon-containing sidewall layer is deposited (step 116), the stack is etched (step 120). In some embodiments, reactive ion etching is used. In some embodiments, chemical etching is used. In some embodiments, a combination of reactive ion etching and chemical etching is used. In some embodiments, etching (step 120) is performed using a chamber pressure of less than 6666.1 mPa (50 mTorr). In some embodiments, etching (step 120) is performed using a chamber pressure of less than 1333.22 mPa (10 mTorr). Figure 2D is a schematic cross-sectional view of the stack 204 after etching. Feature 224 is etched more deeply. The carbon-containing sidewall layer 228 shown in Figure 2C is etched away. In some embodiments, the carbon-containing sidewall layer 228 is etched but not etched away.

[0029] In some embodiments, the deposition of the carbon-containing sidewall layer (step 116) and etching of the stack (step 120) are repeated periodically for multiple cycles until etching of the features is complete. During each cycle, the pressure in the chamber is between 13332.2 mPa and less than 6666.1 Pa (between 100 mTorr and less than 50 mTorr). Figure 2E is a schematic cross-sectional view of the stack 204 after etching of feature 224 is complete. The mask 216 is etched. In some embodiments, the mask 216 is completely etched away. The stack may be further processed in the process chamber as needed (step 124). In some embodiments, if the mask 216 is not completely etched away, the remaining mask 216 and the remaining passivation layer may be removed by any process. The stack is removed from the substrate support in the process chamber (step 128). In this example, the stack remains on the substrate support during the partial etching (step 108) and the periodic process (step 112), and the partial etching (step 108) and the periodic process (step 112) are performed in situ in the same process chamber.

[0030] Deposition of carbon-containing sidewall layers using a deposition gas containing nitrogen (N2), tungsten hexafluoride, and at least one of hydrocarbons and fluorinated hydrocarbons at pressures exceeding 13332.2 mPa (100 mTorr) has been found to provide carbon-containing sidewall layers that deposit more uniformly on silicon oxide than other materials such as polysilicon. Experiments have shown that N2 is decisive. Experiments have shown that methane (CH4), fluoromethane (CH3F), or difluoromethane (CH2F2) result in uniform carbon deposition. It has also been found that high pressures exceeding 13332.2 mPa (100 mTorr) are required. In some embodiments, the pressure was 13332.2 mPa to 79993.2 mPa (100 mTorr to 600 mTorr). In some embodiments, the pressure was 26664.4 mPa to 66661 mPa (200 mTorr to 500 mTorr). In some embodiments, the sidewall deposit is a metal-free, carbon-containing layer.

[0031] In some embodiments, the carbon-containing component is difluoroethylene (C2H2F2). Experiments have shown that difluoroethylene provides improved sidewall protection. In some embodiments, the deposit gas includes at least one additive of hydrogen bromide (HBr) and silicon tetrachloride (SiCl4). These cause the carbon deposit to be deposited more conformally deeper into the feature, improving sidewall protection at deeper levels of the feature.

[0032] Prior art carbon deposition processes deposit more carbon on polysilicon than on silicon oxide. As a result, for the stacking shown in Figure 2A, increased carbon deposition on the polysilicon sides can lead to bread-loafing, which closes out features with CD less than 20 nm, or can cause etch stops on such features. By providing uniform carbon deposition, features with CD less than 20 nm are not closed out. Furthermore, the carbon deposition protects the sidewalls of features to reduce bowing. Bowing forms the maximum CD at the bowing location. Other methods may be used to reduce bowing. However, other methods may increase etching time, reduce etching selectivity, increase torsion, increase non-circularity, increase aspect ratio-dependent etching, increase etch stops, increase feature clogging, or introduce other harmful etching effects. Additional control tools are added to enable bowing and CD reduction without increasing other harmful etching effects by providing uniform sidewall passivation. Several experiments have found this to be true for features with approximately 20 nm CD.

[0033] In some embodiments, Figure 3A is a schematic cross-sectional view of another laminate 304 that may be processed according to some embodiments. In some embodiments, the laminate 304 may be formed on a substrate 308. One or more layers may be placed between the laminate 304 and the substrate 308. In some embodiments, the laminate 304 is a plurality of bilayers of at least a layer of silicon oxide (SiO2) 316 and a layer of polysilicon (Si) 312 or silicon nitride (SiN). A mask 320 having a mask feature 322 may be formed on the laminate 304. In some embodiments, the mask 320 is a carbon-containing mask such as an organic mask, one example of which would be an amorphous carbon mask. The amorphous carbon mask may contain some hydrogen and / or oxygen.

[0034] The laminate 304 is placed on a substrate support in a process chamber (step 104). A periodic process is provided (step 112). In some embodiments, the deposition of a carbon-containing sidewall layer (step 116) and etching of the laminate (step 120) are repeated periodically for multiple cycles until etching of the features is complete. The recipe for etching the laminate (step 120) is a recipe for uniformly etching the silicon oxide 316 layer and the polysilicon 312 or silicon nitride layer. The deposition of the carbon-containing sidewall layer (step 116) is known to uniformly deposit the carbon-containing sidewall deposit on the sidewalls of the silicon oxide 316 layer and the polysilicon 312 or silicon nitride layer. Figure 3B is a schematic cross-sectional view of the laminate 304 after feature 324 has been etched. The sides of the feature are uniform between the silicon oxide 316 layer and the polysilicon 312 or silicon nitride layer. The prior art would deposit more carbon on the sidewalls of the polysilicon 312 or silicon nitride layer than on the sidewalls of the silicon oxide 316 layer, thereby etching the sidewalls of the silicon oxide 316 layer more and making the sides of the feature non-uniform (e.g., scalloped sidewalls).

[0035] One application of the method of this disclosure is the formation of vertical NAND devices. In this case, the material on which the features are etched may have a repeating layer structure. For example, this material may include alternating layers of silicon oxide and polysilicon, or alternating layers of silicon oxide and silicon nitride. The alternating layers form pairs of material or repeating groups of material. In various cases, the number of pairs or repeating groups may be about 10 to 500 (e.g., about 20 to 1000 individual layers). The features etched into the stack may have a depth of about 2 to 15 μm (e.g., about 5 to 9 μm). The features may have a width of about 10 to 100 nm (e.g., about 10 to 50 nm). In some embodiments, the features have a width of less than 20 nm. In some embodiments, the features have a width of less than 15 nm.

[0036] In this specification, "high aspect ratio" applied to substrate features means a depth-to-width aspect ratio of approximately 60:1 or greater. This range may more preferably include ratios greater than 100:1, 120:1, 140:1, etc. However, the processes described herein may also be beneficial for low aspect ratios (e.g., 30:1 or 10:1).

[0037] There are many types of mask layers that can be used in the embodiments described, and will include any such layers well known in the art that can serve as etching masks. For example, the mask may be a carbon hard mask such as amorphous carbon. In other embodiments, the mask may be doped carbon. In some embodiments, the mask may contain silicon, a metal, or a metalloid.

[0038] The dimensions / parameters described herein (e.g., height, aspect ratio, thickness, width, depth, etc.) are for illustrative purposes only. It should be understood that modifications to the dimensions / parameters are applicable or usable based on the disclosures herein. Device

[0039] The various hardware and method embodiments described above may be used in conjunction with lithography patterning tools or processes (e.g., fabrication or manufacture of semiconductor devices, display devices, LEDs, solar panels, etc.). While not usually required, such tools / processes will typically be used or performed together in a common fabrication facility.

[0040] Lithographic patterning of a film typically includes some or all of the following steps, each of which can be performed by several possible tools: (1) coating a photoresist onto a workpiece (e.g., a substrate on which a silicon-containing film is formed) using a spin-on tool or a spray-on tool; (2) curing the photoresist using a hot plate, furnace, or other suitable curing tool; (3) exposing the photoresist to visible light, ultraviolet (UV) light, or X-ray light using a tool such as a wafer stepper; (4) patterning the resist by developing and selectively removing the resist using a wet bench or spray developing apparatus; (5) transferring the resist pattern to an underlying film or workpiece using a dry etching tool or a plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper. In some embodiments, an ashable hard mask layer (e.g., an amorphous carbon layer) and another suitable hard mask (e.g., an anti-reflective layer) may be deposited before the coating of the photoresist.

[0041] In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “semi-finished integrated circuit” may be used synonymously. Those skilled in the art will understand that the term “semi-finished integrated circuit” may mean a silicon wafer at any stage of the many integrated circuit manufacturing processes. Wafers or substrates used in the semiconductor device industry typically have a diameter of 200 mm, 300 mm, or 450 mm. The embodiments for carrying out the above invention are based on the premise that the embodiments are carried out on a wafer, but are not limited thereto. Workpieces may have a variety of shapes, sizes, and materials. In addition to semiconductor wafers, other workpieces on which the embodiments of the disclosure can be used include a variety of articles such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical elements, and micromechanical devices.

[0042] Unless otherwise defined for a specific parameter, the terms “about” and “approximately” as used herein are intended to mean ±10% of the relevant value.

[0043] Figure 4 is a schematic diagram of a plasma processing chamber 400 for a plasma processing substrate in an embodiment. In one or more embodiments, the plasma processing chamber 400 comprises a gas distribution plate 406 providing a gas inlet and an electrostatic chuck (ESC) 416 within a plasma processing chamber 404 surrounded by chamber walls 450. Within the plasma processing chamber 404, a substrate 208 is placed on top of the ESC 416 such that the ESC 416 becomes a substrate support. The ESC 416 may be biased from an ESC power supply 448. A gas source 410 is connected to the plasma processing chamber 404 through the gas distribution plate 406. An ESC temperature controller 451 is connected to the ESC 416 and provides temperature control for the ESC 416. A radio frequency (RF) power supply 430 provides RF power to the ESC 416 and the upper electrode. In this embodiment, the upper electrode is the gas distribution plate 406. In a preferred embodiment, power supplies of 400 kHz, 13.56 MHz, 1 MHz, 2 MHz, 60 MHz, and / or 27 MHz as needed constitute the RF power supply 430 and the ESC power supply 448. A controller 435 is controllably connected to the RF power supply 430, the ESC power supply 448, the exhaust pump 420, and the gas source 410. A high-flow liner 460 is a liner within the plasma processing chamber 404 that confines gas from the gas source and has slots 462. The slots 462 maintain a controlled flow of gas from the gas source 410 to the exhaust pump 420. An example of such a plasma processing chamber is the Flex® etching system manufactured by Lamb Research Corporation in Fremont, California. The process chamber may be a CCP (capacitively coupled plasma) reactor or an ICP (inductively coupled plasma) reactor.

[0044] Figure 5 is a high-level block diagram representing a computer system 500 for implementing a controller 435 used in an embodiment of the present invention. The computer system may take many physical forms, ranging from integrated circuits, printed circuit boards, and small handheld devices to large supercomputers. The computer system 500 may include one or more processors 502, and may further include an electronic display device 504 (for displaying graphs, text, and other data), main memory 506 (e.g., random access memory (RAM)), storage device 508 (e.g., hard disk drive), removable storage device 510 (e.g., optical disc drive), user interface device 512 (e.g., keyboard, touchscreen, keypad, mouse, or other pointing device), and / or communication interface 514 (e.g., wireless network interface). The communication interface 514 may allow software and / or data to be transferred between the computer system 500 and external devices via a link. The system may also include a communication infrastructure 516 (e.g., communication bus, crossover bar, or network) to which the aforementioned devices / modules can be connected.

[0045] The information transmitted via the communication interface 514 may be in the form of a signal (e.g., an electronic signal, an electromagnetic signal, an optical signal, or any other signal receivable by the communication interface 514 via a communication link carrying the signal), and may be implemented using wiring or cables, optical fibers, telephone lines, mobile phone links, radio frequency links, and / or other communication channels. Such a communication interface is intended to allow one or more processors 502 to receive information from or output information to the network in the process of carrying out the above method steps. Furthermore, embodiments of the method may be performed only on a processor, or in cooperation with remote processors that share part of the processing, on a network such as the Internet.

[0046] The term “non-temporary computer-readable medium” generally refers to a medium (e.g., main memory, secondary memory, removable storage, and storage devices (hard disks, flash memory, disk drive memory, CD-ROMs, and other forms of persistent memory)) and is not interpreted to include temporary objects such as carriers or signals. Examples of computer code include files containing machine code (e.g., code generated by a compiler) and high-level code that are executed by a computer using an interpreter. Computer-readable medium may also be computer code transmitted by computer data signals that are embodied in a carrier and represent a set of instructions executable by a processor.

[0047] The configurations and / or techniques described herein are essentially illustrative, and since many variations are possible, these particular embodiments or examples should not be considered limiting. The specific procedures or methods described herein may represent one or more of any number of processing strategies. Therefore, the various actions described may be performed in the order described, in other orders, simultaneously, or with some instances omitted. Similarly, the order of the processes described above may be changed. The subject matter of this disclosure includes all novel and non-obvious combinations and subcombinations of the various processes, systems, and configurations disclosed herein, as well as all their equivalents, as well as other features, functions, actions, and / or characteristics. conclusion

[0048] While this disclosure has been described in terms of several preferred embodiments, there are many changes, modifications, substitutions, and various alternative equivalents that fall within the scope of this disclosure. It should also be noted that there are many other ways of carrying out the methods and apparatus of this disclosure. Therefore, the claims appended below are intended to be construed as including all such changes, modifications, substitutions, and various alternative equivalents that fall within the true spirit and scope of this disclosure. The expressions “A, B, or C” as used herein should be construed as meaning a logic using the non-exclusive logic “OR” (“A OR B OR C”), and not as meaning “only one of A, B, and C.” Each step in the process may be an optional step and is not mandatory. Different embodiments may omit one or more steps, or provide steps in a different order. Furthermore, different embodiments may provide different steps simultaneously rather than sequentially.

Claims

1. A method for etching features into a stack including a silicon-containing dielectric layer, (a) A step of partially etching a feature having a side wall into the stack, (b) A step of depositing a carbon-containing liner on the side wall of the feature, To provide a pressure of at least 13332.2 mPa (100 mTorr), To provide a deposit gas containing carbon-containing passivation components, A step comprising generating a plasma from the deposit gas, wherein the plasma deposits a carbon-containing sidewall deposit on the sidewall of the feature, (c) A step of further etching the feature, Methods that include...

2. The method according to claim 1, A pressure of at least 13332.2 mPa (100 mTorr) is a pressure of 13332.2 mPa to 79993.2 mPa (100 mTorr to 600 mTorr), by a certain method.

3. The method according to claim 1, The aforementioned pressure of at least 13332.2 mPa (100 mTorr) is a pressure of 26664.4 mPa to 66661 mPa (200 mTorr to 500 mTorr), in a method.

4. The method according to claim 1, The aforementioned deposit gas is nitrogen (N 2 A method comprising at least one of a hydrocarbon and a fluorinated hydrocarbon.

5. The method according to claim 4, The method further comprises a deposit gas containing at least one of a metal halide and a carbonyl sulfide.

6. The method according to claim 4, The method further comprises tungsten hexafluoride in the aforementioned depositional gas.

7. The method according to claim 4, At least one of the hydrocarbons and fluorinated hydrocarbons is fluoromethane (CH4). 3 F), difluoromethane (CH 2 F 2 ), and methane (CH 4 A method comprising at least one of the following.

8. The method according to claim 4, At least one of the hydrocarbons and fluorinated hydrocarbons is methane (CH4). 4 Methods including )

9. The method according to claim 1, A method wherein steps (b) and (c) are repeated at least two times.

10. The method according to claim 1, The above steps (a) to (c) are performed in-situ within a processing chamber.

11. The method according to claim 10, A method wherein a pressure of 50 mTorr or less is provided during the step of further etching the aforementioned features.

12. The method according to claim 1, The silicon-containing laminate comprises at least one silicon oxide-based layer, and the method comprises the step of partially etching the feature, or the step of further etching the feature, which involves etching the at least one silicon oxide-based layer.

13. The method according to claim 1, A method wherein at least some of the features have a CD of less than 25 nm.

14. The method according to claim 1, The method for further etching of the aforementioned features is reactive ion etching.

15. The method according to claim 1, The method wherein the lamination comprises at least one silicon oxide-containing layer beneath a polysilicon mask or a doped polysilicon mask, and the further etching of the feature selectively etches the at least one silicon oxide-containing layer relative to the polysilicon mask or doped polysilicon mask.

16. The method according to claim 1, The laminate comprises a plurality of at least bilayers, each at least bilayer comprising at least one silicon oxide layer and at least one of silicon nitride and polysilicon layers, and the step of further etching the features is to uniformly etch the at least one silicon oxide layer and at least one of the silicon nitride and polysilicon layers.

17. The method according to claim 1, The carbon-containing passivation component contains difluoroethylene (C 2 H 2 F 2 ), method.

18. The method according to claim 1, The aforementioned deposit gases are hydrogen bromide (HBr) and silicon tetrachloride (SiCl 4 A method comprising at least one of the following, and at least one of a hydrocarbon and a fluorinated hydrocarbon.

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