Electrostatic chuck with high-density plasma barrier coating

The application of an HDP barrier coating on electrostatic chucks addresses substrate contamination in HDP-CVD processes by reducing metallic contamination and ensuring film purity and uniformity.

JP2026524931APending Publication Date: 2026-07-24LAM RES CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
LAM RES CORP
Filing Date
2024-07-19
Publication Date
2026-07-24

AI Technical Summary

Technical Problem

Contamination of substrates during high-density plasma chemical vapor deposition (HDP-CVD) processes due to electrostatic chuck materials, such as aluminum nitride, is a significant issue, leading to potential contamination and sputter-etching risks.

Method used

Application of a high-density plasma (HDP) barrier coating on electrostatic chucks, comprising materials like silicon oxide or silicon carbide, with controlled thickness and uniformity, to prevent substrate contamination and maintain clamping force.

Benefits of technology

The HDP barrier coating effectively reduces substrate contamination by electrostatic chuck materials, enhancing the purity and uniformity of deposited films while maintaining adequate clamping force.

✦ Generated by Eureka AI based on patent content.

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Abstract

The electrostatic chuck comprises a substrate-facing surface having one or more substrate contact areas. The electrostatic chuck further comprises a high-density plasma (HDP) barrier coating on at least a portion of one or more substrate contact areas.
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Description

[Background technology]

[0001] Plasma-enhanced chemical vapor deposition (PECVD) is a technique used to deposit thin films or coatings onto substrates. A precursor gas is introduced into a vacuum chamber, where a plasma is formed. The precursor gas is then converted into reactive chemical species by the plasma. These reactive species adsorb onto the substrate surface, forming a solid film on the substrate.

[0002] PECVD often utilizes capacitively coupled plasma formed between the showerhead and base of the PECVD tool. A related film deposition method known as high-density plasma (HDP) CVD uses inductively coupled plasma to increase the ion flux density to which the substrate is exposed compared to conventional PECVD. The higher the ion flux, the denser the film that can be formed on the substrate. [Overview of the Initiative]

[0003] This summary of the invention is provided to introduce in a simplified form some of the concepts that will be further described in the embodiments for carrying out the invention described below. This summary of the invention is not intended to identify any major or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to embodiments that resolve any or all of the defects mentioned in any part of this disclosure.

[0004] An example is disclosed relating to protecting a substrate from contamination by an electrostatic chuck during a high-density plasma (HDP) chemical vapor deposition (CVD) process. The example provides an electrostatic chuck having a substrate-facing surface with one or more substrate contact areas. The electrostatic chuck further comprises an HDP barrier coating on at least a portion of the one or more substrate contact areas.

[0005] In some such examples, the HDP barrier coating comprises one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbide.

[0006] Additionally or alternatively, in some such examples, the HDP barrier coating has a thickness of 3 to 5 microns.

[0007] Additionally or alternatively, in some such examples, the peak-to-peak variation in the thickness of the HDP barrier coating is less than 10% of the average thickness.

[0008] Additionally or alternatively, in some such examples, electrostatic chucks contain aluminum nitride.

[0009] Another example provides a method for operating a vapor deposition tool. The method comprises placing a substrate on an electrostatic chuck equipped with an HDP barrier coating. The method further comprises depositing an HDP film on the substrate using HDP-CVD.

[0010] In some such examples, depositing an HDP film on a substrate using HDP-CVD involves forming an oxide layer in a fully depleted silicon-on-insulator substrate fabrication process.

[0011] In addition or alternatively, in some such examples, the HDP barrier coating comprises one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbide.

[0012] Additionally or alternatively, in some such examples, the HDP barrier coating has a thickness of 3 to 5 microns.

[0013] Additionally or alternatively, in some such examples, the method comprises depositing an HDP oxide film on a plurality of substrates including the substrate, then removing the pre - coating and the HDP barrier coating, and then applying a new pre - coating and a new HDP barrier coating on the electrostatic chuck.

[0014] Additionally or alternatively, in some such examples, removing the pre - coating and the HDP barrier coating comprises removing the pre - coating and the HDP barrier coating using a fluoride plasma.

[0015] Additionally or alternatively, in some such examples, a vapor deposition tool is used to apply the HDP barrier coating to the electrostatic chuck.

[0016] Additionally or alternatively, in some such examples, the method comprises adjusting a process gas mixture before applying the HDP barrier coating.

[0017] Another example provides a method of operating an HDP - CVD tool. The method comprises applying an HDP barrier coating to an electrostatic chuck.

[0018] In some such examples, the method comprises covering the upper surface of one or more substrate contact regions of the electrostatic chuck with a protective cover before applying the HDP barrier coating to the electrostatic chuck, applying the pre - coating to the surface within the processing chamber of the HDP - CVD tool, and then exposing the upper surface of one or more substrate contact regions of the electrostatic chuck.

[0019] Additionally or alternatively, in some such examples, the method comprises adjusting a process gas mixture between applying the pre - coating to the electrostatic chuck and applying the HDP barrier coating.

[0020] In addition or alternatively, in some such examples, the HDP barrier coating comprises one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonite, or silicon carbide.

[0021] Additionally or alternatively, in some such examples, depositing the HDP barrier coating involves depositing an HDP barrier coating having a thickness of 3 to 5 microns.

[0022] Additionally or alternatively, in some such examples, the method comprises removing the HDP barrier coating and then applying a new HDP barrier coating onto the electrostatic chuck.

[0023] Additionally or alternatively, in some such examples, removing the HDP barrier coating involves using fluoride plasma to remove the HDP barrier coating. [Brief explanation of the drawing]

[0024] [Figure 1] Figure 1 shows an example of an HDP-CVD (High-Density Plasma Chemical Vapor Deposition) tool.

[0025] [Figure 2] Figure 2 is a flowchart illustrating an exemplary method for forming an HDP barrier coating on an electrostatic chuck.

[0026] [Figure 3] Figure 3 is a flowchart illustrating an exemplary method for operating the HDP-CVD tool.

[0027] [Figure 4] Figure 4 is a flowchart illustrating another exemplary method of operating the HDP-CVD tool.

[0028] [Figure 5A]Figure 5A is a schematic diagram showing cross-sectional views of the substrate at various stages in an exemplary HDP-CVD process. [Figure 5B] Figure 5B is a schematic diagram showing cross-sectional views of the substrate at various stages in an exemplary HDP-CVD process. [Figure 5C] Figure 5C is a schematic diagram showing cross-sectional views of the substrate at various stages in an exemplary HDP-CVD process. [Figure 5D] Figure 5D is a schematic diagram showing cross-sectional views of the substrate at various stages in an exemplary HDP-CVD process. [Figure 5E] Figure 5E is a schematic diagram showing cross-sectional views of the substrate at various stages in an exemplary HDP-CVD process. [Figure 5F] Figure 5F is a schematic diagram showing cross-sectional views of the substrate at various stages in an exemplary HDP-CVD process.

[0029] [Figure 6] Figure 6 shows examples of silicon-on-insulator (SOI) wafers and fully depleted SOI (FDSOI) devices that can be manufactured using the HDP-CVD tools shown in Figure 1.

[0030] [Figure 7] Figure 7 is a chart showing exemplary Al contamination levels, comparing HDP-CVD films deposited using an uncoated electrostatic chuck with HPD-CVD films deposited using one coated with an HDP-CVD barrier coating.

[0031] [Figure 8] Figure 8 is a flowchart illustrating another exemplary method for operating the HDP-CVD tool.

[0032] [Figure 9] Figure 9 is a schematic diagram of an exemplary computing system. [Modes for carrying out the invention]

[0033] The term "chemical vapor deposition" (CVD) generally refers to a process in which a solid-phase film is formed on a substrate by guiding a stream of one or more precursor gases onto the substrate surface under conditions configured to chemically convert the precursor gases into a solid-phase film. The term "plasma-enhanced chemical vapor deposition" (PECVD) generally refers to a CVD process in which plasma is used to facilitate the chemical conversion of one or more precursor gases into a solid-phase film on the substrate. The term "high-density plasma CVD" (HDP-CVD) generally refers to a CVD process that uses inductively coupled plasma to form a higher-density plasma than conventional PECVD. The terms "growth," "deposition," and their variations may also be used to refer to film formation.

[0034] The term "electrostatic chuck" generally refers to a physical structure configured to firmly hold a substrate by applying electrostatic force during a process.

[0035] The term "flow control hardware" generally refers to a set of components configured to fluidly connect one or more chemical sources to a processing chamber. Flow control hardware may include, for example, one or more mass flow controllers and / or valves.

[0036] The term "fully depleted silicon-on-insulator" (FDSOI) generally refers to a semiconductor process technology that utilizes a substrate comprising a base silicon layer, a thin "embedded" oxide layer, and a top silicon layer covering the embedded oxide layer. FDSOI transistor devices contain a channel built on top of the embedded oxide layer. The embedded oxide layer allows the channel to be undoped. The term "silicon-on-insulator" (SOI) generally refers to a substrate comprising a base silicon layer, an embedded oxide layer, and a top silicon layer.

[0037] The term "HDP barrier coating" generally refers to a film deposited on an electrostatic chuck by HDP-CVD. Exemplary HDP barrier coatings include SiO2, fluorine-doped SiO2, silicon oxynitride (SiO x , x , , z ,

[0041] , , x , , x , x ,

[0040] , x , , y N y ), silicon oxycarbide (SiO x C y ), silicon oxycarbonitride (SiO x C y N z ), and silicon carbide (SiC).

[0038] The term "HDP film" generally refers to a film deposited using HDP-CVD. HDP films have a higher density than similar films formed using PECVD with capacitively coupled plasma.

[0039] The term "oxide layer" generally refers to a material layer containing oxygen and oxidizing species. Examples of oxide layers include SiO2, SiO x N y , SiO x C y , SiO x C y N z , and metal oxides (e.g., hafnium oxide (HfO x ), titanium oxide (TiO x ), tungsten oxide (WO x ), tin oxide (SnO x ), and molybdenum oxide (MoO x )).

[0040] The term "plasma generator" generally refers to a device configured to generate a plasma for providing reactive species and / or high-energy ions for substrate processing within a processing chamber.

[0041] <% The term "precoating" generally refers to a process for depositing a film on the surface of a processing chamber prior to performing substrate processing. Exemplary films that can be deposited during precoating include SiO2, fluorine-doped SiO2, SiO x Ny SiO x C y SiO x C y N z Examples include , and SiC.

[0042] The term "processing chamber" generally refers to an enclosure in which chemical and / or physical processes are carried out on a substrate. The pressure, temperature, and atmospheric composition within the processing chamber are controllable for carrying out the chemical and / or physical processes.

[0043] The term "protective cover" generally refers to a structure that is placed on top of an electrostatic chuck during the pre-coating process to protect the substrate contact area of ​​the electrostatic chuck from the pre-coating process.

[0044] The term "substrate" generally refers to any object on which a film can be deposited.

[0045] As described above, PECVD is a technique used to deposit thin films or coatings onto substrates. Conventional PECVD can provide energy for the CVD process by utilizing the capacitively coupled plasma formed between the showerhead and the substrate in the processing chamber. HDP-CVD increases the plasma density compared to conventional PECVD by using inductively coupled plasma. Inductively coupled plasma can provide a higher ion flux on the substrate surface than capacitively coupled plasma. This makes it possible to form a higher density film on the substrate than with conventional PECVD. HDP-CVD can also result in films with higher uniformity and conformability than conventional PECVD. As an example, HDP-CVD can be used to produce a uniform, thin oxide film (less than 250 Å thick) on a base silicon substrate for use as a buried oxide layer in silicon-on-insulator (SOI) substrates. Such substrates can be used to fabricate fully depleted silicon-on-insulator (FDSOI) devices.

[0046] Contamination within the processing chamber can cause problems during the semiconductor device fabrication process. The chamber material is a possible source of contamination. To help prevent substrate contamination during the film deposition process, the surfaces within the processing chamber can be pre-coated with a pre-coat film before HDP-CVD is performed. The pre-coat film can help prevent substrate contamination caused by the processing chamber material.

[0047] Typically, electrostatic chucks (ESCs) in the processing chamber are covered with protective covers during the pre-coating process in HDP-CVD processing tools. The protective covers help prevent the pre-coating material from coating the substrate contact area on the ESC. Therefore, the substrate contact area of ​​the ESC is in direct contact with the substrate held on the ESC during the HDP-CVD process. Because the substrate and ESC are in direct contact, ESC material can penetrate from the ESC into the substrate during the HDP process. For example, some ESCs include an aluminum nitride substrate contact area. Therefore, aluminum can penetrate the substrate during the HDP process. This can lead to contamination of the SOI substrate during fabrication, for example. Furthermore, uncoated areas of the ESC can also be sputter-etched during the HDP-CVD process. This also creates a risk of contamination of the substrate during processing.

[0048] Therefore, an example relating to helping prevent substrate contamination by ESC material during the HDP-CVD process is disclosed. Briefly, embodiments of the disclosed invention describe an ESC with an HDP barrier coating, and the application of the HDP barrier coating to the ESC. The HDP barrier coating is a denser layer than the pre-coat layer deposited on other surfaces of the chamber. The HDP barrier coating can help reduce the electromigration rate of the ESC material to the substrate without adversely affecting the clamping force of the substrate. The HDP barrier coating can also help prevent contamination of the ESC material by sputter etching during the HDP deposition process. This can provide further protection against contamination by the ESC material.

[0049] In some examples, the HDP barrier coating on ESC comprises a silicon oxide coating. Exemplary silicon oxide coatings include SiO2, doped SiO2 (e.g., fluorine-doped SiO2), and SiO2. x N y SiO x C y , and / or SiO x C y N z Examples include HDP barrier coatings, which may include any other suitable material. Another example of a suitable HDP barrier coating material is SiC.

[0050] In some examples, the HDP barrier coating has a thickness in the range of 1 to 5 microns. In some more specific examples, the thickness is in the range of 3 to 5 microns. In even more specific examples, the thickness is in the range of 3 to 4.2 microns. In other examples, the HDP barrier coating has any other suitable thickness. Other examples include thicknesses greater than 5 microns and thicknesses less than 1 micron. HDP barrier coatings of such thicknesses may help reduce metallic contamination of HDP films deposited on substrates, such as HDP-CVD films deposited using HDP-CVD tools, while providing adequate substrate clamping force.

[0051] The thickness of the HDP barrier coating can be very uniform across the entire substrate-facing surface of the ESC. In some examples, the thickness may have peak-to-peak variation of less than 10% of the average thickness. In some more specific examples, if the average thickness is 4000 Å, the variation may be less than 250 Å. In other examples, the peak-to-peak variation is less than 1% of the average thickness. In this way, the HDP barrier coating provides adequately uniform protection across the entire substrate. Such HDP barrier coatings and methods for forming them are described in more detail below.

[0052] Figure 1 shows a schematic diagram of an exemplary HDP-CVD tool 100 for depositing an HDP barrier coating and / or HDP film, as disclosed. The HDP-CVD tool 100 comprises a processing chamber 102, which surrounds various other components of the reactor and serves to contain the plasma. The HDP-CVD tool 100 further comprises an ESC 104 for holding the substrate during the HDP-CVD process. Although described herein in relation to HDP-CVD, it will be understood that an HDP-CVD coated ESC can also be used with any other suitable tool. Other examples of suitable tools include ALD and non-plasma-enhanced CVD tools.

[0053] The ESC104 is equipped with a movable base 108. In some examples, the bipolar electrodes of the ESC104 provide a clamping function using inner and outer electrodes. Temperature uniformity can be adjusted by adjusting the offset voltage. In this way, the ESC104 makes it possible to control the temperature of the substrate 106 and the ESC104 itself.

[0054] The HDP-CVD tool 100 further comprises a gas ring 110 for introducing a process gas into the processing chamber. The HDP-CVD tool 100 may optionally or additionally include a process gas inlet other than the gas ring 110. The processing tool 100 further comprises flow control hardware 112. The flow control hardware 112 connects the process gas sources to the processing chamber 102. In the illustrated example, the flow control hardware 112 connects a silicon-containing precursor source 114, an oxidizer source 116, an optional hydrogen-containing gas source 118, an inert gas source 120, and an optional additive source 122 to the processing chamber 102. The flow control hardware 112 may include any suitable components. Examples include a mass flow controller, valves, and conduits.

[0055] The Si-containing precursor source 114 comprises any suitable Si-containing precursor material. Some examples of suitable Si-containing precursor materials include silane and disilane. In other examples, the Si-containing precursor source comprises SiF4, which forms a fluorine-doped silicon oxide layer.

[0056] The oxidizing agent source 116 may include any suitable oxidizing agent that can be introduced into the processing chamber to oxidize the Si-containing precursor. Examples include water, molecular oxygen (O2), and oxygen-containing organic molecules such as alcohols. Exemplary alcohols include methanol, ethanol, 1-propanol, 2-propanol, isobutanol, tert-butanol, 1-butanol, and 2-butanol. In some examples, the oxidizing agent may be in the condensed phase at standard pressure and temperature. In such examples, the oxidizing agent source 116 may comprise a flow-over vapor delivery system, a vaporizer delivery system, a packed volume delivery system, a molar delivery device, or other suitable delivery system for volatilizing the condensed phase oxidizing agent.

[0057] An optional hydrogen-containing gas source 118 can be used to create a reducing environment for plasma processing. Exemplary hydrogen-containing gases include molecular hydrogen (H2) and ammonia (NH3).

[0058] The inert gas source 120 can contain any suitable inert gas. Examples include He, Ne, Ar, Kr, and Xe. In some examples, one or more additional inert gas sources may be included, each providing a different inert gas.

[0059] The optional additive source 122 may include any suitable additive. Examples include F2 and volatile metal-containing precursors that can be used to deposit doped HDP films. In other examples, the additive source 122 may include a nitrogen-containing gas source such as N2 or N2O. The nitrogen-containing gas can be used to form nitride or nitrogen-doped HDP films.

[0060] The HDP-CVD tool 100 in Figure 1 comprises two plasma sources, namely an upper RF coil 124 and a side RF coil 126. The upper RF coil 124 is a medium frequency (MFRF) coil, and the side RF coil 126 is a low frequency (LFRF) coil. The power applied using the LFRF coil assists in the ionization of the precursor gas and can initiate plasma formation. In some examples, the LF power includes frequencies in the range of 300–400 kHz. In some more specific examples, the LF power includes frequencies in the range of 325–375 kHz. In even more specific examples, the LF power includes frequencies in the range of 340–370 kHz. In some examples, the LF power is applied at 0.5–8 kW. In some more specific examples, the LF power is applied at 5 kW.

[0061] The power applied using an MFRF coil can form a magnetic field for confining and controlling the plasma. This results in higher plasma density and higher ionization efficiency than conventional PECVD. In some examples, the MF power includes frequencies in the range of 400–500 kHz. In some more specific examples, the MF power includes frequencies in the range of 425–475 kHz. In even more specific examples, the MF power includes frequencies in the range of 430–470 kHz. In some examples, the MF power is applied at 0.5–5 kW. In some more specific examples, the MF power is applied at 5 kW. However, the methods and apparatus disclosed herein are not limited to operation in a reaction chamber with dual sources, these frequencies, or RF plasma sources. One or more suitable plasma sources may be used.

[0062] The high-frequency (HFRF) source 128 electrically biases the substrate 106, attracting charged reactive species onto the substrate for the deposition reaction. The electrical energy from the HFRF source 128 is coupled to the substrate 106, for example, using electrodes or capacitive coupling. In some examples, the HF power includes frequencies in the range of 10 MHz to 10 GHz. In some more specific examples, the HF power includes frequencies in the range of 10 to 15 MHz. In some examples, the HF power is applied at 0.5 to 10 kW. In some more specific examples, the HF power is applied at 10 kW or higher. It should be noted that the bias applied to the substrate does not necessarily have to be an RF bias. Other frequencies and DC biases are also available.

[0063] The injector can be connected to the primary gas ring 110 to guide at least some of the gas or gas mixture into the processing chamber 102 and the ESC 104. In other examples, any other suitable process gas delivery system can be employed.

[0064] In some examples, the process gas is introduced additionally or alternatively using one or more inlets 130. The component gases of the process gas may or may not be premixed. In some examples, the process gas is introduced through a gas supply inlet mechanism including orifices. In some examples, at least some of the orifices orient the process gas along an injection axis that intersects the exposed surface of the substrate at an acute angle.

[0065] The process gas is discharged from the chamber 102 through outlet 123. A vacuum pump (e.g., a turbomolecular pump) typically sucks out the process gas and maintains a sufficiently low pressure inside the reactor.

[0066] The HDP-CVD tool 100 further includes a robot 132 for moving the substrate 106 in and out of the processing chamber 102. The robot 132 is configured to transport the substrate 106 without contaminating the substrate 106 or the processing chamber 102.

[0067] The HDP-CVD tool 100 further comprises a controller 134. The controller 134 is operably coupled to a movable pedestal 108, flow control hardware 112, an LFRF source 126, an MFRF source 124, and / or an HFRF source 128. The controller 134 is configured to control various functions of the HDP-CVD tool 100 and to carry out thin film deposition processes such as HDP-CVD. For example, the controller 134 is configured to manipulate the height of the movable pedestal 108 to maintain the ESC 104 and / or substrate 106 at a desired temperature. The controller 134 is also configured to manipulate the flow control hardware 112 to allow a selected gas or gas mixture to flow into the processing chamber 102 at a selected rate. The controller 134 is further configured to remove gas from the processing chamber 102 by controlling the exhaust flow through the outlet 123. The controller 134 is further configured to operate the upper RF coil 124, the side RF coil 126, and the HFRF source 128.

[0068] The controller 134 may include one or more memory devices and one or more processors. The processors may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc. The controller 134 may have any suitable computing system. An exemplary computing system is described below with reference to Figure 9.

[0069] The controller 134 can control all the activities of the deposition apparatus. The system controller 134 runs system control software that includes a set of instructions for controlling timing, mixing of processing chemicals, chamber pressure, chamber temperature, substrate temperature, radio frequency (RF) power level for plasma pretreatment, substrate chuck or pedestal position, and other parameters of a particular process. Other computer programs stored in a memory device associated with the controller 134 may be employed in some examples.

[0070] In some examples, the controller 134 includes a user interface. The user interface may include a display screen, a graphical software display of the device and / or process conditions, and user input devices such as a pointing device, keyboard, touchscreen, or microphone.

[0071] Controller parameters are related to process conditions. Examples of such process conditions include process gas composition and flow rate, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe and can be entered using the user interface. Signals for monitoring the process can be provided by the analog and / or digital input connections of the system controller 134. Signals for controlling the process are output by the analog and digital output connections of the processing tool 100.

[0072] The system software can be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control the operation of the chamber components necessary to perform the pre-coating and HDP-CVD barrier coating of the ESC according to the methods and processes described herein. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code. Exemplary hardware for controller 134 is described below in relation to Figure 9.

[0073] Figure 2 is a flowchart illustrating an exemplary method 200 for operating an HDP-CVD tool, such as the HDP-CVD tool 100 of Figure 1. Method 200 optionally includes depositing a pre-coating in the chamber before forming the HDP barrier coating on the ESC. In such an example, in 202, Method 200 may include covering the ESC within the processing chamber of the HDP-CVD tool to protect the substrate contact area of ​​the ESC from the pre-coating process. This is shown in Figure 5A, which schematically shows a cross-sectional view of an exemplary processing chamber 500. The processing chamber 500 comprises an ESC 502. A protective cover 504 is positioned over the substrate-facing surface 506 of the ESC 502. The protective cover 504 can be placed on the ESC 502, for example, by a robot, before the pre-coating process is carried out. The ESC 502 contains a dielectric material having finite resistance. In some examples, the dielectric material may include aluminum nitride (AlN). The current conducted through the bipolar electrodes and the substrate forms a charge layer at the dielectric-substrate interface. This charge layer generates an electrostatic attraction that clamps the substrate to the substrate contact area 507 of the ESC. In some examples, a protective cover 504 is clamped in a similar manner. In other examples, the protective cover 504 is held in place by gravity without the use of electrostatic clamping force. In some examples, other protective mechanisms may be used to shield the upper surface of the substrate contact area 507.

[0074] Referring again to Figure 2, in an example that optionally includes applying a pre-coating after covering the ESC in step 202, Method 200 includes applying the pre-coating to the surfaces inside the processing chamber of the HDP-CVD tool in step 204. For example, Figure 5B schematically shows the pre-coating 508 inside the processing chamber 500 in Figure 5A. In the example of Figure 5B, the pre-coating 508 is deposited on the internal chamber surface, including the exposed surfaces of the ESC 502 and the protective cover 504. The pre-coating 508 is also deposited on other structures inside the processing chamber, as well as on the walls of the processing chamber 500.

[0075] The pre-coating 508 can be formed by introducing a suitable precursor gas into the processing chamber while igniting the plasma. In some examples, the pre-coating is SiO2, fluorine-doped SiO2, SiO2 x N y SiO x C y SiO x C y N z , and / or one or more SiC. The pre-coating is configured to prevent contamination of the substrate by materials from the components of the processing chamber. As a more specific example, an SiO2 pre-coating can be formed by introducing a Si-containing precursor gas (e.g., silane) into an oxygen-containing plasma.

[0076] Referring again to Figure 2, after the pre-coating has been deposited, method 200 includes exposing the electrostatic chuck at 206. Figure 5C shows the post-pre-coating processing tool 500 with the protective cover 504 removed. As shown in the example in Figure 5C, the protective cover 504 prevents the pre-coating 508 from being deposited on the substrate contact area (SCA) 507 of the ESC 502.

[0077] In 208, method 200 in Figure 1 includes applying the HDP barrier coating to the electrostatic chuck of the HDP-CVD tool. Figure 5D shows an example of the HDP barrier coating 510 on the substrate-facing surface of ESC502. In some examples, the HDP barrier coating 510 contains silicon dioxide. Exemplary silicon dioxide includes SiO2, doped SiO2 (e.g., fluorine-doped SiO2), and SiO2. x N y SiO x C y , and / or SiO x C y N z Examples include the HDP barrier coating 510, which may include any other suitable material. Another example of a suitable HDP barrier coating material is SiC.

[0078] In some examples, the completed HDP barrier coating 510 has a thickness 512 in the range of 1 to 5 microns. In some more specific examples, the thickness 512 is in the range of 3 to 5 microns. In even more specific examples, the thickness 512 is in the range of 3 to 4.2 microns. In other examples, the HDP barrier coating 510 has any other suitable thickness. Other examples include thicknesses greater than 5 microns and thicknesses less than 1 micron. Relatively thin HDP barrier coatings (e.g., less than 2.7 microns) may tolerate more metallic contamination of the film deposited on the substrate than relatively thick HDP barrier coatings. Therefore, the level of contaminants introduced into the substrate by ESC during HDP-CVD processing may increase proportionally to the thickness of the HDP barrier coating. However, once a threshold thickness (e.g., 5 microns) is reached, the contaminant level may plateau. Therefore, increasing the thickness beyond such a threshold thickness may provide little or no additional benefit to contamination protection. Furthermore, forming a relatively thick HDP barrier coating on ESC takes longer than forming a relatively thin HDP barrier coating on ESC. When a significant degradation rate is observed on the HDP barrier, a thickness exceeding 5 microns may be justified for certain applications.

[0079] The thickness 512 may be uniform across the entire substrate-facing surface 506. In some examples, the thickness 512 may have a peak-to-peak variation of 10% or less of the average thickness 512. In some more specific examples, if the average thickness 512 is 4000 Å, the variation in thickness 512 may be 250 Å or less. In other examples, the peak-to-peak variation is 1% or less of the average thickness 512. In this way, the HDP barrier coating 510 provides adequately uniform protection across the entire substrate when the substrate is placed on the ESC 502. The uniform thickness of the HDP barrier coating also provides adequately uniform clamping force across the entire surface of the ESC 502.

[0080] As described above, HDP-CVD uses inductively coupled plasma, which provides a higher ion flux at the substrate surface than capacitively coupled plasma. As a result, the HDP barrier coating 510 can be made denser than a film of similar composition deposited using capacitively coupled plasma. In this way, the HDP barrier coating 510 reduces / prevents the diffusion or migration of metals from ESCs that could contaminate the substrate.

[0081] The HDP barrier coating 510 can be formed using any suitable process conditions. For example, depending on the target thickness of the HDP barrier coating 510, the deposition period for the HDP barrier coating can be in the range of 10 seconds to 10 minutes. All ranges described herein include the endpoint. Furthermore, in some examples, the deposition of the HDP barrier coating 510 can be carried out at a pressure of about 10 milliliters (mTorr) including an inert gas in addition to the precursor gas for the HDP barrier coating. Exemplary inert gases include helium (He), neon (Ne), argon (Ar), krypton (Kr), and / or xenon (Xe). In other examples, the inert gas is omitted.

[0082] In some cases, the HDP barrier coating 510 has a different composition and / or different physical properties from the pre-coating 508. This can be achieved by adjusting the processing conditions between the application of the pre-coating 508 to the electrostatic chuck and the application of the HDP barrier coating 510. Adjustable processing conditions include HF, MF, and LF RF power, substrate temperature, processing gas mixture composition, pressure, and gas flow rate. For example, the HDP barrier coating 510 can be formed in the presence of a higher concentration of Ar than in the pre-coating 508. Ar is a relatively heavy gas. Argon ions in the plasma can collide with the growing HDP barrier coating 510 with greater kinetic energy than, for example, helium atoms. The density of the HDP barrier coating can be increased by irradiating the surface of the growing HDP barrier coating. Therefore, by using a higher concentration of Ar when forming the HDP barrier coating 510 than when forming the pre-coat, a film with a higher density can be formed for the HDP barrier coating 510 than for the pre-coating 508.

[0083] Figure 3 shows a flowchart illustrating an exemplary method 300 for processing a substrate. In some examples, the substrate is processed with the same tool used to deposit the HDP barrier coating (e.g., HDP-CVD tool 100 in Figure 1). In other examples, the substrate is processed with different tools at the same or different locations as those used to deposit the HDP barrier coating.

[0084] In 310, method 300 includes placing a substrate on an ESC having an HDP barrier coating. The substrate can be placed on the ESC by a robot such as robot 132. In 312, method 300 further includes depositing an HDP film on the substrate using HDP-CVD. Figure 5E shows an example of a substrate 514 on the ESC 502 of Figures 5A to 5D. In the example of Figure 5F, an HDP film 516 is deposited on the substrate 514.

[0085] In some examples, the substrate 514 comprises a base layer of the SOI wafer. In some such examples, the HDP film 516 comprises an oxide layer of the SOI wafer. Figure 6 shows an example of an SOI wafer 600 that can be manufactured using the methods and processing tools described herein. Figure 6 also shows an example of an FD-SOI device 602 that can be manufactured from the SOI wafer 600. The FD-SOI device 602 comprises a device layer 604 and an insulating layer 606 on a substrate 608. The device layer 604 comprises a source 610 and a drain 612 separated by a fully depleted channel region 614. The FD-SOI device 602 further comprises a gate 616 and a gate insulating film 618. The insulating layer 606 may be silicon oxide formed, for example, using HDP-CVD.

[0086] Referring again to Figure 5F, in some examples, the HDP film 516 has a different composition and / or different physical properties (e.g., thickness, density, and / or dielectric constant) from the HDP barrier coating 510 and / or pre-coating 508. Some examples of materials suitable for the HDP film 516 include SiO2 and fluorine-doped SiO2. As described above, different compositions of the HDP film 516 can be achieved by adjusting the processing gas mixture between the application of the pre-coating 508 and the application of the HDP barrier coating 510.

[0087] In the experiment, the presence of the HDP barrier coating reduced aluminum (Al) contamination in HDP films from AlN ESCs to one-fifth compared to HDP films deposited in the presence of bare ESCs. Figure 7 shows an exemplary chart of the Al content of HDP films. As shown in Figure 7, HDP films deposited using bare ESCs had higher intra-film Al contamination on the back surface than HDP films deposited using ESCs with the HDP barrier coating.

[0088] Referring again to Figure 3, steps 310 and 312 of method 300 can be repeated for any suitable number of cycles 314 to deposit HDP films on multiple substrates. After depositing HDP films on the substrates multiple times, the pre-coating and HDP barrier coating can be removed and reapplied.

[0089] Figure 4 shows a flowchart illustrating an exemplary method 400 for removing and reapplying an HDP barrier coating using an HDP-CVD tool, such as the HDP-CVD tool 100 in Figure 1. Method 400 includes removing the pre-coating and HDP barrier coating after depositing HDP films on multiple substrates in 416. In some examples, the pre-coating and HDP barrier coating are removed using fluoride plasma. In other examples, any other suitable cleaning process may be used. Other examples of suitable cleaning processes include oxygen plasma cleaning and hydrogen plasma cleaning. After removing the pre-coating and HDP barrier coating, the pre-coating and new HDP barrier coating can be applied to the ESC.

[0090] The cleaning process used to remove the HDP barrier coating can also remove the pre-coating from the processing chamber. Thus, in 418, method 400 includes covering the ESC. In 420, method 400 optionally includes applying a new pre-coating. After applying the new pre-coating, method 400 includes forming a new HDP barrier coating in 422. In this way, the ESC can be cleaned and regenerated for additional cycles of substrate processing.

[0091] Figure 8 shows a flowchart illustrating an exemplary method 800 for operating an HDP-CVD device. The following description of method 800 is provided with reference to Figures 1 to 7 above. It will be understood that method 800 can be implemented in other situations as well.

[0092] In some examples, in 802, method 800 includes covering the electrostatic chuck with a protective cover before applying the HDP barrier coating to the electrostatic chuck, applying the pre-coating to the surface inside the processing chamber of the HDP-CVD tool, and then exposing the electrostatic chuck. For example, ESC502 in Figure 5A is covered by protective cover 504. Protective cover 504 prevents the accumulation of pre-coating 508 on the substrate contact surface of ESC502.

[0093] In 804, in some examples, method 800 includes adjusting the processing gas mixture between the application of the pre-coating to the electrostatic chuck and the application of the HDP barrier coating. For example, the HDP barrier coating may be deposited using a processing gas mixture with a higher Ar content than the pre-coating. This makes the processing gas mixture heavier and results in a higher density HDP film.

[0094] Method 800 further includes, in 806, applying an HDP barrier coating to the electrostatic chuck of the HDP-CVD tool. For example, the ESC 502 in Figure 5D is coated with HDP barrier coating 510. In some examples, in 808, the HDP barrier coating comprises one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonite, or silicon carbide. This helps prevent sputtering or migration of the ESC material during processing.

[0095] In 810, in some examples, depositing an HDP barrier coating involves depositing an HDP barrier coating having a thickness of 3 to 5 microns. For example, the thickness 512 of the HDP barrier coating 510 in Figure 5D can be in the range of 3 to 5 microns. Relatively thick HDP barrier coatings may enable the production of higher purity products than relatively thin HDP barrier coatings. However, as the thickness increases (e.g., beyond 5 microns), the purity may plateau.

[0096] Method 800 further includes, in 812, placing the substrate on an electrostatic chuck equipped with an HDP barrier coating. For example, Figure 5E shows an example of a substrate 514 provided on an ESC 502 and an HDP barrier coating 510.

[0097] In method 800, method 800 further includes depositing an HDP film on a substrate using HDP-CVD. Figure 5F shows an exemplary HDP film 516 deposited on substrate 514.

[0098] In some examples, in 816, depositing an HDP film on a substrate using HDP-CVD involves forming an oxide layer in the SIO wafer fabrication process. For example, Figure 6 shows an example of an FD-SOI device including an insulating layer 606. The insulating layer 606 can be formed by processes and tools disclosed herein.

[0099] In 818, method 800 optionally includes depositing an HDP oxide film on a plurality of substrates, including a substrate, then removing the pre-coating and HDP-CVD barrier coating, and subsequently applying a new pre-coating and a new HDP barrier coating onto an electrostatic chuck. For example, the pre-coating and HDP barrier coating 510 can be removed, the processing chamber 500 can be cleaned, and the pre-coating and HDP barrier coating 510 can be reconstructed on the ESC 502.

[0100] In some examples, in 820, removing the HDP barrier coating involves using fluoride plasma to remove the HDP barrier coating. In other examples, any other suitable cleaning technique can be used. For example, the processing chamber 102 in Figure 1 can be cleaned using oxygen plasma or hydrogen plasma.

[0101] Figure 9 schematically illustrates a non-limiting example of a computing system 900 capable of performing one or more of the methods and processes described above. The computing system 900 is shown in a simplified form. The computing system 900 can take the form of one or more personal computers, workstations, computers integrated with board processing tools, and / or network-accessible server computers.

[0102] The computing system 900 includes a logical machine 902 and a storage machine 904. The computing system 900 may optionally include a display subsystem 906, an input subsystem 908, a communication subsystem 910, and / or other components not shown in Figure 9. Controller 134 is an example of the computing system 900.

[0103] The logical machine 902 includes one or more physical devices configured to execute instructions. For example, the logical machine may be configured to execute instructions that are part of one or more applications, services, programs, routines, libraries, objects, components, data structures, or other logical structures. Such instructions may be implemented to perform tasks, implement data types, transform the state of one or more components, achieve technical effects, or reach desired results.

[0104] A logical machine may include one or more processors configured to execute software instructions. Additionally or alternatively, a logical machine may include one or more hardware or firmware logical machines configured to execute hardware or firmware instructions. The processors of a logical machine may be single-core or multi-core, and the instructions executed thereon may be configured for sequential, parallel, and / or distributed processing. Individual components of a logical machine may optionally be distributed across two or more separate devices located remotely and / or configured for collaborative processing. Aspects of a logical machine may be virtualized and executed by remotely accessible, networked computing devices configured in a cloud computing configuration.

[0105] The memory machine 904 includes one or more physical devices configured to hold instructions 912 that can be executed by a logic machine to implement the methods and processes described herein. When such methods and processes are implemented, the state of the memory machine 904 can be transformed, for example, to hold different data.

[0106] The storage machine 904 may include removable devices and / or built-in devices. The storage machine 904 may include, among other things, optical memory (e.g., CD, DVD, HD-DVD, Blu-ray disc, etc.), semiconductor memory (e.g., RAM, EPROM, EEPROM, etc.), and / or magnetic memory (e.g., hard disk drive, floppy disk drive, tape drive, MRAM, etc.). The storage machine 904 may include volatile, non-volatile, dynamic, static, read-write, read-only, random access, sequential access, position-addressable, file-addressable, and / or content-addressable devices.

[0107] It will be understood that the memory machine 904 includes one or more physical devices. However, the aspects of the instructions described herein may alternatively be propagated by a communication medium (e.g., electromagnetic signals, optical signals, etc.) that is not held by a physical device for a finite period of time.

[0108] Aspects of the logic machine 902 and the memory machine 904 can be integrated into one or more hardware logic components. Such hardware logic components may include, for example, field-programmable gate arrays (FPGAs), programmable and application-specific integrated circuits (PASICs / ASICs), programmable and application-specific standard products (PSSPs / ASSPs), systems on a chip (SOCs), and composite programmable logic devices (CPLDs).

[0109] If included, the display subsystem 906 can be used to present a visual representation of the data held by the storage machine 904. This visual representation may take the form of a graphical user interface (GUI). When the methods and processes described herein modify the data held by the storage machine and thereby transform the state of the storage machine, the state of the display subsystem 906 is also transformed so that the changes in the underlying data can be visually represented. The display subsystem 906 may include one or more display devices utilizing substantially any type of technology. Such display devices may be combined with the logical machine 902 and / or the storage machine 904 within a shared enclosure, or such display devices may be peripheral display devices.

[0110] If included, the input subsystem 908 may include or interface with one or more user input devices, such as a keyboard, mouse, or touchscreen. In some examples, the input subsystem may include or interface with selected natural user input (NUI) components. Such components may be integrated or peripheral, and the conversion and / or processing of input actions may be handled onboard or offboard. Exemplary NUI components may include microphones for speech recognition and / or voice recognition, as well as infrared, color, stereoscopic, and / or depth cameras for machine vision and / or gesture recognition.

[0111] If included, the communication subsystem 910 may be configured to connect the computing system 900 to one or more other computing devices for communication. The communication subsystem 910 may include wired and / or wireless communication devices compatible with one or more different communication protocols. In a non-limiting example, the communication subsystem may be configured for communication using a wireless telephone network, or a wired or wireless local area network or wide area network. In some examples, the communication subsystem may enable the computing system 900 to send and receive messages to and from other devices using a network such as the Internet.

[0112] This disclosure is presented by reference, as an example, to the drawings of the relevant figures. Components, process steps, and other elements that may be substantially the same in one or more of the figures are identified as corresponding and described with minimal repetition. However, it should be noted that elements identified as corresponding may also differ to some extent. It should be further noted that some figures are schematic and may not be drawn to scale. The scale, aspect ratio, and number of components in the various drawings shown in the figures may be intentionally distorted to make certain features or relationships clearer.

[0113] As used herein, "and / or" is defined as inclusive or ∨, as specified by the truth table below. [Table 1]

[0114] As used herein, the term “one or more A or B” includes A, B, or a combination of A and B. The term “one or more A, B, or C” is synonymous with A, B, and / or C. Therefore, as used herein, “one or more A, B, or C” includes A alone, B alone, C alone, a combination of A and B, a combination of A and C, a combination of B and C, or a combination of A, B, and C.

[0115] The configurations and / or approaches described herein are illustrative in nature, and it will be understood that these specific examples or examples should not be considered restrictively, as numerous variations are possible. Any particular routine or method described herein may represent one or more of any number of strategies. Therefore, the various operations illustrated and / or described may be performed in the order illustrated and / or described, in other orders, in parallel, or omitted. Similarly, the order of the processes described above can be changed.

[0116] The subject matter of this disclosure includes all novel and non-obvious combinations and partial combinations of the various processes, systems and configurations disclosed herein, as well as other features, functions, operations, and / or properties, and all their equivalents.

Claims

1. It is an electrostatic chuck, A substrate-facing surface having one or more substrate contact areas, A high-density plasma (HDP) barrier coating on at least a portion of the one or more substrate contact areas and An electrostatic chuck equipped with this feature.

2. The electrostatic chuck according to claim 1, The HDP barrier coating comprises one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonite, or silicon carbide, in an electrostatic chuck.

3. The electrostatic chuck according to claim 1, The HDP barrier coating is an electrostatic chuck having a thickness of 3 to 5 microns.

4. The electrostatic chuck according to claim 1, An electrostatic chuck in which the peak-to-peak variation of the thickness of the HDP barrier coating is 10% or less of the average value of the thickness.

5. The electrostatic chuck according to claim 1, The electrostatic chuck is an electrostatic chuck containing aluminum nitride.

6. A method for operating a gas phase deposition tool, A substrate is placed on an electrostatic chuck equipped with a high-density plasma (HDP) barrier coating. Depositing an HDP film on the substrate using high-density plasma chemical vapor deposition (HDP-CVD). A method that includes [a certain feature].

7. The method according to claim 6, A method comprising depositing the HDP film on the substrate using HDP-CVD to form an oxide layer in a fully depleted silicon-on-insulator substrate fabrication process.

8. The method according to claim 6, The method for the HDP barrier coating comprising one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonite, or silicon carbide.

9. The method according to claim 6, The HDP barrier coating has a thickness of 3 to 5 microns.

10. The method according to claim 6, further, A method comprising depositing an HDP oxide film on a plurality of substrates including the aforementioned substrate, removing the pre-coating and the HDP barrier coating, and then applying a new pre-coating and a new HDP barrier coating onto the electrostatic chuck.

11. The method according to claim 10, A method for removing the pre-coating and the HDP barrier coating, comprising using fluoride plasma to remove the pre-coating and the HDP barrier coating.

12. The method according to claim 6, further, A method comprising applying the HDP barrier coating to the electrostatic chuck using the vapor deposition tool.

13. The method according to claim 12, further, A method comprising preparing a treatment gas mixture before applying the HDP barrier coating.

14. A method for operating a high-density plasma (HDP) chemical vapor deposition (CVD) tool, Apply the HDP barrier coating to the electrostatic chuck. A method that includes [a certain feature].

15. The method according to claim 14, further, A method comprising covering the upper surface of one or more substrate contact areas of the electrostatic chuck with a protective cover before applying the HDP barrier coating to the electrostatic chuck, applying a pre-coating to the surface inside the processing chamber of the HDP-CVD tool, and then exposing the upper surface of the one or more substrate contact areas of the electrostatic chuck.

16. The method according to claim 15, further, A method comprising adjusting a processing gas mixture between the application of the pre-coating to the electrostatic chuck and the application of the HDP barrier coating.

17. The method according to claim 14, The method for the HDP barrier coating comprising one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonite, or silicon carbide.

18. The method according to claim 14, The method for depositing the HDP barrier coating comprises depositing an HDP barrier coating having a thickness of 3 microns to 5 microns.

19. The method according to claim 14, further, A method comprising removing the HDP barrier coating and then applying a new HDP barrier coating onto the electrostatic chuck.

20. The method according to claim 19, A method for removing the HDP barrier coating, comprising using fluoride plasma to remove the HDP barrier coating.