Fault Detection Method
The method addresses erroneous failure detections in power relays by monitoring actual voltage states, preventing CPU damage and ensuring accurate system restarts through real-time monitoring.
Patent Information
- Application Number
- JP2021092321
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-06-01
- Publication Date
- 2024-12-10
- Estimated Expiration
- 2041-06-01
AI Technical Summary
Existing failure detection methods in power relays are prone to erroneous determinations due to corrupted memory contents, leading to potential CPU damage from repeated resets.
A failure detection method that monitors the actual voltage states of the wake-up switch and CPU operation, independent of stored memory contents, to prevent erroneous determinations and CPU damage.
Prevents erroneous failure judgments and CPU destruction by detecting wake-up switch failures based on real-time voltage monitoring, ensuring accurate system restarts.
Smart Images

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Abstract
Description
[Technical field]
[0001] The present invention relates to a fault detection method. [Background technology]
[0002] 2. Description of the Related Art Conventionally, there is known a technique for detecting a stuck fault of a power supply relay provided in a power supply circuit.
[0003] For example, the abnormality diagnosis device disclosed in Patent Document 1 stores in a storage means that the power relay has a stuck-ON fault if the capacitor voltage does not drop and the microcomputer is operable even after a predetermined time has elapsed after the ignition switch and power relay are turned off. When the ignition switch is then turned on again, the microcomputer reads out the fault information stored in the storage means and determines that the power relay has a stuck-ON fault. The power relay in Patent Document 1 corresponds to the "wake-up switch" in this invention. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2010-111311 A Summary of the Invention [Problem to be solved by the invention]
[0005] In the technology of Patent Document 1, after the system is stopped once, that is, when the system is restarted after the vehicle is parked and stopped, a failure is judged based on the contents stored in the storage means. Therefore, if the contents stored are corrupted due to some factor while the system is stopped, the microcomputer may read incorrect information and make a wrong judgment when the system is restarted. For example, even if the power relay is actually normal, if the contents stored are corrupted to indicate a failure, it will be erroneously judged as a failure.
[0006] In addition, when resetting the microcontroller's CPU as a measure to detect a malfunction, <1> Reset, <2> CPU restart, <3> The memory contents may be corrupted, causing a false diagnosis of failure. <4> This reset operation will be repeated, which may cause the memory write count to exceed the upper limit, resulting in the CPU itself being destroyed.
[0007] The present invention has been made in view of the above-mentioned points, and an object of the present invention is to provide a fault detection method that prevents erroneous judgment due to corrupted memory contents. [Means for solving the problem]
[0008] The present invention provides a fault detection method for detecting a fault of a wake-up switch stuck ON in an electronic control device (400) including a normal power supply terminal (13), a starting power supply terminal (23), a CPU (40), and a wake-up circuit (30) having a wake-up switch (32).
[0009] The normal power supply terminal is connected to a normal power supply mounted on the vehicle. The starting power supply terminal is connected to a starting power supply (21) via a start switch (22) that is turned ON when starting the vehicle. The CPU is started by the supply of normal voltage, which is the voltage of the normal power supply input via the normal power supply terminal. The wake-up switch opens and closes the power supply path from the normal power supply terminal to the CPU. The wake-up circuit turns on the wake-up switch when the starting voltage, which is the voltage input to the starting power supply terminal, is equal to or higher than the ON threshold. The wake-up switch is provided inside the electronic control device and is connected to the starting power terminal.
[0010] In a first aspect of the present invention, when the normal voltage is equal to or greater than the determination threshold even though the starting voltage is less than the ON threshold, the CPU determines that the wake-up switch has a stuck-ON failure.
[0011] In a second aspect of the present invention, when the CPU is operating even though the startup voltage is less than the ON threshold, the CPU determines that the wake-up switch has a stuck-ON fault.
[0012] Here, the term "failure of the wake-up switch stuck on ON" is not limited to a failure in which the contacts of the wake-up switch are actually welded. For example, the term "failure of the wake-up switch stuck on ON" is broadly interpreted to include a case in which the wake-up circuit erroneously determines that the "start-up voltage is equal to or greater than the ON threshold" when in fact the start-up voltage is less than the ON threshold.
[0013] In the present invention, even if the wake-up switch is stuck ON before the system is stopped, no failure information is stored, and the CPU detects the failure by monitoring the actual voltage at the present time and the operating state of the CPU itself. Since the failure is not judged based on the stored contents, it is possible to prevent erroneous judgment due to the contents being corrupted. In addition, when the CPU is reset as a measure for judging a failure, it is possible to prevent the CPU from being destroyed by exceeding the upper limit of the number of times the memory is written, since the repetition of the reset operation due to erroneous judgment is prevented. [Brief description of the drawings]
[0014] [Figure 1] FIG. 1 is a diagram showing an example of a system configuration to which a fault detection method according to an embodiment of the present invention is applied. [Diagram 2] A timing chart explaining normal ECU operation. [Diagram 3] 3 is a time chart illustrating a fault detection method according to the present embodiment. [Figure 4] FIG. 13 is a diagram showing the voltage supply state after the IG switch is turned off before the auxiliary battery is removed and after the auxiliary battery is reinstalled. [Diagram 5] FIG. 4 is a diagram showing a state in which no voltage is supplied while the auxiliary battery is removed. [Figure 6] 3 is a flowchart of a fault detection method according to the present embodiment. [Figure 7] FIG. 13 is a diagram showing another example of a system configuration to which the failure detection method of the present embodiment is applied. [Figure 8] FIG. 13 is a diagram showing another example of a system configuration to which the failure detection method of the present embodiment is applied. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0015] (One embodiment) An embodiment of a fault detection method according to the present invention will be described below with reference to the drawings. First, an example of a system configuration to which the fault detection method of this embodiment is applied is shown with reference to Fig. 1. In this system, an electronic control unit (hereinafter referred to as "ECU") 400 drives a motor 80 that outputs a steering assist torque of an electric power steering device using power from an auxiliary battery 11 mounted on a vehicle.
[0016] The ECU 400 has an auxiliary battery terminal 13 (indicated as "+BB" in the figure) and an ignition (hereinafter "IG") terminal 23 as power supply input terminals. In the system configuration example shown in FIG. 1, the auxiliary battery terminal 13 and the IG terminal 23 are each connected to separate power supplies. The auxiliary battery terminal 13 is connected to, for example, a 12V auxiliary battery 11. The IG terminal 23 is connected to the IG battery 21 via an IG switch 22. Note that, as in another system configuration example shown in FIG. 7, the IG terminal 23 may be commonly connected to the auxiliary battery 11.
[0017] The IG switch 22, a term used in the embodiment, is conceptually a "start switch" that is turned ON when starting the vehicle. Correspondingly, the IG battery 21 is a "starting power source," and the IG terminal 23 is a "starting power source terminal." Also, the IG voltage, which will be described later as a voltage input to the IG terminal 23, corresponds to a "starting voltage." In this specification, the term "start" is used to refer to the vehicle, and the term "activation" is used to refer to the CPU.
[0018] Similarly, the auxiliary battery 11, which is a term used in the embodiment, is conceptually a "normal power source" that constantly supplies power during system operation. Correspondingly, the auxiliary battery terminal 13 is a "normal power source terminal." Also, a VS voltage, which will be described later as the voltage of the auxiliary battery 11 input to the ECU 400 via the auxiliary battery terminal 13, corresponds to a "normal voltage."
[0019] The ECU 400 includes a power supply relay 65, a reverse connection protection relay 67, an inverter circuit 70, etc. as main components of a power system that supplies power to the motor 80. The motor 80 is, for example, a three-phase brushless motor. The inverter circuit 70 converts DC power of the auxiliary battery 11 into three-phase AC power and outputs it by operating switching elements of three-phase upper and lower arms.
[0020] The power supply relay 65 and the reverse connection protection relay 67 are provided on the power supply line Lp from the auxiliary battery terminal 13 to the inverter circuit 70, and when they are OFF, they cut off the connection between the auxiliary battery 11 and the inverter circuit 70. When the power supply relay 65 and the reverse connection protection relay 67 are configured with MOSFETs, they are arranged so that the downstream side (i.e., the cathode) of each parasitic diode faces the midpoint m. The midpoint m is connected to the control voltage generating unit 39 via an intermediate diode 66. Other components of the power system, such as a noise filter, a smoothing capacitor, and a current sensor, are omitted.
[0021] The ECU 400 includes a wake-up circuit 30, a control voltage generating unit 39, a CPU 40, etc. as components of a startup system and a control system. The control voltage generating unit 39 generates a control voltage of, for example, a maximum of 5V from the VS voltage input from the auxiliary battery terminal 13, and outputs the control voltage to the CPU 40. The control voltage generating unit 39 is formed of, for example, a dedicated custom IC. The CPU 40 is started up by the supply of the control voltage from the control voltage generating unit 39, and controls the operation of the ECU 400 by various control calculations.
[0022] In the embodiment, strictly speaking, the control voltage generating unit 39 receives the VS voltage and generates a control voltage, and the CPU 40 operates with the control voltage based on the VS voltage. However, conceptually, the function of the control voltage generating unit 39 can be considered to be included in a part of the "CPU". Therefore, it may be expressed as "the CPU 40 is started by the supply of the VS voltage". In addition, the "power supply path from the auxiliary battery terminal 13 to the control voltage generating unit 39" may be rephrased as "the power supply path from the auxiliary battery terminal 13 to the CPU 40".
[0023] The wake-up circuit 30 has a wake-up diode 31, a wake-up switch 32, and an IG voltage determination circuit 33. The wake-up switch 32 opens and closes the power supply path from the auxiliary battery terminal 13 to the CPU 40. When the IG switch 22 is turned on, the IG voltage determination circuit 33 determines whether the input IG voltage is equal to or higher than the ON threshold. When the IG voltage is equal to or higher than the ON threshold, the IG voltage determination circuit 33 turns on the wake-up switch 32. The wake-up switch 32 and the IG voltage determination circuit 33 may be integrated into a single IC.
[0024] When the wake-up switch 32 is turned on, as indicated by the thick solid arrow, a current flows from the auxiliary battery terminal 13 through the wake-up switch 32, and the VS voltage is supplied to the control voltage generator 39. This power supply path is referred to as a "first power supply path P1." The wake-up diode 31 prevents a reverse current flow in the first power supply path P1.
[0025] Furthermore, when the CPU 40 turns on the power supply relay 65 as described below, as indicated by the thick dashed arrow, a current flows from the auxiliary battery terminal 13 via the power supply relay 65, and the VS voltage is supplied to the control voltage generating unit 39. This power supply path is referred to as a "second power supply path P2." The intermediate diode 66 prevents a reverse current flow in the second power supply path P2.
[0026] Furthermore, an IG voltage monitor circuit 53 that monitors the IG voltage, and a VS voltage monitor circuit 54 that monitors the VS voltage are provided. The CPU 40 acquires the monitored values of the IG voltage monitor circuit 53 and the VS voltage monitor circuit 54, and performs a determination in the fault detection method. Although details are omitted, for example, a boost circuit that compensates for a voltage drop during cranking may be provided between the wake-up circuit 30 and the control voltage generation unit 39.
[0027] Next, the operation of the ECU 400 under normal conditions will be described with reference to the time chart in Fig. 2. From the top, the following are shown: input voltage to the ECU 400, ON / OFF of the IG switch 22, ON / OFF of the wake-up switch 32, the state of the CPU 40, and ON / OFF of the power relay 65. The reverse connection protection relay 67 is turned ON / OFF at the same time as the power relay 65, but will not be described below.
[0028] An example of a voltage value is shown as the input voltage. The maximum values of the IG voltage and the VS voltage are 12V, and normal control of the CPU 40 is possible when the IG voltage is 9V or more. In this embodiment, normal control means that the electric power steering device is performing assist. The minimum IG voltage at which the CPU 40 can be started is 4V. Furthermore, when the IG voltage drops, the maximum IG voltage at which the CPU 40 transitions from stop control to power latch based on the IG voltage monitored by the IG voltage monitor circuit 53 is 1.8V.
[0029] At start-up, the IG switch 22 is turned on at time t1, and the IG voltage supplied to the IG terminal 23 gradually rises. When the IG voltage reaches 4 V at time t2, the IG voltage determination circuit 33 turns on the wake-up switch 32. Then, a VS voltage of 12 V is supplied from the auxiliary battery terminal 13 to the control voltage generation unit 39 through the first power supply path P1, and the CPU 40 starts up.
[0030] When the IG voltage monitor value reaches 9 V at time t3, the CPU 40 turns on the power supply relay 65 and starts normal control of the ECU 400. After the start of the normal control, the VS voltage is supplied to the control voltage generating unit 39 through the second power supply path P2 in addition to the first power supply path P1.
[0031] During shutdown, the IG switch 22 is turned OFF at time t4, and the IG voltage starts to drop. When the IG voltage monitor value drops to 9V at time t5, the CPU 40 transitions from normal control to shutdown control. When the IG voltage drops to 4V at time t6, the IG voltage determination circuit 33 turns OFF the wake-up switch 32. At this time, the first power supply path P1 is cut off, but the supply of the VS voltage to the control voltage generation unit 39 via the second power supply path P2 continues.
[0032] When the IG voltage monitor value drops to 1.8V at time t7, the CPU 40 transitions from stop control to power latch. During power latch, the VS voltage is held for a predetermined period TPL (e.g., 10 minutes) to maintain some functions of the CPU 40. At time t8, when the predetermined period TPL has elapsed from time t7, the power latch ends, and the CPU 40 turns off the power relay 65, cutting off the supply of the VS voltage from the second power supply path P2 to the control voltage generation unit 39. Therefore, the CPU 40 stops operating.
[0033] With the above-described system configuration as a premise, in this embodiment, it is assumed that the wake-up switch 32 has a stuck-ON fault. In the conventional technology of Patent Document 1 (JP Patent Publication 2010-111311 A), a fault is judged based on the stored contents of a storage means, and therefore there is a risk of erroneous judgment if the stored contents are distorted. Even if the wake-up switch 32 is actually normal, if the stored contents are distorted to indicate a fault, it is erroneously judged as a fault. Conversely, even if the wake-up switch 32 is actually faulty, if the stored contents are distorted to indicate a normal state, it is erroneously judged as a normal state.
[0034] In addition, when resetting the CPU 40 as a measure to determine a malfunction, <1> Reset, <2> CPU restart, <3> The memory contents may be corrupted, causing a false diagnosis of failure. <4> This reset operation is repeated. As a result, the number of memory writes exceeds the upper limit, and there is a risk that the CPU 40 itself may be destroyed. In order to avoid such problems, the present embodiment aims to detect a stuck-ON fault of the wake-up switch 32 using a method other than fault determination based on memory contents.
[0035] Next, the behavior of the wake-up circuit 30 when the wake-up switch 32 has a stuck-ON fault and a fault detection method will be described with reference to Figures 3 to 5. In the timing chart of Figure 3, times t4 to t8 correspond to the times with the same symbols shown in Figure 2. The vertical axis indicates, from top to bottom, the auxiliary battery terminal voltage, the ON / OFF state of the IG switch 22, the IG voltage, the VS voltage during a fault and normal operation, the CPU state, and the ON / OFF state of the power relay 65.
[0036] Each voltage is indicated by two values, HI / LO. HI corresponds to 9V to 12V in FIG. 2. For the VS voltage after time t10, any voltage equal to or greater than the determination threshold is treated as HI. The LO of the auxiliary battery terminal voltage and the VS voltage essentially corresponds to 0V. The LO of the IG voltage means that it is less than the ON threshold of the wake-up switch 32, and corresponds to less than 4V in FIG. 2.
[0037] Fig. 4 shows a voltage supply state from time t4 to t9 and after time t10 in Fig. 3. Fig. 5 shows a voltage non-supply state from time t9 to t10 in Fig. 3. In contrast to the configuration of ECU 400 shown in Fig. 1, components that are not directly related to the failure detection method are not shown in Figs. 4 and 5.
[0038] At time t4, the IG switch 22 is turned OFF, and at time t5, control shifts to stop control. Between time t5 and time t6, the IG voltage drops from HI to LO. Power latching is performed between times t7 and t8. As shown in FIG. 2, in the normal case, at time t6 during stop control, the IG voltage determination circuit 33 turns OFF the wake-up switch 32, and the first power supply path P1 is cut off. Furthermore, at time t8 when the power latch ends, the supply of the VS voltage is cut off, and the operation of the CPU 40 stops.
[0039] However, if the wake-up switch 32 has a stuck-ON fault, the VS voltage continues to be supplied to the control voltage generator 39 via the first power supply path P1 even after time t6, as shown in Fig. 4. Therefore, after time t8 when the power latch ends, the CPU 40 enters a "sleep waiting state" without being able to be stopped. Note that in the conventional technology of Patent Document 1, the stuck-ON fault is detected at this timing, and fault information is stored in a storage means.
[0040] At time t9, the auxiliary battery 11 is removed. As shown in Fig. 5, the connection between the auxiliary battery 11 and the auxiliary battery terminal 13 is cut off, so that even if the wake-up switch 32 has a stuck-ON fault, the VS voltage is not supplied from the auxiliary battery terminal 13 to the control voltage generating unit 39. Therefore, the CPU 40 stops.
[0041] At time t10, the auxiliary battery 11 is reinstalled. Here, the removal and reinstallation of the auxiliary battery 11 is not limited to removal and installation involving replacement of the auxiliary battery 11, but may simply involve disconnecting the cable from the same auxiliary battery and then reattaching it. In another system configuration example shown in Fig. 8, the battery cutoff switch 12 provided midway along the path may be turned OFF and then ON.
[0042] By reinstalling the auxiliary battery 11, the connection between the auxiliary battery 11 and the auxiliary battery terminal 13 is switched from a disconnected state to a connected state. However, since the IG switch 22 remains OFF, in a normal state, the IG voltage is not supplied to the IG terminal 23 and the wake-up switch 32 is not turned ON. Therefore, the VS voltage is not supplied to the control voltage generator 39.
[0043] However, if the wake-up switch 32 has a stuck-ON fault, voltage is supplied to the control voltage generating unit 39 through the first power supply path P1, and the CPU 40 is started up. After starting up, the CPU 40 sequentially performs the items of the initial check. At time t11 during the initial check, the CPU 40 determines that the IG switch 22 is OFF, that is, determines that the IG voltage is LO.
[0044] In this way, when the connection between the auxiliary battery 11 and the auxiliary battery terminal 13 is switched from a disconnected state to a connected state and the CPU 40 is started, the CPU 40 monitors the IG voltage and the VS voltage. Then, if the IG voltage is in a LO state below the ON threshold but the VS voltage is in a HI state above the determination threshold, the CPU 40 determines that the wake-up switch 32 has an ON stuck fault.
[0045] However, in cases other than the actual failure of the contacts of the wake-up switch 32 welding, the detection state of "IG voltage is LO and VS voltage is HI" may occur. For example, due to a HI-fixed failure of the IG voltage determination circuit 33, the IG voltage determination circuit 33 may erroneously determine that "IG voltage is equal to or higher than the ON threshold" even though the IG voltage is actually below the ON threshold. In this case, the wake-up switch 32 is turned ON by a command from the IG voltage determination circuit 33, and the VS voltage is supplied. On the other hand, since the monitor value of the IG voltage monitor circuit 53 is in the LO state, the CPU 40 determines that a failure has occurred.
[0046] Therefore, in this embodiment, a HI sticking failure of the IG voltage determination circuit 33 and the like are broadly interpreted as including an "ON sticking failure of the wake-up switch 32". In other words, the CPU 40 detects "ON sticking failure of the wake-up switch 32" including a HI sticking failure of the IG voltage determination circuit 33 and the like, not limited to a fused contact failure of the wake-up switch 32, by the above-mentioned failure detection method. Note that even when the power supply relay 65 is stuck ON, the detection state is "IG voltage is LO and VS voltage is HI", but the power supply relay 65 being stuck ON is not realistically expected because it is detected at a stage earlier than the initial check.
[0047] The flowchart in Figure 6 shows the basic flow of the fault detection method corresponding to Figure 3. In the flowchart, the symbol "S" means a step. In S1, the IG switch 22 is turned off from normal control. In S2, the auxiliary battery 11 is removed. In S3, the auxiliary battery 11 is reinstalled.
[0048] During the initial check, in S4, the CPU 40 determines whether the IG voltage is less than the ON threshold. If the IG voltage is equal to or greater than the ON threshold and S4 is NO, the premise of this fault detection method is not met and the process ends. In this case, the process may proceed to determining whether the IG switch 22 is stuck ON or the IG voltage monitor circuit 53 is faulty, for example.
[0049] If the IG voltage is less than the ON threshold and the answer is YES in S4, the process proceeds to S5. In S5, the CPU 40 determines whether the VS voltage is equal to or greater than the judgment threshold, or whether the CPU 40 is operating. If the answer is YES in S5, the CPU 40 determines in S6 that the wake-up switch 32 has a stuck-ON failure. The CPU 40 also transitions to, for example, a sleep state as a failure response in S7. On the other hand, if the answer is NO in S5, the CPU 40 determines in S8 that the CPU 40 is normal.
[0050] In this embodiment, even if the wake-up switch 32 has a stuck-ON fault before the system is stopped, no fault information is stored, and the CPU 40 detects the fault by monitoring the actual voltage at the present time and the operating state of the CPU 40 itself. Since the fault is not judged based on the stored contents, it is possible to prevent erroneous judgment due to corrupted stored contents. Furthermore, when the CPU 40 is reset as a measure for fault judgment, it is possible to prevent the CPU 40 from being destroyed by the number of times the memory is written to exceeding the upper limit, since the repetition of the reset operation due to erroneous judgment is prevented.
[0051] (Modification) A modified example of the fault detection method of the above embodiment will be described. The logic of the above fault detection method is to determine that the wake-up switch 32 has a stuck-ON fault when "the IG voltage is LO (i.e., less than the ON threshold) and the VS voltage is HI (i.e., equal to or greater than the determination threshold)". The timing at which this determination logic is executed is not limited to when the CPU 40 is started immediately after the auxiliary battery 11 is connected or disconnected, but may be executed at all times. That is, the CPU 40 constantly monitors the IG voltage and the VS voltage. Then, if the IG voltage drops to the LO state due to some factor and the VS voltage is maintained in the HI state, it may be determined that the wake-up switch 32 has a stuck-ON fault.
[0052] Furthermore, the VS voltage being HI is essentially synonymous with the CPU 40 being in operation. Therefore, the CPU 40 may set the condition "the CPU 40 is in operation" instead of "the VS voltage is HI". In other words, if the CPU is in operation even though the IG voltage is less than the ON threshold, the CPU 40 may determine that the wake-up switch 32 has a stuck-ON failure.
[0053] (Other system configuration examples) (a) Figures 7 and 8 show an example of a system configuration different from that of Figure 1 to which the fault detection method of this embodiment is applied. In the system configuration example shown in Figure 7, the auxiliary battery 11 and the IG battery 21 are not provided separately, but the IG switch 22 is commonly connected to the auxiliary battery 11. In other words, the auxiliary battery 11 as a "normal power source" also functions as the IG battery as a "starting power source". A similar fault detection method can be implemented with this configuration as well.
[0054] (b) In the system configuration example shown in Fig. 8, a battery cutoff switch 12 is provided in the path connecting the auxiliary battery 11 and the auxiliary battery terminal 13. The battery cutoff switch 12 is operated by a control circuit separate from the CPU 40, or manually by an operator. Instead of connecting and disconnecting the auxiliary battery 11 at S2 and S3 in Fig. 6, the battery cutoff switch 12 may be turned OFF and then ON. This makes it easier to perform the work when a fault is detected.
[0055] (c) The "normal power source" and the "starting power source" are not limited to batteries, and may be constituted by a capacitor or a fuel cell. Moreover, instead of power from a DC power source, power obtained by rectifying the output of an AC power source may be input to the auxiliary battery terminal 13 and the IG terminal 23.
[0056] (d) In contrast to the IG switch 22 in an internal combustion engine vehicle, in a hybrid vehicle or an electric vehicle, the ready switch corresponds to the "start switch that is turned ON when starting the vehicle." In addition, in an autonomous vehicle, the start command from the control circuit is interpreted as the "ON operation," not limited to key or button operation by the driver.
[0057] (e) The term "electronic control device" is not limited to an electronic control device that drives an assist motor of an electric power steering device, but may be any electronic control device that operates by a CPU that is started up by a voltage supply from a power source mounted on a vehicle and performs various controls.
[0058] The present invention is not limited to such an embodiment, and can be embodied in various forms without departing from the spirit of the present invention.
[0059] The techniques described in the present disclosure may be implemented by a special purpose computer provided by configuring a processor and memory programmed to perform one or more functions embodied in a computer program. Alternatively, the techniques described in the present disclosure may be implemented by a special purpose computer provided by configuring a processor with one or more dedicated hardware logic circuits. Alternatively, the techniques described in the present disclosure may be implemented by one or more special purpose computers configured by a combination of a processor and memory programmed to perform one or more functions and a processor configured with one or more hardware logic circuits. Also, the computer program may be stored in a computer-readable non-transitory tangible recording medium as instructions executed by the computer. [Explanation of symbols]
[0060] 11 Auxiliary battery (normal power source), 13 Auxiliary battery terminal (normal power supply terminal), 21 IG battery (starting power source), 22 IG switch (start switch), 23 IG terminal (starting power terminal), 30 Wake-up circuit, 32 Wake-up switch, 40 CPU, 400···ECU (electronic control unit).
Claims
1. A utility power supply terminal (13) connected to a utility power supply (11) mounted on a vehicle; a starting power supply terminal (23) connected to a starting power supply (21) via a starting switch (22) that is turned on when starting the vehicle; a CPU (40) that is started by the supply of a normal voltage that is the voltage of the normal power supply input via the normal power supply terminal; a wake-up circuit (30) having a wake-up switch (32) for opening and closing a power supply path from the normal power supply terminal to the CPU, and for turning on the wake-up switch when a startup voltage, which is a voltage input to the startup power supply terminal, is equal to or higher than an ON threshold; A fault detection method for detecting an ON stuck fault of the wake-up switch in an electronic control device (400) comprising: the wake-up switch is provided inside the electronic control device and is connected to the starting power supply terminal; The fault detection method, in which the CPU determines that the wake-up switch has a stuck-ON fault when the normal voltage is equal to or greater than a determination threshold even though the starting voltage is less than the ON threshold.
2. 2. The fault detection method according to claim 1, wherein when the connection between the utility power supply and the utility power supply terminal is switched from a cut-off state to a connected state and the CPU is started up, the CPU judges whether a fault has occurred.
3. A utility power supply terminal (13) connected to a utility power supply (11) mounted on a vehicle; a starting power supply terminal (23) connected to a starting power supply (21) via a starting switch (22) that is turned on when starting the vehicle; a CPU (40) that is started by the supply of a normal voltage that is the voltage of the normal power supply input via the normal power supply terminal; a wake-up circuit (30) having a wake-up switch (32) for opening and closing a power supply path from the normal power supply terminal to the CPU, and for turning on the wake-up switch when a startup voltage, which is a voltage input to the startup power supply terminal, is equal to or higher than an ON threshold; A fault detection method for detecting an ON stuck fault of the wake-up switch in an electronic control device (400) comprising: the wake-up switch is provided inside the electronic control device and is connected to the starting power supply terminal; The fault detection method, in which the CPU determines that the wake-up switch has a stuck-ON fault when the CPU is operating even though the starting voltage is less than the ON threshold.
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