Switching control device, switching power supply device and power supply system

Abstract

A switching control device according to an embodiment of the present invention comprises: a voltage detection unit that detects the voltage between both terminals at a point in time at which switching is performed from an OFF state to an ON state in a first switching element among a plurality of switching elements included in at least one of an inverter circuit and a rectifying / smoothing circuit; a delay time setting unit that sets, as needed and in accordance with the voltage value between both terminals in the first switching element and the result of comparing between a first threshold voltage and a second threshold voltage which are two differing threshold voltages, a delay time from a point in time at which a second switching element among the plurality of switching elements is switched from the OFF state to the ON state until a point in time at which the first switching element is switched from the OFF state to the ON state; and a drive circuit that individually controls switching operation in the plurality of switching elements including the first and second switching elements using the delay time set in the delay time setting unit.

Description

[Technical field]

[0001] The present invention relates to a switching power supply device that performs voltage conversion using a switching element, a switching control device applied to such a switching power supply device, and a power supply system equipped with such a switching power supply device. [Background technology]

[0002] As an example of a switching power supply device, various DC-DC converters have been proposed and put into practical use (for example, see Patent Document 1). This type of DC-DC converter generally includes an inverter circuit including a switching element, a power conversion transformer, and a rectifying and smoothing circuit. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2015-204716 A Summary of the Invention

[0004] However, in switching power supply devices such as DC-DC converters, it is generally required to reduce power loss. It is desirable to provide a switching control device, a switching power supply device, and a power supply system that are capable of reducing power loss.

[0005] A switching control device according to one embodiment of the present invention is a control device applied to a switching power supply device including a transformer having a primary winding and a secondary winding, an inverter circuit arranged between the primary winding and an input terminal pair to which an input voltage is input, and a rectifying and smoothing circuit arranged between the secondary winding and an output terminal pair to which an output voltage is output, and includes a voltage detection unit that detects a voltage between both ends of a first switching element of a plurality of switching elements included in at least one of the inverter circuit and the rectifying and smoothing circuit at a time when the first switching element switches from an off state to an on state, a delay time setting unit that sets a delay time from a time when a second switching element of the plurality of switching elements switches from an on state to an off state to a time when the first switching element switches from an off state to an on state in accordance with a comparison result between the value of the voltage between both ends of the first switching element and two different threshold voltages, a first threshold voltage and a second threshold voltage, and a drive circuit that controls the switching operations of the plurality of switching elements including the first and second switching elements using the delay time set in the delay time setting unit.

[0006] A switching power supply device according to one embodiment of the present invention comprises the input terminal pair, the output terminal pair, the transformer, the inverter circuit, the rectifying and smoothing circuit, and the switching control device according to the embodiment of the present invention.

[0007] A power supply system according to an embodiment of the present invention includes the switching power supply device according to the embodiment of the present invention described above, and a power supply that supplies the input voltage to the input terminal pair.

[0008] According to a switching control device, a switching power supply device, and a power supply system according to an embodiment of the present invention, it is possible to reduce power loss. [Brief description of the drawings]

[0009] [Figure 1]1 is a circuit diagram illustrating a schematic configuration example of a switching power supply device according to an embodiment of the present invention. [Diagram 2] 2 is a timing chart illustrating an example of the operation of the switching power supply device illustrated in FIG. [Diagram 3] 1 is a diagram illustrating an example of conduction characteristics of a transistor. [Figure 4] FIG. 11 is a diagram illustrating an example of setting a dead time according to the embodiment. [Diagram 5] 2 is a timing chart illustrating an example of waveforms during a resonant operation in the switching power supply device shown in FIG. 1. [Figure 6] 11 is a flowchart illustrating an example of a process for setting a dead time according to an embodiment. [Figure 7] 11A and 11B are diagrams illustrating an example of setting a maximum dead time and a minimum dead time according to an embodiment. [Figure 8] 1 is a circuit diagram illustrating a schematic configuration example of a switching power supply device according to a first modification. [Figure 9] FIG. 11 is a circuit diagram illustrating a schematic configuration example of a switching power supply device according to Modification 2. [Figure 10] FIG. 11 is a circuit diagram illustrating a schematic configuration example of a switching power supply device according to Modification 3. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The description will be given in the following order. 1. Embodiment (Example of a case where a center-tap type rectifier circuit is used) 2. Variations Modification 1 (Example of using a bridge-type rectifier circuit) Modifications 2 and 3 (Examples of Synchronous Rectification Circuits) 3. Other Modifications

[0011] <1. Preferred embodiment> [composition] FIG. 1 is a circuit diagram showing an example of a schematic configuration of a switching power supply device (switching power supply device 1) according to an embodiment of the present invention. This switching power supply device 1 functions as a DC-DC converter that converts a DC input voltage Vin supplied from a DC input power source 10 (e.g., a battery) into a DC output voltage Vout and supplies power to a load 9. Note that examples of this load 9 include electronic devices and batteries. Also, as described below, this switching power supply device 1 is a so-called "(isolated half-bridge) LLC resonant type" DC-DC converter. Note that the mode of voltage conversion in the switching power supply device 1 may be either up-conversion (boosting) or down-conversion (stepping down).

[0012] Here, the DC input voltage Vin corresponds to a specific example of the "input voltage" in the present invention, and the DC output voltage Vout corresponds to a specific example of the "output voltage" in the present invention. Moreover, the DC input power supply 10 corresponds to a specific example of the "power supply" in the present invention, and a system including this DC input power supply 10 and the switching power supply device 1 corresponds to a specific example of the "power supply system" in the present invention.

[0013] The switching power supply device 1 includes two input terminals T1 and T2, two output terminals T3 and T4, an inverter circuit 2, a transformer 3, a rectifying and smoothing circuit 4, and a control circuit 7. A DC input voltage Vin is input between the input terminals T1 and T2, and a DC output voltage Vout is output between the output terminals T3 and T4. In the example shown in Fig. 1, the primary low-voltage line L1L is connected to the ground GND.

[0014] Here, the input terminals T1, T2 correspond to a specific example of an "input terminal pair" in the present invention, and the output terminals T3, T4 correspond to a specific example of an "output terminal pair" in the present invention. Also, the control circuit 7 corresponds to a specific example of a "switching control device" in the present invention.

[0015] For example, an input smoothing capacitor may be arranged between the primary high-voltage line L1H connected to the input terminal T1 and the primary low-voltage line L1L connected to the input terminal T2. Specifically, at a position between the inverter circuit 2 described later and the input terminals T1 and T2, a first end (one end) of the input smoothing capacitor may be connected to the primary high-voltage line L1H and a second end (the other end) of the input smoothing capacitor may be connected to the primary low-voltage line L1L. Such an input smoothing capacitor is a capacitor for smoothing the DC input voltage Vin input from the input terminals T1 and T2.

[0016] (A. Inverter circuit 2) The inverter circuit 2 is disposed between the input terminals T1, T2 and a primary winding 31 of a transformer 3, which will be described later. The inverter circuit 2 has two switching elements S1, S2, a resonant inductor Lr, and a resonant capacitor Cr, and is a so-called "half-bridge type" inverter circuit. Note that the resonant inductor Lr may be formed by a leakage inductance in the transformer 3, which will be described later, or may be provided separately from such a leakage inductance.

[0017] Here, the above switching elements S1 and S2 each correspond to a specific example of "plurality of switching elements" in the present invention. Also, the switching element S2 corresponds to a specific example of "first switching element" in the present invention, and the switching element S1 corresponds to a specific example of "second switching element" in the present invention.

[0018] As the switching elements S1 and S2, various switching elements such as a field effect transistor (MOS-FET; Metal Oxide Semiconductor-Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), a HEMT (High Electron Mobility Transistor) = HFET (Heterostructure Field-Effect Transistor), etc. Also, an example of a HEMT is a GaN (gallium nitride) transistor.

[0019] In the example shown in FIG. 1, the switching elements S1 and S2 are each composed of a transistor made of a MOS-FET or a HEMT. In this way, when a MOS-FET or a HEMT is used as the switching elements S1 and S2, the capacitor and diode connected in parallel to each switching element S1 and S2 can be composed of the parasitic capacitance or parasitic diode of the MOS-FET or HEMT. Specifically, in the example shown in FIG. 1, a capacitor Cds1 made of a parasitic capacitance and a diode D1 made of a parasitic diode are connected in parallel between both ends (between the source and drain) of the switching element S1. Similarly, in the example shown in FIG. 1, a capacitor Cds2 made of a parasitic capacitance and a diode D2 made of a parasitic diode are connected in parallel between both ends (between the source and drain) of the switching element S2.

[0020] In this inverter circuit 2, two switching elements S1 and S2 are connected in series to each other in this order between input terminals T1 and T2 (between the primary high-voltage line L1H and the primary low-voltage line L1L). Specifically, the switching element S1 is arranged between the primary high-voltage line L1H and a connection point P1, and the switching element S2 is arranged between the connection point P1 and the primary low-voltage line L1L.

[0021] Further, the resonant inductor Lr and the resonant capacitor Cr in the inverter circuit 2 and a primary winding 31 in the transformer 3 described later are connected in series with each other between the connection point P1 and the primary low-voltage line L1L. Specifically, in the example of Fig. 1, a first end (one end) of the resonant capacitor Cr is connected to the connection point P1, and a second end (the other end) of the resonant capacitor Cr is connected to a first end (one end) of the resonant inductor Lr. Further, a second end (the other end) of the resonant inductor Lr is connected to one end of the primary winding 31 described above, and the other end of the primary winding 31 is connected to the primary low-voltage line L1L.

[0022] In the inverter circuit 2 configured as described above, the switching elements S1, S2 perform switching operations (on / off operations) in accordance with drive signals SG1, SG2 supplied from a drive circuit 5 in a control circuit 7 described later, so that the inverter circuit 2 operates as follows: That is, the DC input voltage Vin applied between the input terminals T1, T2 is converted into an AC voltage and output to the transformer 3 (primary winding 31).

[0023] (B.Trance 3) The transformer 3 has one primary winding 31 and two secondary windings 321 and 322.

[0024] In the primary winding 31, a first end (one end) of the primary winding 31 is connected to the second end (other end) of the above-mentioned resonant inductor Lr, and a second end (other end) of the primary winding 31 is connected to the above-mentioned primary low-voltage line L1L.

[0025] In the secondary winding 321, a first end of the secondary winding 321 is connected to a cathode of a rectifier diode 41 (to be described later) via a connection line L21 (to be described later), and a second end of the secondary winding 321 is connected to a center tap P6 in a rectifier smoothing circuit 4 (to be described later). In the secondary winding 322, a first end of the secondary winding 322 is connected to a cathode of a rectifier diode 42 (to be described later) via a connection line L22 (to be described later), and a second end of the secondary winding 322 is connected to the center tap P6. In other words, the second ends of the secondary windings 321 and 322 are commonly connected to the center tap P6.

[0026] The transformer 3 converts the voltage generated by the inverter circuit 2 (a rectangular pulse wave voltage input to the primary winding 31 of the transformer 3) and outputs an AC voltage from each end of the secondary windings 321, 322. In this case, the degree of voltage conversion of the DC output voltage Vout relative to the DC input voltage Vin is determined by the turns ratio n (=the number of turns np of the primary winding 31 / the number of turns ns of the secondary windings 321, 322) between the primary winding 31 and the secondary windings 321, 322, and a switching period Tsw (switching frequency fsw=1 / Tsw) described later.

[0027] (C. Rectifier smoothing circuit 4) The rectifying smoothing circuit 4 has two rectifying diodes 41 and 42, and one output smoothing capacitor Cout. Specifically, the rectifying smoothing circuit 4 includes a rectifying circuit having the rectifying diodes 41 and 42, and a smoothing circuit having the output smoothing capacitor Cout.

[0028] The above-mentioned rectifier circuit is a so-called "center tap type" rectifier circuit. That is, the anodes of the rectifier diodes 41 and 42 are connected to the ground line LG, the cathode of the rectifier diode 41 is connected to the first end of the secondary winding 321 via the connection line L21, and the cathode of the rectifier diode 42 is connected to the first end of the secondary winding 322 via the connection line L22. As described above, the second ends of the secondary windings 321 and 322 are commonly connected to the center tap P6, and the center tap P6 is connected to the output terminal T3 via the output line LO. The above-mentioned ground line LG is connected to the output terminal T4.

[0029] In the above-mentioned smoothing circuit, an output smoothing capacitor Cout is connected between the above-mentioned output line LO and ground line LG (between the output terminals T3 and T4). That is, a first terminal of the output smoothing capacitor Cout is connected to the output line LO, and a second terminal of the output smoothing capacitor Cout is connected to the ground line LG.

[0030] In the rectifier smoothing circuit 4 configured as above, the rectifier circuit including the rectifier diodes 41 and 42 rectifies and outputs the AC voltage output from the transformer 3. In addition, in the smoothing circuit including the output smoothing capacitor Cout, the voltage rectified by the rectifier circuit is smoothed to generate a DC output voltage Vout. Note that the DC output current Iout (load current) flows to the load 9 described above due to the DC output voltage Vout generated in this manner, and power is supplied to the load 9 from the output terminals T3 and T4.

[0031] Here, the above-mentioned DC output current Iout (load current) corresponds to one specific example of the "output current" of the present invention.

[0032] (D. Control circuit 7) The control circuit 7 is a circuit that controls the switching power supply device 1. The control circuit 7 has a voltage detection unit 61, a delay time setting unit 62, and a drive circuit 5, as shown in FIG.

[0033] FIG. 2 shows an example of the operation of the switching power supply device 1 (examples of waveforms of various voltages and currents) in the form of a timing diagram. Specifically, FIG. 2(A) shows examples of waveforms of the drive signal SG1 (voltage Vgs1 between the gate and source of the switching element S1), and FIG. 2(B) shows examples of waveforms of the drive signal SG2 (voltage Vgs2 between the gate and source of the switching element S2). FIG. 2(C) shows examples of waveforms of the voltage Vds2 (shown in FIG. 1) between the drain and source (both ends) of the switching element S2, and the current Ids2 (shown in FIG. 1) flowing between the drain and source of the switching element S2. In FIG. 2, the horizontal axis indicates time t. FIG. 2 also shows the switching period Tsw (=1 / fsw) of the switching power supply device 1.

[0034] The above-mentioned voltage detection unit 61, delay time setting unit 62 and drive circuit 5 will be described in detail below with reference to FIGS.

[0035] (Voltage detection unit 61) 1, the voltage detection unit 61 is a circuit that detects the voltage across both ends of the switching element S2 included in the inverter circuit 2 (the above-mentioned drain-source voltage Vds2 detected at the connection point P1). Specifically, the voltage detection unit 61 detects the voltage Vds2 at the time point (timing tds shown in FIG. 2) when this switching element S2 switches from an OFF state (Vgs2=0 V) to an ON state (Vgs2=5 V, for example).

[0036] (Delay time setting unit 62) As shown in FIG. 1, the delay time setting unit 62 is a circuit that compares the value of the voltage Vds2 (the voltage Vds2 at the timing tds described above) output from the voltage detection unit 61 with two different threshold voltages Vth1, (-Vth2) (see FIG. 2(C)). The delay time setting unit 62 also sets the length of a dead time Td as a delay time when performing switching drive in a drive circuit 5 described later, according to a comparison result between the value of the voltage Vds2 and the two threshold voltages Vth1, (-Vth2) as needed (see FIG. 1). The dead time Td thus set is output to the drive circuit 5 described later as needed, as shown in FIG. 1.

[0037] Here, the above-mentioned dead time Td is the period from the time when the switching element S1 switches from the on state (Vgs1=for example, 5V) to the off state (Vgs1=0V) to the time when the switching element S2 switches from the off state to the on state (timing tds), as shown in Fig. 2. In other words, this dead time Td is the period during which both of these two switching elements S1 and S2 are set to the off state.

[0038] The dead time Td corresponds to a specific example of the "delay time" in the present invention.

[0039] In addition, in the example shown in FIG. 2, the threshold voltage (-Vth2) is smaller than the threshold voltage Vth1. Specifically, in the example shown in FIG. 2, the threshold voltage Vth1 is a predetermined positive voltage (e.g., about 0.2 V), and the threshold voltage (-Vth2) is a predetermined negative voltage (e.g., about -0.2 V). Such a threshold voltage Vth1 corresponds to a specific example of a "first threshold voltage" in the present invention. Moreover, the threshold voltage (-Vth2) corresponds to a specific example of a "second threshold voltage" in the present invention.

[0040] Here, the delay time setting unit 62, which will be described in detail later, sets the dead time Td as needed so that the end timing of the dead time Td (timing tds shown in FIG. 2) converges (substantially coincides) with the zero-cross point Pzc of the voltage Vds2. Details of the method for setting such dead time Td will be described later (FIGS. 4 to 7).

[0041] (Drive circuit 5) The drive circuit 5 is a circuit that performs switching drive and controls the operations of the switching elements S1 and S2 in the inverter circuit 2. Specifically, the drive circuit 5 controls the switching operation (on / off operation) of each of the switching elements S1 and S2 by individually supplying drive signals SG1 and SG2 to the switching elements S1 and S2, respectively.

[0042] The drive circuit 5 also performs switching frequency control when controlling the switching operation of each of the switching elements S1 and S2 (performing switching drive), i.e., performs PFM (Pulse Frequency Modulation) control on the drive signals SG1 and SG2.

[0043] Furthermore, the drive circuit 5 performs the above-mentioned switching drive so that the switching elements S1 and S2 each perform a switching operation at a fixed duty ratio and the switching frequency fsw operates variably. Incidentally, when the on-periods of the switching elements S1 and S2 are expressed as Ton1 and Ton2, respectively, the duty ratios of the above-mentioned switching elements S1 and S2 are expressed as (Ton1 / Tsw) and (Ton2 / Tsw) using the switching cycle Tsw (=1 / fsw). Moreover, both of these (Ton1 / Tsw) and (Ton2 / Tsw) are values ​​less than 50%, and a dead time Td, which will be described below, is provided between the on-periods Ton1 and Ton2 to prevent short-circuit damage due to simultaneous on-periods.

[0044] Here, when performing the above-mentioned switching drive, the drive circuit 5 also controls the switching operations of the switching elements S1 and S2 using the dead time Td (dead time Td set as needed by the delay time setting unit 62) output from the delay time setting unit 62. Specifically, as shown in Fig. 2, for example, the drive circuit 5 performs switching operations in the next switching period Tsw in the dead time Td (for example, the dead time Td' shown in Fig. 2) set as needed in this way.

[0045] [Operation and Effects] (A.Basic movement) In this switching power supply device 1, a DC input voltage Vin supplied from a DC input power supply 10 via input terminals T1, T2 is switched by switching elements S1, S2 to generate a rectangular pulse wave voltage in an inverter circuit 2. This rectangular pulse wave voltage is supplied to a primary winding 31 in a transformer 3 and transformed in the transformer 3, so that a transformed AC voltage is output from secondary windings 321, 322.

[0046] In the rectifying and smoothing circuit 4, the AC voltage output from the transformer 3 (the above-mentioned transformed AC voltage) is rectified by the rectifying diodes 41 and 42 in the rectifying circuit, and then smoothed by the output smoothing capacitor Cout in the smoothing circuit. As a result, a DC output voltage Vout is output from the output terminals T3 and T4. Then, this DC output voltage Vout causes a DC output current Iout to flow to the load 9, and power is supplied to the load 9.

[0047] (B. Transistor conduction characteristics) However, in a conventional general switching power supply device using a transistor as a switching element, there are the following concerns.

[0048] That is, during the dead time Td described above, a reverse voltage drop of, for example, 2V or more occurs between the drain and source of the transistor serving as the switching element. This reverse voltage and the drain current flowing through the transistor cause a conduction loss in the switching element. In particular, when the above-mentioned GaN transistor is used as the switching element, the reverse voltage drop described above becomes large, as shown in FIG. 3 below, and therefore the conduction loss described above also becomes large.

[0049] Figure 3 shows an example of the conduction characteristics of a typical transistor (an example of the relationship between the drain-source voltage Vds and the drain-source current Ids in the case of the above-mentioned GaN transistor). Note that the example in Figure 3 shows such conduction characteristics for each of the gate-source voltages Vgs=-3V, -2V, 0V, 2V, and 6V.

[0050] First, such a GaN transistor does not have a built-in body diode in the device structure, but has a pseudo body diode during circuit operation of the GaN transistor. This pseudo body diode operates when the gate-drain voltage Vgd becomes positive when the above-mentioned voltage Vds becomes negative while the gate of the GaN transistor is in the off state, and the channel becomes conductive beyond a certain threshold. Therefore, in this GaN transistor, the forward drop voltage VF of the body diode in a silicon MOS-FET is about 2V, which is higher than VF=0.7V.

[0051] Furthermore, when the gate of the GaN transistor is in the off state and the voltage Vgs is a negative voltage, the VF becomes even larger, for example as shown in Fig. 3. And because this VF is large, if the period during which the pseudo body diode is conductive is long and the current Ids is large, even larger conduction losses will occur.

[0052] Here, the conduction of the body diode or pseudo body diode in a switching element occurs immediately before or after the switching element turns on when performing synchronous rectification or zero voltage switching (ZVS). Also, when the switching element is about to turn on, ideally it turns on at the same time as the above-mentioned voltage Vds becomes negative. If it turns on too early, the charge accumulated in the output capacitance Coss of the switching element is short-circuited by the turn-on, causing power loss, or the on-period of another switching element overlaps with the timing of the turn-on, causing a through current to flow. Conversely, if it turns on too late, the conduction period of the body diode or pseudo body diode becomes longer.

[0053] In addition, just before the switching element is turned on, the voltage Vds drops rapidly, causing current to flow through the feedback capacitance to the gate of the switching element, which can cause the voltage Vgs to become negative. In a GaN transistor, the negative voltage of the voltage Vgs increases VF, which increases the power loss due to conduction of the pseudo body diode.

[0054] Furthermore, the appropriate turn-on or turn-off timing differs depending on the operating conditions of the switching power supply (input voltage, load, etc.) and variations in constants such as parasitic capacitance and inductance. Therefore, to avoid a fatal increase in power loss and surges and noise caused by turning on too early or turning off too late, it is desirable to set the turn-on timing later than the ideal and the turn-off timing earlier than the ideal.

[0055] In this way, in a conventional general switching power supply device using a transistor as a switching element, there is a risk of increased power loss due to the generation of a reverse voltage in the switching element, etc. Therefore, it can be said that there is a demand to minimize the above-mentioned dead time Td.

[0056] (C. Operation Example of This Embodiment) Therefore, in the switching power supply device 1 of this embodiment, as described above, the length of the dead time Td when performing switching drive is set at any time by the control circuit 7 in accordance with the comparison result between the value of the above-mentioned voltage Vds2 and two types of threshold voltages Vth1, (-Vth2).

[0057] Here, an example of a method for setting such dead time Td will be described in detail with reference to Figs. 4 to 7. Fig. 4 shows an example of setting the dead time Td according to this embodiment. Fig. 5 shows a timing diagram of an example of waveforms during resonant operation in the switching power supply device 1. Fig. 6 shows a flow chart of a process example for setting the dead time Td according to this embodiment. Fig. 7 shows an example of setting the maximum dead time Tdmax and the minimum dead time Tdmin according to this embodiment.

[0058] The maximum dead time Tdmax is the maximum value that can be set as the dead time Td, and corresponds to a specific example of the "maximum delay time" in the present invention. The minimum dead time Tdmin is the minimum value that can be set as the dead time Td, and corresponds to a specific example of the "minimum delay time" in the present invention.

[0059] In this embodiment, as shown in FIG. 4, for example, the delay time setting unit 62 in the control circuit 7 shortens, extends or maintains the dead time Td depending on the result of comparison between the value of the aforementioned voltage Vds2 and two types of threshold voltages Vth1, (-Vth2).

[0060] Specifically, first, the delay time setting unit 62 sets an initial value T1 of the dead time Td, which corresponds to the ideal value of the dead time Td described above (e.g., corresponds to the ideal fall time of the voltage Vds2 as shown in FIG. 2(C)).

[0061] With reference to the waveform example during resonant operation shown in Fig. 5, this initial value T1 is defined, for example, using the following formulas (1) to (3). These formulas use the above-mentioned DC input voltage Vin, DC output voltage Vout, capacitance value of capacitor Cds2 connected in parallel to switching element S2, switching period Tsw, and turn ratio n in transformer 3, as well as transformer excitation current Im (see Fig. 5) flowing through primary winding 31 of transformer 3, and mutual inductance Lm in transformer 3. Note that Fig. 5 also shows, in addition to the above-mentioned transformer excitation current Im, the amount of change ΔIm of this transformer excitation current Im, and resonant inductor current ILr flowing through resonant inductor Lr. T1=(2×Cds2×Vin) / Im =(16×Cds2×Lm) / Tsw ……(1) ·Im=(n×Vout×(Tsw / 4)) / Lm ……(2) (n×Vout)=(Vin / 2) ……(3)

[0062] The delay time setting unit 62 is configured to shorten, extend or maintain the dead time Td at any time according to the comparison result between the value of the aforementioned voltage Vds2 and two types of threshold voltages Vth1, (-Vth2) based on the initial value T1 of the dead time Td set in this manner.

[0063] 4, the delay time setting unit 62 shortens the dead time Td when the value of the voltage Vds2 is less than the threshold voltage (-Vth2) (Vds2<-Vth2). On the other hand, the delay time setting unit 62 extends the dead time Td when the value of the voltage Vds2 exceeds the threshold voltage Vth1 (Vds2>Vth1). Moreover, the delay time setting unit 62 maintains the dead time Td when the value of the voltage Vds2 is equal to or greater than the threshold voltage (-Vth2) and equal to or less than the threshold voltage Vth1 (-Vth2≦Vds2≦Vth1).

[0064] Also, when the value of the dead time Td becomes greater than the maximum dead time Tdmax (Td > Tdmax), for example, as shown in FIG. 4, the dead time Td is set to the maximum dead time Tdmax. Similarly, when the value of the dead time Td becomes smaller than the minimum dead time Tdmin (Td < Tdmin), for example, as shown in FIG. 4, the dead time Td is set to the minimum dead time Tdmin.

[0065] In this way, as described above, the delay time setting unit 62 sets the dead time Td as needed so that the end timing of the dead time Td (the timing tds shown in FIG. 2) converges to the zero crossing point Pzc of the voltage Vds2 between both ends of the switching element S2.

[0066] Here, referring to FIG. 6, a specific processing example in setting such a dead time Td will be described in detail using a flowchart.

[0067] In the processing example shown in this FIG. 6, first, the delay time setting unit 62 sets the dead time Td to the initial value T1 described above (Td = T1: step S11). Next, the delay time setting unit 62 determines whether or not the value of the voltage Vds2 described above is less than the threshold voltage Vth1 (Vds2 < Vth1) (step S12). Here, if it is determined that the value of the voltage Vds2 is less than the threshold voltage Vth1 (step S12: Y), the process proceeds to step S16 described later.

[0068] On the other hand, if it is determined that the value of the voltage Vds2 is greater than or equal to the threshold voltage Vth1 (Vds2 ≥ Vth1) (step S12: N), the following occurs. That is, next, the delay time setting unit 62 determines whether or not the current value of the dead time Td exceeds the maximum dead time Tdmax described above (Td > Tdmax) (step S13).

[0069] Here, when it is determined that the value of the current dead time Td is equal to or less than the maximum dead time Tdmax (Td ≦ Tdmax) (step S13: N), the delay time setting unit 62 increases the value of the dead time Td by a predetermined value ΔT (Td = Td + ΔT: step S14). That is, in this case, as described above with reference to FIG. 4, the delay time setting unit 62 extends the dead time Td. Thereafter, the process returns to step S12 described above.

[0070] On the other hand, when it is determined that the value of the current dead time Td exceeds the maximum dead time Tdmax (step S13: Y), the following occurs. That is, in this case, as described above with reference to FIG. 4, the delay time setting unit 62 sets the value of the dead time Td to the maximum dead time Tdmax (Td = Tdmax: step S15). Thereafter, the process returns to step S12 described above.

[0071] Subsequently, in step S16 described above, the delay time setting unit 62 determines whether the value of the voltage Vds2 exceeds the threshold voltage (-Vth2) (Vds2 < -Vth2). Here, when it is determined that the value of the voltage Vds2 is equal to or less than the threshold voltage (-Vth2) (Vds2 ≦ -Vth2) (step S16: N), the following occurs. That is, next, the delay time setting unit 62 determines whether the value of the current dead time Td is less than the minimum dead time Tdmin described above (Td < Tdmin) (step S17).

[0072] Here, when it is determined that the value of the current dead time Td is equal to or greater than the minimum dead time Tdmin (Td ≧ Tdmin) (step S17: N), the delay time setting unit 62 decreases the value of the dead time Td by a predetermined value ΔT (Td = Td - ΔT: step S18). That is, in this case, as described above with reference to FIG. 4, the delay time setting unit 62 shortens the dead time Td. Thereafter, the process returns to step S12 described above.

[0073] On the other hand, if it is determined that the value of the current dead time Td is less than the minimum dead time Tdmin (step S17: Y), the following occurs. That is, in this case, as described above with reference to Fig. 4, the delay time setting unit 62 sets the value of the dead time Td to the minimum dead time Tdmin (Td = Tdmin: step S19). After that, the process returns to the above-mentioned step S12.

[0074] Furthermore, in the above-mentioned step S16, if it is determined that the value of the voltage Vds2 exceeds the threshold voltage (-Vth2) (step S16: Y), the following occurs. That is, in this case, as described above with reference to Fig. 4, the delay time setting unit 62 maintains the dead time Td (Td = Td: step S20). After that, the process returns to the above-mentioned step S12.

[0075] This concludes the explanation of the series of processing examples shown in Fig. 6. In the processing example shown in Fig. 6, the case has been explained in which the change amounts (increase and decrease) when the dead time Td is extended and shortened are the same (corresponding to the above-mentioned predetermined value ΔT), but this is not the only case. That is, the increase and decrease amounts of such dead time Td may be set to different values.

[0076] Also, as shown in FIG. 7, for example, in this embodiment, the values ​​of the maximum dead time Tdmax and the minimum dead time Tdmin are changed as needed depending on the operating state of the switching power supply device 1 (for example, the values ​​of the DC output current Iout, the DC input voltage Vin, and the DC output voltage Vout).

[0077] 7, when the value of the DC output current Iout as the operating state of the switching power supply device 1 becomes relatively small, the values ​​of the maximum dead time Tdmax and the minimum dead time Tdmin are changed to become relatively large, whereas when the value of the DC output current Iout becomes relatively large, the values ​​of the maximum dead time Tdmax and the minimum dead time Tdmin are changed to become relatively small.

[0078] 7, when the value of the DC input voltage Vin or the DC output voltage Vout becomes relatively small as the operating state of the switching power supply device 1, the values ​​of the maximum dead time Tdmax and the minimum dead time Tdmin are changed to become relatively small, respectively. On the other hand, when the value of the DC input voltage Vin or the DC output voltage Vout becomes relatively large, the values ​​of the maximum dead time Tdmax and the minimum dead time Tdmin are changed to become relatively large, respectively.

[0079] Furthermore, for example, as shown in FIG. 7, when the value of the DC input voltage Vin or the value of the DC output current Iout changes suddenly (increases or decreases suddenly), the value of the minimum dead time Tdmin is changed to become relatively larger.

[0080] (D. Actions and Effects) In this manner, in this embodiment, the length of the dead time Td when performing switching drive is set by the control circuit 7 as needed in response to the comparison result between the value of the voltage Vds2 described above and the two types of threshold voltages Vth1, (-Vth2), as follows. That is, while reliably performing the ZVS described above in the switching element S2, the period during which the reverse voltage described above occurs in the switching element S2 can be shortened. Specifically, by shortening the dead time Td, the conduction loss (in the body diode described above) in the switching element S2 can be reduced. As a result, in this embodiment, it is possible to suppress power loss in the switching power supply device 1.

[0081] In particular, when GaN transistors are used as the switching elements S1 and S2, the reverse voltage drop is large as described above, leading to the following: In this case, the effect of suppressing power loss in the switching power supply device 1 by reducing the conduction loss in the switching elements S1 and S2 described above is particularly large.

[0082] Furthermore, as described above, since the conduction loss in the switching element S2 is reduced, the switching power supply device 1 can be made smaller and less expensive.

[0083] In addition, in this embodiment, the dead time Td is set so that the end timing of the dead time Td (timing tds shown in FIG. 2) converges to the zero-cross point Pzc of the voltage Vds2 across the switching element S2, so that the following occurs: That is, the ZVS in the switching element S2 described above can be more reliably achieved, and as a result, the power loss in the switching power supply device 1 can be further suppressed.

[0084] Furthermore, in this embodiment, the values ​​of the above-mentioned maximum dead time Tdmax and minimum dead time Tdmin are each changed according to the operating state of the switching power supply device 1, as follows: That is, since the range of the dead time Td can be appropriately adjusted according to such an operating state of the switching power supply device 1, it is possible to further suppress power loss in the switching power supply device 1.

[0085] In addition, in this embodiment, when the value of the DC input voltage Vin or the value of the DC output current Iout changes suddenly, the value of the minimum dead time Tdmin is changed to become relatively large, so that the following occurs: In other words, since the value of the minimum dead time Tdmin can be appropriately adjusted in response to a sudden change in the operating state of the switching power supply device 1, it is possible to further suppress power loss in the switching power supply device 1.

[0086] In addition, in this embodiment, the rectifier circuit in the rectifier smoothing circuit 4 is a so-called "center tap type" rectifier circuit, which has the following advantages compared to a so-called "bridge type" rectifier circuit: The number of rectifier elements is reduced to two (rectifier diodes 41 and 42), which allows the rectifier circuit to be made smaller, with lower loss and lower cost.

[0087] <2. Modifications> Next, modified examples (modifications 1 to 3) of the above embodiment will be described. In the following, the same components as those in the embodiment will be given the same reference numerals, and the description will be omitted as appropriate.

[0088] [Variation 1] (composition) FIG. 8 is a circuit diagram showing an example of the schematic configuration of a switching power supply device (switching power supply device 1A) according to the first modification.

[0089] As in the embodiment, a system including the DC input power supply 10 and this switching power supply device 1A corresponds to one specific example of the "power supply system" of the present invention.

[0090] The switching power supply 1A of this variant example 1 corresponds to the switching power supply 1 of the embodiment (see FIG. 1) in which a transformer 3A and a rectifying and smoothing circuit 4A are provided instead of the transformer 3 and the rectifying and smoothing circuit 4, respectively, and the other configurations are similar.

[0091] The transformer 3A has one primary winding 31 and one secondary winding 32. That is, the transformer 3 has two secondary windings 321 and 322, whereas the transformer 3A has only one secondary winding 32. A first end of the secondary winding 32 is connected to a connection point P7 in a rectifying and smoothing circuit 4A (described later), and a second end of the secondary winding 32 is connected to a connection point P8 in the rectifying and smoothing circuit 4A.

[0092] Like the transformer 3, the transformer 3A converts the voltage (voltage converted into a rectangular pulse wave) generated by the inverter circuit 2 into an AC voltage, and outputs the AC voltage from an end of the secondary winding 32. In this case, the degree of voltage conversion of the DC output voltage Vout relative to the DC input voltage Vin is determined by the turns ratio n between the primary winding 31 and the secondary winding 32, and the switching frequency fsw described above.

[0093] The rectifying and smoothing circuit 4A has four rectifying diodes 41-44 and one output smoothing capacitor Cout. Specifically, the rectifying and smoothing circuit 4A includes a rectifying circuit having the rectifying diodes 41-44, and a smoothing circuit having the output smoothing capacitor Cout. That is, the rectifying and smoothing circuit 4A is obtained by changing the configuration of the rectifying circuit in the rectifying and smoothing circuit 4.

[0094] The rectifier circuit of this modified example 1 is a so-called "bridge type" rectifier circuit, unlike the rectifier circuit of the embodiment (a so-called "center tap type" rectifier circuit). That is, the cathodes of the rectifier diodes 41 and 43 are each connected to the output line LO, and the anode of the rectifier diode 41 is connected to the cathode of the rectifier diode 42 and the above-mentioned first end of the secondary winding 32 at the connection point P7. The anodes of the rectifier diodes 42 and 44 are each connected to the ground line LG, and the cathode of the rectifier diode 44 is connected to the anode of the rectifier diode 43 and the above-mentioned second end of the secondary winding 32 at the connection point P8.

[0095] In the rectifying / smoothing circuit 4A configured as described above, similarly to the rectifying / smoothing circuit 4, the rectifying circuit configured to include rectifying diodes 41 to 44 rectifies the AC voltage output from the transformer 3A and outputs the rectified voltage.

[0096] (Action and effect) The switching power supply device 1A of the first modification thus configured basically operates in the same manner as the switching power supply device 1 of the embodiment, and thus can obtain the same effects.

[0097] In particular, in this modification 1, the rectifier circuit in the rectifying and smoothing circuit 4A is a bridge-type rectifier circuit, so that the number of windings (number of secondary windings) in the transformer 3A is one (secondary winding 32), which is smaller than that in the embodiment, for example. As a result, it is possible to reduce the size and loss of the transformer 3A.

[0098] [Variations 2 and 3] In the switching power supply devices (switching power supply devices 1B, 1C) according to the modifications 2 and 3, the rectifier circuits in the rectifying and smoothing circuits 4, 4A in the embodiment and modification 1 described above are replaced with so-called synchronous rectifier circuits, as described below. In addition, since such synchronous rectifier circuits are provided, the switching power supply devices 1B, 1C of the modifications 2 and 3 are provided with control circuits 7B, 7C, described later, instead of the control circuit 7 in the embodiment and modification 1.

[0099] (Configuration of Modification 2) Specifically, FIG. 9 is a circuit diagram showing a schematic configuration example of a switching power supply device 1B according to the second modification.

[0100] As in the embodiment and the first modification, a system including DC input power supply 10 and this switching power supply device 1B corresponds to one specific example of the "power supply system" of the present invention.

[0101] The switching power supply 1B of this variant example 2 corresponds to the switching power supply 1 of the embodiment in which a rectifying and smoothing circuit 4B and a control circuit 7B are provided instead of the rectifying and smoothing circuit 4 and the control circuit 7, respectively, and the other configurations are similar.

[0102] In the synchronous rectifier circuit (rectifier smoothing circuit 4B) in this modified example 2, as shown in FIG. 9, the rectifier diodes 41 and 42 described in the embodiment are each configured with a MOS-FET (MOS transistors M9 and M10) as a switching element. In this synchronous rectifier circuit, the MOS transistors M9 and M10 themselves are controlled to be turned on (perform synchronous rectification) in synchronization with the period during which the parasitic diodes of the MOS transistors M9 and M10 are conductive. Specifically, in this modified example 2, a drive circuit 5 in a control circuit 7B described later uses drive signals SG9 and SG10 to control the on / off operation of the MOS transistors M9 and M10 (see FIG. 9).

[0103] Each of these MOS transistors M9 and M10 corresponds to a specific example of a "switching element that performs synchronous rectification" in the present invention.

[0104] Similarly to the control circuits 7 of the embodiment and modification 1, the control circuit 7B of modification 2 basically includes the above-mentioned voltage detection unit 61, delay time setting unit 62, and drive circuit 5. However, the control circuit 7B differs from the control circuit 7 in the following manner.

[0105] That is, first, in the control circuit 7, the two switching elements S2, S1 (corresponding to the "first and second switching elements" in the present invention) for which the dead time Td is set are both switching elements arranged in the inverter circuit 2. In contrast, in the control circuit 7B, at least one of the two switching elements (corresponding to the "first and second switching elements" in the present invention) for which the dead time Td is set is a switching element that performs synchronous rectification (at least one of the above-mentioned MOS transistors M9, M10) arranged in the above-mentioned rectifying smoothing circuit 4B.

[0106] Specifically, in the control circuit 7B, the two switching elements for which the dead time Td is set are as shown in (a) or (b) below. (a) One of the switching elements S1 and S2 and one of the MOS transistors M9 and M10 are the two switching elements for which the dead time Td is set. (b) MOS transistors M9 and M10 are the two switching elements for which the dead time Td is set.

[0107] The control circuit 7B sets the dead time Td based on the voltage between both ends of one of these two switching elements (corresponding to the "first switching element" in the present invention) in the same manner as in the embodiment and the first modified example. Specifically, the control circuit 7B sets the length of the dead time Td when performing switching drive according to a comparison result between such a voltage value between both ends and the two types of threshold voltages Vth1, (-Vth2) described above. The control circuit 7B uses the dead time Td set as needed in this manner to control the switching operations of a plurality of switching elements (switching elements S1, S2 and MOS transistors M9, M10) including the two switching elements described above.

[0108] Such a control circuit 7B corresponds to a specific example of a "switching control device" in the present invention. In addition, in this modification 2, the above-mentioned switching elements S1, S2 and MOS transistors M9, M10 each correspond to a specific example of a "plurality of switching elements" in the present invention. Furthermore, any two of these switching elements S1, S2 and MOS transistors M9, M10 (the above-mentioned two switching elements) correspond to a specific example of a "first switching element" and a "second switching element" in the present invention.

[0109] (Configuration of Modification 3) FIG. 10 is a circuit diagram showing a schematic configuration example of a switching power supply device 1C according to the third modification.

[0110] As in the embodiment and the first and second modifications, a system including DC input power supply 10 and this switching power supply device 1C corresponds to one specific example of the "power supply system" of the present invention.

[0111] The switching power supply device 1C of the third variant corresponds to the switching power supply device 1A of the first variant, except that a rectifying and smoothing circuit 4C and a control circuit 7C are provided instead of the rectifying and smoothing circuit 4A and the control circuit 7, respectively, and the other configurations are similar.

[0112] In the synchronous rectifier circuit (rectifier smoothing circuit 4C) in the third modification, as shown in FIG. 10, the rectifier diodes 41-44 described in the first modification are each configured with a MOS-FET (MOS transistors M11-M14) as a switching element. In the synchronous rectifier circuit in the third modification, similarly to the synchronous rectifier circuit in the second modification, the MOS transistors M11-M14 themselves are controlled to be turned on (to perform synchronous rectification) in synchronization with the period during which the parasitic diodes of the MOS transistors M11-M14 are conductive. Specifically, in the third modification, a drive circuit 5 in a control circuit 7C (to be described later) uses drive signals SG11-SG14 to control the on / off operation of the MOS transistors M11-M14 (see FIG. 10).

[0113] Each of these MOS transistors M11 to M14 corresponds to a specific example of a "switching element that performs synchronous rectification" in the present invention.

[0114] Similarly to the control circuit 7 of the embodiment and modification 1, the control circuit 7C of modification 3 basically includes the above-mentioned voltage detection unit 61, delay time setting unit 62, and drive circuit 5. However, unlike the control circuit 7, the control circuit 7C is configured as follows, similar to the control circuit 7B described in modification 2.

[0115] That is, in the control circuit 7C, at least one of the two switching elements (corresponding to the "first and second switching elements" in the present invention) for which the dead time Td is set is a switching element that performs synchronous rectification (at least one of the above-mentioned MOS transistors M11 to M14) arranged in the above-mentioned rectifying smoothing circuit 4C.

[0116] Specifically, in the control circuit 7C, the two switching elements for which the dead time Td is set are as shown in (c) or (d) below. (c) One of the switching elements S1, S2 and one of the MOS transistors M11 to M14 are the two switching elements for which the dead time Td is set. (d) Two of the MOS transistors M11 to M14 are two switching elements for which the dead time Td is set.

[0117] The control circuit 7C sets the dead time Td based on the voltage between both ends of one of these two switching elements (corresponding to the "first switching element" in the present invention) in the same manner as in the embodiment and the first and second modifications. Specifically, the control circuit 7C sets the length of the dead time Td when performing switching drive according to a comparison result between such a voltage value between both ends and the two types of threshold voltages Vth1, (-Vth2) described above. The control circuit 7C uses the dead time Td set as necessary in this manner to control the switching operations of a plurality of switching elements (switching elements S1, S2 and MOS transistors M11 to M14) including the two switching elements described above.

[0118] Such a control circuit 7C corresponds to a specific example of a "switching control device" in the present invention. In addition, in this modification 3, the above-mentioned switching elements S1, S2 and MOS transistors M11 to M14 each correspond to a specific example of a "plurality of switching elements" in the present invention. Furthermore, any two of these switching elements S1, S2 and MOS transistors M11 to M14 (the above-mentioned two switching elements) correspond to a specific example of a "first switching element" and a "second switching element" in the present invention.

[0119] (Actions and Effects of Modifications 2 and 3) In the switching power supply devices 1B and 1C of the second and third modifications thus configured, basically, the same effects can be obtained as in the switching power supply devices 1 and 1A described above.

[0120] In particular, in these modified examples 2 and 3, each of the rectifier elements (rectifier diodes) in the rectifier circuit is configured with a switching element, and the rectifier circuit is configured as a synchronous rectifier circuit, as described below. That is, such a synchronous rectifier circuit reduces the conduction loss during rectification, making it possible to reduce the size and loss of the rectifier circuit. Incidentally, examples of such switching elements include the above-mentioned MOS-FET, as well as the above-mentioned HEMT, IGBT with a diode added in parallel, or a bipolar transistor.

[0121] <3. Other Modifications> Although the present invention has been described above by way of the embodiment and modifications, the present invention is not limited to these embodiments and can be modified in various ways.

[0122] For example, in the above embodiment, the configuration of the inverter circuit is specifically described, but the present invention is not limited to the above embodiment, and other configurations may be used as the inverter circuit. Specifically, the arrangement of the resonant inductor Lr, the resonant capacitor Cr, and the primary winding 31, which are connected in series with each other, is not limited to the arrangement described in the embodiment, and the arrangement positions of these three may be in random order. In addition, in the above embodiment, the so-called "half-bridge type" inverter circuit is described as an example, but the present invention is not limited to this example, and the so-called "full-bridge type" inverter circuit may be used.

[0123] In addition, in the above embodiments, the configuration of the transformer (primary winding and secondary winding) has been specifically given and described, but the present invention is not limited to the examples of the above embodiments, and for example, a transformer (primary winding and secondary winding) with a different configuration may be used.

[0124] Furthermore, in the above embodiments, the configuration of the rectifier smoothing circuit (rectifier circuit and smoothing circuit) has been specifically given and described, but the present invention is not limited to the examples of the above embodiments, and for example, a rectifier smoothing circuit (rectifier circuit and smoothing circuit) with a different configuration may be used.

[0125] In addition, in the above embodiments, etc., specific methods of controlling the operation of each switching element by a drive circuit (switching drive) have been given and described, but the present invention is not limited to the examples of the above embodiments, etc., and other methods may be used as the switching drive method.

[0126] In addition, in the above embodiment, a DC-DC converter has been described as an example of a switching power supply device according to the present invention, but the present invention can also be applied to other types of switching power supply devices, such as an AC-DC converter.

[0127] Furthermore, the configuration examples described so far may be applied in any combination.

Claims

1. A control device applied to a switching power supply device including a transformer having a primary winding and a secondary winding, an inverter circuit arranged between an input terminal pair to which an input voltage is input and the primary winding, and a rectifying and smoothing circuit arranged between an output terminal pair to which an output voltage is output and the secondary winding, a voltage detection unit that detects a voltage between both ends of a first switching element among a plurality of switching elements included in at least one of the inverter circuit and the rectifying and smoothing circuit at a time point when the first switching element switches from an off state to an on state; a delay time setting unit that sets a delay time from a time when a second switching element of the plurality of switching elements is switched from an on state to an off state to a time when the first switching element is switched from an off state to an on state, according to a comparison result between a value of the voltage between both ends of the first switching element and two different threshold voltages, a first threshold voltage and a second threshold voltage; a drive circuit that controls switching operations of the plurality of switching elements including the first and second switching elements by using the delay time set by the delay time setting unit; A switching control device comprising:

2. The delay time setting unit sets the delay time such that an end timing of the delay time converges to a zero cross point of the voltage between the two ends of the first switching element. The switching control device according to claim 1 .

3. The delay time setting unit is When a value of the voltage across the first switching element is less than the second threshold voltage that is smaller than the first threshold voltage, the delay time is shortened; When the value of the voltage across the first switching element exceeds the first threshold voltage, the delay time is extended; When a value of the voltage across the first switching element is equal to or higher than the second threshold voltage and equal to or lower than the first threshold voltage, the delay time is maintained. The switching control device according to claim 2 .

4. the first threshold voltage is a predetermined positive voltage; The second threshold voltage is a predetermined negative voltage. The switching control device according to any one of claims 1 to 3.

5. A maximum delay time that is a maximum value that can be set as the delay time; A minimum delay time that is the minimum value that can be set as the delay time are changed according to the operating state of the switching power supply device. The switching control device according to any one of claims 1 to 4.

6. When the value of the output current as the operating state of the switching power supply device becomes relatively small, the values ​​of the maximum delay time and the minimum delay time are changed to become relatively large, when the value of the output current becomes relatively large, the values ​​of the maximum delay time and the minimum delay time are changed so as to become relatively small, When the value of the input voltage or the output voltage becomes relatively small as an operating state of the switching power supply device, the values ​​of the maximum delay time and the minimum delay time are changed so as to become relatively small, When the value of the input voltage or the output voltage becomes relatively large, the values ​​of the maximum delay time and the minimum delay time are changed so as to become relatively large, respectively. The switching control device according to claim 5.

7. When the value of the input voltage or the value of the output current of the switching power supply device suddenly changes, The value of the minimum delay time, which is the minimum value that can be set as the delay time, is changed to be relatively large. The switching control device according to any one of claims 1 to 6.

8. The first and second switching elements are both switching elements disposed within the inverter circuit. The switching control device according to any one of claims 1 to 7.

9. At least one of the first and second switching elements is disposed in the rectifying and smoothing circuit and is a switching element that performs synchronous rectification. The switching control device according to any one of claims 1 to 7.

10. A switching control device according to any one of claims 1 to 9, the input terminal pair, the output terminal pair, the transformer, the inverter circuit, and the rectifying and smoothing circuit, A switching power supply device comprising:

11. A switching power supply device according to claim 10; a power supply for supplying the input voltage to the input terminal pair; A power supply system comprising:

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