LOW PARASITIC CAPACITANCE MEMS INERTAINTAL SENSOR AND RELATED METHODS -

By forming localized dielectric regions within trenches in inertial sensors, parasitic capacitance is reduced, enhancing sensitivity and accuracy in detecting acceleration and rotational speed.

JP7604408B2Active Publication Date: 2024-12-23ANALOG DEVICES INC
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Patent Information

Application Number
JP2021577609
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-06-28
Filing Date
2020-06-16
Publication Date
2024-12-23
Estimated Expiration
2040-06-16

AI Technical Summary

Technical Problem

Inertial sensors suffer from reduced sensitivity due to parasitic capacitance, which affects the accuracy of detecting physical quantities like acceleration and rotational speed, particularly in sensors using a sensing capacitor.

Method used

The formation of localized regions of thick dielectric material within trenches in the substrate, partially or completely filled with dielectric material or air, increases vertical separation between the sensing capacitor and the substrate, reducing parasitic capacitance.

Benefits of technology

This approach reduces noise in the detection circuit, enhancing the sensitivity of inertial sensors to measured quantities by minimizing parasitic capacitance, thereby improving their performance.

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Abstract

Microelectromechanical systems (MEMS) inertial sensors are described that exhibit reduced parasitic capacitance. The reduction in parasitic capacitance can be achieved by forming localized regions of thick dielectric material. These localized regions can be formed inside trenches. The formation of the trenches allows for increased vertical separation between the sense capacitor and the substrate, thereby reducing the parasitic capacitance within this region. The stationary electrode of the sense capacitor can be disposed between the proof mass and the trenches. The trenches can be filled with a dielectric material. In some circumstances, portions of the trenches can be filled with air, thereby further reducing the parasitic capacitance. These MEMS inertial sensors can function as accelerometers and / or gyroscopes, among other types of inertial sensors. The fabrication of these trenches can involve lateral oxidation, whereby columns of semiconductor material are oxidized.
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Description

[Technical field]

[0001] This application claims the benefit under 35 U.S.C. § 120 of U.S. patent application Ser. No. 16 / 457,865, entitled “LOW-PARASITIC CAPACITANCE MEMS INERTIAL SENSORS AND RELATED METHODS,” filed on June 28, 2019 under Attorney Docket No. G0766.70275US00, which is incorporated herein by reference in its entirety.

[0002] The technology described in this application relates to Micro-Electro-Mechanical Systems (MEMS) inertial sensors, such as accelerometers and gyroscopes. [Background technology]

[0003] Inertial sensors are electronic devices that measure and report motion, force, angular velocity, and / or other quantities. Examples of inertial sensors include gyroscopes and accelerometers. MEMS gyroscopes detect angular motion by sensing acceleration generated by Coriolis forces that arise when the gyroscope's resonating mass undergoes angular motion. MEMS accelerometers detect linear and / or angular acceleration. Summary of the Invention [Means for solving the problem]

[0004] According to one aspect of the present application, microelectromechanical system (MEMS) inertial sensors are provided that exhibit reduced parasitic capacitance. The reduction in parasitic capacitance may be achieved by forming localized regions of thick dielectric material. These localized regions may be formed inside trenches. The formation of the trenches allows for increased vertical separation between the sense capacitor and the substrate, thereby reducing the parasitic capacitance in this region. A stationary electrode of the sense capacitor may be disposed between the proof mass and the trenches. The trenches may be filled with a dielectric material. In some circumstances, a portion of the trench may be filled with air, thereby further reducing the parasitic capacitance. These MEMS inertial sensors may function as accelerometers and / or gyroscopes, among other types of inertial sensors. The fabrication of these trenches may involve lateral oxidation, whereby columns of semiconductor material are oxidized.

[0005] According to another aspect of the present application, a MEMS inertial sensor is provided. The MEMS inertial sensor may include a substrate, a proof mass coupled to the substrate, a trench formed in the substrate, the trench at least partially filled with a dielectric material, the trench at least partially overlapping the proof mass along a direction perpendicular to a first surface of the substrate, and an electrode formed over the trench, the electrode and the proof mass forming a sense capacitor configured to sense motion of the proof mass relative to the substrate in response to acceleration of the MEMS inertial sensor.

[0006] According to another aspect of the present application, a MEMS inertial sensor is provided that may include a substrate having a first surface, a proof mass coupled to the substrate, a trench formed in the substrate, a dielectric layer disposed on the first surface of the substrate, a dielectric material region disposed in the trench, the dielectric material region being thicker than the dielectric layer in a direction perpendicular to the first surface of the substrate, and an electrode formed over the trench.

[0007] According to another aspect of the present application, a method for fabricating a MEMS inertial sensor is provided, which may include etching a substrate to form a plurality of columns of semiconductor material spaced apart by a plurality of gaps including a first gap, oxidizing the plurality of columns of semiconductor material to fill at least a portion of the first gaps with an oxide material, forming an electrode on the oxide material, and forming a proof mass suspended above the substrate.

[0008] Various aspects and embodiments of the present application are described with reference to the following figures. It should be understood that the figures are not necessarily drawn to scale. Items that appear in more than one figure are designated by the same reference numeral in all figures in which they appear. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a schematic diagram illustrating an example of a MEMS inertial sensor, according to some non-limiting embodiments. [Diagram 2] FIG. 2 is a schematic diagram illustrating an example of a MEMS inertial sensor having a trench formed in a substrate, according to some non-limiting embodiments. [Diagram 3] FIG. 3 is a schematic diagram illustrating a portion of the MEMS inertial sensor of FIG. 2 in further detail, according to some non-limiting embodiments. [Figure 4A] 4A-4D are schematic diagrams collectively illustrating an example process for fabricating a MEMS inertial sensor, according to some non-limiting embodiments. [Figure 4B] 4A-4B are schematic diagrams collectively illustrating an example process for fabricating a MEMS inertial sensor, according to some non-limiting embodiments. [Figure 4C] 4A-4C are schematic diagrams collectively illustrating an example process for fabricating a MEMS inertial sensor, according to some non-limiting embodiments. [Figure 4D] 4A-4D are schematic diagrams collectively illustrating an example process for fabricating a MEMS inertial sensor, according to some non-limiting embodiments. [Figure 4E] 4A-4E are schematic diagrams collectively illustrating an example process for fabricating a MEMS inertial sensor, according to some non-limiting embodiments. [Figure 4F] 4A-4F are schematic diagrams collectively illustrating an example process for fabricating a MEMS inertial sensor, according to some non-limiting embodiments. [Diagram 5] FIG. 5 is a schematic diagram illustrating an example of an inertial sensor having a trench with multiple columns of semiconductor material, according to some non-limiting embodiments. [Figure 6] FIG. 6 is a block diagram illustrating an example of a system including a MEMS inertial sensor, according to some non-limiting embodiments. [Figure 7] FIG. 7 is a schematic diagram illustrating a vehicle including the system of FIG. 6, according to some non-limiting embodiments. [Figure 8] FIG. 8 is a schematic diagram illustrating a smartphone including the system of FIG. 6, according to some non-limiting embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Applicant has recognized that the sensitivity of certain inertial sensors to detect physical quantities such as acceleration or rotational speed can be adversely affected by noise generated by the presence of parasitic capacitance. The effect of parasitic capacitance on the sensitivity of the inertial sensor is particularly detrimental in inertial sensors that rely on a sensing capacitor to detect the measurand. In these inertial sensors, in fact, the noise picked up by the parasitic capacitance is to some extent indistinguishable from the electrical signal generated by the sensing capacitor in response to the measurand (e.g., acceleration or rotational speed). As a result, the inertial sensor has a low sensitivity to the measurand, which limits its usefulness.

[0011] Applicants have recognized that in certain inertial sensors, parasitic capacitance may arise due to the presence of a substrate underneath the sense capacitor. In particular, parasitic capacitance arises in the region between the sense capacitor and the substrate. This region is sometimes occupied by a thin layer of dielectric material deposited on the top surface of the substrate. Examples of parasitic capacitance include "backside capacitance" and "substrate capacitance."

[0012] Aspects of the present application relate to MEMS inertial sensors in which parasitic capacitance is reduced by forming a localized region of thick dielectric material. In some embodiments, such a localized region of thick dielectric material is formed between a sense capacitor and an underlying substrate.

[0013] In some embodiments, the localized region of thick dielectric material is formed within a trench formed in the substrate beneath the sense capacitor. Applicant has recognized that the presence of a trench in the substrate beneath the sense capacitor effectively increases the vertical separation between the substrate and the sense capacitor, resulting in reduced capacitance. These trenches may be partially or completely filled with a dielectric material. For example, in an inertial sensor formed on a semiconductor substrate (e.g., silicon), the trenches may be filled with silicon oxide or other types of oxides, or silicon nitride, among other examples. In other embodiments, the trenches may be filled with air, the dielectric constant of which is lower than that of the dielectric material, thus further reducing parasitic capacitance.

[0014] Applicant has recognized that one challenge associated with the formation of localized regions of thick dielectric material is due to the relatively slow rate at which the dielectric material is grown on a semiconductor substrate. For example, considering the oxidation of silicon along the 100 direction, it takes about 4 hours at 1200° C. to obtain a 0.4 μm thick silicon oxide layer. At this rate, it may take an excessively long time to grow a sufficiently thick silicon oxide layer to reduce the parasitic capacitance of the sensor to an acceptable level. This approach is not viable because it increases the manufacturing lead time and, therefore, the manufacturing costs.

[0015] Aspects of the present application relate to MEMS inertial sensors designed to reduce parasitic capacitance, but at the same time lead time and manufacturing costs. To increase the rate at which the regions of thick dielectric material are formed, in some embodiments, the trenches are designed such that as the dielectric material is formed therein, growth occurs at least partially laterally. As described in more detail below, growing the dielectric material laterally can increase the rate at which the trenches are filled (fully or partially).

[0016] In some embodiments, lateral dielectric growth may be achieved by forming multiple columns of semiconductor material in a substrate and oxidizing (partially or completely) the columns. In this manner, oxidation proceeds laterally in the gaps between the columns. If the columns of semiconductor material are positioned close enough together, the distance the dielectric material must travel before closing the gaps is short, thereby reducing the time required to form a region of thick dielectric material.

[0017] 1 is a schematic diagram illustrating an example of a MEMS inertial sensor according to some non-limiting embodiments. The inertial sensor 100 is formed on a substrate 101 and includes a proof mass 102, an anchor 104, a dielectric layer 106, and electrodes 108 and 110.

[0018] The substrate 101 may be made of any suitable material, including, but not limited to, silicon or other semiconductor materials. The proof mass 102 may be made of undoped silicon, polysilicon, doped silicon, or a combination thereof, among other materials. The proof mass 102 may be conductive, or may have at least a conductive portion. For example, the surface of the proof mass 102 facing the substrate 101 may be conductive. In some embodiments, the proof mass 102 may include a mixture of materials, such as a dielectric material (or undoped silicon) with a conductive shell (e.g., doped silicon, aluminum, or copper). The anchors 104 may be made of the same material as the proof mass 102, or a different material. The anchors 104 connect the proof mass 102 to the substrate 101. The anchors 104 may be formed as vertical posts on the substrate 101 (as shown in FIG. 1) or may be part of a frame to which the proof mass 102 is attached.

[0019] The dielectric layer 106 may be made of any suitable dielectric material, including, but not limited to, silicon oxide or other types of oxides, silicon nitride, or combinations thereof. The electrodes 108 and 110 may be made of any conductive material, including copper and aluminum, among others. Conductive traces (not shown in FIG. 1 ) may be used to route electrical signals between the MEMS inertial sensor 100 and other electronic circuitry formed on the substrate 101. As with the electrodes 108 and 110, the conductive traces may be deposited on the dielectric layer 106. The conductive traces may be routed to bond pads that may be wire bonded to electronic circuitry formed on chips other than the substrate 101. However, in some embodiments, such electronic circuitry may be formed on the substrate 101.

[0020] 1, the dielectric layer 106 is formed on a top surface 120 of a substrate 101. In this example, the top surface 120 lies in the xy plane, although not all embodiments are limited to this arrangement.

[0021] The MEMS inertial sensor 100 may function as an accelerometer or at least part of an accelerometer and / or a gyroscope or at least part of a gyroscope, among other types of inertial sensors. For example, the inertial sensor 100 may sense acceleration directed along the z-axis by sensing the extent to which the proof mass 102 tilts out of plane (e.g., out of a plane defined by the top surface of the proof mass 102, which is in the xy plane in the example of FIG. 1). Z-axis acceleration may occur in response to a variety of possible causes, including, for example, Coriolis forces or more simply, motion of the inertial sensor along the z-axis. The extent to which the proof mass tilts out of plane may be sensed by sensing the extent to which the capacitance of one or more sense capacitors changes. In the example of FIG. 1, sense capacitors C S1 and C S2 can be used for this purpose.

[0022] Capacitor C S1 is formed between the electrode 108 and the proof mass 102, and a capacitor C S2 is formed between the electrode 110 and the proof mass 102. The electrodes 108 and 110 are stationary (e.g., constrained to move rigidly with the substrate 101), while the proof mass 102 is free to move relative to the substrate 101. In the example of FIG. S1 and C S2 are configured to differentially sense out-of-plane motion of the proof mass 102. For example, as the proof mass 102 tilts clockwise in the xz plane, the separation between the proof mass 102 and the electrodes 110 decreases, and thus the sensing capacitor C S2 increases, the separation between the proof mass 102 and the electrode 108 increases, and thus the sensing capacitor C S1 Similarly, when the proof mass 102 is tilted counterclockwise in the xz plane, the separation between the proof mass 102 and the electrode 110 increases, and thus the capacitance of the sense capacitor C S2 , which reduces the separation between the proof mass 102 and the electrode 108, thus reducing the capacitance of the sense capacitor C S1In some embodiments, the capacitance of the sense capacitor C S1 and C S2 The capacitance of may be expressed in terms of the separation between each electrode and the proof mass 102. For example, C S1 The capacity of S1 =ε 0 ε 1 A 1 / d 1 where ε 0 is the vacuum dielectric constant, ε 1 is the capacitor C S1 The dielectric constant of the material between the terminals of 1 is the capacitor C S1 Area of ​​, d 1 is the separation between the electrode 108 and the proof mass 102. A similar formula is C S2 This also applies to.

[0023] As further shown in FIG. 1, a parasitic capacitance is formed through a dielectric layer 106 between the sensing capacitor and the underlying substrate 101. For example, the parasitic capacitance C p1 occurs between the electrode 108 and the substrate 101, and the parasitic capacitance C p2 occurs between the electrode 110 and the substrate 101. Thus, the electrode 108 and the substrate 101 have a capacitance C p1 and the electrodes 110 and the substrate 101 can be considered as terminals of a capacitance C p2 These parasitic capacitances can be considered as the terminals of the sense capacitor C S1 and C S2 This noise can adversely affect the ability of the inertial sensor to accurately sense acceleration or rotational rate. In some embodiments, the noise present in the detection circuit is actually proportional to the amount of: (C sense +C parasitic +C routing +C amp ) / (C sense ), where C sense represents the overall capacitance of the sensing capacitor, and C parasitic represents the overall parasitic capacitance, and C routing represents the overall capacitance associated with the conductive trace, and Camp represents the input capacitance of the amplification stage of the detection circuit. Thus, the presence of parasitic capacitance directly affects the noise in the detection circuit.

[0024] Parasitic capacitance can be expressed in terms of the separation between its terminals and the dielectric constant of the material between them. For example, C p1 The capacity of p1 =ε 0 ε p A p / d p where ε p is the dielectric constant of the material between the terminals of the capacitor, and A p is the area of ​​the capacitor, and d p is the separation between the terminals.

[0025] Aspects of the present application relate to techniques for reducing noise present in a detection circuit of a MEMS inertial sensor due to parasitic capacitance. In some embodiments, the parasitic capacitance shown in FIG. 1 may be reduced by increasing the separation between its terminals. For example, in some embodiments, the parasitic capacitance may be reduced by forming a trench in a substrate and partially or completely filling the trench with a dielectric material or air.

[0026] An example of such a configuration, according to certain non-limiting embodiments, is shown in Figure 2. Similar to MEMS inertial sensor 100, MEMS inertial sensor 200 is formed on substrate 101 and includes proof mass 102, anchor 104, dielectric layer 106, and electrodes 108 and 110. MEMS inertial sensor 200 further includes trenches 208 and 210 formed in the substrate below electrodes 108 and 110.

[0027] Similar to MEMS inertial sensor 100, MEMS inertial sensor 200 may function as an accelerometer or at least part of an accelerometer and / or a gyroscope or at least part of a gyroscope, among other types of inertial sensors. For example, inertial sensor 200 may sense acceleration directed along the z-axis, although aspects of the present application are not limited in this respect as they may also be applied to inertial sensors configured to detect in-plane acceleration.

[0028] In some embodiments, the trenches may at least partially overlap the proof mass 102 along the z-axis, as shown in FIG. 2. As a result, at least a portion of the trenches underlie the proof mass 102. In some embodiments, an electrode may be disposed between the proof mass 102 and the corresponding trenches along the z-axis. For example, as shown in FIG. 2, an electrode 108 is disposed between the proof mass 102 and trench 208.

[0029] As will be described in more detail below in connection with FIG. 3, trenches 208 and 210 are p1 and C p2 2. The trenches 208 and 210 are arranged to reduce the parasitic capacitance of the MEMS inertial sensor relative to the substrate 102 (see FIG. 1). The trenches 208 and 210 may be partially or completely filled with a dielectric material to provide mechanical stability, or may be filled with air. For example, in some embodiments, the substrate 101 may be made of silicon and the trenches may be filled with silicon oxide. Relative to the arrangement of FIG. 1, the arrangement of FIG. 2 effectively increases the vertical separation (in the z-axis) between the substrate and the sensing electrodes, thus reducing the parasitic capacitance. The dielectric material filling the trenches 208 and 210 may be the same material (e.g., silicon oxide) as used in the dielectric layer 106, or may be a different material.

[0030] In some embodiments, portions of trenches 208 and 210 may be filled with air. Because air has a dielectric constant of about 1, filling portions of the trenches with air may lead to further reduction in parasitic capacitance.

[0031] In some embodiments, trenches of the type described herein may be formed in a substrate beneath conductive traces (not shown in FIG. 2) used to route electrical signals between MEMS inertial sensor 200 and other electronic circuitry, thus reducing parasitic capacitance associated with such conductive traces. As with trenches 208 and 210, these trenches may be partially or completely filled with at least one of a dielectric material or with air.

[0032] FIG. 3 is a schematic diagram illustrating a portion of the MEMS inertial sensor of FIG. 2 in further detail, according to some non-limiting embodiments. In particular, FIG. 3 illustrates trench 208 in further detail. Trench 210, not shown in FIG. 3, may have similar features as described in connection with FIG. 3. In some embodiments, trench 208 may be bounded in the xy plane by sidewalls 302 and 304. In some embodiments, sidewalls 302 and 304 may be substantially vertical (e.g., parallel to the z-axis or angularly offset by 5° or less to the z-axis). Substantially vertical sidewalls may be obtained by etching the substrate with an anisotropic etching process, including, for example, reactive ion etching (RIE). The use of anisotropic etching techniques allows for the formation of deeper trenches than other types of recesses formed by isotropic etching techniques. In some embodiments, having deep trenches is desirable because it provides greater separation between the terminals of the parasitic capacitance, resulting in lower capacitance. It should be understood, however, that in some embodiments, isotropic etching techniques may be used for the formation of one or more trenches of the type described herein. It should be understood, however, that sidewalls 302 and 304 may be angled any suitable amount relative to the z-axis, as the present application is not limited to substantially vertical sidewalls. In some embodiments, for example, trenches shaped as triangles with sidewalls that converge at the bottom of the trenches may be used.

[0033] In some embodiments, the trench 208 may be partially or completely filled with a dielectric material. The dielectric material in the trench may be thicker (along the z-axis) than the dielectric layer 106. In FIG. 3, the thickness (t 1 ) and the thickness (t 2 ) is defined relative to the upper surface 120 of the substrate 101. 1 and t 2 is referenced with respect to the z-axis. 2 / t 1 can be 1.5-100, 1.5-50, 1.5-25, 1.5-10, 1.5-5, 2-100, 2-50, 2-25, 2-10, 2-5, 5-100, 5-50, 5-25, 5-10. Other ratios are possible.

[0034] Thickness t 1 can be 0.1 μm to 5 μm, 0.5 μm to 5 μm, 1 μm to 5 μm, 2 μm to 5 μm, 3 μm to 5 μm, 4 μm to 5 μm, 0.1 μm to 3 μm, 0.5 μm to 3 μm, 1 μm to 3 μm, 2 μm to 3 μm, 0.1 μm to 2 μm, 0.5 μm to 2 μm, 1 μm to 2 μm, 0.1 μm to 1.5 μm, 0.5 μm to 1.5 μm, 1 μm to 1.5 μm, 0.1 μm to 1 μm, 0.5 μm to 1 μm, 0.1 μm to 0.5 μm, 0.5 μm to 0.5 μm, 0.5 μm to 1 μm, 0.5 μm to 1 μm, 0.5 μm to 1 μm, 0.5 μm to 1 μm. Other ranges outside these ranges are also possible. In some embodiments, the dielectric layer 106 is not present (t 1 =0).

[0035] Thickness t 2 may be 1 μm to 20 μm, 2.5 μm to 20 μm, 5 μm to 20 μm, 7.5 μm to 20 μm, 10 μm to 20 μm, 15 μm to 20 μm, 1 μm to 10 μm, 2.5 μm to 10 μm, 5 μm to 10 μm, 7.5 μm to 10 μm, 1 μm to 8 μm, 2 μm to 8 μm, 4 μm to 8 μm, 6 μm to 8 μm, 1 μm to 6 μm, 2 μm to 6 μm, 6 μm to 8 μm, 1 μm to 4 μm, 2 μm to 4 μm. Additionally or alternatively, the thickness t 2may be greater than 20 μm, greater than 50 μm, greater than 100 μm, greater than 300 μm, greater than 500 μm, greater than 700 μm, but less than the total thickness of the substrate 101. Other ranges outside these ranges are also possible.

[0036] The width of trench 208(w) in the x-axis and y-axis can be 1 μm to 400 μm, 25 μm to 400 μm, 50 μm to 400 μm, 75 μm to 400 μm, 100 μm to 400 μm, 150 μm to 400 μm, 1 μm to 200 μm, 25 μm to 200 μm, 50 μm to 200 μm, 75 μm to 200 μm, 1 μm to 100 μm, 20 μm to 100 μm, 40 μm to 100 μm, 60 μm to 100 μm, 1 μm to 50 μm, 20 μm to 50 μm, 30 μm to 50 μm, 1 μm to 10 μm, 5 μm to 10 μm. Other ranges outside these ranges are also possible. The width of trench 208 on the x-axis may be equal to or different from the width of trench 208 on the y-axis.

[0037] In the example of FIG. 3, the separation along the z-axis between the electrode 108 and the substrate 101 is t 1 +t 2 , which is t t t t t t 2 As a result, the parasitic capacitance C PT is the parasitic capacitance C p1 The reduction in parasitic capacitance associated with the electrodes 108 results in a reduction in the noise present in the detection circuit, and therefore an increase in the sensitivity of the MEMS inertial sensor 200 to the quantity being detected (e.g., acceleration and / or angular rate of motion).

[0038] In some embodiments, the capacitance can be significantly reduced by a very deep (e.g., t 2 It may be desirable to form trenches 208 that are thicker than 3 μm. However, applicants have recognized that forming localized areas of thick dielectric material can be difficult due to the relatively slow growth rate of the dielectric material.

[0039] Applicants have recognized that by allowing the dielectric material to grow laterally during the fabrication process, the time required to form localized regions of thick dielectric material (such as those within trench 208) may be substantially reduced. In some embodiments, lateral dielectric growth may be achieved by forming multiple columns of semiconductor material in the substrate and by oxidizing (partially or fully) the columns of semiconductor material. An example of such a fabrication process, according to some non-limiting embodiments, is shown in Figures 4A-4F. It should be understood that the order of some (or all) of these steps may be changed as desired, and therefore fabrication processes of the type described herein are not limited to the order of Figures 4A-4F.

[0040] As shown in Figure 4A, a substrate 101 is provided. The substrate 101 may be made of any suitable semiconductor material, including, for example, silicon (doped or undoped), or polysilicon.

[0041] In the manufacturing step of FIG. 4B, a plurality of columns 402 of semiconductor material are formed in the substrate 101. The columns 402 may be elongated along the z-axis. The columns 402 may have any suitable shape, including cylindrical and rectangular, among others. The shape of the columns 402 may be regular (with a width W A is constant along the z-axis) or can be irregular (with width W A varies along the z-axis). The columns 402 may be separated from one another by gaps 404. In some embodiments, the gaps 404 may be filled with air. The shape of the gaps 404 may be regular (width W B is constant along the z-axis) or can be irregular (with width W B t varies along the z-axis). In some embodiments, the gaps 404 and columns 402 may be formed by selectively etching the substrate 101 (using photolithography techniques). The selective etching may include anisotropic etching, such as RIE. The gaps 404 vary in the z-axis relative to the top surface 120. 2(see FIG. 3).

[0042] Width W A can be 0.1 μm to 5 μm, 0.1 μm to 3 μm, 0.1 μm to 2 μm, 0.1 μm to 1 μm, 0.5 μm to 2 μm, 0.5 μm to 1 μm. Other ranges outside these ranges are also possible.

[0043] Width W B can be 0.1 μm to 5 μm, 0.5 μm to 3 μm, 0.1 μm to 2 μm, 0.1 μm to 1 μm, 0.5 μm to 2 μm, 0.5 μm to 1 μm. Other ranges outside these ranges are also possible.

[0044] In the fabrication step of FIG. 4C, a dielectric material 406 is formed. The dielectric material 406 may be formed, for example, by oxidizing the patterned substrate 101. Outside the etched areas and at the top of the columns 402, oxidation may occur vertically (along the z-axis). In addition, lateral oxidation (along the x-axis and / or y-axis) may occur within the gaps 404. The lateral oxidation may occur by oxidation of the sidewalls of the columns 402. As the oxide advances laterally, the width W of the columns 402 and gaps 404 increases. A and W B decreases because the oxide advances in two directions: from the sidewalls of the columns toward the center of the columns (thus consuming a portion of the columns), and from the sidewalls of the columns away from the center of the columns (thus consuming a portion of the gaps). In some embodiments, the oxidation may proceed until the entirety of each column 402 and the entirety of each gap 404 is consumed by silicon oxide, as shown in FIG. 4D. However, in other embodiments, a portion of one or more gaps 404 and / or a portion of one or more columns 402 may remain unoxidized. This schematic is illustrated in FIG. 5, where the gaps 404 are spaced apart by a width W 3 and column 402 reaches width W 1 The oxide region reaches a width of W 2The oxidation is stopped when the oxide reaches a critical area of ​​1000 nm. In some embodiments, stopping the oxidation before the entire area is consumed by the oxide may be used such that the presence of air further reduces parasitic capacitance. In some embodiments, for example, the thickness of the gap 404 and column 402 may be selected such that when the entire column is consumed by the oxide, there is still a residual gap that remains unoxidized.

[0045] Different fabrication techniques may be used to form the dielectric layer 406. For example, in some embodiments, the dielectric layer may be formed by thermal oxidation (in a dry or wet atmosphere), plasma enhanced chemical vapor deposition (PECVD) (e.g., using tetraethyl orthosilicate (TEOS) as a precursor), and nitric acid oxidation of silicon (NAOS). Of these, thermal oxide leads to lower levels of mechanical stress given the high temperatures involved in the oxidation process, but may have longer lead times.

[0046] It should be understood that in some embodiments, the dielectric layer 106 and the dielectric material in the trench of Figure 3 may be formed simultaneously as part of the fabrication step of Figure 4C, however, in other embodiments, the dielectric layer 106 and the dielectric material in the trench of Figure 3 may be formed separately.

[0047] Optionally, in the manufacturing step of Figure 4D, planarization may be performed to planarize the top surface of the dielectric material. Possible planarization techniques include chemical mechanical polishing (CMP), thermal reflow, and deposition of an additional dielectric layer.

[0048] In the fabrication step of Figure 4E, an electrode 108 is formed. In some embodiments, the electrode 108 is formed over a region of thick dielectric material such that the electrode 108 overlaps the thick dielectric material along the z-axis. As shown in Figure 2, the electrode 108 may function as a terminal of a sense capacitor. In some embodiments, conductive traces (not shown in Figure 4E) are also patterned in the fabrication step of Figure 4E.

[0049] 4F, the anchor 104 and the proof mass 102 are formed. In some embodiments, the formation of the proof mass 102 involves the formation and lift-off of a sacrificial layer. The proof mass 102 can be formed to overlap a region of thick dielectric material along the z-axis and to overlap the electrode 108.

[0050] MEMS inertial sensors of the type described herein may be used as accelerometers to sense acceleration in one, two, or three directions. Additionally or alternatively, MEMS inertial sensors of the type described herein may be used as gyroscopes to sense angular rates of motion about one, two, or three directions. These types of gyroscopes may be configured to sense pitch and / or roll and / or yaw rates. When used as gyroscopes, MEMS inertial sensors of the type described herein may be coupled with a circuit to effect vibration of a resonant body. The resonant body may be the proof mass 102 itself or another part of the MEMS inertial sensor.

[0051] As mentioned above, the detection circuitry may be coupled to the sensing capacitors and configured to sense variations in the capacitance of these capacitors. In some embodiments, the detection circuitry may be disposed on the substrate 101. In other embodiments, the detection circuitry may be disposed on a separate substrate that may be bonded (e.g., wire-bonded or flip-chip bonded) to the substrate 101. These substrates may or may not be packaged within a common housing.

[0052] 6 is a block diagram illustrating a system 600 including a MEMS inertial sensor 602, a power supply unit 604, a detection circuit 606, and an input / output (I / O) interface 608. The MEMS inertial sensor 602 may comprise, for example, the MEMS inertial sensor 200 and may optionally be fabricated according to the steps of Figures 4A-4F. The MEMS inertial sensor may be configured to sense, for example, the acceleration and / or angular rate of motion.

[0053] The system 600 may periodically transmit data representative of the sensed acceleration and / or angular velocity to an external monitoring system, such as a computer, smartphone, tablet, smartwatch, smart glasses, or any other suitable receiving device, via a wired connection or wirelessly. The I / O interface 608 may be configured to transmit and / or receive data via Wi-Fi, Bluetooth, Bluetooth Low Energy (BLE), Zigbee, Thered, ANT, ANT+, IEE802.15.4, IEE802.11.ah, or any other suitable wireless communication protocol. Alternatively or additionally, the I / O interface 608 may be configured to transmit and / or receive data using a proprietary connection protocol. The I / O interface 608 may include one or more antennas, such as a microstrip antenna. In some embodiments, the I / O interface 608 may be connected to a cable and configured to transmit and / or receive signals through the cable.

[0054] The system 600 may be powered using a power supply unit 604. The power supply unit 604 may be configured to power the detection circuit 606, the I / O interface 608, the MEMS inertial sensor 602, or any suitable combination thereof. In some embodiments, the power supply unit 604 may include one or more batteries. The system 600 may, at least in some embodiments, consume sufficiently little power to enable its operation for extended periods of time based solely on battery power. In some embodiments, the one or more batteries may be rechargeable. The power supply unit 604 may include one or more lithium ion batteries, lithium polymer (LiPo) batteries, supercapacitor-based batteries, alkaline batteries, aluminum ion batteries, mercury batteries, dry batteries, zinc carbon batteries, nickel-cadmium batteries, graphene batteries, or any other suitable type of battery. In some embodiments, the power supply unit 604 may include circuitry to convert AC power to DC power. For example, power supply unit 604 may receive AC power from a power source external to system 600, such as via I / O interface 608, and may provide DC power to some or all of the components of system 600. In such cases, power supply unit 604 may include a rectifier, a voltage regulator, a DC-DC converter, or any other suitable device for power conversion.

[0055] In some embodiments, the power supply unit 604 may include energy harvesting and / or energy storage components. Energy may be harvested from the surrounding environment and stored to power the system 600 when needed, which may include periodic, random, or continuous power supply. The type of energy harvesting components implemented may be selected based on the expected environment of the system 600, such as the expected magnitude and frequency of motion the system 600 may experience, the amount of stress the system may experience, the amount of light exposure the system may experience, and / or the temperature to which the system may be exposed, among other possible considerations. Examples of suitable energy harvesting techniques include thermoelectric energy harvesting, magnetic vibration harvesting, electrical overstress harvesting, photovoltaic harvesting, radio frequency harvesting, and kinetic energy harvesting. In some embodiments, the energy storage components may include supercapacitors.

[0056] System 600 may be deployed in a variety of settings to detect acceleration and / or angular velocity (among other possible physical quantities), including sports, healthcare, consumer, military, and industrial applications, among others. Several non-limiting examples are described herein. System 600 may be a wearable sensor deployed to monitor sports-related physical activity and performance, patient health, military activity, or other applications of interest to a user. System 600 may be disposed within a smartphone and may be configured to sense roll, yaw, and / or pitch rate and / or acceleration in one, two, or three dimensions.

[0057] One such setup exists in automobiles or other vehicles such as boats and aircraft. FIG. 7 shows a schematic of a passenger vehicle 700 including a system 600. The system 600 may be located at any suitable location in the passenger vehicle 700. The system 600 may be configured to sense roll, pitch and / or yaw rates and / or acceleration in one, two or three dimensions. The system 600 may be configured to provide the sensed angular velocity and / or acceleration to a computer system located in the passenger vehicle 700 and / or to a computer system located at a base station outside the passenger vehicle 700 using an I / O interface 608. The system 600 may provide information to a navigation system (including an automated driving system) on board the passenger vehicle 700. Alternatively or additionally, the system 600 may provide information to an automated steering system and / or an automated braking system.

[0058] In some embodiments, the system 600 may be part of a wearable device. For example, the system 600 may be part of an earbud, part of a smart watch, or part of a smartphone 801 (as shown in FIG. 8). Other environments in which the system 600 may be deployed may include tablets, laptops, smart glasses, medical equipment, sporting goods, among many others.

[0059] Aspects of the technology described herein may provide one or more benefits, some of which have been described above. Described herein are examples of some of such benefits. It should be understood that not all aspects and embodiments necessarily provide all of the benefits described herein. Moreover, it should be understood that aspects of the technology described herein may provide benefits in addition to those described herein.

[0060] Aspects of the technology described herein provide MEMS inertial sensors with reduced parasitic capacitance, resulting in a reduction in noise present in the detection circuitry, and resulting in increased sensitivity of the inertial sensor to the physical quantity being measured (e.g., acceleration and / or angular rate of motion). In some embodiments, the noise present in MEMS inertial sensors of the type described herein is three times lower (or in some embodiments even lower) than the noise present in other types of MEMS inertial sensors. Further aspects of the technology described herein provide low-cost techniques for manufacturing low-parasitic capacitance MEMS inertial sensors.

[0061] The terms "approximately," "substantially," and "about" may be used to mean, in some embodiments, within ±20% of a target value, in some embodiments, within ±10% of a target value, in some embodiments, within ±5% of a target value, and in some embodiments, within ±2% of a target value. The terms "approximately," "substantially," and "about" may include the target value. [Explanation of symbols]

[0062] 100, 200, 602 MEMS Inertial Sensors 101 Substrate 102 Proof Mass 104 Anchor 106 Dielectric layer 108, 110 electrode 120 Top of the board 208, 210 Trench 302, 304 side wall 402 Column 404 Gap 406 Dielectric Layer 600 System 604 Power Supply Unit 606 Detection Circuit 608 Input / Output (I / O) Interface 700 Passenger Car 801 Smartphones

Claims

1. 1. A microelectromechanical system (MEMS) inertial sensor comprising: a substrate having a first surface; a movable proof mass having a second surface facing the first surface of the substrate and lying substantially in a plane, the second surface of the proof mass defining a boundary in the plane; an anchor substantially perpendicular to the first surface, the anchor coupling the substrate to the proof mass and positioned within the boundary of the second surface of the proof mass and between the first surface of the substrate and the second surface of the movable proof mass; a trench formed in the first surface of the substrate, the trench being at least partially filled with a solid dielectric material having a thickness of at least 3 μm in a direction perpendicular to the first surface of the substrate, the trench at least partially overlapping the proof mass along the direction; an electrode formed over the trench, the electrode and the proof mass forming a sense capacitor configured to sense motion of the proof mass relative to the substrate in response to acceleration of the MEMS inertial sensor; the trench comprises a plurality of columns of solid dielectric material; A MEMS inertial sensor, wherein the columns of solid dielectric material are interleaved with columns of semiconductor material formed in the trench or interleaved with gaps in the trench.

2. The MEMS inertial sensor of claim 1 , wherein the trench has substantially vertical sidewalls.

3. The MEMS inertial sensor of claim 1 , wherein the trench has a thickness in said direction of between 1 μm and 20 μm.

4. The MEMS inertial sensor of claim 1 , wherein the electrodes are disposed on the solid dielectric material.

5. The MEMS inertial sensor of claim 1 , wherein the electrode is disposed along the direction between the proof mass and the trench.

6. The MEMS inertial sensor of claim 1 , further comprising a dielectric layer formed on said first surface of said substrate, said solid dielectric material in said trench being thicker than said dielectric layer along said direction.

7. The MEMS inertial sensor of claim 1 , wherein the sense capacitor is configured to sense out-of-plane motion of the proof mass relative to the substrate in response to the acceleration of the MEMS inertial sensor.

8. 1. A microelectromechanical system (MEMS) inertial sensor comprising: a substrate having a first surface; a proof mass coupled to the substrate; a trench formed in the substrate; a dielectric layer disposed on the first surface of the substrate; a solid dielectric material region disposed within the trench and in physical contact with the dielectric layer, the solid dielectric material region being thicker than the dielectric layer in a direction perpendicular to the first surface of the substrate, the solid dielectric material region having a thickness of at least 3 μm in said direction; an electrode formed over the trench, the electrode and the proof mass forming a sense capacitor configured to sense motion of the proof mass relative to the substrate in response to acceleration of the MEMS inertial sensor; the solid dielectric material region includes a plurality of columns of solid dielectric material formed in the trench; A MEMS inertial sensor, wherein the columns of solid dielectric material are interleaved with columns of semiconductor material formed in the trench or interleaved with gaps in the trench.

9. The MEMS inertial sensor of claim 8 , wherein the trench has substantially vertical sidewalls.

10. The MEMS inertial sensor of claim 8, wherein the trench has a thickness in said direction of between 2 μm and 20 μm.

11. The MEMS inertial sensor of claim 8 , wherein the electrodes are disposed on the dielectric layer.

12. The MEMS inertial sensor of claim 8 , wherein the electrode is disposed along the direction between the proof mass and the trench.

13. The MEMS inertial sensor of claim 8 , wherein the dielectric layer and the solid dielectric material region comprise a common dielectric material.

14. 1. A method for manufacturing a microelectromechanical system (MEMS) inertial sensor, comprising: Etching the substrate to form a plurality of columns of semiconductor material spaced apart by a plurality of gaps; oxidizing the plurality of columns of semiconductor material to fill at least a portion of the gaps with an oxide material; forming an electrode on the oxide material; forming a proof mass suspended above the substrate; oxidizing the plurality of columns of semiconductor material includes oxidizing the plurality of columns of semiconductor material to fill at least a portion of the gaps with the oxide material; The method of claim 1, wherein the columns of oxidized semiconductor material alternate with columns of the semiconductor material or with the gaps remaining after filling.

15. 15. The method of claim 14, wherein etching the substrate to form the plurality of columns of semiconductor material comprises performing a deep reactive ion etch.

16. 15. The method of claim 14, wherein etching the substrate to form the plurality of columns of semiconductor material comprises etching the substrate to form the plurality of columns of semiconductor material having a height between 2 μm and 20 μm.

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