Dielectric composition and multilayer ceramic electronic component.
A dielectric composition with Ba, Ti, Si, and Ni segregations at the ceramic-electrode boundary in multilayer ceramic components addresses structural defects, enhancing durability by improving bonding strength and reducing cracks in high temperature and humidity conditions.
Patent Information
- Application Number
- JP2021088548
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-05-26
- Publication Date
- 2024-12-25
- Estimated Expiration
- 2041-05-26
AI Technical Summary
Multilayer ceramic electronic components experience structural defects such as cracks and delamination due to differences in properties like shrinkage rate and coefficient of linear expansion between ceramic and internal electrode layers, leading to reduced durability in high temperature and high humidity environments.
A dielectric composition containing ABO3 perovskite compound with a first segregation of Ba, Ti, Si, and Ni, and optionally a second segregation of Mg, is used to enhance bonding strength between ceramic and internal electrode layers through the inclusion of a first segregation at their boundary, with specific ratios and particle sizes for improved durability.
The enhanced bonding strength improves durability of multilayer ceramic components in high temperature and high humidity environments by reducing peeling and cracking, with further improvements from the inclusion of a second segregation containing Mg.
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Abstract
Description
[Technical field]
[0001] The present invention relates to a dielectric composition and a multilayer ceramic electronic component including the dielectric composition. [Background technology]
[0002] As shown in Patent Document 1, there is known a multilayer ceramic electronic component in which ceramic layers made of a dielectric composition and internal electrode layers are alternately laminated. In this multilayer ceramic electronic component, there is a difference in properties such as the shrinkage rate and linear expansion coefficient between the ceramic layers and the internal electrode layers, and this difference in properties can cause structural defects such as cracks and delamination, reducing durability in high-temperature and high-humidity environments. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2013-012418 A Summary of the Invention [Problem to be solved by the invention]
[0004] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a dielectric composition and a multilayer ceramic electronic component that are excellent in durability in high-temperature and high-humidity environments. [Means for solving the problem]
[0005] In order to achieve the above object, the dielectric composition according to the present invention comprises: ABO 3 Dielectric particles containing as a main component a perovskite type compound represented by the formula: A first segregation including Ba, Ti, Si, Ni, and O.
[0006] The dielectric composition of the present invention having the above-mentioned characteristics can be applied to multilayer ceramic electronic components. As a result of intensive research, the present inventors have found that a multilayer ceramic electronic component having the above-mentioned dielectric composition exhibits excellent durability even in a high-temperature and high-humidity environment.
[0007] Preferably, the molar ratio of Ni to Si (Ni / Si) in the first segregation is 0.1 or more.
[0008] Preferably, the average grain size of the first segregation is 0.05 μm or more and 0.30 μm or less.
[0009] Preferably, the dielectric composition of the present invention further has a second segregation containing Mg.
[0010] Preferably, the perovskite compound is barium titanate.
[0011] In order to achieve the above object, a multilayer ceramic electronic component according to the present invention comprises: ABO 3 The device has an element body in which ceramic layers mainly composed of a perovskite compound represented by the formula (I) and internal electrode layers containing Ni are alternately laminated, A first segregation containing Ba, Ti, Si, Ni, and O is present at the boundary between the ceramic layer and the internal electrode layer.
[0012] As a result of intensive research, the inventors have found that the multilayer ceramic electronic component having the above characteristics has improved durability in a high-temperature and high-humidity environment. Although the reason for the improved durability is not necessarily clear, it is believed to be due to the first segregation containing a predetermined element improving the bonding strength between the ceramic layer and the internal electrode.
[0013] Preferably, the number of the first segregations contained per unit length of the boundary is 0.2 pieces / μm or more and 3.2 pieces / μm or less.
[0014] In the monolithic ceramic electronic component of the present invention, the molar ratio of Ni to Si (Ni / Si) in the first segregation is preferably 0.1 or more.
[0015] In the monolithic ceramic electronic component of the present invention, the first segregation preferably has an average grain size of 0.05 μm or more and 0.30 μm or less.
[0016] In the multilayer ceramic electronic component of the present invention, the perovskite compound is preferably barium titanate.
[0017] Preferably, the ceramic layer contains a second segregation containing Mg. [Brief description of the drawings]
[0018] [Figure 1] FIG. 1 is a schematic diagram showing a cross section of a multilayer ceramic capacitor according to one embodiment of the present invention. [Diagram 2] FIG. 2 is an enlarged cross-sectional view of a region II shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0019] In this embodiment, a multilayer ceramic capacitor 2 shown in Fig. 1 will be described as an example of a ceramic electronic component according to the present invention. The multilayer ceramic capacitor 2 has an element body 4 and a pair of external electrodes 6 formed on the outer surface of the element body 4.
[0020] The shape of the element body 4 shown in FIG. 1 is generally a substantially rectangular parallelepiped shape, and has two end faces 4a facing each other in the X-axis direction, two side faces 4b facing each other in the Y-axis direction, and two side faces 4b facing each other in the Z-axis direction. However, the shape of the element body 4 is not particularly limited, and may be an elliptical cylinder, a cylindrical shape, or another prismatic shape. In addition, the outer dimensions of the element body 4 are also not particularly limited, and may be, for example, a length L0 in the X-axis direction of 0.4 mm to 5.7 mm, a width W0 in the Y-axis direction of 0.2 mm to 5.0 mm, and a height T0 in the Z-axis direction of 0.2 mm to 3.0 mm. In this embodiment, the X-axis, Y-axis, and Z-axis are perpendicular to each other.
[0021] The element body 4 has ceramic layers 10 and internal electrode layers 12 that are substantially parallel to a plane including the X-axis and Y-axis, and inside the element body 4, the ceramic layers 10 and the internal electrode layers 12 are alternately stacked along the Z-axis direction. Here, "substantially parallel" means that most parts are parallel, but may have some parts that are not parallel, and the ceramic layers 10 and the internal electrode layers 12 may have some unevenness or be inclined.
[0022] The average thickness (interlayer thickness) of each ceramic layer 10 is not particularly limited, and may be, for example, 100 μm or less, and preferably 30 μm or less. The number of layers of the ceramic layers 10 may be determined according to the desired characteristics, and is not particularly limited. For example, it may be 20 layers or more, and more preferably 50 layers or more.
[0023] Meanwhile, the internal electrode layers 12 are laminated between the ceramic layers 10, and the number of layers is determined according to the number of layers of the ceramic layers 10. The average thickness of each of the internal electrode layers 12 is not particularly limited, and can be, for example, 3.0 μm or less. The average thickness of the ceramic layers 10 and the average thickness of the internal electrode layers 12 may be calculated by observing a cross section as shown in FIG. 1 using a metallurgical microscope and measuring the thickness of each layer (10, 12) at at least five points.
[0024] The internal electrode layers 12 are laminated such that one end is alternately exposed on two end faces 4a opposing each other in the X-axis direction of the element body 4. A pair of external electrodes 6 are formed on one end face 4a of the element body 4, and are electrically connected to the exposed ends of the alternately arranged internal electrode layers 12. By forming the external electrodes 6 in this manner, the external electrodes 6 and the internal electrode layers 12 form a capacitor circuit.
[0025] 1, the pair of external electrodes 6 integrally have end surface portions formed on the end surface 4a in the X-axis direction of the element body 4 and extension portions formed at the ends in the X-axis direction on the four side surfaces 4b of the element body 4. That is, the pair of external electrodes 6 are each formed so as to wrap around from the end surface 4a of the element body 4 to the side surfaces 4b, and are insulated so as not to contact each other in the X-axis direction.
[0026] The extensions of the external electrodes 6 are not essential, and the external electrodes 6 may be composed of only the end surface portions. Alternatively, when the multilayer ceramic capacitor 2 is surface-mounted on a substrate, the extensions of the external electrodes 6 need only be formed on at least the side surface 4b facing the mounting surface of the substrate, and do not necessarily have to be formed on the side surface 4b opposite the mounting surface.
[0027] The external electrodes 6 may include a baked electrode layer, a resin electrode layer, a plated electrode layer, etc., and may be configured with a single electrode layer or may be configured by laminating multiple electrode layers. For example, the external electrodes 6 may have a three-layer structure of a baked electrode layer-a Ni plating layer-a Sn plating layer (laminate in the order listed), in which case the Sn plating layer is located on the outermost surface of the external electrodes 6, and therefore the solder wettability of the external electrodes 6 is good.
[0028] Next, the components and internal structure of the ceramic layers 10 and the internal electrode layers 12 will be described.
[0029] The ceramic layer 10 is of the general formula ABO 3Here, the main component of the ceramic layer 10 (main component of the dielectric composition) means a component that occupies 80 mol % or more of the ceramic layer 10. In this embodiment, the perovskite compound that is the main component is preferably barium titanate (BT), and this barium titanate has the composition formula (Ba 1-a-b Sr a Ca b ) m (Ti 1-c-d Zr c Hf d )O 3 It can be expressed as:
[0030] In the above composition formula, the symbols a, b, c, d, and m each indicate an element ratio, and each element ratio is not particularly limited and can be set to a known range. For example, m indicates the element ratio of the A site to the B site, and can generally be in the range of 1.0 to 1.1. Furthermore, a indicates the element ratio of Sr in the A site, and b indicates the element ratio of Ca in the A site. In this embodiment, it is preferable that 0≦a+b≦0.1. Furthermore, c indicates the element ratio of Zr in the B site, and d indicates the element ratio of Hf in the B site. In this embodiment, it is preferable that 0≦c+d≦0.15. The element ratio of oxygen (O) in the above composition formula may be slightly deviated from the stoichiometric composition.
[0031] In addition to the above-mentioned main components, the ceramic layer 10 may contain auxiliary components. Examples of the auxiliary components include Mn compounds, Mg compounds, Cr compounds, Ni compounds, rare earth element compounds, Si compounds, Li compounds, B compounds, V compounds, Al compounds, and Ca compounds, and the types and combinations of the auxiliary components and the amounts added are not particularly limited.
[0032] On the other hand, the internal electrode layer 12 is made of a conductive material and contains at least Ni. More specifically, the conductive material of the internal electrode layer 12 is preferably pure Ni or a Ni alloy, and more preferably the Ni content in the internal electrode layer 12 is 85 wt% or more. When the conductive material is a Ni alloy, it may contain one or more types of subcomponents for the internal electrode selected from Mn, Cu, Cr, etc.
[0033] In addition to the above-mentioned conductive material, the internal electrode layer 12 may contain particles of a perovskite type compound having a composition similar to the main component of the ceramic layer 10 as a common material, and may contain particles of the first segregation 11b described later. The internal electrode layer 12 may contain a small amount of nonmetallic components such as S and P (for example, about 0.1 mass % or less), and may contain voids. As described above, when nonmetallic components such as common material particles, particles of the first segregation 11b, and voids are contained in the internal electrode layer 12, discontinuous parts where no electrode (conductive material) exists may be formed in the internal electrode layer 12 due to the influence of these nonmetallic components.
[0034] The component compositions of the ceramic layers 10 and the internal electrode layers 12 may be analyzed by inductively coupled plasma optical emission spectroscopy (ICP), laser ablation ICP mass spectrometry (LA-ICP-MS), X-ray fluorescence spectrometry (XRF), energy dispersive X-ray spectrometry (EDX), or an electron probe microanalyzer (EPMA) equipped with a wavelength dispersive X-ray spectrometer (WDS).
[0035] The ceramic layer 10 containing the above components has an internal structure as shown in FIG. 2, and the ceramic layer 10 includes dielectric particles 11a which are a parent phase, segregation phases (11b, 11c) having predetermined characteristics, and grain boundaries 11d located between the dielectric particles 11a.
[0036] The dielectric particles 11a are composed of the main component (perovskite compound) of the ceramic layer 10 described above. When the ceramic layer 10 contains an auxiliary component, the dielectric particles 11a may have the auxiliary component dissolved therein in addition to the main component. The dielectric particles 11a may have a core-shell structure. The average particle size of the dielectric particles 11a may be 0.05 μm to 2 μm, and is preferably 0.1 μm to 1 μm. The average particle size can be measured by observing a cross section of the ceramic layer 10 as shown in FIG. 2 using a scanning electron microscope (SEM) or a scanning transmission electron microscope (STEM), and performing image analysis on the obtained cross section photograph. For example, the average particle size of the dielectric particles 11a may be calculated by measuring the circle-equivalent diameters of at least 100 or more dielectric particles 11a.
[0037] 2, the element body 4 of this embodiment contains a first segregation 11b. This first segregation 11b is a complex oxide phase in which the total concentration of Si and Ni is higher than that of the dielectric particles 11a. The first segregation 11b contains at least Ba, Ti, Si, Ni, and O, and may also contain other constituent elements of the ceramic layer 10 (elements such as Sr, Ca, Zr, and Hf that may be contained in the main component, subcomponent elements, etc.).
[0038] In particular, the first segregation 11b preferably contains Ni at a predetermined ratio. Specifically, the molar ratio of Ni to Si (Ni / Si) in the first segregation 11b is preferably 0.1 or more. The upper limit of the molar ratio Ni / Si is not particularly limited, and is preferably, for example, 0.8 or less. Furthermore, when the total content of elements excluding oxygen contained in the first segregation 11b is taken as 100 moles, the sum of the Ni content and the Si content is preferably 3 mole % or more, and more preferably 5 mole % to 20 mole %. The content ratios of other elements in the first segregation 11b are not particularly limited, and the first segregation 11b may be, for example, a composition represented by the formula Ba 2 (Ni e Ti 1-e )Si 2 O 8―eIn the above composition formula, e is the atomic ratio of Ni substituting for the Ti site.
[0039] It is preferable to identify the first segregation 11b by combining a mapping analysis by EDX or WDS and a point analysis. For example, a mapping analysis is performed on a cross section of the element body 4 as shown in FIG. 2, and the location where Si is segregated is identified from the obtained mapping image of Si. Then, a point analysis is performed on the location where Si is segregated, and if Ba, Ti, Si, Ni, and O are detected in the segregation, the segregation is identified as the first segregation 11b. Note that the "location where Si is segregated" identified in the above mapping analysis specifically means a region where the Si concentration is higher than that of the dielectric particles 11a. In addition, the measurement conditions such as the measurement field of view and resolution in the mapping analysis are not particularly limited as long as they are appropriately set to conditions that allow the analysis of segregation.
[0040] The average grain size of the first segregations 11b can be 0.5 μm or less, and is preferably 0.05 μm to 0.30 μm. The average grain size of the first segregations 11b may be calculated by identifying at least five or more first segregations 11b by the above method, and then measuring the circle equivalent diameters of these first segregations 11b by image analysis.
[0041] In this embodiment, the first segregation 11b exists at the boundary 20 between the ceramic layer 10 and the internal electrode layer 12, as shown in FIG. 2. "The first segregation 11b exists at the boundary 20" means that the first segregation 11b is in direct contact with both the dielectric particle 11a of the ceramic layer 10 and the internal electrode layer 12. For example, the first segregation 11b may exist so as to be in contact with the internal electrode layer 12 within the ceramic layer 10. Also, the first segregation 11b may exist by being embedded closer to the internal electrode layer 12 side than the ceramic layer 10 side. Note that a part of the first segregation 11b may exist inside the ceramic layer 10, not at the boundary 20, without contacting the internal electrode layer 12.
[0042] The number N1 of the first segregations 11b contained per unit length of the boundary 20 can be 0.15 pieces / μm or more, and is preferably 0.20 pieces / μm to 3.20 pieces / μm. This number N1 per unit length may be calculated by observing the cross section of the element body 4 in multiple fields of view using SEM or STEM, and counting the number of first segregations 11b present in the boundary 20 that is at least 100 μm in total. In other words, the number N1 is the number N of the measured first segregations 11b. L / Total length L of analyzed boundary 20 Z It can be expressed as:
[0043] When observed at a high magnification using a SEM or STEM, the boundary 20 is found to be meandering or partially broken. When measuring the number N1, the meandering and broken parts of the boundary 20 are accurately measured to obtain the total length L Z 2, the cross-sectional photograph is taken so that the internal electrode layer 12 and one side of the cross-sectional photograph are substantially parallel to each other, and the width L of the cross-sectional photograph in the X-axis direction is calculated. Z1 is regarded as the length of the boundary 20 in the observation field of view.
[0044] In the ceramic layer 10 of this embodiment, in addition to the first segregation 11b, it is preferable that the second segregation 11c containing Mg is present. This second segregation 11c is a complex oxide phase in which the concentration of Mg is higher than that of the dielectric particles 11a. The second segregation 11c may contain constituent elements of the ceramic layer 10 other than Mg, and it is particularly preferable that the second segregation 11c contains O, Ba, and Ti. The detailed composition of this second segregation 11c is not particularly limited, and for example, the second segregation 11c may be a hexagonal Ba(Ti 1-X ,Mg X )O 3 In the composition formula, x represents the atomic ratio of Mg. The numerical range of x is arbitrary, and can be, for example, 0.02 to 0.30. In addition, the atomic ratio of oxygen in the composition formula is 3.0, but may be slightly deviated.
[0045] The second segregation 11c can be identified by mapping analysis using EDX or EDS. In this case, the mapping analysis may be performed in the same manner as the analysis of the first segregation 11b. Then, from the mapping image of Mg obtained by the mapping analysis, a region having a higher Mg concentration than the dielectric particles 11a is extracted, and the region is determined to be the second segregation 11c.
[0046] The average grain size of the second segregations 11c can be 2 μm or less, and is preferably 0.01 μm to 1 μm. The average grain size of the second segregations 11c may be measured in the same manner as the average grain size of the first segregations 11b. That is, after identifying at least five or more second segregations 11c by the above method, the circle equivalent diameters of these second segregations 11c are measured by image analysis to calculate the average grain size.
[0047] Moreover, the second segregation 11c is preferably present inside the ceramic layer 10. "Inside the ceramic layer 10" means that the second segregation 11c is present surrounded by the dielectric particles 11a without being in direct contact with the internal electrode layer 12. However, a part of the second segregation 11c may be present at the boundary 20 so as to be in contact with the internal electrode layer 12. The number N2 of the second segregation 11c contained per unit cross-sectional area of the ceramic layer 10 is 0.002 pieces / μm 2 ~1 piece / μm 2 The number N2 may be calculated by performing the above-mentioned mapping analysis in a plurality of visual fields and dividing the number of identified second segregations 11c by the total area of the measured visual fields.
[0048] The grain boundaries 11d between the dielectric particles 11a are composed of the main component elements and the subcomponent elements. The grain boundaries 11d may also contain other segregation phases (segregation phases other than the first segregation 11b and the second segregation 11c) resulting from the subcomponents. Furthermore, the ceramic layer 10 may contain voids and subphase particles in addition to the above-mentioned dielectric particles 11a and segregation phases.
[0049] Next, an example of a method for manufacturing the multilayer ceramic capacitor 2 shown in FIG. 1 will be described.
[0050] First, a description will be given of the manufacturing process of the element body 4. In the manufacturing process of the element body 4, a dielectric paste that becomes the ceramic layers 10 after firing and an internal electrode paste that becomes the internal electrode layers 12 after firing are prepared.
[0051] The dielectric paste is manufactured, for example, by the following method. First, the dielectric raw materials are mixed uniformly by means of wet mixing or the like, and then dried. Then, the mixture is heat-treated under predetermined conditions to obtain a calcined powder. Next, a known organic vehicle or a known aqueous vehicle is added to the calcined powder obtained and kneaded to prepare a dielectric paste. The dielectric paste may contain additives selected from various dispersants, plasticizers, dielectrics, auxiliary component compounds, glass frits, etc., as necessary.
[0052] In addition, when forming the second segregation 11c in the ceramic layer 10, a raw material powder for the second segregation is added to the dielectric paste. The raw material powder for the second segregation is, for example, MgCO 3 Powder and BaCO 3 Powder and TiO 2 The powder is mixed in a predetermined ratio, calcined, and then appropriately pulverized to obtain the dielectric paste. The prepared second segregation raw material powder is then mixed with the calcined powder of the dielectric raw material in a vehicle to prepare the dielectric paste.
[0053] On the other hand, the internal electrode paste is prepared by kneading a conductive powder made of a conductive metal or its alloy (preferably Ni powder or Ni alloy powder), a first segregation raw material powder, and a known binder and solvent. The first segregation raw material powder added at this time is, for example, BaCO 3 Powder and TiO 2 Powder and SiO 2 The first segregation 11b can be formed at the boundary 20 by adding the first segregation raw material powder to the internal electrode paste.
[0054] If necessary, the internal electrode paste may contain a ceramic powder (for example, barium titanate powder) as a co-material, which acts to suppress sintering of the conductive powder during the firing process.
[0055] Next, the dielectric paste is formed into a sheet by a doctor blade method or the like to obtain a ceramic green sheet. Then, the internal electrode paste is applied in a predetermined pattern onto the ceramic green sheet by various printing methods such as screen printing or transfer methods. Furthermore, the green sheets on which the internal electrode patterns are formed are laminated in a plurality of layers, and then pressed in the lamination direction to obtain a mother laminate. At this time, the ceramic green sheets and the internal electrode patterns are laminated so that the ceramic green sheets are located on the upper and lower surfaces of the mother laminate in the lamination direction.
[0056] The mother laminate obtained by the above process is cut into a predetermined size by dicing or pressing to obtain a plurality of green chips. The green chips may be solidified and dried to remove plasticizers, if necessary, and may be barrel-polished using a horizontal centrifugal barrel machine or the like after solidification and drying. In barrel polishing, the green chips are placed in a barrel container together with media and polishing liquid, and the barrel container is subjected to rotational motion, vibration, or the like. This barrel polishing polishes away unnecessary parts such as burrs generated during cutting, and forms rounded corners (corner R) on the green chips. After barrel polishing, the green chips are washed with a cleaning liquid such as water and dried.
[0057] Next, the green chip obtained above is subjected to a binder removal process and a firing process, and the element body 4 is obtained.
[0058] The conditions for the binder removal treatment are not particularly limited and may be appropriately determined depending on the main component composition of the ceramic layer 10 and the main component composition of the internal electrode layer 12. For example, the temperature increase rate is preferably 5 to 300°C / hour, the holding temperature is preferably 180 to 400°C, and the temperature holding time is preferably 0.5 to 24 hours. The binder removal atmosphere is air or a reducing atmosphere.
[0059] The firing conditions are not particularly limited and may be appropriately determined depending on the main component composition of the ceramic layers 10 and the main component composition of the internal electrode layers 12. For example, the holding temperature during firing is preferably 1200 to 1350°C, more preferably 1220 to 1300°C, and the holding time is preferably 0.5 to 8 hours, more preferably 1 to 3 hours. The firing atmosphere is preferably a reducing atmosphere, and the atmospheric gas may be, for example, N 2 and H 2 In addition, when the internal electrode layer 12 is made of a base metal such as Ni or a Ni alloy, the oxygen partial pressure in the firing atmosphere is set to 1.0×10 -14 ~1.0×10 -10 It is preferable that the pressure is set to MPa.
[0060] After the firing process, annealing may be performed as necessary. Annealing is a process for reoxidizing the ceramic layer 10, and it is preferable to perform annealing when the firing process is performed in a reducing atmosphere. The conditions of the annealing process may be appropriately determined depending on the main component composition of the ceramic layer 10, and are not particularly limited. For example, the holding temperature is preferably 950 to 1150°C, the temperature holding time is preferably 0 to 20 hours, and the temperature increase rate and temperature decrease rate are preferably 50 to 500°C / hour. In addition, humidified N 2 It is preferable to use a gas such as annealing gas, and the oxygen partial pressure in the annealing atmosphere is 1.0×10 -9 ~1.0×10 -5 It is preferable that the pressure is set to MPa.
[0061] In the above-mentioned binder removal treatment, firing treatment and annealing treatment, N2 In order to humidify the gas or mixed gas, for example, a wetter or the like may be used, and in this case, the water temperature is preferably about 5 to 75° C. Furthermore, the binder removal treatment, firing treatment, and annealing treatment may be performed consecutively or independently.
[0062] Next, a pair of external electrodes 6 are formed on the outer surface of the element body 4 obtained above. The method of forming the external electrodes 6 is not particularly limited. For example, when forming a baked electrode as the external electrode 6, a conductive paste containing glass frit may be applied to the end surface of the element body 4 by a dipping method, and then the element body 4 may be heated at a predetermined temperature. When forming a resin electrode as the external electrode 6, a conductive paste containing a thermosetting resin may be applied to the end surface of the element body 4, and then the element body 4 may be heated at a temperature at which the thermosetting resin hardens. Furthermore, after forming the baked electrode or resin electrode by the above method, sputtering, vapor deposition, electrolytic plating, or electroless plating may be performed to form the external electrode 6 having a multilayer structure.
[0063] Through the above steps, a multilayer ceramic capacitor 2 having external electrodes 6 is obtained.
[0064] (Summary of the embodiment) The multilayer ceramic capacitor 2 according to this embodiment is an ABO 3 The ceramic layer 10 mainly composed of a perovskite-type compound represented by the formula (I) is alternately laminated with an internal electrode layer 12 containing Ni. At the boundary 20 between the ceramic layer 10 and the internal electrode layer 12, a first segregation containing Ba, Ti, Si, Ni, and O is present.
[0065] The above-mentioned characteristics of the multilayer ceramic capacitor 2 make it difficult for the insulation resistance to decrease in a high-temperature, high-humidity environment, and improve durability against the high-temperature, high-humidity environment. The reason for the improved durability is not necessarily clear, but is thought to be due to the first segregations 11b containing a predetermined element improving the bonding strength between the ceramic layers 10 and the internal electrode layers 12.
[0066] Generally, the ceramic layer made of dielectric ceramic and the internal electrode layer made of Ni have different material properties such as shrinkage rate and linear expansion coefficient, and this difference in properties easily causes peeling of the internal electrode layer and cracks in the ceramic layer. In the multilayer ceramic capacitor 2 of this embodiment, the first segregation 11b existing at the boundary 20 is a composite oxide containing Ba and Ti, and is therefore considered to have a property of being easily bonded to the dielectric particles 11a. In addition, the first segregation 11b contains Ni, and is therefore considered to have a property of being easily bonded to the internal electrode layer 12.
[0067] Thus, the first segregations 11b have a high affinity for both the dielectric particles 11a of the ceramic layers 10 and Ni of the internal electrode layers 12, and the presence of the first segregations 11b at the boundaries 20 is considered to improve the bonding strength between the ceramic layers 10 and the internal electrode layers 12. As a result, in the multilayer ceramic capacitor 2 of this embodiment, it is considered that peeling of the internal electrode layers 12 and the occurrence of cracks in the ceramic layers 10 can be suppressed, and durability in high-temperature and high-humidity environments is improved.
[0068] In particular, in this embodiment, the Ni / Si ratio in the first segregations 11b is 0.1 or more, and this configuration is considered to further improve the bonding strength between the ceramic layers 10 and the internal electrode layers 12. As a result, durability against high temperature and high humidity environments can be further improved.
[0069] Moreover, by setting the average grain size of the first segregations 11b to be 0.05 μm or more and 0.30 μm or less, it is possible to more suitably suppress peeling of the internal electrode layers 12 and the occurrence of cracks in the ceramic layers 10. As a result, it is possible to further improve durability in high-temperature and high-humidity environments.
[0070] In the multilayer ceramic capacitor 2 of the present embodiment, the ceramic layer 10 has a second segregation 11c containing Mg (preferably, the second segregation 11c is a hexagonal Ba(Ti 1-X ,Mg X )O 3) is present, and the second segregation 11c can improve durability against high temperature and high humidity environments. In addition, the second segregation 11c can improve the sinterability of the ceramic layer 10.
[0071] Although an embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.
[0072] For example, in this embodiment, the multilayer ceramic capacitor 2 is exemplified as the multilayer ceramic electronic component, but the multilayer ceramic electronic component of the present invention may be, for example, a bandpass filter, a multilayer three-terminal filter, a piezoelectric element, a thermistor, a varistor, or the like.
[0073] In this embodiment, the ceramic layers 10 and the internal electrode layers 12 are laminated in the Z-axis direction, but the lamination direction may be the X-axis direction or the Y-axis direction. In this case, the external electrode 6 may be formed in accordance with the exposed surface of the internal electrode layer 12. The internal electrode layer 12 may be led out to the outer surface of the element body 4 via a through-hole electrode, in which case the through-hole electrode and the external electrode 6 are electrically connected. EXAMPLES
[0074] The present invention will now be described in more detail with reference to examples, but the present invention is not limited to these examples.
[0075] (Experiment 1) Example 1 In Example 1, the multilayer ceramic capacitor 2 shown in FIG. 1 was fabricated in the following manner.
[0076] First, a dielectric paste and an internal electrode paste were prepared. Specifically, the dielectric paste was made of barium titanate powder (BaTiO 3 powder) and sub-component powder (MgCO 3 Powder, Dy 2 O 3Powder, MnCO 3 Powder, SiO 2 The dielectric material powder was prepared by mixing barium titanate powder and an organic vehicle. The barium titanate powder used as the dielectric material powder was prepared by hydrothermal synthesis.
[0077] On the other hand, the internal electrode paste was prepared by mixing Ni powder, the first segregation raw material powder, barium titanate powder as a co-material, a binder, and a solvent. The first segregation raw material powder added to the internal electrode paste was a Ba-Ti-Si-Ni-O based composite oxide powder, BaCO 3 Powder and TiO 2 Powder and SiO 2 The powder was mixed with NiO powder in a specified ratio, calcined, and then pulverized to obtain the powder.
[0078] Next, a green chip was manufactured by the sheet method using the dielectric paste and the internal electrode paste. The green chip was then subjected to binder removal, firing, and annealing to obtain an element body 4 having dimensions L0×W0×T0=2.0mm×1.25mm×1.25mm. In the obtained element body 4, the number of layers of the ceramic layer 10 sandwiched between the internal electrode layers 12 was 600, the average thickness of the ceramic layer 10 was 0.8μm, and the average thickness of the internal electrode layers 12 was 0.8μm.
[0079] Next, a baked electrode layer containing Cu, a Ni plating layer, and a Sn plating layer were formed in the order described above on the outer surface of the element body 4. Through the above steps, a capacitor sample according to Example 1 was obtained.
[0080] Example 2 In Example 2, the first segregation raw material powder, which is a Ba-Ti-Si-Ni-O based composite oxide powder, was added not only to the internal electrode paste but also to the dielectric paste. The other experimental conditions in Example 2 were the same as those in Example 1, and a capacitor sample according to Example 2 was obtained.
[0081] Example 3 In Example 3, barium titanate powder, the second segregation raw material powder, and the subcomponent powder (MgCO 3 Powder, Dy 2 O 3 Powder, MnCO 3 Powder, SiO 2 The second segregation raw material powder added to this dielectric paste was Ba(Ti,Mg)O 3 It is a composite oxide powder represented by MgCO 3 Powder and BaCO 3 Powder and TiO 2 The powder was mixed in a predetermined ratio, calcined, and then pulverized to obtain a capacitor sample according to Example 3. Note that, in Example 3, the first segregation raw material powder was also added to the internal electrode paste, and the other experimental conditions were the same as those in Example 1 to obtain a capacitor sample according to Example 3.
[0082] Comparative Example 1 In Comparative Example 1, a dielectric paste and an internal electrode paste were prepared without using a raw material powder for segregation. That is, the dielectric paste in Comparative Example 1 was prepared by mixing a barium titanate powder, a subcomponent powder (the same subcomponent as in Example 1), and an organic vehicle, and the internal electrode paste in Comparative Example 1 was prepared by mixing Ni powder, a barium titanate powder as a common material, a binder, and a solvent. The other experimental conditions in Comparative Example 1 were the same as those in Example 1, and a capacitor sample according to Comparative Example 1 was obtained.
[0083] Comparative Example 2 In Comparative Example 2, a ceramic powder not containing Ni was added to the internal electrode paste. Specifically, Ba-Ti-Si-O-based fresnoite powder was added to the internal electrode paste in Comparative Example 2, and the fresnoite powder was BaCO 3 Powder and TiO 2 Powder and SiO 2 The powder was mixed and calcined to obtain a capacitor sample according to Comparative Example 2. The other experimental conditions in Comparative Example 2 were the same as those in Example 1, and a capacitor sample according to Comparative Example 2 was obtained.
[0084] Comparative Example 3 In Comparative Example 3, the first segregation raw material powder, which is a Ba-Ti-Si-Ni-O based composite oxide powder, was added only to the dielectric paste, not to the internal electrode paste. The other experimental conditions in Comparative Example 3 were the same as those in Example 1, and a capacitor sample according to Comparative Example 3 was obtained.
[0085] The capacitor samples according to the examples and comparative examples produced in Experiment 1 were evaluated as follows.
[0086] Segregation Analysis In experiment 1, the cross section of each capacitor sample was observed by STEM, and mapping analysis and point analysis were performed by EDX to identify the segregation phase present at the boundary 20 and the segregation phase present inside the ceramic layer 10. The measurement results for each example and comparative example are shown in Table 1. Note that "-" in the segregation phase column in Table 1 means that no segregation phase was observed at the corresponding location.
[0087] Durability evaluation In order to evaluate the durability of the capacitor samples in a high-temperature and high-humidity environment, a pressure cooker bias test (PCBT) was performed. Specifically, the capacitor samples were subjected to a temperature of 121°C, humidity of 95%, and atmospheric pressure of 2.026×10 with a voltage of 4V applied. 5 The capacitor samples were left in an environment of 10 Pa for 24 hours. The insulation resistance of the capacitor samples was measured before and after PCBT, and samples whose insulation resistance after PCBT had decreased to 1 / 10 or less of the insulation resistance before the test were judged to have failed (NG). This test was performed on 80 samples for each of the examples and comparative examples, and the NG rate (number of samples that were NG / number of test samples (80)) was calculated. The NG rate after 24 hours of PCBT was set at 0 / 80, which is the pass / fail standard. The evaluation results are shown in Table 1.
[0088] [Table 1]
[0089] As shown in Table 1, in Comparative Examples 1 to 3, the first segregation 11b containing Ni was not present at the boundary 20 between the ceramic layer 10 and the internal electrode layer 12, and sufficient durability was not obtained. On the other hand, in Examples 1 to 3 in which the first segregation 11b was present at the boundary 20, the NG rate of the PCBT was 0 / 80, and it was confirmed that the durability against a high temperature and high humidity environment was improved compared to each Comparative Example. In Examples 1 to 3, cracks in the ceramic layer 10 and peeling of the internal electrode layer 12 were suppressed more than in each Comparative Example, which is considered to have improved durability.
[0090] For each of Examples 1 to 3, durability evaluation was performed under stricter conditions than the above PCBT24h (Condition 1). Specifically, for PCBT under Condition 2, which is stricter than Condition 1, the leaving time was 500 hours, the number of test samples in each Example was 400, and other conditions (applied voltage, etc.) were the same as those under Condition 1. As shown in Table 1, in the PCBT for 500 hours, the NG rate of Example 3 was 0 / 400, and it was confirmed that the durability of Example 3 was particularly better than that of Examples 1 and 2. From this result, it was proved that the durability in a high temperature and high humidity environment was further improved by forming the second segregation 11c in the ceramic layer 10 in addition to the first segregation 11b at the boundary 20.
[0091] (Experiment 2) In experiment 2, the level of the Ni / Si ratio in the first segregation 11b present at the boundary 20 was varied to obtain capacitor samples according to Examples 11 to 14. Specifically, the Ni / Si ratio in the first segregation 11b was adjusted by adding SiO 2 The total amount of NiO powder and SiO powder was fixed. 2 The amount of NiO powder added was controlled by changing the amount of NiO powder added relative to the amount of powder added. The other experimental conditions in Experiment 2 were the same as those in Example 1 of Experiment 1, and the same evaluation as in Experiment 1 was performed.
[0092] In the durability evaluation of Experiment 2, a PCBT (condition 1) was carried out for 24 hours in the same manner as in Experiment 1, and a PCBT (condition 3) was also carried out for an extended test time of 240 hours. More specifically, in the 240-hour PCBT, a voltage of 4 V was applied to the capacitor sample, and the capacitor sample was exposed to a temperature of 121°C, humidity of 95%, and atmospheric pressure of 2.026 x 10 5 The test pieces were left in an environment of 100 Pa for 240 hours, and the insulation resistance was measured before and after the test. In Experiment 2, 240-hour PCBT was performed on 400 capacitor samples for each of Examples 11 to 14, and the NG rate was calculated. The evaluation results of Experiment 2 are shown in Table 2.
[0093] [Table 2]
[0094] As shown in Table 2, in all of Examples 11 to 14, the presence of Ba-Ti-Si-Ni-O-based first segregation 11b was confirmed at the boundary 20, and the NG rate of the PCBT after 24 hours was 0 / 80. On the other hand, in the PCBT after 240 hours, the NG rate of Samples 12 to 14 was 0 / 400, which was a particularly good result. From this result, it was found that the Ni / Si ratio in the first segregation 11b is preferably 0.1 or more.
[0095] Experiment 3 In experiment 3, capacitor samples according to Examples 21 to 24 were produced by varying the level of the average particle size of the first segregation 11b. The average particle size of the first segregation 11b was controlled by the grinding conditions when preparing the raw powder for the first segregation. The other experimental conditions in experiment 3 were the same as those in Example 1 of experiment 1, and the same evaluations as those in experiment 2 (segregation analysis, 24-hour PCBT, 240-hour PCBT) were also performed in experiment 3. The evaluation results of experiment 3 are shown in Table 3.
[0096] [Table 3]
[0097] From the results in Table 3, it was found that the average grain size of the first segregations 11b is preferably 0.05 μm or more and 0.30 μm or less.
[0098] Experiment 4 In experiment 4, the number N1 of the first segregations 11b present per unit length of the boundary 20 was varied to produce capacitor samples according to Examples 31 to 33. The number N1 was controlled by the amount of the raw material powder for the first segregation added to the internal electrode paste, and the number N1 was measured by cross-sectional analysis using STEM. The other experimental conditions in experiment 4 were the same as those in Example 1 of experiment 1, and the same evaluation as in experiment 2 was performed in experiment 4. The evaluation results of experiment 4 are shown in Table 4.
[0099] [Table 4]
[0100] The results in Table 4 show that the number N1 of the first segregations 11b present per unit length of the boundary 20 is preferably 0.2 pieces / μm or more and 3.2 pieces / μm or less. [Explanation of symbols]
[0101] 2. Multilayer ceramic capacitors 4 … Element body 4a … End face 4b…side 10 … Ceramic layer 12 … Internal electrode layer 20 … boundary 11a … Dielectric particles 11b … 1st segregation 11c…Second segregation 11d … Grain boundary 6 … External electrode
Claims
1. A.B.O. 3 The device has an element body in which ceramic layers mainly composed of a perovskite compound represented by the formula (I) and internal electrode layers containing Ni are alternately laminated, a multilayer ceramic electronic component in which a first segregation containing Ba, Ti, Si, Ni, and O is present at a boundary between the ceramic layer and the internal electrode layer, The number of the first segregations contained per unit length of the boundary is 0.2 pieces / μm or more and 3.2 pieces / μm or less.
2. 2. The multilayer ceramic electronic component according to claim 1, wherein a molar ratio of Ni to Si (Ni / Si) in the first segregation is 0.1 or more.
3. 3. The multilayer ceramic electronic component according to claim 1, wherein the average grain size of the first segregation is 0.05 [mu]m or more and 0.30 [mu]m or less.
4. 4. The multilayer ceramic electronic component according to claim 1, wherein the ceramic layers contain a second segregation containing Mg.
5. 5. The multilayer ceramic electronic component according to claim 1, wherein the perovskite type compound is barium titanate.
Citation Information
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