High power factor rectifier circuit

Abstract

To provide a high power factor rectification circuit with a low possibility of current backflow to the AC side or short-circuit of the DC link in the event of a fault, and which can be made lightweight.SOLUTION: A high power factor rectification circuit 1 is a rectification circuit 2 including a diode bridge connected to the AC power source via a reactor Lb and a capacitor connected to the output side of the diode bridge, and a multilevel inverter 3 connected via a bidirectional switch S3 to the line between the reactor Lb and the rectification circuit 2 and including two power supply sections C1 and C2 and switch elements S1 and S2 that switch the connection and disconnection of each of the two power supply sections to the bidirectional switch S3.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a high power factor rectifier circuit. [Background technology]

[0002] Aiming to reduce greenhouse gas emissions, the development of electric aircraft is gaining momentum. The series hybrid system, which is one type of electrification system, uses an AC / DC converter (for propulsion and equipment) that converts alternating current from a generator into direct current. AC / DC converters for electric aircraft need to be lightweight.

[0003] Additionally, AC / DC converters for aircraft are required to meet the following requirements: First, they must not allow energy to flow back to the AC side, and second, they must not short-circuit the DC link if one of the arms that make up the converter fails.

[0004] As an AC / DC converter that meets the above requirements, Sebastian Liebig, et al. (Non-Patent Document 1 below) have proposed a three-phase high power factor rectifier circuit using a Δ-shaped bidirectional switch. This high power factor rectifier circuit performs high power factor control by varying the voltage on the input side of the diode bridge. In this high power factor circuit, the voltage at the input of the diode bridge is zero when the line switches of each phase are on, and is the output rectified voltage when they are off. By PWM control of these voltages, the current from the power supply voltage is controlled to become a sine wave through the reactor. In this configuration, the line voltage at the input of the diode bridge is a two-level PWM voltage. [Prior art documents] [Non-patent literature]

[0005] [Non-Patent Document 1] Sebastian Liebig, et al.: "Design and evaluation of state of the art rectifiers dedicated for a 46 kW E-ECS aerospace application with respect to power density and reliability", Proceedings of the 2011 14th European Conference on Power Electronics and Applications,2011 Summary of the Invention [Problem to be solved by the invention]

[0006] In the above-mentioned conventional high power factor rectifier circuit, a reactor with high inductance is used to smooth the PWM waveform, etc. As a result, the weight of the reactor accounts for most of the weight of the entire converter, which is an obstacle to weight reduction.

[0007] Therefore, an object of the present invention is to provide a high power factor rectifier circuit that is configured to reduce the possibility of a backflow of current to the AC side or a short circuit in the DC link in the event of a fault, and that can be made lighter. [Means for solving the problem]

[0008] A high power factor rectifier circuit in an embodiment of the present invention includes a rectifier circuit including a diode bridge connected to an AC power supply via a reactor and a capacitor connected to an output side of the diode bridge, and a multilevel inverter connected to a line between the reactor and the rectifier circuit via a bidirectional switch, the multilevel inverter including two power supply units and a switch element that switches between connection and disconnection of each of the two power supply units to the bidirectional switch. Effect of the Invention

[0009] According to the present invention, it is possible to provide a high power factor rectifier circuit that has a configuration that reduces the possibility of a current backflow to the AC side or a short circuit in the DC link occurring in the event of a fault, and that can be made lighter. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram showing a configuration example of a high power factor rectifier circuit according to an embodiment of the present invention. [Diagram 2] 2 is a diagram showing an example of a voltage waveform of the multilevel inverter 3 shown in FIG. 1. [Diagram 3] 2 is a diagram showing an example of the operation of the multilevel inverter 3 shown in FIG. 1; [Figure 4] FIG. 13 is a diagram showing an example of feedback control. [Diagram 5] FIG. 4 is a diagram showing a configuration example of a control unit that controls a high power factor rectifier circuit. [Figure 6] A waveform diagram showing the simulation results of a high power factor rectifier circuit with the same configuration as Figure 1. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] A high power factor rectifier circuit in an embodiment of the present invention includes a rectifier circuit including a diode bridge connected to an AC power supply via a reactor and a capacitor connected to an output side of the diode bridge, and a multilevel inverter connected to a line between the reactor and the rectifier circuit via a bidirectional switch, the multilevel inverter including two power supply units and a switch element that switches between connection and disconnection of each of the two power supply units to the bidirectional switch.

[0012] In the high power factor rectifier circuit of the above configuration, a multilevel inverter is connected to the AC side line between the reactor and the diode bridge via a bidirectional switch. In this configuration, even if an arm of the multilevel inverter fails, a current backflow to the AC side and a short circuit of the DC link are unlikely to occur. The multilevel inverter also has a switch element for switching the connection of each of the two power supply units. In this configuration, the multilevel inverter can supply a voltage based on one of the two power supply units to the input side of the diode bridge through the bidirectional switch. Therefore, by switching the bidirectional switch and the switch element on / off, the voltage supplied to the input side of the diode bridge can be switched between at least three levels. The multilevel inverter enables PWM control using at least three levels of voltage. This makes it possible to change the range of voltages (voltage swing range) used for PWM control according to the voltage level within one period of the AC voltage. Therefore, the voltage swing in PWM control can be reduced overall. As a result, the inductance of the reactor can be reduced and the weight can be reduced. In other words, it is possible to provide a high power factor rectifier circuit that is configured to reduce the possibility of a current backflow to the AC side or a short circuit in the DC link in the event of a fault, and that can also be made lighter.

[0013] Each of the two power supply units of the multilevel inverter may be formed of a capacitor, which eliminates the need for a power supply device for the power supply units.

[0014] During operation of the multilevel inverter, the voltages of the two power supply units may be different. That is, the two power supply units may supply voltages of different levels. For example, the polarities of the voltages supplied by the two power supply units may be different from each other. As an example, the voltages V1 and V2 of the two power supply units are set to approximately V1=(+1 / 3)VDC and V2=(-1 / 3)VDC with respect to the output voltage VDC of the rectifier circuit.

[0015] A switch element of the multilevel inverter may switch between a state in which one of the two power supply units is connected to a bidirectional switch and a state in which the other of the two power supply units is connected to the bidirectional switch. The multilevel inverter performs PWM control by turning on / off the bidirectional switch and the switch element so that the AC voltage at the rear stage of the reactor becomes a target voltage. By PWM controlling the output of the multilevel inverter, the phase of the voltage input to the rectifier circuit is controlled to be the same as the phase of the current. In other words, by PWM controlling the multilevel inverter, the power factor of the current between the reactor and the rectifier circuit can be increased.

[0016] In the PWM control, two of the three voltages, the voltage levels of the two power supplies and the output voltage level of the rectifier circuit, are used for the PWM control. The bidirectional switch and the switch element are controlled so that the two voltages used in the PWM control are switched according to the target voltage.

[0017] The voltage at the input end of the diode bridge may be controlled by the voltages V1 and V2 of the two power supply units and the positive and negative output voltages (+VDC, -VDC) of the rectifier circuit. That is, by switching the bidirectional switch and the switch element of the multilevel inverter, the voltage at the input end of the diode bridge can be switched among the above four levels and PWM controlled. This makes it possible to efficiently suppress the voltage swing of the control voltage. For example, the voltage at the input end of the diode bridge can be PWM controlled by a voltage that is 1 / 3 of the output voltage VDC ((1 / 3)VDC), a voltage that is -1 / 3 of the output voltage VDC (-(1 / 3)VDC), and the positive and negative output voltages (+VDC, -VDC).

[0018] One AC cycle may include a mode in which the voltage at the input end of the diode bridge is PWM-controlled by the voltages V1 and V2 of the two power supply units, a mode in which the voltage at the input end of the diode bridge is PWM-controlled by the output voltage VDC and the voltage V1 of one power supply unit, and a mode in which the voltage at the input end of the diode bridge is PWM-controlled by the output voltage VDC and the voltage V2 of the other power supply unit. This allows the PWM-controlled voltage to be appropriately switched in one cycle. Therefore, the voltage swing can be efficiently reduced.

[0019] In the multilevel inverter, the voltages V1 and V2 of the two power supply units can be made smaller than the output voltage VDC of the rectifier circuit (VDC>V1>V2). The control of the voltage at the input end of the diode bridge by the multilevel inverter may be controlled to include, in one AC cycle, a period Tα in which PWM control is performed between V1 and V2, a period Tβ(+) in which PWM control is performed between VDC and V2, a period Tγ(+) in which PWM control is performed between VDC and V1, a period Tβ(-) in which PWM control is performed between -VDC and V1, and a period Tγ(-) in which PWM control is performed between -VDC and V2. This makes it possible to efficiently change the width of the PWM pulse according to the level within the AC voltage cycle. It is possible to efficiently reduce the voltage swing in PWM control.

[0020] The mode width may be adjusted based on the voltages of the two power supply units so that the balance between the energy absorbed and the energy released by the two power supply units becomes zero in one AC cycle. This allows the multilevel inverter to be driven by the power of the capacitors in the power supply units. For example, an external power supply or the like for driving the multilevel inverter is not required.

[0021] For example, the ratio of the length of the period between a mode in which the output voltage VDC and the voltage V1 of one power supply unit are PWM controlled and a mode in which the output voltage VDC and the voltage V2 of the other power supply unit are PWM controlled may be determined so that the charging and discharging amounts of the two power supply units are the same in one AC cycle.

[0022] (Configuration example) Fig. 1 is a diagram showing a configuration example of a high power factor rectifier circuit in an embodiment of the present invention. The high power factor rectifier circuit 1 shown in Fig. 1 includes a reactor Lb, a rectifier circuit 2, a bidirectional switch S3, and a multilevel inverter 3. The rectifier circuit 2 is connected to an AC power source 5 via the reactor Lb. The multilevel inverter 3 is connected to a line between the reactor Lb and the rectifier circuit 2 via the bidirectional switch S3. That is, one end of the bidirectional switch S3 is connected to the line between the reactor Lb and the rectifier circuit 2, and the other end is connected to the multilevel inverter 3.

[0023] The rectifier circuit 2 includes a diode bridge and capacitors C3 and C4 connected to the output side of the diode bridge. The diode bridge has an arm formed by two diodes D1 and D2 connected in series in the same direction. A reactor Lb is connected between the two diodes D1 and D2 constituting the arm, and an AC voltage and an AC current are input. In the example of FIG. 1, the diode bridge is a half bridge. In the example shown in FIG. 1, the rectifier circuit 2 is a three-phase full-wave rectifier circuit. The rectifier circuit 2 has arms corresponding to the three phases. An AC current of each phase is input between the diodes D1 and D2 of each of the three-phase arms.

[0024] The capacitors C3 and C4 of the rectifier circuit 2 include a capacitor C3 connected to the cathode side of the arm and a capacitor C4 connected to the anode side. The space between these capacitors C3 and C4 is connected to two power supply units of the multilevel inverter 3, that is, the space between the two capacitors C1 and C2. When the three-phase AC input to the rectifier circuit 2 is a symmetrical three-phase AC, the voltages of the capacitors C3 and C4 are the same. The space between the capacitors C3 and C4 may be grounded. A voltage VDC is output to each of the two capacitors C3 and C4. The voltage VDC is the output voltage of the rectifier circuit 2. The output voltage VDC of the rectifier circuit 2 is a voltage rectified by a diode bridge and smoothed by the capacitors C3 and C4. In this example, a voltage of 2VDC, which is the sum of the rectified voltage of the positive component of the AC voltage (capacitor C3) and the rectified voltage of the negative component (capacitor C4), is supplied to the load. A voltage of 2VDC is applied to the load R. The load R may be supplied with the voltage VDC.

[0025] The bidirectional switch S3 switches between conduction / non-conduction between a node on the line between the reactor Lb and the diode bridge of the rectifier circuit 2 and the multilevel inverter 3. The bidirectional switch S3 passes bidirectional current when in a conductive (ON) state and does not pass bidirectional current when in a non-conductive (OFF) state.

[0026] The multilevel inverter 3 includes capacitors C1 and C2 as two power supply units, and switch elements S1 and S2. The switch elements S1 and S2 switch between connection and disconnection of each of the two capacitors C1 and C2 to the bidirectional switch S3. The switch element S1 is provided on a path between the capacitor C1 and the bidirectional switch S3, and the switch element S2 is provided on a path between the capacitor C2 and the bidirectional switch S3. The switch elements S1 and S2 are connected in series to form an arm. A node between the switch elements S1 and S2 is connected to the bidirectional switch S3. An end of the arm on the switch element S1 side is connected to the capacitor C1, and an end of the arm on the switch element S2 side is connected to the capacitor C2. The capacitors C1 and C2 are connected between the capacitors C3 and C4 of the rectifier circuit 2. The capacitors C1 and C2 may be grounded to be grounded.

[0027] In the example of Fig. 1, the multilevel inverter 3 is connected to each of the three-phase AC lines via a bidirectional switch S3. The bidirectional switch S3 and the switch elements S1 and S3 are provided for each of the three phases. The capacitors C1 and C2 as two power supply units are shared by the three phases. That is, the multilevel inverter 3 has three arms corresponding to the three phases, and the shared capacitors C1 and C2 are connected to the three arms.

[0028] The semiconductor switch elements constituting the switch elements S1, S2 and the bidirectional switch S3 may be, for example, an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET).

[0029] During operation of the multilevel inverter 3, the capacitors C1 and C2 are set to different voltages. The voltage V1 of the capacitor C1 and the voltage V2 of the capacitor C2 have opposite polarities. In addition, the absolute values ​​of the voltages V1 and V2 of the capacitors C1 and C2 are set to be smaller than the absolute value of the output voltage VDC of the rectifier circuit 2. For example, the absolute values ​​of the voltages V1 and V2 of the capacitors C1 and C2 are set to 1 / 3 of the absolute value of the output voltage VDC of the rectifier circuit 2 (V1=(1 / 3)VDC, V2=-(1 / 3)VDC).

[0030] The multilevel inverter 3 performs PWM control by turning on / off the bidirectional switch S3 and the switch elements S1 and S2 so that the AC voltage at the rear stage of the reactor Lb becomes a target voltage. The PWM control by the multilevel inverter 3 converts the AC voltage input to the rectifier circuit 2 at the rear stage of the reactor Lb into a sine wave, and the voltage phase and the current phase can be made the same. In other words, the PWM control of the multilevel inverter enables high power factor control.

[0031] The multilevel inverter 3 performs PWM control using two of the three voltages, namely, the voltages V1 and V2 of the capacitors C1 and C2, and the output voltage VDC of the rectifier circuit 2. The bidirectional switch and the switch element are controlled so that the two voltages used in the PWM control are switched according to the target voltage within the AC period. An operation example will be described below.

[0032] (Example of operation) 2 is a diagram showing an example of a voltage waveform of PWM control by the multilevel inverter 3 shown in FIG. 1, and a phase voltage waveform of the PWM-controlled AC voltage V'u at the rear stage of the reactor Lb. FIG. 3 is a diagram showing a target waveform VR, and an example of the operation of the bidirectional switch S3 and the switch elements S1 and S2 in the PWM control for obtaining the target waveform VR. As shown in FIG. 2, one cycle of the AC voltage includes a plurality of periods with different operation modes. Here, as an example, an operation will be described in which the voltage V1 of the capacitor C1 is set to 1 / 3 of the output voltage VDC of the rectifier circuit 2, that is, V1=(1 / 3)VDC, and the voltage V2 of the capacitor C2 is set to V2=-(1 / 3)VDC.

[0033] [Period Tα] The mode in the period Tα is a mode in which the target voltage VR is -(1 / 3)VDC≦VR≦(1 / 3)VDC. In the period Tα, the multilevel inverter 3 performs PWM control with voltages V1=+(1 / 3)VDC and V2=-(1 / 3)VDC. In the period Tα, the bidirectional switch S3 is always in a conductive state (S3 on), and the state of the switch element S1 being conductive (S1 on) and the switch element S2 being non-conductive (S2 off) is switched to the state of S1 off and S2 on. This controls the voltage at the rear stage of the reactor Lb to the target voltage VR. In the example shown in FIG. 3, in the PWM control in the period Tα, the triangular wave α that changes in the range of +(1 / 3)VDC≦V≦VDC at a constant cycle is compared with the target voltage VR. During the period when the triangular wave α is greater than the target voltage VR, S1 is controlled to be off and S2 is controlled to be on, and during the period when the triangular wave α is less than or equal to the target voltage VR, S1 is controlled to be on and S2 is controlled to be off. When S1 is off and S2 is on, V1=-(1 / 3)VDC is output. When S1 is on and S2 is off, V2=(1 / 3)VDC is output. The voltage at the rear stage of the reactor Lb, that is, the voltage at the input side of the rectifier circuit 2, switches between V1=(1 / 3)VDC and V2=-(1 / 3)VDC. By PWM controlling the periods of V1 and V2, the voltage at the rear stage of the reactor Lb becomes, on average, a phase voltage waveform of the voltage V'u. During the period Tα, no current is supplied to the DC output section (capacitor C3) of the rectifier circuit 2. During the period Tα, if the AC voltage at the rear stage of the reactor Lb is positive, a current flows from the line at the rear stage of the reactor Lb to the multilevel inverter 3. In the period Tα, when the AC voltage downstream of the reactor Lb is negative, the multilevel inverter 3 causes a current to flow into the line downstream of the reactor Lb. The voltage swing in this period Tα is (2 / 3) VDC.

[0034] [Period Tβ+] The mode of the period Tβ+ is implemented during a part of the period when the target voltage VR is VR>(1 / 3)VDC. During the period Tβ+, PWM control is performed with the output voltage VDC and the voltage V2=-(1 / 3)VDC. During the period Tβ+, the switching element S2 is always on and the switching element S1 is always off, and the bidirectional switch S3 is switched on and off. This controls the voltage at the rear stage of the reactor Lb to the target voltage VR. In the example shown in FIG. 3, the PWM control of the period Tβ+ compares the triangular wave β, which changes in the range of -(1 / 3)VDC≦V≦VDC at a constant cycle, with the target voltage VR. S3 is controlled to be on during the period when the triangular wave β>VR and off during the period when the triangular wave β≦VR. The voltage at the rear stage of the reactor Lb becomes the output voltage VDC of the rectifier circuit when S3 is on, and becomes V2=-(1 / 3)VDC when S3 is off. The voltage at the rear stage of reactor Lb switches between V2 = -(1 / 3)VDC and VDC. During period Tβ+, S3 is off and current is supplied to the DC output section of rectifier circuit 2. The voltage swing during this period Tβ+ is (4 / 3)VDC, which is twice the voltage swing during periods Tα and Tγ+. One of the purposes of providing period Tβ+ is to control the current flowing in and out of capacitors C1 and C2 (V1 and V2) so that the average over one period is zero.

[0035] [Period Tγ+] The mode of the period Tγ+ is performed during the remaining period of the period in which the target voltage VR is VR>(1 / 3)VDC, excluding the period Tβ+. During the period Tγ+, PWM control is performed with the output voltage VDC and the voltage V1=+(1 / 3)VDC. During the period Tγ+, the switch element S1 is always on and the switch element S2 is always off, and the bidirectional switch S3 is switched on and off. This controls the voltage at the rear stage of the reactor Lb to the target voltage VR. In the example shown in FIG. 3, the PWM control of the period Tγ+ compares the triangular wave β, which changes in the range of -(1 / 3)VDC≦V≦VDC at a constant cycle, with the target voltage VR. S3 is controlled to be on during the period in which the triangular wave γ>VR, and off during the period in which the triangular wave γ≦VR. The voltage at the rear stage of the reactor Lb becomes the output voltage VDC of the rectifier circuit when S3 is on, and becomes V1=(1 / 3)VDC when S3 is off. The voltage at the rear stage of the reactor Lb switches between V1 = (1 / 3) VDC and VDC. During the period Tγ+, S3 is in the off state and current is supplied to the DC output section of the rectifier circuit 2. The voltage swing during this period Tγ+ is (2 / 3) VDC.

[0036] [Period Tβ-] The mode of period Tβ- is implemented during a portion of the period when the target voltage VR is VR<-(1 / 3)VDC. During period Tβ-, PWM control is performed with a negative output voltage -VDC and voltage V1=+(1 / 3)VDC. The switch control during period Tβ- has the polarity of the target voltage VR reversed from that of the switch control during period Tβ+. During period Tβ-, S3 is off and current is supplied to the DC output section of the rectifier circuit 2. The voltage swing during this period Tβ- is (4 / 3)VDC.

[0037] [Period Tγ-] The mode for period Tγ- is implemented during the remaining period of time when the target voltage VR is VR<-(1 / 3)VDC, excluding period Tβ-. During period Tγ-, PWM control is performed with a negative output voltage -VDC and a voltage of V2=-(1 / 3)VDC. The switch control for period Tγ- has the polarity of the target voltage VR reversed from that of the switch control for period Tγ+. Even during period Tγ-, current is supplied to the DC output section of rectifier circuit 2 with S3 off. The voltage swing during this period Tγ- is (2 / 3)VDC.

[0038] As described above, during a period in which the AC voltage downstream of the reactor Lb is positive, the multilevel inverter 3 draws in a current from the line downstream of the reactor Lb but does not feed a current into the line. During a period in which the AC voltage downstream of the reactor Lb is negative, the multilevel inverter 3 feeds in a current to the line downstream of the reactor Lb but does not draw in a current from the line.

[0039] In the above PWM control, PWM control is performed using two voltages selected from the voltages V1 and V2 of the two power supply capacitors C1 and C2, the output voltage of the rectifier circuit 2, and the four positive and negative voltages (+VDC, -VDC). Within one AC cycle, the bidirectional switch S3 and switch elements S1 and S2 operate to switch between the two voltages used in PWM control according to the target voltage. This makes it possible to reduce the voltage swing of the PWM control as a whole. As a result, the reactor Lb can be made lighter.

[0040] In the example shown in Fig. 2, the PWM control voltage levels are four: -VDC, -(1 / 3)VDC, (1 / 3)VDC, and VDC. In the above example, the number of levels is thus four. By increasing the number of PWM control levels in one cycle to more than two, the voltage swing can be reduced. Note that in the above example, since there are Tβ+ and Tβ- periods with large amplitudes, the effective number of levels is less than four.

[0041] (Example of how the energy balance of the power supply unit is reduced to zero) The multilevel inverter 3 may be configured to equalize the charge and discharge amounts of the capacitors C1 and C2 in one AC cycle by feedback control of the voltages V1 and V2 of the capacitors C1 and C2. In other words, control can be performed to make the balance between the energy absorbed and released by the two power supply units, the capacitors C1 and C2, zero in one AC cycle.

[0042] In Figure 2, the period of each mode indicates whether current flows into or out of each capacitor C1, C2. "In" indicates inflow, and "out" indicates outflow. Note that the indication of current inflow and outflow in Figure 2 is an example under the condition that the phase of the voltage and current are the same. Focusing on capacitor C1 (V1), in the period when the target voltage VR is positive, current flows into C1 during periods Tα and Tγ. In the period when the target voltage VR is negative, current flows out of C1 during periods Tα and Tβ. Therefore, when V1 is smaller than the target value (for example, V1<(1 / 3)VDC), V1 can be increased by lengthening Tγ during the period when the target voltage VR is positive, or by reducing Tβ during the period when the target voltage VR is negative.

[0043] That is, the multilevel inverter 3 can adjust the period during which current flows into the capacitor C1 in one cycle to be longer when the detected voltage V1 is lower than the target value, and can adjust the period during which current flows into the capacitor C1 in one cycle to be shorter when the detected voltage V1 is higher than the target value.

[0044] Specifically, the multilevel inverter 3 may detect the voltages V1 and V2, and adjust the length of at least one of the periods Tγ+ and Tγ- based on the error (deviation) between the voltages V1 and V2 and the target values. That is, it is possible to control the error between the detected values ​​of V1 and V2 and their respective target values ​​(for example, ±(1 / 3)VDC) to be fed back to the ratio of Tβ and Tγ within one period. This makes it possible to stabilize the voltages V1 and V2 of the capacitors C1 and C2 as two power supply units.

[0045] FIG. 4 is a diagram showing an example of control that feeds back the errors of voltage V1 and V2 from their target values to the ratio of periods Tβ and Tγ. In the example of FIG. 4, the difference between the detected value of V1 and the target value of V1 is PI integrated to calculate a control value Vx. In PWM control, S1 to S3 are controlled such that the period during which the target voltage VR satisfies VR>0 and VR>Vx becomes the mode of period Tγ+. Also, the difference between the detected value of V2 and the target value of V2 is PI integrated to calculate a control value Vy. In PWM control, S1 to S3 are controlled such that the period during which the target voltage VR satisfies VR<0 and VR<Vy becomes the mode of period Tγ-. As a result, during the period when the target voltage VR is positive, if V1 is less than the target value, the period Tγ+ becomes longer, and if V1 is greater than the target value, the period Tγ+ becomes shorter. During the period when the target voltage VR is negative, if V2 is less than the target value, the period Tγ- becomes longer, and if V1 is greater than the target value, the period Tγ- becomes shorter. In the example shown in FIG. 4, V1 and V2 can be independently feedback controlled.

[0046] (Configuration example of the control unit) FIG. 5 is a diagram showing a configuration example of a control unit 6 that controls the above high power factor rectifier circuit 1. The control unit 6 generates signals S3s, S1s, and S2s for controlling the on / off of the bidirectional switch S3 and the switch elements S1 and S2, and supplies these signals to these switches. In this example, the control unit 6 supplies signals of the bidirectional switch S3 and the switch elements S1 and S2 for each of the three phases. The control unit 6 detects the AC currents Iu, Iv, Iw input to the high power factor rectifier circuit 1, the AC voltage Vw, the voltages V1 and V2 of the capacitors C1 and C2 of the multilevel inverter 3, and the output voltage 2VDC of the rectifier circuit 2, and inputs these detected values. The control unit 6 determines the target voltage VR using these detected values. The control unit 6 generates a PWM signal for controlling the AC voltage at the subsequent stage of the reactor Lb to the target voltage VR as the control signals S3s, S1s, and S2s of the switches, and outputs them to the switches S3, S1, and S2.

[0047] The control unit 6 determines the target voltages VRu, VRv, VRw based on the detected AC currents Iu, Iv, Iw and AC voltage Vw. The target voltages VRu, VRv, VRw are sine waves whose phases match those of the AC currents Iu, Iv, Iw. This allows high power factor control. The control unit 6 sets, for example, the phases and amplitudes of the target voltages VRu, VRv, VRw. The control unit 6 may also detect the output voltage 2VDC of the rectifier circuit 2, and further control the target voltages VRu, VRv, VRw so that the output voltage 2VDC of the rectifier circuit 2 becomes the target value.

[0048] In the example shown in FIG. 5, the control unit 6 has a coordinate conversion unit 61, a power factor control unit 62, a coordinate inverse conversion unit 65, a mode width control unit 64, and a PWM conversion unit 63. The coordinate conversion unit 61 converts the detected AC currents Iu, Iv, and Iw into a dq coordinate system. The power factor control unit (output voltage control unit) 62 controls the efficiency and output power based on the AC currents Id and Iq converted into the dq coordinate system. For example, target voltages VRd and VRq having a phase and amplitude of an AC sine wave for a high power factor are determined. In addition, the target voltage VRq may be a value that is feedback-controlled so that the output voltage 2DVC of the rectifier circuit 2 becomes a target value.

[0049] The AC voltage Vw is input to a PLL (phase locked loop), and the signal output from the PLL is supplied to a coordinate conversion unit 61 and a coordinate inverse conversion unit 65. A signal ω obtained by differentiating the output signal from the PPL is supplied to a power factor control unit (output voltage control unit) 62.

[0050] The target voltages VRd, VRq in the dq coordinate system are inversely converted by a coordinate inverse conversion unit 65 to become target voltages VRu, VRv, VRw in a three-phase coordinate system, which are then supplied to a PWM conversion unit 63 via a mode width control unit 64. The mode width control unit 64 calculates a control value Vx that feeds back an error between V1, V2 and the target value, as shown in FIG. 4, for example. The control value Vx is a value for controlling the length of the period Tγ, and is passed to the PWM conversion unit 63. The PWM conversion unit 63 generates PWM control signals for the switches S1 to S3 for achieving the target voltage VR, as shown in FIG. 3, for example.

[0051] (Simulation test results) Figure 6 is a waveform diagram showing the results of a simulation performed on a high power factor rectifier circuit with the same configuration as Figure 1. PSIM was used as the simulation tool. The results shown in Figure 6 show that the voltage / current power factor has been increased.

[0052] The high power factor rectifier circuit 1 of this embodiment is configured to connect a multilevel inverter 3 that can switch between voltages V1 and V2, which are approximately ±1 / 3 of the output voltage VDC, to the input side of the diode bridge of the rectifier circuit 2 through a bidirectional switch S3. This configuration makes it possible to perform PWM control at three voltage levels, namely, −(1 / 3)VDC and (1 / 3)VDC by the output of the multilevel inverter 3, and the output voltage VDC of the rectifier circuit when the bidirectional switch S3 is off. This PWM control makes it possible to control the current of the AC power source to be a sine wave that is in phase with the current through the reactor Lb. In this way, the high power factor rectifier circuit 1 of this embodiment can set the voltage level of the PWM control to three levels by the multilevel inverter 3 connected to the line between the rectifier circuit 2 and the reactor Lb through a bidirectional switch. This allows the reactor Lb to be made smaller and lighter. In addition, since the configuration is such that the multilevel inverter 3 is connected to the AC side, even if an arm breaks down, it is unlikely that a current will flow back to the AC side or a DC link will be short-circuited.

[0053] (Other variations) The present invention is not limited to the above embodiment. For example, a power source other than a capacitor may be used as the two power supply units of the multilevel inverter. The multilevel inverter may include two or more power supply units. Furthermore, the set values ​​of the voltages V1 and V2 of the two power supply units are not limited to the above +(1 / 3)VDC and -(1 / 3)VDC. In the above example, the high power factor rectifier circuit 1 is configured to receive three-phase AC, but the number of phases of the AC is not limited to three, and may be, for example, one phase, two phases, or four or more phases. In the example shown in FIG. 1 and FIG. 5, an EMI filter 4 is provided between the AC power source 5 and the reactor Lb. The EIM filter 4 may be omitted.

[0054] (Examples) The high power factor rectifier circuit of the present embodiment can be used in, for example, devices that require weight reduction, and can be suitably applied to, for example, an AC / DC converter of an electric aircraft. [Explanation of symbols]

[0055] 1: DCDC converter, 3: voltage source, 4: reactor, 5: control unit, 6: limiting circuit

Claims

1. a rectifier circuit including a diode bridge connected to an AC power supply via a reactor and a capacitor connected to an output side of the diode bridge; A high power factor rectifier circuit comprising: a multilevel inverter connected to a line between the reactor and the rectifier circuit via a bidirectional switch, the multilevel inverter including two power supply units and a switch element that switches between connection and disconnection of each of the two power supply units to the bidirectional switch.

2. 2. The high power factor rectifier circuit according to claim 1, A high power factor rectifier circuit, wherein each of the two power supply units of the multilevel inverter is formed with a capacitor.

3. 3. The high power factor rectifier circuit according to claim 1, A high power factor rectifier circuit in which the voltage at the input end of the diode bridge is controlled by the voltages V1, V2 of the two power supply units and the positive and negative output voltages (+VDC, -VDC) of the rectifier circuit.

4. A high power factor rectifier circuit according to any one of claims 1 to 3, A high power factor rectifier circuit in which one cycle of AC includes a mode in which the voltage at the input ends of the diode bridge is PWM controlled by the voltages V1 and V2 of the two power supply units, a mode in which the voltage at the input ends of the diode bridge is PWM controlled by the output voltage VDC and the voltage V1 of one power supply unit, and a mode in which the voltage at the input ends of the diode bridge is PWM controlled by the output voltage VDC and the voltage V2 of the other power supply unit.

5. 5. The high power factor rectifier circuit according to claim 4, A high power factor rectifier circuit in which the mode width is adjusted based on the voltages of the two power supply units so that the balance between the energy absorbed and the energy released by the two power supply units becomes zero during one cycle of AC.

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