Parallel control method of inverters
By obtaining the EPWM count value and RTC time value of the inverter, the master-slave relationship and CAN communication address of the inverter are automatically determined, which solves the problem of cumbersome and conflicts in the parallel process of traditional inverters, and simplifies operations and reduces communication conflicts.
Patent Information
- Application Number
- CN202510734271.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-04
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2045-06-04
AI Technical Summary
During the parallel connection of traditional inverters, the address setting is complicated and easy to conflict, resulting in system operation errors.
By obtaining the EPWM count value of the time base count register of the inverter and the RTC time value of the real-time clock, the controller local area network CAN communication expansion frame is determined, the master-slave relationship and communication address are automatically allocated, and the CAN communication expansion frame is calculated using the EPWM count value and RTC time value. The node with the smallest value in the arbitration address field is used as the host inverter.
It realizes automatic determination of the inverter master-slave relationship and automatic allocation of CAN communication addresses, avoids cumbersome operations of manual settings and reduces communication address conflicts.
Smart Images

Figure CN120281749A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the technical field of inverters, and particularly relates to a parallel control method for inverters. Background Art
[0002] Currently, the inverter is a very important part of the photovoltaic energy storage system. It can store the energy generated by the photovoltaic solar panels into the storage battery as an emergency power supply, or directly use it for household appliances. At the same time, it can sell the electric energy to the power grid during the energy peak period to obtain subsidies. In the case of striving for greater power, it can be achieved by purchasing an inverter with a greater power, but usually the price of purchasing an inverter with a greater power is higher. It is also possible to purchase multiple small-power inverters with preferential prices, and through superimposing the small-power inverters, use the inverter parallel technology to achieve the output of high-power electric energy. However, in this process, it is necessary to determine the relationship between the master and slave machines. Each inverter usually communicates with a Controller Area Network (CAN). Therefore, the addresses of each inverter cannot conflict. Only one host is allowed, and the number of slave machines that can be connected ranges from 0 to 255. The device addresses of all inverters are unique, and they work under the leadership of the host. Therefore, the confirmation of the master-slave relationship and the address allocation are particularly important.
[0003] In the parallel process of traditional inverters, most of them set a unique address through an address DIP switch or send the address through a display screen, and then determine the master-slave relationship between each inverter according to the size of the device address. At the same time, this address is used as the CAN communication address for communication. During the user's use, either there is an operation by a professional or an operation manual will be provided to explain how to set the address. And when setting, to avoid address conflicts, it is also necessary to know the addresses of other devices, making these operations very cumbersome and prone to accidental contact resulting in changes in the device address, thus causing the entire system to operate incorrectly. Summary of the Invention
[0004] The embodiment of this application provides a parallel control method for inverters, which can solve the problems of cumbersome operation and communication address conflicts caused by the traditional inverters often setting a unique address through a manual address DIP switch or sending the address through a display screen during the parallel operation.
[0005] In a first aspect, the embodiment of this application provides a parallel control method for inverters, and the method includes: After multiple inverters are powered on and start the parallel operation task, obtain the EPWM count value of the time base counter register in the multiple inverters and the RTC time value of the real-time clock; Based on the EPWM count value and the RTC time value, determine the Controller Area Network (CAN) communication extended frame of each inverter; Determine a master inverter and multiple slave inverters from the multiple inverters according to the CAN communication extended frame of each of the inverters; Allocate CAN communication addresses to the multiple slave inverters through the master inverter.
[0006] In a possible implementation manner of the first aspect, the CAN communication extended frame includes a CAN address value and a CAN data segment value; wherein, the CAN address value includes a CAN low - order extended frame address value, and the CAN data segment value includes a first data segment value and a second data segment value; The determining of the CAN communication extended frame of each inverter based on the EPWM count value and the RTC time value includes: Use the EPWM count value as the CAN low - order extended frame address value in the CAN address value; Use the RTC time value of the inverter as the first data segment value in the CAN data segment value; Set the second data segment value in the CAN data segment value to a preset segment value.
[0007] In a possible implementation manner of the first aspect, the determining of a master inverter and multiple slave inverters from the multiple inverters according to the CAN communication extended frame of each of the inverters includes: Sort the CAN low - order extended frame address values in the CAN address values of the multiple inverters in ascending order to obtain a sorting result corresponding to the multiple inverters; Determine the inverter corresponding to the CAN low - order extended frame address value ranked first in the sorting result as the master inverter, and determine the inverters corresponding to the remaining CAN low - order extended frame address values as the slave inverters.
[0008] In a possible implementation manner of the first aspect, the allocating of CAN communication addresses to the multiple slave inverters through the master inverter includes: After determining the master inverter and the multiple slave inverters, send a slave data frame to the slave inverters through the master inverter, where the slave data frame includes the CAN address value and the slave CAN data segment value of the slave inverter; Determine the CAN communication addresses of multiple slave inverters according to the CAN address value of the slave inverter and the slave CAN data segment value; wherein, the first data segment value in the CAN address value of the slave inverter and the slave CAN data segment value remains unchanged, and the second data segment value in the slave CAN data segment value is determined according to the size order of the CAN low - order extended frame address value of the slave inverter in the sorting result.
[0009] In a possible implementation manner of the first aspect, after determining the master inverter, when a second inverter is accessed again, the method includes: Receive the CAN low - order extended frame address value in the CAN communication extended frame of the second inverter through the master inverter; Compare the CAN low - order extended frame address value of the master inverter with the CAN low - order extended frame address value of the second inverter; If the CAN low - order extended frame address value of the master inverter is greater than the CAN low - order extended frame address value of the second inverter, determine the second inverter as the updated master inverter, and change the master inverter to a slave inverter; If the CAN low - order extended frame address value of the master inverter is less than the CAN low - order extended frame address value of the second inverter, determine the second inverter as a slave inverter, and the master inverter remains unchanged.
[0010] In a possible implementation manner of the first aspect, after determining the master inverter, when a third inverter and a fourth inverter are accessed simultaneously again, the method further includes: Receive the CAN communication extended frame of the third inverter and the CAN communication extended frame of the fourth inverter through the master inverter; If the CAN low - order extended frame address value in the CAN communication extended frame of the third inverter is the same as the CAN low - order extended frame address value in the CAN communication extended frame of the fourth inverter, compare the CAN data segment value in the CAN communication extended frame of the third inverter with the CAN data segment value in the CAN communication extended frame of the fourth inverter; If the first data segment value in the CAN data segment value of the third inverter is less than the first data segment value in the CAN data segment value of the fourth inverter, send a third slave data frame to the third inverter through the master inverter to determine the CAN communication address of the third inverter according to the third slave data frame; and send an address conflict data frame to the fourth inverter so that the fourth inverter changes the CAN low - order extended frame address value in the CAN communication extended frame of the fourth inverter according to the address conflict data frame.
[0011] In a possible implementation of the first aspect, after distributing CAN communication addresses to multiple slave inverters through the master inverter, the method includes: Generating a dynamic address table according to the master inverter, the multiple slave inverters, and the CAN communication addresses, where the dynamic address table includes the CAN communication address of the master inverter, the CAN communication addresses of the multiple slave inverters, and the address priorities of the multiple slave inverters.
[0012] In a possible implementation of the first aspect, after generating the dynamic address table, the method further includes: Sending the dynamic address table to the online slave inverters through the master inverter within a first preset time period, so that after receiving the dynamic address table, the online slave inverters can obtain their own address priorities according to the dynamic address table, and send reply information to the master inverter, where the reply information is used to indicate that the slave inverter is in an online state.
[0013] In a possible implementation of the first aspect, after sending the dynamic address table to the online slave inverters through the master inverter within the first preset time period, the method further includes: If the master inverter does not receive the reply information from the slave inverter, it is determined that the slave inverter is in an offline state, and the information of the slave inverter in the dynamic address table is cleared to obtain an updated dynamic address table.
[0014] In a possible implementation of the first aspect, after generating the dynamic address table, the method further includes: If the slave inverter does not receive the dynamic address table sent by the master inverter within a second preset time period, it is determined that the master inverter is in an offline state, and the slave inverter with the highest address priority is changed to a new master inverter.
[0015] In a second aspect, an embodiment of the present application provides a parallel control device for inverters, including: An acquisition module, configured to acquire the EPWM count value of the time base count register and the RTC time value in the multiple inverters after the multiple inverters are powered on and start the parallel operation task; A generation module, configured to determine the controller area network CAN communication extended frame of each inverter based on the EPWM count value and the RTC time value; A determination module, configured to determine a master inverter and multiple slave inverters from the multiple inverters according to the CAN communication extended frame of each inverter; A distribution module, configured to distribute CAN communication addresses to a plurality of slave inverters through the host inverter.
[0016] In a third aspect, an embodiment of the present application provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the parallel control method of the inverter described in any one of the above is implemented.
[0017] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, the parallel control method of the inverter described in any one of the above is implemented.
[0018] In a fifth aspect, an embodiment of the present application provides a computer program product, which when running on a terminal device causes the terminal device to execute the parallel control method of the inverter described in any one of the first aspects above.
[0019] The beneficial effects of the embodiments of the present application compared with the prior art are as follows: A parallel control method for an inverter provided by an embodiment of the present application includes: after a plurality of inverters are powered on and start a paralleling task, obtaining the EPWM count value of the time base counter register in the plurality of inverters and the RTC time value of the real-time clock. Then, based on the EPWM count value and the RTC time value, the controller area network CAN communication extended frame of each inverter is determined. Then, according to the CAN communication extended frame of each inverter, a host inverter and a plurality of slave inverters are determined from the plurality of inverters, and the CAN communication addresses are distributed to the plurality of slave inverters through the host inverter. By obtaining the EPWM count value and the RTC time value, calculating the CAN communication extended frame, and comparing the address fields in the CAN communication extended frame bit by bit at the physical layer through the CAN bus, the node with the smallest value in the arbitration address field wins and obtains the address allocation right, and at the same time, it is used as the host inverter, realizing the determination of the master-slave relationship of the inverters and the automatic allocation of CAN communication addresses, thus avoiding the cumbersome manual allocation of master-slave addresses and effectively reducing the conflict of communication addresses. Description of the Drawings
[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0021] Figure 1It is a schematic flowchart of a parallel control method for an inverter provided by an embodiment of the present application; Figure 2 It is a schematic flowchart of a parallel control method for an inverter provided by another embodiment of the present application; Figure 3 It is a schematic flowchart of a parallel control method for an inverter provided by another embodiment of the present application; Figure 4 It is a schematic flowchart of a parallel control method for an inverter provided by another embodiment of the present application; Figure 5 It is a schematic structural diagram of a parallel control device for an inverter provided by an embodiment of the present application; Figure 6 It is a schematic structural diagram of a terminal device provided by an embodiment of the present application. Detailed implementation manners
[0022] In the following description, specific details such as specific system structures and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present application. However, those skilled in the art should clearly understand that the present application can also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid unnecessary details from interfering with the description of the present application.
[0023] It should be understood that when used in the specification and appended claims of the present application, the term "comprising" indicates the presence of the described features, wholes, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their combinations.
[0024] It should also be understood that the term "and / or" as used in the specification and appended claims of the present application refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.
[0025] As used in the specification and appended claims of the present application, the term "if" can be interpreted as "when", "once", "in response to a determination", or "in response to a detection" according to the context. Similarly, the phrase "if a determination is made" or "if [the described condition or event] is detected" can be interpreted as meaning "once a determination is made", "in response to a determination", "once [the described condition or event] is detected", or "in response to a detection of [the described condition or event]" according to the context.
[0026] In addition, in the description of the specification and the appended claims of the present application, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be construed as indicating or implying relative importance.
[0027] The reference to "one embodiment" or "some embodiments" etc. described in the specification of the present application means that in one or more embodiments of the present application, the specific features, structures or characteristics described in connection with that embodiment are included. Thus, the statements "in one embodiment", "in some embodiments", "in other some embodiments", "in still other embodiments", etc. that appear in different places in this specification do not necessarily all refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "comprising", "including", "having" and their variants all mean "including but not limited to", unless otherwise specifically emphasized in other ways.
[0028] Please refer to Figure 1 , Figure 1 which is a schematic flow chart of a parallel control method for an inverter provided by an embodiment of the present application. The method includes: S11. After multiple inverters are powered on and start the paralleling task, obtain the EPWM count values in the time base count registers of the multiple inverters and the RTC time values of the real-time clock.
[0029] S12. Based on the EPWM count values and the RTC time values, determine the controller area network (CAN) communication extended frames of each inverter.
[0030] S13. According to the CAN communication extended frames of each inverter, determine a master inverter and multiple slave inverters from the multiple inverters.
[0031] S14. Assign CAN communication addresses to the multiple slave inverters through the master inverter.
[0032] It should be noted that this method can be applied to the parallel system of inverters to control the parallel process of inverters. Among them, the parallel system of inverters is a system in which multiple inverters are connected electrically or communicatively so that they work together to supply power to a load or output electric energy to the power grid. That is, after multiple inverters are paralleled, the output ends are directly connected to the same load or power grid to form a distributed power network sharing the output voltage and current. The reliability, flexibility and efficiency of the parallel system of inverters can be improved through redundant design, capacity expansion or load balancing, etc.
[0033] It should be noted that in this embodiment, the execution subject can be a terminal device such as a server, and no specific limitation is made thereto.
[0034] In a parallel system of inverters, it is usually necessary to control the enhanced pulse width modulator (EPWM). At the same time, the real-time clock (RTC) is also essential. The enhanced pulse width modulator is a peripheral module that generates complex pulse width modulation signals. The real-time clock is an independent timing module in the system, which can provide a high-precision time reference for timestamping or synchronization operations. The EPWM count value can be combined to eliminate the influence of clock drift of different inverters and ensure accurate time synchronization. Therefore, in this embodiment, the EPWM count value of the enhanced pulse width modulator and the RTC time value of the real-time clock can be combined to implement the master-slave relationship of inverter paralleling and the automatic allocation of CAN communication addresses of the Controller Area Network (CAN).
[0035] It should be noted that when the system is running, functions such as EPWM and CAN of the system will be initialized. For example, EPWM is configured, its frequency is set to a certain preset frequency (such as 20KHz), and the up / down counting method is used. After the initialization of EPWM, the time base synchronization clock (TBCLK) is immediately turned on. Among them, the time base synchronization clock is the peripheral working clock of EPWM. RTC also starts after initialization. At the same time, the CAN communication is configured as an extended frame (for example, the extended frame has 29 bits). The CAN mailbox with a smaller number has a higher priority, and the receive mailbox number and send mailbox number are configured according to the actual situation.
[0036] The Controller Area Network (CAN) is a serial communication protocol bus for real-time applications. The CAN bus usually sends data in the form of messages, and the data transmission is usually carried out through frames, that is, the CAN communication extended frame. The CAN communication extended frame can identify the type and priority of the message. Through the arbitration of the identifier in the CAN communication extended frame, the collision problem of bus access can be solved to ensure that neither the message nor the time is lost.
[0037] On the CAN bus, the communication between devices adopts the broadcast communication method, sending data from one node to another node. When a node wants to send data, the data to be sent and the identifier are sent to the CAN chip of this node to make it enter the preparation stage. Once the CAN chip receives the bus allocation, it enters the stage of sending the message and sends the data to be sent in the specified message format (that is, the CAN communication extended frame). At this time, other nodes in the network are all in the receiving stage, detecting the received message to judge whether the message is sent to itself.
[0038] Generally, such a parallel system of complex inverters operates on a real-time operating system (such as MicroC / OS-II), which includes basic functions such as task scheduling, task management, time management, memory management, and communication and synchronization between tasks. Assume that multiple tasks are scheduled to run in this system. When the task switches to the paralleling task, the system immediately obtains the count value of the time base counter register, that is, the EPWM count value (EPwm1Regs.TBCTR) and the RTC time value of the real-time clock at this time, and saves these two values.
[0039] Among them, the EPWM count value is the value obtained by counting the clock signal of the time base synchronization clock of the peripheral clock of EPWM under a specific time base. The range of the EPWM count value is generally from 0 to the period value of the time base synchronization clock. The RTC time value is the time of the timing clock RTC.
[0040] It should be noted that the EPWM count value and the RTC time value are generally updated in these three cases, that is: (1) After the inverter is powered on, when the program runs to the paralleling task, it is obtained once; (2) When the inverter exits paralleling and then reconnects to the paralleling system, the identification is initialized again and obtained again; (3) When the unique identifiers between inverters conflict and random value processing is required, it needs to be obtained again. In other cases except the above three cases, the EPWM count value and the RTC time value will not change, so as to achieve the unique identification of the inverter.
[0041] Because there are multiple tasks switching and running in the parallel system of the inverter, when a task with a higher priority is in the ready state, preemptive operation will be performed, and there are also various interrupts occurring during the system operation, resulting in different timings from when each inverter is powered on to when the time is read, so the RTC time obtained is also different. Therefore, in this embodiment, the probability that the EPWM count values of each inverter are the same is extremely small, and the RTC time values of each inverter are also different. Furthermore, the EPWM count value and the RTC time value can be used as the unique identifier of each inverter.
[0042] Assume that the control chip frequency in the parallel system of inverters is 90M, the frequency of EPWM is 20KHz, and the calculation method for increase and decrease. The count in one period of EPWM is from 0 to 2250. The binary number corresponding to 2250 is 100011001010, which is 12 bits in total. In the RTC time value, minutes range from 0 - 59, and the binary of 59 is 111011; seconds range from 0 - 59, and the binary of 59 is 111011. The maximum combination of minutes and seconds is 111011111011, which is 12 bits in total. Assume there are global variables g_CanIdValue and g_RtcData, then g_CanIdValue = EPwm1Regs.TBCTR, g_RtcData = RTC time value. The EPWM count value and RTC time value are saved through the global variables g_CanIdValue and g_RtcData.
[0043] Further, in step S12, the CAN communication extended frame includes a CAN address value and a CAN data segment value; among them, the CAN address value includes a CAN low - level extended frame address value, and the CAN data segment value includes a first data segment value and a second data segment value.
[0044] Based on the EPWM count value and the RTC time value, determining the controller area network CAN communication extended frame of each inverter includes: Taking the EPWM count value as the CAN low - level extended frame address value in the CAN address value.
[0045] Taking the RTC time value of the inverter as the first data segment value in the CAN data segment value.
[0046] Setting the second data segment value in the CAN data segment value to a preset segment value.
[0047] Multiple inverters will broadcast an address data frame carrying the unique device identifier after power - on, that is, the CAN communication extended frame. In this embodiment, the structure of the CAN communication extended frame contains a 32 - bit CAN address value (CANID) and an 8 - byte CAN data segment value. Among them, bits 0 - 15 of the CAN address value are the CAN low - level extended frame address value, bits 16 - 17 are the CAN high - level extended frame address value, and bits 18 - 28 are the CAN standard frame address value, as shown in the following code. Among them, the CAN low - level extended frame address value can be used to identify the inverter.
[0048] The structure of the CAN communication extended frame is as follows: typedef union { uint32_t CanId; struct { uint16_t EXTMSGID_L:16; / / 15:0 uint16_t EXTMSGID_H:2; / / 17:16 uint16_t STDMSGID:11; / / 28:18 uint16_t AAM:1; / / 29 uint16_t AME:1; / / 30 uint16_t IDE:1; / / 31 }BIT; } sTCanId; sTCanId g_canId;
[0049] The CAN address value (CanId = g_canId.CanId) can be used as the unique device identifier for each inverter. That is, g_canId.BIT.EXTMSGID_L = g_CanIdValue = EPwm1Regs.TBCTR.
[0050] In this embodiment, the format of the CAN communication extended frame is: CAN address value + CAN data segment value, that is: CANID + (uint16_t)data0 + (uint16_t)data1 + (uint16_t)data2 + (uint16_t)data3; CANID = g_canId.CanId; data0 = g_RtcData; data1 = 0x00; data2 = 0x00; data3 = 0x00.
[0051] Among them: CANID represents the CAN address value; data0~data3 represent the CAN data segment values.
[0052] In this embodiment, based on the EPWM count value and the RTC time value, the specific process of determining the CAN communication extended frame of each inverter is as follows: Use the EPWM count value (EPwm1Regs.TBCTR) of the inverter as the CAN low - order extended frame address value (g_canId.BIT.EXTMSGID_L) in the CAN address value, that is, the CAN low - order extended frame address value is equal to the EPWM count value, which means g_canId.BIT.EXTMSGID_L = EPwm1Regs.TBCTR. Use the RTC time value (g_RtcData) of the inverter as the first data segment value (data0) in the CAN data segment value, that is, data0 = g_RtcData; and set the second data segment value (data1) in the CAN data segment value to a preset segment value. The preset segment value is a preset numerical value, for example, it can be data1 = 0x00.
[0053] Further, in step S13, after determining the CAN communication extended frame of each inverter, one master inverter and multiple slave inverters can be determined from multiple inverters according to the CAN communication extended frame of each inverter, including: Sort the CAN low - order extended frame address values in the CAN address values of multiple inverters in ascending order to obtain the sorting results corresponding to multiple inverters.
[0054] Determine the inverter corresponding to the CAN low - order extended frame address value ranked first in the sorting result as the master inverter, and determine the inverters corresponding to the remaining CAN low - order extended frame address values as slave inverters.
[0055] The master inverter is the inverter responsible for global control functions such as task scheduling, parameter synchronization, and fault summary in the parallel system of inverters. For example, in a photovoltaic system, the master inverter can coordinate the maximum power point tracking strategies of multiple slave inverters, etc. In this embodiment, the master inverter can send control instructions to the slave inverters through the CAN bus and receive the feedback of the status information of the slave inverters. The slave inverter is other inverters in the parallel system of inverters except the master inverter, which can execute the tasks issued by the master inverter and feedback the status information to the master inverter.
[0056] Specifically, first, extract the CAN low - order extended frame address value in the CAN address value of each inverter; then, sort the CAN low - order extended frame address values of each inverter in ascending order to obtain a sorting result. Finally, use the inverter corresponding to the CAN low - order extended frame address value ranked first in the sorting result as the master inverter, that is, the inverter with the minimum CAN low - order extended frame address value is the master inverter. Then, the remaining inverters are slave inverters.
[0057] Further, the inverters corresponding thereto can be sequentially determined as slave inverter 1, slave inverter 2, etc. in the order of the CAN low - order extended frame address values in the sorting result.
[0058] It should be understood that address sorting can ensure that the master - slave roles are unique and fixed, avoiding system chaos caused by competition. Moreover, the rule of giving priority to the smallest address is simple and efficient, without the need for an additional negotiation protocol.
[0059] In step S14, after determining a master inverter and multiple slave inverters from multiple inverters, the master inverter can allocate CAN communication addresses to the multiple slave inverters. Among them, the CAN communication address is the address used to identify nodes in the CAN network. In this embodiment, it can be used as the address of each slave inverter so that each slave inverter can know its slave role.
[0060] Further, allocating CAN communication addresses to multiple slave inverters by the master inverter includes: After determining the master inverter and multiple slave inverters, the master inverter sends a slave data frame to the slave inverters. The slave data frame includes the CAN address value of the slave inverter and the slave CAN data segment value.
[0061] Determine the CAN communication addresses of the multiple slave inverters according to the CAN address value of the slave inverter and the slave CAN data segment value. Among them, the first data segment value in the CAN address value of the slave inverter and the slave CAN data segment value remains unchanged, and the second data segment value in the slave CAN data segment value is determined according to the order of the CAN low - order extended frame address values of the slave inverters in the sorting result.
[0062] The slave data frame is a CAN data frame sent by the master inverter to the slave inverters, and this slave data frame contains the CAN address value of the slave inverter and the slave CAN data segment value. Among them, the CAN address value of the slave inverter is the CAN ID of the slave inverter and remains unchanged; the first data segment value in the slave CAN data segment value is the RTC value of the slave inverter and also remains unchanged. However, the second data segment value in the slave CAN data segment value changes. The second data segment value in the slave CAN data segment value of the slave inverter can be determined according to the sorting result obtained by sorting the CAN low - order extended frame address values of each inverter in ascending order, that is, determined according to the order of the CAN low - order extended frame address values of the slave inverters in the sorting result.
[0063] For example, there are three inverters, namely inverter 101, inverter 102, and inverter 103. The sorting of the CAN low - extended frame address values of the three inverters is: inverter 101 < inverter 102 < inverter 103. The second data segment values in the CAN data segments of the three inverters are all initial values (e.g., data1 = 0x00). After starting the parallel operation task, it can be determined that inverter 101 is the master inverter, and inverter 102 and inverter 103 are slave inverters. At this time, the second data segment values in the CAN data segments of inverter 102 and inverter 103 are the second data segment values in the slave CAN data segments. Then, the second data segment value data1 in the slave CAN data segment of inverter 102 is 0x01, and the second data segment value data1 in the slave CAN data segment of inverter 103 is 0x02.
[0064] After determining the master inverter and the slave inverters, the master inverter will assign a unique CAN ID, that is, the CAN communication address, to each slave inverter, and then send the CAN communication address to the corresponding slave inverter so that the slave inverter can know its own slave role and communication address. After receiving the CAN communication address sent by the master inverter, the slave inverter will also configure its local CAN controller according to the CAN communication address, and then send feedback information to the master inverter.
[0065] It should be understood that by keeping the CAN address value and the first data segment value of the slave inverter unchanged, a stable identification basis is provided for the system, and the second data segment value can be dynamically adjusted according to actual needs, thereby improving the flexibility of the system.
[0066] As Figure 2 shown, Figure 2 is a schematic flowchart of a parallel control method for an inverter provided in another embodiment of the present application. As Figure 2In it, first, the system is initialized; after that, the EPWM count value (EPwm1Regs.TBCTR) and RTC time value of the inverter are obtained, and an extended CAN communication frame of the inverter is formed according to the EPWM count value and RTC time value, and the extended CAN communication frame is sent to the CAN bus; then, the value of g_canId.BIT.EXTMSGID_L in the extended CAN communication frame is compared; if the value of g_canId.BIT.EXTMSGID_L does not conflict, the master-slave relationship of the inverter can be determined (that is, the master inverter and slave inverter are determined), and then the CAN communication address of each inverter is determined; if the value of g_canId.BIT.EXTMSGID_L conflicts, according to the pre-set conditions, a random value is added to the value of g_canId.BIT.EXTMSGID_L to change its extended CAN communication frame, and it is sent to the CAN bus, and then the CAN communication address of each inverter is determined.
[0067] It should be noted that a parallel control method for an inverter provided in this embodiment can be applied to various scenarios. For example, this method can be applied to a photovoltaic power generation system to improve power generation efficiency; it can also be applied to a battery energy storage system to achieve flexible allocation of charge and discharge power; it can also be applied to an electric vehicle charging pile to balance the charging voltage of the battery pack by outputting a large current.
[0068] It can be understood that a parallel control method for an inverter provided in an embodiment of this application includes: after multiple inverters are powered on and start the paralleling task, the EPWM count value of the time base counter register and the RTC time value in the multiple inverters are obtained. After that, based on the EPWM count value and RTC time value, the extended CAN communication frame of each inverter is determined. Then, according to the extended CAN communication frame of each inverter, a master inverter and multiple slave inverters are determined from the multiple inverters, and the CAN communication address is allocated to the multiple slave inverters by the master inverter. By obtaining the EPWM count value and RTC time value, calculating the extended CAN communication frame, and comparing the address fields in the extended CAN communication frame bit by bit at the physical layer through the CAN bus, the node with the smallest value in the arbitration address field wins and obtains the address allocation right, and at the same time, it is used as the master inverter, realizing the determination of the master-slave relationship of the inverter and the automatic allocation of the CAN communication address, thus avoiding the tediousness of manually allocating the master-slave addresses and effectively reducing the conflict of communication addresses.
[0069] In a possible implementation manner, after the master inverter is determined, when the second inverter is connected again, the method includes: Receiving the CAN low-bit extended frame address value in the extended CAN communication frame of the second inverter through the master inverter.
[0070] Compare the CAN low extended frame address value of the host inverter with the CAN low extended frame address value of the second inverter.
[0071] If the CAN low extended frame address value of the host inverter is greater than the CAN low extended frame address value of the second inverter, determine that the second inverter is the updated host inverter, and change the host inverter to a slave inverter.
[0072] If the CAN low extended frame address value of the host inverter is less than the CAN low extended frame address value of the second inverter, determine that the second inverter is a slave inverter, and the host inverter remains unchanged.
[0073] As Figure 3 shown, Figure 3 is a schematic flowchart of a parallel control method for an inverter provided in another embodiment of the present application. Figure 3 In the parallel system of inverters, after the host inverter (such as host inverter A) has been determined, when the second inverter (such as inverter B) is connected again, inverter B will send its own CAN communication extended frame on the CAN bus when it is powered on. At this time, host inverter A receives the CAN communication extended frame of inverter B, extracts the CAN low extended frame address value (g_canId.BIT.EXTMSGID_L) in the CAN communication extended frame of inverter B, and then arbitrates the CAN low extended frame address value of host inverter A and the CAN low extended frame address value of inverter B, that is, compares the EPWM count value of host inverter A with the EPWM count value of inverter B.
[0074] Specifically: If the CAN low extended frame address value of host inverter A is greater than the CAN low extended frame address value of inverter B, determine that inverter B is the updated host inverter B, and change host inverter A to a slave inverter A. At the same time, host inverter B sends a slave data frame to slave inverter A; if the CAN low extended frame address value of host inverter A is less than the CAN low extended frame address value of inverter B, host inverter A continues to be the host inverter, determine inverter B as slave inverter B, and at the same time, host inverter A sends a slave data frame to slave inverter B.
[0075] It should be noted that when multiple inverters are connected subsequently, if they are all slave inverters, the number of slave inverters is incremented by 1 in sequence, that is, the second data segment values of the slave inverters are incremented by 1 in sequence. Continuing with the above example, if the second data segment value data1 of slave inverter B is 0x01, and the subsequently connected inverter C is still a slave inverter, then the second data segment value data1 of slave inverter C is 0x02, and so on. The address priority of the slave inverter can also be determined through the second data segment value.
[0076] In a possible implementation manner, after determining the master inverter, when the third inverter and the fourth inverter are connected simultaneously again, the method further includes: Receiving the CAN communication extended frame of the third inverter and the CAN communication extended frame of the fourth inverter through the master inverter.
[0077] If the CAN low - order extended frame address value in the CAN communication extended frame of the third inverter is the same as the CAN low - order extended frame address value in the CAN communication extended frame of the fourth inverter, then compare the CAN data segment value in the CAN communication extended frame of the third inverter with the CAN data segment value in the CAN communication extended frame of the fourth inverter.
[0078] If the first data segment value in the CAN data segment value of the third inverter is less than the first data segment value in the CAN data segment value of the fourth inverter, then send a third slave data frame to the third inverter through the master inverter to determine the CAN communication address of the third inverter according to the third slave data frame; and send an address conflict data frame to the fourth inverter so that the fourth inverter changes the CAN low - order extended frame address value in the CAN communication extended frame of the fourth inverter according to the address conflict data frame.
[0079] As Figure 4 shown, Figure 4 is a schematic flow chart of a parallel control method for an inverter provided by another embodiment of the present application. Figure 4In a parallel system of inverters, after the host inverter (such as host inverter A) is determined, when the third inverter (such as inverter C) and the fourth inverter (such as inverter D) are connected again at the same time, inverter C and inverter D will send their own CAN communication extended frames on the CAN bus when powered on. At this time, host inverter A can receive the CAN communication extended frame of inverter C and the CAN communication extended frame of inverter D at the same time, and extract the CAN low extended frame address value (represented by g_canId.BIT.EXTMSGID_LC) in the CAN communication extended frame of inverter C and the CAN low extended frame address value (represented by g_canId.BIT.EXTMSGID_LD) in the CAN communication extended frame of inverter D; since inverter C and inverter D are powered on at the same time, so, g_canId.BIT.EXTMSGID_LC of inverter C is the same as g_canId.BIT.EXTMSGID_LD of inverter D, that is, the EPWM count values of inverter C and inverter D are the same, and at this time the addresses of inverter C and inverter D conflict; then, compare the CAN data segment value in the CAN communication extended frame of inverter C with the CAN data segment value in the CAN communication extended frame of inverter D, that is, compare the RTC time value of inverter C with the RTC time value of inverter D. It should be noted that in this embodiment, inverter A remains the host inverter, and the number of simultaneously connected inverters can be more than two, and more inverters can also be connected simultaneously. Here, only the example of connecting two inverters simultaneously is used for illustration.
[0080] Specifically: If the first data segment value in the CAN data segment value of inverter C (denoted as data0C) is less than the first data segment value in the CAN data segment value of inverter D (denoted as data0D), that is, the RTC time value of inverter C is less than the RTC time value of inverter D, then the host inverter A sends a third slave data frame to inverter C to determine the CAN communication address of inverter C; at the same time, the host inverter A performs an address modulo operation and adds it to the address of inverter D, and the operation value is used as the data segment content to send an address conflict data frame (such as data = 0xFF) from the host inverter A to inverter D. After inverter D receives the address conflict data frame, it changes the CAN low-order extended frame address value in the CAN communication extended frame of inverter D according to the address conflict data frame, so that the address of inverter D no longer conflicts with the address of inverter C. Correspondingly, if the first data segment value in the CAN data segment value of inverter C (denoted as data0C) is greater than the first data segment value in the CAN data segment value of inverter D (denoted as data0D), then the host inverter A sends a slave data frame to inverter D to determine the CAN communication address of inverter D; at the same time, after the host inverter A performs a modulo operation, it sends an address conflict data frame (such as data = 0xFF) to inverter C. After inverter C receives the address conflict data frame, it changes the CAN low-order extended frame address value in the CAN communication extended frame of inverter C according to the address conflict data frame, so that the address of inverter C no longer conflicts with the address of inverter D.
[0081] It should be noted that when the inverter receives the address conflict data frame, it parses it, and can randomly change the CAN low-order extended frame address value according to g_canId.BIT.EXTMSGID_L += g_canId.BIT.EXTMSGID_L % 16. After the inverter changes the CAN low-order extended frame address value, it will resend its updated CAN communication extended frame and continue to determine the master-slave relationship and the CAN communication address.
[0082] In a possible implementation manner, after the host inverter distributes CAN communication addresses to multiple slave inverters, the method includes: Generate a dynamic address table according to the host inverter, multiple slave inverters, and CAN communication addresses, where the dynamic address table includes the CAN communication address of the host inverter, the CAN communication addresses of multiple slave inverters, and the address priorities of multiple slave inverters.
[0083] Such as Figure 3 、 Figure 4As shown, after determining the master inverter and slave inverters, the master inverter assigns a unique CAN ID, i.e., the CAN communication address, to each slave inverter, and then sends the CAN communication address to the corresponding slave inverter so that the slave inverter can know its own slave role and communication address; after receiving the CAN communication address sent by the master inverter, the slave inverter also configures its local CAN controller according to the CAN communication address, and then sends feedback information to the master inverter. At this time, the master inverter saves the CAN communication address of each inverter, the content in the data segment, etc. in the established dynamic address table (similar to a heartbeat packet), and the CAN communication address of the master inverter, the CAN communication addresses of multiple slave inverters, the address priorities of multiple slave inverters, etc. can be obtained from the dynamic address table.
[0084] Among them, the address structure form in the dynamic address table is as follows: typedef struct { uint16_t uCanIdAddr; uint16_t uCanIdpriority; }tsCanAddrInfo;
[0085] Assume that the maximum number of parallel inverters is 10. Then, the form of the dynamic address table is as follows: tsCanAddrInfo CanAddrTable
[10] = { {0x0000, 0x0000}, {0x0000, 0x0000}, ....... {0x0000, 0x0000} };
[0086] It should be understood that by establishing a dynamic address table, the communication addresses and associated information of each slave inverter can be maintained in real time.
[0087] In a possible implementation, after generating the dynamic address table, the method further includes: Sending the dynamic address table to the online slave inverters through the master inverter in the first preset time period, so that after receiving the dynamic address table, the online slave inverters can obtain their own address priorities according to the dynamic address table, and send reply information to the master inverter, where the reply information is used to indicate that the slave inverter is in an online state.
[0088] The first preset time period is a preset period of time. After generating the dynamic address table, the host inverter will send the dynamic address table to the online slave inverters at regular intervals (i.e., the first preset time period); after receiving the dynamic address table, the slave inverters will send a reply message to the host inverter, so that the host inverter can know that the slave inverter is in the online state. At the same time, the slave inverter can also know its own address priority through the dynamic address table.
[0089] In a possible implementation manner, after sending the dynamic address table to the online slave inverters through the host inverter in the first preset time period, the method further includes: If the host inverter does not receive the reply message from the slave inverter, it is determined that the slave inverter is in the offline state, and the information of the slave inverter in the dynamic address table is cleared to obtain an updated dynamic address table.
[0090] Furthermore, if a slave inverter is in the offline state, at this time, the host inverter will not receive the reply message from the slave inverter, so that the host inverter can determine that the slave inverter is in the offline state. Furthermore, the host inverter will delete the information about the slave inverter in the dynamic address table to obtain an updated dynamic address table.
[0091] It should be understood that by deleting the information of the slave inverter in the offline state, the dynamic address table can be in a real-time update state, and the slave inverters in the system can be managed in real time.
[0092] In a possible implementation manner, after generating the dynamic address table, the method further includes: If the slave inverter does not receive the dynamic address table sent by the host inverter within the second preset time period, it is determined that the host inverter is in the offline state, and the slave inverter with the highest address priority is changed to a new host inverter.
[0093] The second preset time period is a preset time period. The second preset time period can be the same as or different from the first preset time period. When the slave inverter has not received the dynamic address table sent by the host inverter within the second preset time period, it can be determined that the host inverter is offline. Since the slave inverter knows its own address priority, the slave inverter with the highest address priority automatically becomes the host inverter, that is, becomes the new host inverter.
[0094] It should be understood that by upgrading the slave inverter with the highest address priority to the host inverter, the new host inverter can re-establish the dynamic address table, restore communication with other slave inverters, and execute the control logic of the original host inverter, so that the parallel system of the inverters can operate stably.
[0095] It should be understood that the magnitudes of the sequence numbers of the steps in the above embodiments do not imply the order of execution. The order of execution of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
[0096] A parallel control method for an inverter corresponding to the above embodiments Figure 5 The structural schematic diagram of a parallel control device for an inverter provided by an embodiment of the present application is shown. For the sake of convenience of description, only the parts related to the embodiments of the present application are shown.
[0097] Referring to Figure 5 , the parallel control device 3 of the inverter in this embodiment includes: An acquisition module 31, configured to acquire the EPWM count value of the time base counter register and the RTC time value in a plurality of inverters after the plurality of inverters are powered on and start the paralleling task.
[0098] A generation module 32, configured to determine the controller area network CAN communication extended frame of each inverter based on the EPWM count value and the RTC time value.
[0099] A determination module 33, configured to determine a master inverter and a plurality of slave inverters from the plurality of inverters according to the CAN communication extended frame of each inverter.
[0100] An allocation module 34, configured to allocate CAN communication addresses to the plurality of slave inverters through the master inverter.
[0101] It can be understood that for a parallel control device for an inverter provided in this embodiment, after the parallel control device 3 of the inverter acquires the EPWM count value of the time base counter register and the RTC time value in a plurality of inverters through the acquisition module 31 after the plurality of inverters are powered on and start the paralleling task. Then, the generation module 32 determines the controller area network CAN communication extended frame of each inverter based on the EPWM count value and the RTC time value. Then, the determination module 33 determines a master inverter and a plurality of slave inverters from the plurality of inverters according to the CAN communication extended frame of each inverter, and the allocation module 34 allocates CAN communication addresses to the plurality of slave inverters through the master inverter. The parallel control device 3 of the inverter calculates the CAN communication extended frame by acquiring the EPWM count value and the RTC time value, compares the address fields in the CAN communication extended frame bit by bit at the physical layer through the CAN bus, and the node with the smallest value in the arbitration address field wins and obtains the address allocation right, and at the same time uses it as the master inverter, realizing the determination of the master-slave relationship of the inverter and the automatic allocation of the CAN communication address, thus avoiding the cumbersome manual allocation of the master-slave machine addresses and effectively reducing the conflict of communication addresses.
[0102] Furthermore, the CAN communication extended frame includes a CAN address value and a CAN data segment value; among them, the CAN address value includes a CAN low - order extended frame address value, and the CAN data segment value includes a first data segment value and a second data segment value.
[0103] The generating module 32 specifically includes: The first generating subunit is configured to use the EPWM count value as the CAN low - order extended frame address value in the CAN address value.
[0104] The second generating subunit is configured to use the RTC time value of the inverter as the first data segment value in the CAN data segment value.
[0105] The third generating subunit is configured to set the second data segment value in the CAN data segment value to a preset segment value.
[0106] Furthermore, the determining module 33 specifically includes: The sorting subunit is configured to sort the CAN low - order extended frame address values in the CAN address values of multiple inverters in ascending order to obtain the sorting results corresponding to the multiple inverters.
[0107] The determining subunit is configured to determine the inverter corresponding to the CAN low - order extended frame address value ranked first in the sorting result as the master inverter, and determine the inverters corresponding to the remaining CAN low - order extended frame address values as slave inverters.
[0108] Furthermore, the allocating module 34 specifically includes: The first allocating subunit is configured to, after determining the master inverter and multiple slave inverters, send a slave data frame from the master inverter to the slave inverters, where the slave data frame includes the CAN address value of the slave inverter and the slave CAN data segment value.
[0109] The second allocating subunit is configured to determine the CAN communication addresses of multiple slave inverters according to the CAN address value of the slave inverter and the slave CAN data segment value; among them, the first data segment value in the CAN address value of the slave inverter and the slave CAN data segment value remains unchanged, and the second data segment value in the slave CAN data segment value is determined according to the size order of the CAN low - order extended frame address values of the slave inverters in the sorting result.
[0110] Furthermore, after determining the master inverter, when a second inverter is connected again, the parallel control device 3 of the inverter includes: The first receiving subunit is configured to receive the CAN low - order extended frame address value in the CAN communication extended frame of the second inverter through the master inverter.
[0111] The first comparison subunit is configured to compare the CAN low extended frame address value of the host inverter with the CAN low extended frame address value of the second inverter.
[0112] The first determination subunit is configured to, if the CAN low extended frame address value of the host inverter is greater than the CAN low extended frame address value of the second inverter, determine the second inverter as the updated host inverter and change the host inverter to a slave inverter.
[0113] The second determination subunit is configured to, if the CAN low extended frame address value of the host inverter is less than the CAN low extended frame address value of the second inverter, determine the second inverter as a slave inverter and keep the host inverter unchanged.
[0114] Further, after determining the host inverter, when the third inverter and the fourth inverter are connected again at the same time, the parallel control device 3 of the inverters includes: The second receiving subunit is configured to receive the CAN communication extended frame of the third inverter and the CAN communication extended frame of the fourth inverter through the host inverter.
[0115] The second comparison subunit is configured to, if the CAN low extended frame address value in the CAN communication extended frame of the third inverter is the same as the CAN low extended frame address value in the CAN communication extended frame of the fourth inverter, compare the CAN data segment value in the CAN communication extended frame of the third inverter with the CAN data segment value in the CAN communication extended frame of the fourth inverter.
[0116] The second determination subunit is configured to, if the first data segment value in the CAN data segment value of the third inverter is less than the first data segment value in the CAN data segment value of the fourth inverter, send a third slave data frame to the third inverter through the host inverter to determine the CAN communication address of the third inverter according to the third slave data frame; and send an address conflict data frame to the fourth inverter to enable the fourth inverter to change the CAN low extended frame address value in the CAN communication extended frame of the fourth inverter according to the address conflict data frame.
[0117] Further, after distributing the CAN communication addresses to multiple slave inverters through the host inverter, the parallel control device 3 of the inverters includes: The address table generation module is configured to generate a dynamic address table according to the host inverter, multiple slave inverters, and the CAN communication addresses, where the dynamic address table includes the CAN communication address of the host inverter, the CAN communication addresses of multiple slave inverters, and the address priorities of multiple slave inverters.
[0118] Further, after generating the dynamic address table, the parallel control device 3 of the inverters further includes: An address table sending module, configured to send a dynamic address table to online slave inverters through a master inverter within a first preset time period, so that after receiving the dynamic address table, the online slave inverters can obtain their own address priorities according to the dynamic address table and send reply information to the master inverter, where the reply information is used to indicate that the slave inverter is in an online state.
[0119] Further, after sending the dynamic address table to the online slave inverters through the master inverter within the first preset time period, the parallel control device 3 of the inverter further includes: A first status confirmation module, configured to determine that the slave inverter is in an offline state if the master inverter does not receive the reply information from the slave inverter, and clear the information of the slave inverter in the dynamic address table to obtain an updated dynamic address table.
[0120] Further, after generating the dynamic address table, the parallel control device 3 of the inverter further includes: A second status confirmation module, configured to determine that the master inverter is in an offline state if the slave inverter does not receive the dynamic address table sent by the master inverter within a second preset time period, and change the slave inverter with the highest address priority to a new master inverter.
[0121] It should be noted that the information interaction, execution process, etc. among the modules in the above parallel control device 3 of the inverter, due to being based on the same concept as the method embodiment of the present application, for its specific functions and the technical effects brought, reference can be specifically made to the method embodiment part, and details will not be elaborated here.
[0122] The embodiment of the present application further provides a terminal device, as Figure 6 shown. Figure 6 It is a schematic structural diagram of a terminal device provided by an embodiment of the present application. Referring to Figure 6 , the terminal device 4 of this embodiment includes: a memory 41, a processor 42, and a computer program stored in the memory 41 and executable on the processor 42. When the processor 42 executes the computer program, it implements the steps in any of the above method embodiments of the parallel control method of the inverter.
[0123] The embodiment of the present application further provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, it can implement the steps in each of the above method embodiments.
[0124] The embodiment of the present application provides a computer program product. When the computer program product runs on a mobile terminal, it enables the mobile terminal to implement the steps in each of the above method embodiments when executed.
[0125] When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, to implement all or part of the processes in the above-mentioned embodiment methods of this application, a computer program can be used to instruct the relevant hardware to complete. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by a processor, the steps of the above-mentioned various method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in the form of source code, object code, executable file or some intermediate form, etc. The computer-readable medium can at least include: any entity or device that can carry the computer program code to the photographing device / terminal device, recording medium, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electrical carrier signal, telecommunication signal, and software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk, or an optical disc, etc. In some jurisdictions, according to legislation and patent practice, the computer-readable medium cannot be an electrical carrier signal and a telecommunication signal.
[0126] In the above embodiments, the descriptions of the various embodiments have their own emphases. For the parts not detailed or recorded in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0127] Those of ordinary skill in the art can realize that the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.
[0128] In the embodiments provided in this application, it should be understood that the disclosed device / network device and method can be implemented in other ways. For example, the device / network device embodiments described above are only illustrative. For example, the division of modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection to each other can be through some interfaces. The indirect coupling or communication connection of the device or unit can be in an electrical, mechanical or other form.
[0129] The unit described as a separation component may or may not be physically separated, and the component shown as a unit may or may not be a physical unit, that is, it may be located in one place or may be distributed across multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0130] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the protection scope of the present application.
Claims
1. A parallel control method for an inverter, characterized in that, Including: After multiple inverters are powered on and start the paralleling task, obtain the EPWM count value in the time base count register of each of the multiple inverters and the RTC time value of the real-time clock; Based on the EPWM count value and the RTC time value, determine the controller area network (CAN) communication extended frame of each inverter; According to the CAN communication extended frame of each inverter, determine a master inverter and multiple slave inverters from the multiple inverters; Allocate CAN communication addresses to multiple slave inverters through the master inverter.
2. The parallel control method of the inverter according to claim 1, characterized in that, The CAN communication extended frame includes a CAN address value and a CAN data segment value; wherein, the CAN address value includes a CAN low-order extended frame address value, and the CAN data segment value includes a first data segment value and a second data segment value; The determining the controller area network (CAN) communication extended frame of each inverter based on the EPWM count value and the RTC time value includes: Using the EPWM count value as the CAN low-order extended frame address value in the CAN address value; Using the RTC time value of the inverter as the first data segment value in the CAN data segment value; Setting the second data segment value in the CAN data segment value to a preset segment value.
3. The parallel control method of the inverter according to claim 2, characterized in that, The determining a master inverter and multiple slave inverters from the multiple inverters according to the CAN communication extended frame of each inverter includes: Sorting the CAN low-order extended frame address values in the CAN address values of the multiple inverters in ascending order to obtain a sorting result corresponding to the multiple inverters; Determining the inverter corresponding to the CAN low-order extended frame address value ranked first in the sorting result as the master inverter, and determining the inverters corresponding to the remaining CAN low-order extended frame address values as the slave inverters.
4. The parallel control method of the inverter according to claim 3, characterized in that, The allocating CAN communication addresses to multiple slave inverters through the master inverter includes: After determining the master inverter and multiple slave inverters, sending a slave data frame to the slave inverters through the master inverter, where the slave data frame includes the CAN address value of the slave inverter and the slave CAN data segment value; Determining the CAN communication addresses of the multiple slave inverters according to the CAN address value of the slave inverter and the slave CAN data segment value; wherein, the first data segment value in the CAN address value and the slave CAN data segment value of the slave inverter remains unchanged, and the second data segment value in the slave CAN data segment value is determined according to the magnitude order of the CAN low-order extended frame address values of the slave inverters in the sorting result.
5. The parallel control method of the inverter according to claim 4, characterized in that, When a second inverter is reconnected after determining the master inverter, the method includes: Receiving the CAN low-order extended frame address value in the CAN communication extended frame of the second inverter through the master inverter; Comparing the CAN low-order extended frame address value of the master inverter with the CAN low-order extended frame address value of the second inverter; If the CAN low - extended frame address value of the host inverter is greater than the CAN low - extended frame address value of the second inverter, determine that the second inverter is the updated host inverter, and change the host inverter to a slave inverter; If the CAN low - extended frame address value of the host inverter is less than the CAN low - extended frame address value of the second inverter, determine that the second inverter is a slave inverter, and the host inverter remains unchanged.
6. The parallel control method of the inverter according to claim 5, characterized in that, After determining the host inverter, when the third inverter and the fourth inverter are connected again at the same time, the method further includes: Receiving the CAN communication extended frame of the third inverter and the CAN communication extended frame of the fourth inverter through the host inverter; If the CAN low - extended frame address value in the CAN communication extended frame of the third inverter is the same as the CAN low - extended frame address value in the CAN communication extended frame of the fourth inverter, compare the CAN data segment value in the CAN communication extended frame of the third inverter with the CAN data segment value in the CAN communication extended frame of the fourth inverter; If the first data segment value in the CAN data segment value of the third inverter is less than the first data segment value in the CAN data segment value of the fourth inverter, send a third slave data frame to the third inverter through the host inverter to determine the CAN communication address of the third inverter according to the third slave data frame; and send an address conflict data frame to the fourth inverter, so that the fourth inverter changes the CAN low - extended frame address value in the CAN communication extended frame of the fourth inverter according to the address conflict data frame.
7. The parallel control method of the inverter according to any one of claims 1-6, characterized in that, After distributing CAN communication addresses to multiple slave inverters through the host inverter, the method includes: Generating a dynamic address table according to the host inverter, multiple slave inverters, and the CAN communication addresses, where the dynamic address table includes the CAN communication address of the host inverter, the CAN communication addresses of multiple slave inverters, and the address priorities of multiple slave inverters.
8. The parallel control method of the inverter according to claim 7, characterized in that, After generating the dynamic address table, the method further includes: Sending the dynamic address table to the online slave inverters through the host inverter within a first preset time period, so that after receiving the dynamic address table, the online slave inverters can obtain their own address priorities according to the dynamic address table, and send a reply message to the host inverter, where the reply message is used to indicate that the slave inverter is in an online state.
9. The parallel control method of the inverter according to claim 8, characterized in that, After sending the dynamic address table to the online slave inverters through the host inverter within the first preset time period, the method further includes: If the host inverter does not receive the reply message from the slave inverter, determine that the slave inverter is in an offline state, and clear the information of the slave inverter in the dynamic address table to obtain an updated dynamic address table.
10. The parallel control method of the inverter according to claim 9, characterized in that After generating the dynamic address table, the method further includes: If the slave inverter does not receive the dynamic address table sent by the master inverter within the second preset time period, it is determined that the master inverter is in an offline state, and the slave inverter with the highest address priority is changed to a new master inverter.
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